add lvds1024*800

hc

2024-01-31 f70575805708cabdedea7498aaa3f710fde4d920

 kernel/drivers/net/ethernet/intel/igb/e1000_mac.c
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@@ -12,7 +12,7 @@
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 #include "igb.h"
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 static s32 igb_set_default_fc(struct e1000_hw *hw);
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-static s32 igb_set_fc_watermarks(struct e1000_hw *hw);
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+static void igb_set_fc_watermarks(struct e1000_hw *hw);
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 /**
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  *  igb_get_bus_info_pcie - Get PCIe bus information
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@@ -166,6 +166,7 @@
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  *  @vlan: VLAN id to add or remove
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  *  @vind: VMDq output index that maps queue to VLAN id
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  *  @vlan_on: if true add filter, if false remove
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+ *  @vlvf_bypass: skip VLVF if no match is found
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  *
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  *  Sets or clears a bit in the VLAN filter table array based on VLAN id
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  *  and if we are adding or removing the filter
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@@ -425,7 +426,7 @@
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 static u32 igb_hash_mc_addr(struct e1000_hw *hw, u8 *mc_addr)
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 {
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 	u32 hash_value, hash_mask;
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-	u8 bit_shift = 0;
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+	u8 bit_shift = 1;
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 	/* Register count multiplied by bits per register */
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 	hash_mask = (hw->mac.mta_reg_count * 32) - 1;
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@@ -433,7 +434,7 @@
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 	/* For a mc_filter_type of 0, bit_shift is the number of left-shifts
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 	 * where 0xFF would still fall within the hash mask.
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 	 */
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-	while (hash_mask >> bit_shift != 0xFF)
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+	while (hash_mask >> bit_shift != 0xFF && bit_shift < 4)
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 		bit_shift++;
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 	/* The portion of the address that is used for the hash table
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@@ -687,7 +688,7 @@
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 	wr32(E1000_FCTTV, hw->fc.pause_time);
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-	ret_val = igb_set_fc_watermarks(hw);
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+	igb_set_fc_watermarks(hw);
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 out:
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@@ -723,9 +724,8 @@
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  *  flow control XON frame transmission is enabled, then set XON frame
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  *  tansmission as well.
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  **/
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-static s32 igb_set_fc_watermarks(struct e1000_hw *hw)
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+static void igb_set_fc_watermarks(struct e1000_hw *hw)
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 {
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-	s32 ret_val = 0;
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 	u32 fcrtl = 0, fcrth = 0;
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 	/* Set the flow control receive threshold registers.  Normally,
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@@ -747,8 +747,6 @@
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 	}
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 	wr32(E1000_FCRTL, fcrtl);
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 	wr32(E1000_FCRTH, fcrth);
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-
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-	return ret_val;
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 }
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 /**