add lvds1024*800

hc

2024-01-31 f70575805708cabdedea7498aaa3f710fde4d920

 kernel/drivers/net/ethernet/cadence/macb.h
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@@ -1,16 +1,14 @@
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+/* SPDX-License-Identifier: GPL-2.0-only */
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 /*
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  * Atmel MACB Ethernet Controller driver
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  *
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  * Copyright (C) 2004-2006 Atmel Corporation
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- *
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- * This program is free software; you can redistribute it and/or modify
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- * it under the terms of the GNU General Public License version 2 as
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- * published by the Free Software Foundation.
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  */
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 #ifndef _MACB_H
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 #define _MACB_H
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-#include <linux/phy.h>
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+#include <linux/clk.h>
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+#include <linux/phylink.h>
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 #include <linux/ptp_clock_kernel.h>
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 #include <linux/net_tstamp.h>
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 #include <linux/interrupt.h>
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@@ -93,6 +91,7 @@
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 #define GEM_SA3T		0x009C /* Specific3 Top */
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 #define GEM_SA4B		0x00A0 /* Specific4 Bottom */
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 #define GEM_SA4T		0x00A4 /* Specific4 Top */
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+#define GEM_WOL			0x00b8 /* Wake on LAN */
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 #define GEM_EFTSH		0x00e8 /* PTP Event Frame Transmitted Seconds Register 47:32 */
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 #define GEM_EFRSH		0x00ec /* PTP Event Frame Received Seconds Register 47:32 */
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 #define GEM_PEFTSH		0x00f0 /* PTP Peer Event Frame Transmitted Seconds Register 47:32 */
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@@ -367,6 +366,8 @@
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 #define MACB_ISR_RLE_SIZE	1
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 #define MACB_TXERR_OFFSET	6 /* EN TX frame corrupt from error interrupt */
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 #define MACB_TXERR_SIZE		1
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+#define MACB_RM9200_TBRE_OFFSET	6 /* EN may send new frame interrupt (RM9200) */
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+#define MACB_RM9200_TBRE_SIZE	1
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 #define MACB_TCOMP_OFFSET	7 /* Enable transmit complete interrupt */
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 #define MACB_TCOMP_SIZE		1
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 #define MACB_ISR_LINK_OFFSET	9 /* Enable link change interrupt */
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@@ -399,6 +400,8 @@
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 #define MACB_PDRSFT_SIZE	1
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 #define MACB_SRI_OFFSET		26 /* TSU Seconds Register Increment */
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 #define MACB_SRI_SIZE		1
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+#define GEM_WOL_OFFSET		28 /* Enable wake-on-lan interrupt */
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+#define GEM_WOL_SIZE		1
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 /* Timer increment fields */
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 #define MACB_TI_CNS_OFFSET	0
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@@ -633,10 +636,17 @@
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 #define GEM_CLK_DIV96				5
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 /* Constants for MAN register */
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-#define MACB_MAN_SOF				1
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-#define MACB_MAN_WRITE				1
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-#define MACB_MAN_READ				2
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-#define MACB_MAN_CODE				2
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+#define MACB_MAN_C22_SOF			1
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+#define MACB_MAN_C22_WRITE			1
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+#define MACB_MAN_C22_READ			2
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+#define MACB_MAN_C22_CODE			2
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+
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+#define MACB_MAN_C45_SOF			0
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+#define MACB_MAN_C45_ADDR			0
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+#define MACB_MAN_C45_WRITE			1
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+#define MACB_MAN_C45_POST_READ_INCR		2
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+#define MACB_MAN_C45_READ			3
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+#define MACB_MAN_C45_CODE			2
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 /* Capability mask bits */
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 #define MACB_CAPS_ISR_CLEAR_ON_WRITE		0x00000001
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@@ -648,6 +658,7 @@
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 #define MACB_CAPS_GEM_HAS_PTP			0x00000040
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 #define MACB_CAPS_BD_RD_PREFETCH		0x00000080
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 #define MACB_CAPS_NEEDS_RSTONUBR		0x00000100
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+#define MACB_CAPS_MACB_IS_EMAC			0x08000000
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 #define MACB_CAPS_FIFO_MODE			0x10000000
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 #define MACB_CAPS_GIGABIT_MODE_AVAILABLE	0x20000000
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 #define MACB_CAPS_SG_DISABLED			0x40000000
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@@ -718,6 +729,8 @@
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 			__v = macb_readl((__bp), __reg); \
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 		__v; \
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 	})
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+
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+#define MACB_READ_NSR(bp)	macb_readl(bp, NSR)
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 /* struct macb_dma_desc - Hardware DMA descriptor
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  * @addr: DMA address of data buffer
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@@ -838,6 +851,9 @@
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 /* limit RX checksum offload to TCP and UDP packets */
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 #define GEM_RX_CSUM_CHECKED_MASK		2
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+
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+/* Scaled PPM fraction */
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+#define PPM_FRACTION	16
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 /* struct macb_tx_skb - data about an skb which is being transmitted
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  * @skb: skb currently being transmitted, only set for the last buffer
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@@ -1065,7 +1081,8 @@
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 	int	(*mog_alloc_rx_buffers)(struct macb *bp);
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 	void	(*mog_free_rx_buffers)(struct macb *bp);
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 	void	(*mog_init_rings)(struct macb *bp);
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-	int	(*mog_rx)(struct macb_queue *queue, int budget);
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+	int	(*mog_rx)(struct macb_queue *queue, struct napi_struct *napi,
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+			  int budget);
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 };
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 /* MACB-PTP interface: adapt to platform needs. */
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@@ -1082,12 +1099,17 @@
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 			 struct ifreq *ifr, int cmd);
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 };
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+struct macb_pm_data {
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+	u32 scrt2;
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+	u32 usrio;
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+};
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+
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 struct macb_config {
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 	u32			caps;
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 	unsigned int		dma_burst_length;
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 	int	(*clk_init)(struct platform_device *pdev, struct clk **pclk,
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 			    struct clk **hclk, struct clk **tx_clk,
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-			    struct clk **rx_clk);
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+			    struct clk **rx_clk, struct clk **tsu_clk);
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 	int	(*init)(struct platform_device *pdev);
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 	int	jumbo_max_len;
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 };
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@@ -1167,6 +1189,7 @@
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 	struct clk		*hclk;
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 	struct clk		*tx_clk;
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 	struct clk		*rx_clk;
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+	struct clk		*tsu_clk;
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 	struct net_device	*dev;
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 	union {
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 		struct macb_stats	macb;
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@@ -1176,20 +1199,18 @@
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 	struct macb_or_gem_ops	macbgem_ops;
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 	struct mii_bus		*mii_bus;
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-	struct device_node	*phy_node;
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-	int 			link;
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-	int 			speed;
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-	int 			duplex;
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+	struct phylink		*phylink;
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+	struct phylink_config	phylink_config;
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 	u32			caps;
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 	unsigned int		dma_burst_length;
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 	phy_interface_t		phy_interface;
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-	/* AT91RM9200 transmit */
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-	struct sk_buff *skb;			/* holds skb until xmit interrupt completes */
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-	dma_addr_t skb_physaddr;		/* phys addr from pci_map_single */
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-	int skb_length;				/* saved skb length for pci_unmap_single */
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+	/* AT91RM9200 transmit queue (1 on wire + 1 queued) */
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+	struct macb_tx_skb	rm9200_txq[2];
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+	unsigned int		rm9200_tx_tail;
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+	unsigned int		rm9200_tx_len;
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 	unsigned int		max_tx_length;
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 	u64			ethtool_stats[GEM_STATS_LEN + QUEUE_STATS_LEN * MACB_MAX_QUEUES];
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@@ -1221,6 +1242,8 @@
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 	int	tx_bd_rd_prefetch;
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 	u32	rx_intr_mask;
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+
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+	struct macb_pm_data pm_data;
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 };
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 #ifdef CONFIG_MACB_USE_HWSTAMP
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@@ -1278,4 +1301,14 @@
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 	return !!(bp->caps & MACB_CAPS_GEM_HAS_PTP);
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 }
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+/**
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+ * struct macb_platform_data - platform data for MACB Ethernet used for PCI registration
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+ * @pclk:		platform clock
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+ * @hclk:		AHB clock
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+ */
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+struct macb_platform_data {
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+	struct clk	*pclk;
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+	struct clk	*hclk;
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+};
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+
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 #endif /* _MACB_H */