forked from ~ljy/RK356X_SDK_RELEASE
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hc
2024-01-31 f70575805708cabdedea7498aaa3f710fde4d920 
 kernel/drivers/mtd/chips/cfi_cmdset_0002.c
....@@ -49,9 +49,25 @@
4949 #define SST49LF008A		0x005a
5050 #define AT49BV6416		0x00d6
5151 
52
+/*
53
+ * Status Register bit description. Used by flash devices that don't
54
+ * support DQ polling (e.g. HyperFlash)
55
+ */
56
+#define CFI_SR_DRB		BIT(7)
57
+#define CFI_SR_ESB		BIT(5)
58
+#define CFI_SR_PSB		BIT(4)
59
+#define CFI_SR_WBASB		BIT(3)
60
+#define CFI_SR_SLSB		BIT(1)
61
+
62
+enum cfi_quirks {
63
+	CFI_QUIRK_DQ_TRUE_DATA = BIT(0),
64
+};
65
+
5266 static int cfi_amdstd_read (struct mtd_info *, loff_t, size_t, size_t *, u_char *);
5367 static int cfi_amdstd_write_words(struct mtd_info *, loff_t, size_t, size_t *, const u_char *);
68
+#if !FORCE_WORD_WRITE
5469 static int cfi_amdstd_write_buffers(struct mtd_info *, loff_t, size_t, size_t *, const u_char *);
70
+#endif
5571 static int cfi_amdstd_erase_chip(struct mtd_info *, struct erase_info *);
5672 static int cfi_amdstd_erase_varsize(struct mtd_info *, struct erase_info *);
5773 static void cfi_amdstd_sync (struct mtd_info *);
....@@ -97,6 +113,59 @@
97113 	.module		= THIS_MODULE
98114 };
99115 
116
+/*
117
+ * Use status register to poll for Erase/write completion when DQ is not
118
+ * supported. This is indicated by Bit[1:0] of SoftwareFeatures field in
119
+ * CFI Primary Vendor-Specific Extended Query table 1.5
120
+ */
121
+static int cfi_use_status_reg(struct cfi_private *cfi)
122
+{
123
+	struct cfi_pri_amdstd *extp = cfi->cmdset_priv;
124
+	u8 poll_mask = CFI_POLL_STATUS_REG | CFI_POLL_DQ;
125
+
126
+	return extp && extp->MinorVersion >= '5' &&
127
+		(extp->SoftwareFeatures & poll_mask) == CFI_POLL_STATUS_REG;
128
+}
129
+
130
+static int cfi_check_err_status(struct map_info *map, struct flchip *chip,
131
+				unsigned long adr)
132
+{
133
+	struct cfi_private *cfi = map->fldrv_priv;
134
+	map_word status;
135
+
136
+	if (!cfi_use_status_reg(cfi))
137
+		return 0;
138
+
139
+	cfi_send_gen_cmd(0x70, cfi->addr_unlock1, chip->start, map, cfi,
140
+			 cfi->device_type, NULL);
141
+	status = map_read(map, adr);
142
+
143
+	/* The error bits are invalid while the chip's busy */
144
+	if (!map_word_bitsset(map, status, CMD(CFI_SR_DRB)))
145
+		return 0;
146
+
147
+	if (map_word_bitsset(map, status, CMD(0x3a))) {
148
+		unsigned long chipstatus = MERGESTATUS(status);
149
+
150
+		if (chipstatus & CFI_SR_ESB)
151
+			pr_err("%s erase operation failed, status %lx\n",
152
+			       map->name, chipstatus);
153
+		if (chipstatus & CFI_SR_PSB)
154
+			pr_err("%s program operation failed, status %lx\n",
155
+			       map->name, chipstatus);
156
+		if (chipstatus & CFI_SR_WBASB)
157
+			pr_err("%s buffer program command aborted, status %lx\n",
158
+			       map->name, chipstatus);
159
+		if (chipstatus & CFI_SR_SLSB)
160
+			pr_err("%s sector write protected, status %lx\n",
161
+			       map->name, chipstatus);
162
+
163
+		/* Erase/Program status bits are set on the operation failure */
164
+		if (chipstatus & (CFI_SR_ESB | CFI_SR_PSB))
165
+			return 1;
166
+	}
167
+	return 0;
168
+}
100169 
101170 /* #define DEBUG_CFI_FEATURES */
102171 
....@@ -202,6 +271,7 @@
202271 }
203272 #endif
204273 
274
+#if !FORCE_WORD_WRITE
205275 static void fixup_use_write_buffers(struct mtd_info *mtd)
206276 {
207277 	struct map_info *map = mtd->priv;
....@@ -211,6 +281,7 @@
211281 		mtd->_write = cfi_amdstd_write_buffers;
212282 	}
213283 }
284
+#endif /* !FORCE_WORD_WRITE */
214285 
215286 /* Atmel chips don't use the same PRI format as AMD chips */
216287 static void fixup_convert_atmel_pri(struct mtd_info *mtd)
....@@ -365,6 +436,15 @@
365436 		mtd->name);
366437 }
367438 
439
+static void fixup_quirks(struct mtd_info *mtd)
440
+{
441
+	struct map_info *map = mtd->priv;
442
+	struct cfi_private *cfi = map->fldrv_priv;
443
+
444
+	if (cfi->mfr == CFI_MFR_AMD && cfi->id == 0x0c01)
445
+		cfi->quirks |= CFI_QUIRK_DQ_TRUE_DATA;
446
+}
447
+
368448 /* Used to fix CFI-Tables of chips without Extended Query Tables */
369449 static struct cfi_fixup cfi_nopri_fixup_table[] = {
370450 	{ CFI_MFR_SST, 0x234a, fixup_sst39vf }, /* SST39VF1602 */
....@@ -403,6 +483,7 @@
403483 #if !FORCE_WORD_WRITE
404484 	{ CFI_MFR_ANY, CFI_ID_ANY, fixup_use_write_buffers },
405485 #endif
486
+	{ CFI_MFR_ANY, CFI_ID_ANY, fixup_quirks },
406487 	{ 0, 0, NULL }
407488 };
408489 static struct cfi_fixup jedec_fixup_table[] = {
....@@ -731,31 +812,10 @@
731812 }
732813 
733814 /*
734
- * Return true if the chip is ready.
735
- *
736
- * Ready is one of: read mode, query mode, erase-suspend-read mode (in any
737
- * non-suspended sector) and is indicated by no toggle bits toggling.
738
- *
739
- * Note that anything more complicated than checking if no bits are toggling
740
- * (including checking DQ5 for an error status) is tricky to get working
741
- * correctly and is therefore not done	(particularly with interleaved chips
742
- * as each chip must be checked independently of the others).
743
- */
744
-static int __xipram chip_ready(struct map_info *map, unsigned long addr)
745
-{
746
-	map_word d, t;
747
-
748
-	d = map_read(map, addr);
749
-	t = map_read(map, addr);
750
-
751
-	return map_word_equal(map, d, t);
752
-}
753
-
754
-/*
755815  * Return true if the chip is ready and has the correct value.
756816  *
757817  * Ready is one of: read mode, query mode, erase-suspend-read mode (in any
758
- * non-suspended sector) and it is indicated by no bits toggling.
818
+ * non-suspended sector) and is indicated by no toggle bits toggling.
759819  *
760820  * Error are indicated by toggling bits or bits held with the wrong value,
761821  * or with bits toggling.
....@@ -764,17 +824,48 @@
764824  * (including checking DQ5 for an error status) is tricky to get working
765825  * correctly and is therefore not done	(particularly with interleaved chips
766826  * as each chip must be checked independently of the others).
767
- *
768827  */
769
-static int __xipram chip_good(struct map_info *map, unsigned long addr, map_word expected)
828
+static int __xipram chip_ready(struct map_info *map, struct flchip *chip,
829
+			       unsigned long addr, map_word *expected)
770830 {
771
-	map_word oldd, curd;
831
+	struct cfi_private *cfi = map->fldrv_priv;
832
+	map_word d, t;
833
+	int ret;
772834 
773
-	oldd = map_read(map, addr);
774
-	curd = map_read(map, addr);
835
+	if (cfi_use_status_reg(cfi)) {
836
+		map_word ready = CMD(CFI_SR_DRB);
837
+		/*
838
+		 * For chips that support status register, check device
839
+		 * ready bit
840
+		 */
841
+		cfi_send_gen_cmd(0x70, cfi->addr_unlock1, chip->start, map, cfi,
842
+				 cfi->device_type, NULL);
843
+		t = map_read(map, addr);
775844 
776
-	return	map_word_equal(map, oldd, curd) &&
777
-		map_word_equal(map, curd, expected);
845
+		return map_word_andequal(map, t, ready, ready);
846
+	}
847
+
848
+	d = map_read(map, addr);
849
+	t = map_read(map, addr);
850
+
851
+	ret = map_word_equal(map, d, t);
852
+
853
+	if (!ret || !expected)
854
+		return ret;
855
+
856
+	return map_word_equal(map, t, *expected);
857
+}
858
+
859
+static int __xipram chip_good(struct map_info *map, struct flchip *chip,
860
+			      unsigned long addr, map_word *expected)
861
+{
862
+	struct cfi_private *cfi = map->fldrv_priv;
863
+	map_word *datum = expected;
864
+
865
+	if (cfi->quirks & CFI_QUIRK_DQ_TRUE_DATA)
866
+		datum = NULL;
867
+
868
+	return chip_ready(map, chip, addr, datum);
778869 }
779870 
780871 static int get_chip(struct map_info *map, struct flchip *chip, unsigned long adr, int mode)
....@@ -791,7 +882,7 @@
791882 
792883 	case FL_STATUS:
793884 		for (;;) {
794
-			if (chip_ready(map, adr))
885
+			if (chip_ready(map, chip, adr, NULL))
795886 				break;
796887 
797888 			if (time_after(jiffies, timeo)) {
....@@ -829,7 +920,7 @@
829920 		chip->state = FL_ERASE_SUSPENDING;
830921 		chip->erase_suspended = 1;
831922 		for (;;) {
832
-			if (chip_ready(map, adr))
923
+			if (chip_ready(map, chip, adr, NULL))
833924 				break;
834925 
835926 			if (time_after(jiffies, timeo)) {
....@@ -868,7 +959,7 @@
868959 		/* Only if there's no operation suspended... */
869960 		if (mode == FL_READY && chip->oldstate == FL_READY)
870961 			return 0;
871
-
962
+		fallthrough;
872963 	default:
873964 	sleep:
874965 		set_current_state(TASK_UNINTERRUPTIBLE);
....@@ -1360,7 +1451,7 @@
13601451 	/* wait for chip to become ready */
13611452 	timeo = jiffies + msecs_to_jiffies(2);
13621453 	for (;;) {
1363
-		if (chip_ready(map, adr))
1454
+		if (chip_ready(map, chip, adr, NULL))
13641455 			break;
13651456 
13661457 		if (time_after(jiffies, timeo)) {
....@@ -1546,11 +1637,11 @@
15461637 				   do_otp_lock, 1);
15471638 }
15481639 
1549
-static int __xipram do_write_oneword(struct map_info *map, struct flchip *chip,
1550
-				     unsigned long adr, map_word datum,
1551
-				     int mode)
1640
+static int __xipram do_write_oneword_once(struct map_info *map,
1641
+					  struct flchip *chip,
1642
+					  unsigned long adr, map_word datum,
1643
+					  int mode, struct cfi_private *cfi)
15521644 {
1553
-	struct cfi_private *cfi = map->fldrv_priv;
15541645 	unsigned long timeo = jiffies + HZ;
15551646 	/*
15561647 	 * We use a 1ms + 1 jiffies generic timeout for writes (most devices
....@@ -1563,42 +1654,7 @@
15631654 	 */
15641655 	unsigned long uWriteTimeout = (HZ / 1000) + 1;
15651656 	int ret = 0;
1566
-	map_word oldd;
1567
-	int retry_cnt = 0;
15681657 
1569
-	adr += chip->start;
1570
-
1571
-	mutex_lock(&chip->mutex);
1572
-	ret = get_chip(map, chip, adr, mode);
1573
-	if (ret) {
1574
-		mutex_unlock(&chip->mutex);
1575
-		return ret;
1576
-	}
1577
-
1578
-	pr_debug("MTD %s(): WRITE 0x%.8lx(0x%.8lx)\n",
1579
-		 __func__, adr, datum.x[0]);
1580
-
1581
-	if (mode == FL_OTP_WRITE)
1582
-		otp_enter(map, chip, adr, map_bankwidth(map));
1583
-
1584
-	/*
1585
-	 * Check for a NOP for the case when the datum to write is already
1586
-	 * present - it saves time and works around buggy chips that corrupt
1587
-	 * data at other locations when 0xff is written to a location that
1588
-	 * already contains 0xff.
1589
-	 */
1590
-	oldd = map_read(map, adr);
1591
-	if (map_word_equal(map, oldd, datum)) {
1592
-		pr_debug("MTD %s(): NOP\n",
1593
-		       __func__);
1594
-		goto op_done;
1595
-	}
1596
-
1597
-	XIP_INVAL_CACHED_RANGE(map, adr, map_bankwidth(map));
1598
-	ENABLE_VPP(map);
1599
-	xip_disable(map, chip, adr);
1600
-
1601
- retry:
16021658 	cfi_send_gen_cmd(0xAA, cfi->addr_unlock1, chip->start, map, cfi, cfi->device_type, NULL);
16031659 	cfi_send_gen_cmd(0x55, cfi->addr_unlock2, chip->start, map, cfi, cfi->device_type, NULL);
16041660 	cfi_send_gen_cmd(0xA0, cfi->addr_unlock1, chip->start, map, cfi, cfi->device_type, NULL);
....@@ -1630,7 +1686,8 @@
16301686 		 * We check "time_after" and "!chip_good" before checking
16311687 		 * "chip_good" to avoid the failure due to scheduling.
16321688 		 */
1633
-		if (time_after(jiffies, timeo) && !chip_good(map, adr, datum)) {
1689
+		if (time_after(jiffies, timeo) &&
1690
+		    !chip_good(map, chip, adr, &datum)) {
16341691 			xip_enable(map, chip, adr);
16351692 			printk(KERN_WARNING "MTD %s(): software timeout\n", __func__);
16361693 			xip_disable(map, chip, adr);
....@@ -1638,14 +1695,81 @@
16381695 			break;
16391696 		}
16401697 
1641
-		if (chip_good(map, adr, datum))
1698
+		if (chip_good(map, chip, adr, &datum)) {
1699
+			if (cfi_check_err_status(map, chip, adr))
1700
+				ret = -EIO;
16421701 			break;
1702
+		}
16431703 
16441704 		/* Latency issues. Drop the lock, wait a while and retry */
16451705 		UDELAY(map, chip, adr, 1);
16461706 	}
16471707 
1648
-	/* Did we succeed? */
1708
+	return ret;
1709
+}
1710
+
1711
+static int __xipram do_write_oneword_start(struct map_info *map,
1712
+					   struct flchip *chip,
1713
+					   unsigned long adr, int mode)
1714
+{
1715
+	int ret;
1716
+
1717
+	mutex_lock(&chip->mutex);
1718
+
1719
+	ret = get_chip(map, chip, adr, mode);
1720
+	if (ret) {
1721
+		mutex_unlock(&chip->mutex);
1722
+		return ret;
1723
+	}
1724
+
1725
+	if (mode == FL_OTP_WRITE)
1726
+		otp_enter(map, chip, adr, map_bankwidth(map));
1727
+
1728
+	return ret;
1729
+}
1730
+
1731
+static void __xipram do_write_oneword_done(struct map_info *map,
1732
+					   struct flchip *chip,
1733
+					   unsigned long adr, int mode)
1734
+{
1735
+	if (mode == FL_OTP_WRITE)
1736
+		otp_exit(map, chip, adr, map_bankwidth(map));
1737
+
1738
+	chip->state = FL_READY;
1739
+	DISABLE_VPP(map);
1740
+	put_chip(map, chip, adr);
1741
+
1742
+	mutex_unlock(&chip->mutex);
1743
+}
1744
+
1745
+static int __xipram do_write_oneword_retry(struct map_info *map,
1746
+					   struct flchip *chip,
1747
+					   unsigned long adr, map_word datum,
1748
+					   int mode)
1749
+{
1750
+	struct cfi_private *cfi = map->fldrv_priv;
1751
+	int ret = 0;
1752
+	map_word oldd;
1753
+	int retry_cnt = 0;
1754
+
1755
+	/*
1756
+	 * Check for a NOP for the case when the datum to write is already
1757
+	 * present - it saves time and works around buggy chips that corrupt
1758
+	 * data at other locations when 0xff is written to a location that
1759
+	 * already contains 0xff.
1760
+	 */
1761
+	oldd = map_read(map, adr);
1762
+	if (map_word_equal(map, oldd, datum)) {
1763
+		pr_debug("MTD %s(): NOP\n", __func__);
1764
+		return ret;
1765
+	}
1766
+
1767
+	XIP_INVAL_CACHED_RANGE(map, adr, map_bankwidth(map));
1768
+	ENABLE_VPP(map);
1769
+	xip_disable(map, chip, adr);
1770
+
1771
+ retry:
1772
+	ret = do_write_oneword_once(map, chip, adr, datum, mode, cfi);
16491773 	if (ret) {
16501774 		/* reset on all failures. */
16511775 		map_write(map, CMD(0xF0), chip->start);
....@@ -1657,13 +1781,28 @@
16571781 		}
16581782 	}
16591783 	xip_enable(map, chip, adr);
1660
- op_done:
1661
-	if (mode == FL_OTP_WRITE)
1662
-		otp_exit(map, chip, adr, map_bankwidth(map));
1663
-	chip->state = FL_READY;
1664
-	DISABLE_VPP(map);
1665
-	put_chip(map, chip, adr);
1666
-	mutex_unlock(&chip->mutex);
1784
+
1785
+	return ret;
1786
+}
1787
+
1788
+static int __xipram do_write_oneword(struct map_info *map, struct flchip *chip,
1789
+				     unsigned long adr, map_word datum,
1790
+				     int mode)
1791
+{
1792
+	int ret;
1793
+
1794
+	adr += chip->start;
1795
+
1796
+	pr_debug("MTD %s(): WRITE 0x%.8lx(0x%.8lx)\n", __func__, adr,
1797
+		 datum.x[0]);
1798
+
1799
+	ret = do_write_oneword_start(map, chip, adr, mode);
1800
+	if (ret)
1801
+		return ret;
1802
+
1803
+	ret = do_write_oneword_retry(map, chip, adr, datum, mode);
1804
+
1805
+	do_write_oneword_done(map, chip, adr, mode);
16671806 
16681807 	return ret;
16691808 }
....@@ -1674,7 +1813,7 @@
16741813 {
16751814 	struct map_info *map = mtd->priv;
16761815 	struct cfi_private *cfi = map->fldrv_priv;
1677
-	int ret = 0;
1816
+	int ret;
16781817 	int chipnum;
16791818 	unsigned long ofs, chipstart;
16801819 	DECLARE_WAITQUEUE(wait, current);
....@@ -1792,6 +1931,83 @@
17921931 	return 0;
17931932 }
17941933 
1934
+#if !FORCE_WORD_WRITE
1935
+static int __xipram do_write_buffer_wait(struct map_info *map,
1936
+					 struct flchip *chip, unsigned long adr,
1937
+					 map_word datum)
1938
+{
1939
+	unsigned long timeo;
1940
+	unsigned long u_write_timeout;
1941
+	int ret = 0;
1942
+
1943
+	/*
1944
+	 * Timeout is calculated according to CFI data, if available.
1945
+	 * See more comments in cfi_cmdset_0002().
1946
+	 */
1947
+	u_write_timeout = usecs_to_jiffies(chip->buffer_write_time_max);
1948
+	timeo = jiffies + u_write_timeout;
1949
+
1950
+	for (;;) {
1951
+		if (chip->state != FL_WRITING) {
1952
+			/* Someone's suspended the write. Sleep */
1953
+			DECLARE_WAITQUEUE(wait, current);
1954
+
1955
+			set_current_state(TASK_UNINTERRUPTIBLE);
1956
+			add_wait_queue(&chip->wq, &wait);
1957
+			mutex_unlock(&chip->mutex);
1958
+			schedule();
1959
+			remove_wait_queue(&chip->wq, &wait);
1960
+			timeo = jiffies + (HZ / 2); /* FIXME */
1961
+			mutex_lock(&chip->mutex);
1962
+			continue;
1963
+		}
1964
+
1965
+		/*
1966
+		 * We check "time_after" and "!chip_good" before checking
1967
+		 * "chip_good" to avoid the failure due to scheduling.
1968
+		 */
1969
+		if (time_after(jiffies, timeo) &&
1970
+		    !chip_good(map, chip, adr, &datum)) {
1971
+			pr_err("MTD %s(): software timeout, address:0x%.8lx.\n",
1972
+			       __func__, adr);
1973
+			ret = -EIO;
1974
+			break;
1975
+		}
1976
+
1977
+		if (chip_good(map, chip, adr, &datum)) {
1978
+			if (cfi_check_err_status(map, chip, adr))
1979
+				ret = -EIO;
1980
+			break;
1981
+		}
1982
+
1983
+		/* Latency issues. Drop the lock, wait a while and retry */
1984
+		UDELAY(map, chip, adr, 1);
1985
+	}
1986
+
1987
+	return ret;
1988
+}
1989
+
1990
+static void __xipram do_write_buffer_reset(struct map_info *map,
1991
+					   struct flchip *chip,
1992
+					   struct cfi_private *cfi)
1993
+{
1994
+	/*
1995
+	 * Recovery from write-buffer programming failures requires
1996
+	 * the write-to-buffer-reset sequence.  Since the last part
1997
+	 * of the sequence also works as a normal reset, we can run
1998
+	 * the same commands regardless of why we are here.
1999
+	 * See e.g.
2000
+	 * http://www.spansion.com/Support/Application%20Notes/MirrorBit_Write_Buffer_Prog_Page_Buffer_Read_AN.pdf
2001
+	 */
2002
+	cfi_send_gen_cmd(0xAA, cfi->addr_unlock1, chip->start, map, cfi,
2003
+			 cfi->device_type, NULL);
2004
+	cfi_send_gen_cmd(0x55, cfi->addr_unlock2, chip->start, map, cfi,
2005
+			 cfi->device_type, NULL);
2006
+	cfi_send_gen_cmd(0xF0, cfi->addr_unlock1, chip->start, map, cfi,
2007
+			 cfi->device_type, NULL);
2008
+
2009
+	/* FIXME - should have reset delay before continuing */
2010
+}
17952011 
17962012 /*
17972013  * FIXME: interleaved mode not tested, and probably not supported!
....@@ -1801,14 +2017,7 @@
18012017 				    int len)
18022018 {
18032019 	struct cfi_private *cfi = map->fldrv_priv;
1804
-	unsigned long timeo = jiffies + HZ;
1805
-	/*
1806
-	 * Timeout is calculated according to CFI data, if available.
1807
-	 * See more comments in cfi_cmdset_0002().
1808
-	 */
1809
-	unsigned long uWriteTimeout =
1810
-				usecs_to_jiffies(chip->buffer_write_time_max);
1811
-	int ret = -EIO;
2020
+	int ret;
18122021 	unsigned long cmd_adr;
18132022 	int z, words;
18142023 	map_word datum;
....@@ -1864,61 +2073,12 @@
18642073 				adr, map_bankwidth(map),
18652074 				chip->word_write_time);
18662075 
1867
-	timeo = jiffies + uWriteTimeout;
2076
+	ret = do_write_buffer_wait(map, chip, adr, datum);
2077
+	if (ret)
2078
+		do_write_buffer_reset(map, chip, cfi);
18682079 
1869
-	for (;;) {
1870
-		if (chip->state != FL_WRITING) {
1871
-			/* Someone's suspended the write. Sleep */
1872
-			DECLARE_WAITQUEUE(wait, current);
1873
-
1874
-			set_current_state(TASK_UNINTERRUPTIBLE);
1875
-			add_wait_queue(&chip->wq, &wait);
1876
-			mutex_unlock(&chip->mutex);
1877
-			schedule();
1878
-			remove_wait_queue(&chip->wq, &wait);
1879
-			timeo = jiffies + (HZ / 2); /* FIXME */
1880
-			mutex_lock(&chip->mutex);
1881
-			continue;
1882
-		}
1883
-
1884
-		/*
1885
-		 * We check "time_after" and "!chip_good" before checking "chip_good" to avoid
1886
-		 * the failure due to scheduling.
1887
-		 */
1888
-		if (time_after(jiffies, timeo) && !chip_good(map, adr, datum))
1889
-			break;
1890
-
1891
-		if (chip_good(map, adr, datum)) {
1892
-			xip_enable(map, chip, adr);
1893
-			goto op_done;
1894
-		}
1895
-
1896
-		/* Latency issues. Drop the lock, wait a while and retry */
1897
-		UDELAY(map, chip, adr, 1);
1898
-	}
1899
-
1900
-	/*
1901
-	 * Recovery from write-buffer programming failures requires
1902
-	 * the write-to-buffer-reset sequence.  Since the last part
1903
-	 * of the sequence also works as a normal reset, we can run
1904
-	 * the same commands regardless of why we are here.
1905
-	 * See e.g.
1906
-	 * http://www.spansion.com/Support/Application%20Notes/MirrorBit_Write_Buffer_Prog_Page_Buffer_Read_AN.pdf
1907
-	 */
1908
-	cfi_send_gen_cmd(0xAA, cfi->addr_unlock1, chip->start, map, cfi,
1909
-			 cfi->device_type, NULL);
1910
-	cfi_send_gen_cmd(0x55, cfi->addr_unlock2, chip->start, map, cfi,
1911
-			 cfi->device_type, NULL);
1912
-	cfi_send_gen_cmd(0xF0, cfi->addr_unlock1, chip->start, map, cfi,
1913
-			 cfi->device_type, NULL);
19142080 	xip_enable(map, chip, adr);
1915
-	/* FIXME - should have reset delay before continuing */
19162081 
1917
-	printk(KERN_WARNING "MTD %s(): software timeout, address:0x%.8lx.\n",
1918
-	       __func__, adr);
1919
-
1920
-	ret = -EIO;
1921
- op_done:
19222082 	chip->state = FL_READY;
19232083 	DISABLE_VPP(map);
19242084 	put_chip(map, chip, adr);
....@@ -1934,7 +2094,7 @@
19342094 	struct map_info *map = mtd->priv;
19352095 	struct cfi_private *cfi = map->fldrv_priv;
19362096 	int wbufsize = cfi_interleave(cfi) << cfi->cfiq->MaxBufWriteSize;
1937
-	int ret = 0;
2097
+	int ret;
19382098 	int chipnum;
19392099 	unsigned long ofs;
19402100 
....@@ -2002,6 +2162,7 @@
20022162 
20032163 	return 0;
20042164 }
2165
+#endif /* !FORCE_WORD_WRITE */
20052166 
20062167 /*
20072168  * Wait for the flash chip to become ready to write data
....@@ -2022,7 +2183,7 @@
20222183 	 * If the driver thinks the chip is idle, and no toggle bits
20232184 	 * are changing, then the chip is actually idle for sure.
20242185 	 */
2025
-	if (chip->state == FL_READY && chip_ready(map, adr))
2186
+	if (chip->state == FL_READY && chip_ready(map, chip, adr, NULL))
20262187 		return 0;
20272188 
20282189 	/*
....@@ -2039,7 +2200,7 @@
20392200 
20402201 		/* wait for the chip to become ready */
20412202 		for (i = 0; i < jiffies_to_usecs(timeo); i++) {
2042
-			if (chip_ready(map, adr))
2203
+			if (chip_ready(map, chip, adr, NULL))
20432204 				return 0;
20442205 
20452206 			udelay(1);
....@@ -2070,7 +2231,7 @@
20702231 	struct cfi_private *cfi = map->fldrv_priv;
20712232 	int retry_cnt = 0;
20722233 	map_word oldd;
2073
-	int ret = 0;
2234
+	int ret;
20742235 	int i;
20752236 
20762237 	adr += chip->start;
....@@ -2103,13 +2264,14 @@
21032264 	map_write(map, datum, adr);
21042265 
21052266 	for (i = 0; i < jiffies_to_usecs(uWriteTimeout); i++) {
2106
-		if (chip_ready(map, adr))
2267
+		if (chip_ready(map, chip, adr, NULL))
21072268 			break;
21082269 
21092270 		udelay(1);
21102271 	}
21112272 
2112
-	if (!chip_good(map, adr, datum)) {
2273
+	if (!chip_ready(map, chip, adr, &datum) ||
2274
+	    cfi_check_err_status(map, chip, adr)) {
21132275 		/* reset on all failures. */
21142276 		map_write(map, CMD(0xF0), chip->start);
21152277 		/* FIXME - should have reset delay before continuing */
....@@ -2144,7 +2306,7 @@
21442306 	struct map_info *map = mtd->priv;
21452307 	struct cfi_private *cfi = map->fldrv_priv;
21462308 	unsigned long ofs, chipstart;
2147
-	int ret = 0;
2309
+	int ret;
21482310 	int chipnum;
21492311 
21502312 	chipnum = to >> cfi->chipshift;
....@@ -2248,13 +2410,14 @@
22482410 	unsigned long timeo = jiffies + HZ;
22492411 	unsigned long int adr;
22502412 	DECLARE_WAITQUEUE(wait, current);
2251
-	int ret = 0;
2413
+	int ret;
22522414 	int retry_cnt = 0;
2415
+	map_word datum = map_word_ff(map);
22532416 
22542417 	adr = cfi->addr_unlock1;
22552418 
22562419 	mutex_lock(&chip->mutex);
2257
-	ret = get_chip(map, chip, adr, FL_WRITING);
2420
+	ret = get_chip(map, chip, adr, FL_ERASING);
22582421 	if (ret) {
22592422 		mutex_unlock(&chip->mutex);
22602423 		return ret;
....@@ -2304,8 +2467,11 @@
23042467 			chip->erase_suspended = 0;
23052468 		}
23062469 
2307
-		if (chip_good(map, adr, map_word_ff(map)))
2470
+		if (chip_ready(map, chip, adr, &datum)) {
2471
+			if (cfi_check_err_status(map, chip, adr))
2472
+				ret = -EIO;
23082473 			break;
2474
+		}
23092475 
23102476 		if (time_after(jiffies, timeo)) {
23112477 			printk(KERN_WARNING "MTD %s(): software timeout\n",
....@@ -2344,8 +2510,9 @@
23442510 	struct cfi_private *cfi = map->fldrv_priv;
23452511 	unsigned long timeo = jiffies + HZ;
23462512 	DECLARE_WAITQUEUE(wait, current);
2347
-	int ret = 0;
2513
+	int ret;
23482514 	int retry_cnt = 0;
2515
+	map_word datum = map_word_ff(map);
23492516 
23502517 	adr += chip->start;
23512518 
....@@ -2400,8 +2567,11 @@
24002567 			chip->erase_suspended = 0;
24012568 		}
24022569 
2403
-		if (chip_good(map, adr, map_word_ff(map)))
2570
+		if (chip_ready(map, chip, adr, &datum)) {
2571
+			if (cfi_check_err_status(map, chip, adr))
2572
+				ret = -EIO;
24042573 			break;
2574
+		}
24052575 
24062576 		if (time_after(jiffies, timeo)) {
24072577 			printk(KERN_WARNING "MTD %s(): software timeout\n",
....@@ -2537,8 +2707,6 @@
25372707 	int locked;
25382708 };
25392709 
2540
-#define MAX_SECTORS			512
2541
-
25422710 #define DO_XXLOCK_ONEBLOCK_LOCK		((void *)1)
25432711 #define DO_XXLOCK_ONEBLOCK_UNLOCK	((void *)2)
25442712 #define DO_XXLOCK_ONEBLOCK_GETLOCK	((void *)3)
....@@ -2593,7 +2761,7 @@
25932761 	 */
25942762 	timeo = jiffies + msecs_to_jiffies(2000);	/* 2s max (un)locking */
25952763 	for (;;) {
2596
-		if (chip_ready(map, adr))
2764
+		if (chip_ready(map, chip, adr, NULL))
25972765 			break;
25982766 
25992767 		if (time_after(jiffies, timeo)) {
....@@ -2637,6 +2805,7 @@
26372805 	int i;
26382806 	int sectors;
26392807 	int ret;
2808
+	int max_sectors;
26402809 
26412810 	/*
26422811 	 * PPB unlocking always unlocks all sectors of the flash chip.
....@@ -2644,7 +2813,11 @@
26442813 	 * first check the locking status of all sectors and save
26452814 	 * it for future use.
26462815 	 */
2647
-	sect = kcalloc(MAX_SECTORS, sizeof(struct ppb_lock), GFP_KERNEL);
2816
+	max_sectors = 0;
2817
+	for (i = 0; i < mtd->numeraseregions; i++)
2818
+		max_sectors += regions[i].numblocks;
2819
+
2820
+	sect = kcalloc(max_sectors, sizeof(struct ppb_lock), GFP_KERNEL);
26482821 	if (!sect)
26492822 		return -ENOMEM;
26502823 
....@@ -2693,9 +2866,9 @@
26932866 		}
26942867 
26952868 		sectors++;
2696
-		if (sectors >= MAX_SECTORS) {
2869
+		if (sectors >= max_sectors) {
26972870 			printk(KERN_ERR "Only %d sectors for PPB locking supported!\n",
2698
-			       MAX_SECTORS);
2871
+			       max_sectors);
26992872 			kfree(sect);
27002873 			return -EINVAL;
27012874 		}
....@@ -2756,6 +2929,7 @@
27562929 			 * as the whole point is that nobody can do anything
27572930 			 * with the chip now anyway.
27582931 			 */
2932
+			fallthrough;
27592933 		case FL_SYNCING:
27602934 			mutex_unlock(&chip->mutex);
27612935 			break;