forked from ~ljy/RK356X_SDK_RELEASE
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2024-01-31 f70575805708cabdedea7498aaa3f710fde4d920 
 kernel/drivers/mmc/host/dw_mmc.c
....@@ -124,6 +124,8 @@
124124 EXPORT_SYMBOL(rv1106_sdmmc_put_lock);
125125 #endif
126126 
127
+#define RV1106_RAMDON_DATA_SIZE 508
128
+
127129 #if defined(CONFIG_DEBUG_FS)
128130 static int dw_mci_req_show(struct seq_file *s, void *v)
129131 {
....@@ -525,8 +527,7 @@
525527 		tasklet_schedule(&host->tasklet);
526528 	}
527529 
528
-	if (host->need_xfer_timer &&
529
-	    host->dir_status == DW_MCI_RECV_STATUS)
530
+	if (host->need_xfer_timer)
530531 		del_timer(&host->xfer_timer);
531532 }
532533 
....@@ -739,7 +740,7 @@
739740 	if (host->is_rv1106_sd && (data->flags & MMC_DATA_WRITE)) {
740741 		desc->des0 = desc_last->des0;
741742 		desc->des2 = desc_last->des2;
742
-		desc->des1 = 0x8; /* Random dirty data for last one desc */
743
+		desc->des1 = RV1106_RAMDON_DATA_SIZE; /* Random dirty data for last one desc */
743744 		desc_last = desc;
744745 	}
745746 
....@@ -1447,13 +1448,6 @@
14471448 		return;
14481449 	}
14491450 
1450
-	if (host->is_rv1106_sd) {
1451
-		u32 reg;
1452
-
1453
-		readl_poll_timeout(host->regs + SDMMC_STATUS, reg,
1454
-				   reg & BIT(2), USEC_PER_MSEC, 500 * USEC_PER_MSEC);
1455
-	}
1456
-
14571451 	spin_lock_bh(&host->lock);
14581452 
14591453 	if (host->is_rv1106_sd)
....@@ -1468,7 +1462,7 @@
14681462 {
14691463 	struct dw_mci_slot *slot = mmc_priv(mmc);
14701464 	const struct dw_mci_drv_data *drv_data = slot->host->drv_data;
1471
-	u32 regs;
1465
+	u32 regs, power_off_delay;
14721466 	int ret;
14731467 
14741468 	switch (ios->bus_width) {
....@@ -1507,8 +1501,14 @@
15071501 
15081502 	switch (ios->power_mode) {
15091503 	case MMC_POWER_UP:
1510
-		if (!IS_ERR_OR_NULL(slot->host->pinctrl))
1511
-			pinctrl_select_state(slot->host->pinctrl, slot->host->idle_state);
1504
+		if (dw_mci_get_cd(mmc) && !IS_ERR_OR_NULL(slot->host->pinctrl)) {
1505
+			if (!pinctrl_select_state(slot->host->pinctrl, slot->host->idle_state)) {
1506
+				if (device_property_read_u32(slot->host->dev, "power-off-delay-ms",
1507
+				    &power_off_delay))
1508
+					power_off_delay = 200;
1509
+				msleep(power_off_delay);
1510
+			}
1511
+		}
15121512 
15131513 		if (!IS_ERR(mmc->supply.vmmc)) {
15141514 			ret = mmc_regulator_set_ocr(mmc, mmc->supply.vmmc,
....@@ -1543,9 +1543,11 @@
15431543 				slot->host->vqmmc_enabled = true;
15441544 			}
15451545 
1546
+#ifndef CONFIG_ROCKCHIP_THUNDER_BOOT_MMC
15461547 			/* Reset our state machine after powering on */
15471548 			dw_mci_ctrl_reset(slot->host,
15481549 					  SDMMC_CTRL_ALL_RESET_FLAGS);
1550
+#endif
15491551 		}
15501552 
15511553 		/* Adjust clock / bus width after power is up */
....@@ -1868,6 +1870,9 @@
18681870 
18691871 	WARN_ON(host->cmd || host->data);
18701872 
1873
+	if (host->need_xfer_timer)
1874
+		del_timer(&host->xfer_timer);
1875
+
18711876 	host->slot->mrq = NULL;
18721877 	host->mrq = NULL;
18731878 	if (!list_empty(&host->queue)) {
....@@ -2013,8 +2018,10 @@
20132018 				   host->bus_hz);
20142019 
20152020 	/* add a bit spare time */
2016
-	xfer_ms += 100;
2017
-
2021
+	if (host->dir_status == DW_MCI_RECV_STATUS)
2022
+		xfer_ms += 100;
2023
+	else
2024
+		xfer_ms += 2500;
20182025 	spin_lock_irqsave(&host->irq_lock, irqflags);
20192026 	if (!test_bit(EVENT_XFER_COMPLETE, &host->pending_events))
20202027 		mod_timer(&host->xfer_timer,
....@@ -2149,6 +2156,13 @@
21492156 					send_stop_abort(host, data);
21502157 				dw_mci_stop_dma(host);
21512158 				state = STATE_DATA_ERROR;
2159
+				if (host->dir_status == DW_MCI_SEND_STATUS) {
2160
+					data->bytes_xfered = 0;
2161
+					data->error = -ETIMEDOUT;
2162
+					host->data = NULL;
2163
+					dw_mci_request_end(host, mrq);
2164
+					goto unlock;
2165
+				}
21522166 				break;
21532167 			}
21542168 
....@@ -2160,8 +2174,7 @@
21602174 				 */
21612175 				if (host->dir_status == DW_MCI_RECV_STATUS)
21622176 					dw_mci_set_drto(host);
2163
-				if (host->need_xfer_timer &&
2164
-				    host->dir_status == DW_MCI_RECV_STATUS)
2177
+				if (host->need_xfer_timer)
21652178 					dw_mci_set_xfer_timeout(host);
21662179 				break;
21672180 			}
....@@ -2203,6 +2216,8 @@
22032216 				 */
22042217 				if (host->dir_status == DW_MCI_RECV_STATUS)
22052218 					dw_mci_set_drto(host);
2219
+				if (host->need_xfer_timer && host->dir_status == DW_MCI_SEND_STATUS)
2220
+					dw_mci_set_xfer_timeout(host);
22062221 				break;
22072222 			}
22082223 
....@@ -2219,8 +2234,19 @@
22192234 				}
22202235 
22212236 				/* stop command for open-ended transfer*/
2222
-				if (data->stop)
2237
+				if (data->stop) {
2238
+					if (host->is_rv1106_sd && (data->flags & MMC_DATA_WRITE)) {
2239
+						int fifo_count;
2240
+
2241
+						if (readl_poll_timeout_atomic(host->regs + SDMMC_STATUS, fifo_count,
2242
+								((fifo_count >> 17) & 0x7FF) <= RV1106_RAMDON_DATA_SIZE / 4,
2243
+								0, 5000 * USEC_PER_MSEC))
2244
+							data->error = -ETIMEDOUT;
2245
+						udelay(1);
2246
+						dw_mci_reset(host);
2247
+					}
22232248 					send_stop_abort(host, data);
2249
+				}
22242250 			} else {
22252251 				/*
22262252 				 * If we don't have a command complete now we'll
....@@ -2751,8 +2777,7 @@
27512777 			del_timer(&host->cto_timer);
27522778 			mci_writel(host, RINTSTS, DW_MCI_CMD_ERROR_FLAGS);
27532779 			host->cmd_status = pending;
2754
-			if ((host->need_xfer_timer) &&
2755
-			     host->dir_status == DW_MCI_RECV_STATUS)
2780
+			if (host->need_xfer_timer)
27562781 				del_timer(&host->xfer_timer);
27572782 			smp_wmb(); /* drain writebuffer */
27582783 			set_bit(EVENT_CMD_COMPLETE, &host->pending_events);
....@@ -3657,7 +3682,7 @@
36573682 		mci_writel(host, INTMASK, ret);
36583683 	}
36593684 
3660
-	if (host->slot->mmc->pm_flags & MMC_PM_KEEP_POWER)
3685
+	if (host->slot && host->slot->mmc->pm_flags & MMC_PM_KEEP_POWER)
36613686 		dw_mci_set_ios(host->slot->mmc, &host->slot->mmc->ios);
36623687 
36633688 	/* Force setup bus to guarantee available clock output */