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2024-01-31 f70575805708cabdedea7498aaa3f710fde4d920 
 kernel/drivers/gpu/drm/sun4i/sun8i_mixer.h
....@@ -1,10 +1,6 @@
1
+/* SPDX-License-Identifier: GPL-2.0-or-later */
12 /*
23  * Copyright (C) 2017 Icenowy Zheng <icenowy@aosc.io>
3
- *
4
- * This program is free software; you can redistribute it and/or
5
- * modify it under the terms of the GNU General Public License as
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- * published by the Free Software Foundation; either version 2 of
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- * the License, or (at your option) any later version.
84  */
95 
106 #ifndef _SUN8I_MIXER_H_
....@@ -14,7 +10,6 @@
1410 #include <linux/regmap.h>
1511 #include <linux/reset.h>
1612 
17
-#include "sun8i_csc.h"
1813 #include "sunxi_engine.h"
1914 
2015 #define SUN8I_MIXER_SIZE(w, h)			(((h) - 1) << 16 | ((w) - 1))
....@@ -29,24 +24,41 @@
2924 
3025 #define SUN8I_MIXER_GLOBAL_DBUFF_ENABLE		BIT(0)
3126 
32
-#define SUN8I_MIXER_BLEND_PIPE_CTL		0x1000
33
-#define SUN8I_MIXER_BLEND_ATTR_FCOLOR(x)	(0x1004 + 0x10 * (x) + 0x0)
34
-#define SUN8I_MIXER_BLEND_ATTR_INSIZE(x)	(0x1004 + 0x10 * (x) + 0x4)
35
-#define SUN8I_MIXER_BLEND_ATTR_COORD(x)		(0x1004 + 0x10 * (x) + 0x8)
36
-#define SUN8I_MIXER_BLEND_ROUTE			0x1080
37
-#define SUN8I_MIXER_BLEND_PREMULTIPLY		0x1084
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-#define SUN8I_MIXER_BLEND_BKCOLOR		0x1088
39
-#define SUN8I_MIXER_BLEND_OUTSIZE		0x108c
40
-#define SUN8I_MIXER_BLEND_MODE(x)		(0x1090 + 0x04 * (x))
41
-#define SUN8I_MIXER_BLEND_CK_CTL		0x10b0
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-#define SUN8I_MIXER_BLEND_CK_CFG		0x10b4
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-#define SUN8I_MIXER_BLEND_CK_MAX(x)		(0x10c0 + 0x04 * (x))
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-#define SUN8I_MIXER_BLEND_CK_MIN(x)		(0x10e0 + 0x04 * (x))
45
-#define SUN8I_MIXER_BLEND_OUTCTL		0x10fc
27
+#define DE2_MIXER_UNIT_SIZE			0x6000
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+#define DE3_MIXER_UNIT_SIZE			0x3000
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+
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+#define DE2_BLD_BASE				0x1000
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+#define DE2_CH_BASE				0x2000
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+#define DE2_CH_SIZE				0x1000
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+
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+#define DE3_BLD_BASE				0x0800
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+#define DE3_CH_BASE				0x1000
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+#define DE3_CH_SIZE				0x0800
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+
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+#define SUN8I_MIXER_BLEND_PIPE_CTL(base)	((base) + 0)
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+#define SUN8I_MIXER_BLEND_ATTR_FCOLOR(base, x)	((base) + 0x4 + 0x10 * (x))
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+#define SUN8I_MIXER_BLEND_ATTR_INSIZE(base, x)	((base) + 0x8 + 0x10 * (x))
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+#define SUN8I_MIXER_BLEND_ATTR_COORD(base, x)	((base) + 0xc + 0x10 * (x))
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+#define SUN8I_MIXER_BLEND_ROUTE(base)		((base) + 0x80)
43
+#define SUN8I_MIXER_BLEND_PREMULTIPLY(base)	((base) + 0x84)
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+#define SUN8I_MIXER_BLEND_BKCOLOR(base)		((base) + 0x88)
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+#define SUN8I_MIXER_BLEND_OUTSIZE(base)		((base) + 0x8c)
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+#define SUN8I_MIXER_BLEND_MODE(base, x)		((base) + 0x90 + 0x04 * (x))
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+#define SUN8I_MIXER_BLEND_CK_CTL(base)		((base) + 0xb0)
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+#define SUN8I_MIXER_BLEND_CK_CFG(base)		((base) + 0xb4)
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+#define SUN8I_MIXER_BLEND_CK_MAX(base, x)	((base) + 0xc0 + 0x04 * (x))
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+#define SUN8I_MIXER_BLEND_CK_MIN(base, x)	((base) + 0xe0 + 0x04 * (x))
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+#define SUN8I_MIXER_BLEND_OUTCTL(base)		((base) + 0xfc)
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+#define SUN50I_MIXER_BLEND_CSC_CTL(base)	((base) + 0x100)
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+#define SUN50I_MIXER_BLEND_CSC_COEFF(base, layer, x, y) \
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+	((base) + 0x110 + (layer) * 0x30 +  (x) * 0x10 + 4 * (y))
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+#define SUN50I_MIXER_BLEND_CSC_CONST(base, layer, i) \
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+	((base) + 0x110 + (layer) * 0x30 +  (i) * 0x10 + 0x0c)
4657 
4758 #define SUN8I_MIXER_BLEND_PIPE_CTL_EN_MSK	GENMASK(12, 8)
4859 #define SUN8I_MIXER_BLEND_PIPE_CTL_EN(pipe)	BIT(8 + pipe)
4960 #define SUN8I_MIXER_BLEND_PIPE_CTL_FC_EN(pipe)	BIT(pipe)
61
+
5062 /* colors are always in AARRGGBB format */
5163 #define SUN8I_MIXER_BLEND_COLOR_BLACK		0xff000000
5264 /* The following numbers are some still unknown magic numbers */
....@@ -56,6 +68,9 @@
5668 #define SUN8I_MIXER_BLEND_ROUTE_PIPE_SHIFT(n)	((n) << 2)
5769 
5870 #define SUN8I_MIXER_BLEND_OUTCTL_INTERLACED	BIT(1)
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+
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+#define SUN50I_MIXER_BLEND_CSC_CTL_EN(ch)	BIT(ch)
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+#define SUN50I_MIXER_BLEND_CSC_CONST_VAL(d, c)	(((d) << 16) | ((c) & 0xffff))
5974 
6075 #define SUN8I_MIXER_FBFMT_ARGB8888	0
6176 #define SUN8I_MIXER_FBFMT_ABGR8888	1
....@@ -77,6 +92,10 @@
7792 #define SUN8I_MIXER_FBFMT_ABGR1555	17
7893 #define SUN8I_MIXER_FBFMT_RGBA5551	18
7994 #define SUN8I_MIXER_FBFMT_BGRA5551	19
95
+#define SUN8I_MIXER_FBFMT_ARGB2101010	20
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+#define SUN8I_MIXER_FBFMT_ABGR2101010	21
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+#define SUN8I_MIXER_FBFMT_RGBA1010102	22
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+#define SUN8I_MIXER_FBFMT_BGRA1010102	23
8099 
81100 #define SUN8I_MIXER_FBFMT_YUYV		0
82101 #define SUN8I_MIXER_FBFMT_UYVY		1
....@@ -93,10 +112,17 @@
93112 /* format 12 is semi-planar YUV411 UVUV */
94113 /* format 13 is semi-planar YUV411 VUVU */
95114 #define SUN8I_MIXER_FBFMT_YUV411	14
115
+/* format 15 doesn't exist */
116
+#define SUN8I_MIXER_FBFMT_P010_YUV	16
117
+/* format 17 is P010 YVU */
118
+#define SUN8I_MIXER_FBFMT_P210_YUV	18
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+/* format 19 is P210 YVU */
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+/* format 20 is packed YVU444 10-bit */
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+/* format 21 is packed YUV444 10-bit */
96122 
97123 /*
98
- * These sub-engines are still unknown now, the EN registers are here only to
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- * be used to disable these sub-engines.
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+ * Sub-engines listed bellow are unused for now. The EN registers are here only
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+ * to be used to disable these sub-engines.
100126  */
101127 #define SUN8I_MIXER_FCE_EN			0xa0000
102128 #define SUN8I_MIXER_BWS_EN			0xa2000
....@@ -106,12 +132,16 @@
106132 #define SUN8I_MIXER_FCC_EN			0xaa000
107133 #define SUN8I_MIXER_DCSC_EN			0xb0000
108134 
109
-struct de2_fmt_info {
110
-	u32			drm_fmt;
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-	u32			de2_fmt;
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-	bool			rgb;
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-	enum sun8i_csc_mode	csc;
114
-};
135
+#define SUN50I_MIXER_FCE_EN			0x70000
136
+#define SUN50I_MIXER_PEAK_EN			0x70800
137
+#define SUN50I_MIXER_LCTI_EN			0x71000
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+#define SUN50I_MIXER_BLS_EN			0x71800
139
+#define SUN50I_MIXER_FCC_EN			0x72000
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+#define SUN50I_MIXER_DNS_EN			0x80000
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+#define SUN50I_MIXER_DRC_EN			0xa0000
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+#define SUN50I_MIXER_FMT_EN			0xa8000
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+#define SUN50I_MIXER_CDC0_EN			0xd0000
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+#define SUN50I_MIXER_CDC1_EN			0xd8000
115145 
116146 /**
117147  * struct sun8i_mixer_cfg - mixer HW configuration
....@@ -127,6 +157,8 @@
127157  *	are invalid.
128158  * @mod_rate: module clock rate that needs to be set in order to have
129159  *	a functional block.
160
+ * @is_de3: true, if this is next gen display engine 3.0, false otherwise.
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+ * @scaline_yuv: size of a scanline for VI scaler for YUV formats.
130162  */
131163 struct sun8i_mixer_cfg {
132164 	int		vi_num;
....@@ -134,6 +166,8 @@
134166 	int		scaler_mask;
135167 	int		ccsc;
136168 	unsigned long	mod_rate;
169
+	unsigned int	is_de3 : 1;
170
+	unsigned int	scanline_yuv;
137171 };
138172 
139173 struct sun8i_mixer {
....@@ -153,5 +187,20 @@
153187 	return container_of(engine, struct sun8i_mixer, engine);
154188 }
155189 
156
-const struct de2_fmt_info *sun8i_mixer_format_info(u32 format);
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+static inline u32
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+sun8i_blender_base(struct sun8i_mixer *mixer)
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+{
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+	return mixer->cfg->is_de3 ? DE3_BLD_BASE : DE2_BLD_BASE;
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+}
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+
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+static inline u32
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+sun8i_channel_base(struct sun8i_mixer *mixer, int channel)
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+{
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+	if (mixer->cfg->is_de3)
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+		return DE3_CH_BASE + channel * DE3_CH_SIZE;
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+	else
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+		return DE2_CH_BASE + channel * DE2_CH_SIZE;
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+}
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+
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+int sun8i_mixer_drm_format_to_hw(u32 format, u32 *hw_format);
157206 #endif /* _SUN8I_MIXER_H_ */