forked from ~ljy/RK356X_SDK_RELEASE

hc
2024-01-31 f70575805708cabdedea7498aaa3f710fde4d920
kernel/drivers/gpu/drm/nouveau/dispnv50/head917d.c
....@@ -22,45 +22,81 @@
2222 #include "head.h"
2323 #include "core.h"
2424
25
-static void
25
+#include "nvif/push.h"
26
+#include <nvif/push507c.h>
27
+
28
+#include <nvhw/class/cl917d.h>
29
+
30
+static int
2631 head917d_dither(struct nv50_head *head, struct nv50_head_atom *asyh)
2732 {
28
- struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->core->chan;
29
- u32 *push;
30
- if ((push = evo_wait(core, 2))) {
31
- evo_mthd(push, 0x04a0 + (head->base.index * 0x0300), 1);
32
- evo_data(push, asyh->dither.mode << 3 |
33
- asyh->dither.bits << 1 |
34
- asyh->dither.enable);
35
- evo_kick(push, core);
36
- }
33
+ struct nvif_push *push = nv50_disp(head->base.base.dev)->core->chan.push;
34
+ const int i = head->base.index;
35
+ int ret;
36
+
37
+ if ((ret = PUSH_WAIT(push, 2)))
38
+ return ret;
39
+
40
+ PUSH_MTHD(push, NV917D, HEAD_SET_DITHER_CONTROL(i),
41
+ NVVAL(NV917D, HEAD_SET_DITHER_CONTROL, ENABLE, asyh->dither.enable) |
42
+ NVVAL(NV917D, HEAD_SET_DITHER_CONTROL, BITS, asyh->dither.bits) |
43
+ NVVAL(NV917D, HEAD_SET_DITHER_CONTROL, MODE, asyh->dither.mode) |
44
+ NVVAL(NV917D, HEAD_SET_DITHER_CONTROL, PHASE, 0));
45
+ return 0;
3746 }
3847
39
-static void
48
+static int
4049 head917d_base(struct nv50_head *head, struct nv50_head_atom *asyh)
4150 {
42
- struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->core->chan;
51
+ struct nvif_push *push = nv50_disp(head->base.base.dev)->core->chan.push;
52
+ const int i = head->base.index;
4353 u32 bounds = 0;
44
- u32 *push;
54
+ int ret;
4555
4656 if (asyh->base.cpp) {
4757 switch (asyh->base.cpp) {
48
- case 8: bounds |= 0x00000500; break;
49
- case 4: bounds |= 0x00000300; break;
50
- case 2: bounds |= 0x00000100; break;
51
- case 1: bounds |= 0x00000000; break;
58
+ case 8: bounds |= NVDEF(NV917D, HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS, PIXEL_DEPTH, BPP_64); break;
59
+ case 4: bounds |= NVDEF(NV917D, HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS, PIXEL_DEPTH, BPP_32); break;
60
+ case 2: bounds |= NVDEF(NV917D, HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS, PIXEL_DEPTH, BPP_16); break;
61
+ case 1: bounds |= NVDEF(NV917D, HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS, PIXEL_DEPTH, BPP_8); break;
5262 default:
5363 WARN_ON(1);
5464 break;
5565 }
56
- bounds |= 0x00020001;
66
+ bounds |= NVDEF(NV917D, HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS, USABLE, TRUE);
67
+ bounds |= NVDEF(NV917D, HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS, BASE_LUT, USAGE_1025);
5768 }
5869
59
- if ((push = evo_wait(core, 2))) {
60
- evo_mthd(push, 0x04d0 + head->base.index * 0x300, 1);
61
- evo_data(push, bounds);
62
- evo_kick(push, core);
63
- }
70
+ if ((ret = PUSH_WAIT(push, 2)))
71
+ return ret;
72
+
73
+ PUSH_MTHD(push, NV917D, HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS(i), bounds);
74
+ return 0;
75
+}
76
+
77
+static int
78
+head917d_curs_set(struct nv50_head *head, struct nv50_head_atom *asyh)
79
+{
80
+ struct nvif_push *push = nv50_disp(head->base.base.dev)->core->chan.push;
81
+ const int i = head->base.index;
82
+ int ret;
83
+
84
+ ret = PUSH_WAIT(push, 5);
85
+ if (ret)
86
+ return ret;
87
+
88
+ PUSH_MTHD(push, NV917D, HEAD_SET_CONTROL_CURSOR(i),
89
+ NVDEF(NV917D, HEAD_SET_CONTROL_CURSOR, ENABLE, ENABLE) |
90
+ NVVAL(NV917D, HEAD_SET_CONTROL_CURSOR, FORMAT, asyh->curs.format) |
91
+ NVVAL(NV917D, HEAD_SET_CONTROL_CURSOR, SIZE, asyh->curs.layout) |
92
+ NVVAL(NV917D, HEAD_SET_CONTROL_CURSOR, HOT_SPOT_X, 0) |
93
+ NVVAL(NV917D, HEAD_SET_CONTROL_CURSOR, HOT_SPOT_Y, 0) |
94
+ NVDEF(NV917D, HEAD_SET_CONTROL_CURSOR, COMPOSITION, ALPHA_BLEND),
95
+
96
+ HEAD_SET_OFFSET_CURSOR(i), asyh->curs.offset >> 8);
97
+
98
+ PUSH_MTHD(push, NV917D, HEAD_SET_CONTEXT_DMA_CURSOR(i), asyh->curs.handle);
99
+ return 0;
64100 }
65101
66102 int
....@@ -68,10 +104,10 @@
68104 struct nv50_head_atom *asyh)
69105 {
70106 switch (asyw->state.fb->width) {
71
- case 32: asyh->curs.layout = 0; break;
72
- case 64: asyh->curs.layout = 1; break;
73
- case 128: asyh->curs.layout = 2; break;
74
- case 256: asyh->curs.layout = 3; break;
107
+ case 32: asyh->curs.layout = NV917D_HEAD_SET_CONTROL_CURSOR_SIZE_W32_H32; break;
108
+ case 64: asyh->curs.layout = NV917D_HEAD_SET_CONTROL_CURSOR_SIZE_W64_H64; break;
109
+ case 128: asyh->curs.layout = NV917D_HEAD_SET_CONTROL_CURSOR_SIZE_W128_H128; break;
110
+ case 256: asyh->curs.layout = NV917D_HEAD_SET_CONTROL_CURSOR_SIZE_W256_H256; break;
75111 default:
76112 return -EINVAL;
77113 }
....@@ -83,6 +119,7 @@
83119 .view = head907d_view,
84120 .mode = head907d_mode,
85121 .olut = head907d_olut,
122
+ .olut_size = 1024,
86123 .olut_set = head907d_olut_set,
87124 .olut_clr = head907d_olut_clr,
88125 .core_calc = head507d_core_calc,
....@@ -90,7 +127,7 @@
90127 .core_clr = head907d_core_clr,
91128 .curs_layout = head917d_curs_layout,
92129 .curs_format = head507d_curs_format,
93
- .curs_set = head907d_curs_set,
130
+ .curs_set = head917d_curs_set,
94131 .curs_clr = head907d_curs_clr,
95132 .base = head917d_base,
96133 .ovly = head907d_ovly,