forked from ~ljy/RK356X_SDK_RELEASE
blame | history | patch | commit | commitdiff
hc
2024-01-31 f70575805708cabdedea7498aaa3f710fde4d920 
 kernel/drivers/gpu/drm/msm/dsi/pll/dsi_pll_14nm.c
....@@ -1,14 +1,6 @@
1
+// SPDX-License-Identifier: GPL-2.0-only
12 /*
23  * Copyright (c) 2016, The Linux Foundation. All rights reserved.
3
- *
4
- * This program is free software; you can redistribute it and/or modify
5
- * it under the terms of the GNU General Public License version 2 and
6
- * only version 2 as published by the Free Software Foundation.
7
- *
8
- * This program is distributed in the hope that it will be useful,
9
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
10
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
11
- * GNU General Public License for more details.
124  */
135 
146 #include <linux/clk.h>
....@@ -783,7 +775,7 @@
783775 					 POLL_TIMEOUT_US);
784776 
785777 	if (unlikely(!locked))
786
-		dev_err(&pll_14nm->pdev->dev, "DSI PLL lock failed\n");
778
+		DRM_DEV_ERROR(&pll_14nm->pdev->dev, "DSI PLL lock failed\n");
787779 	else
788780 		DBG("DSI PLL lock success");
789781 
....@@ -829,7 +821,7 @@
829821 	ret = dsi_pll_14nm_vco_set_rate(&pll->clk_hw,
830822 					cached_state->vco_rate, 0);
831823 	if (ret) {
832
-		dev_err(&pll_14nm->pdev->dev,
824
+		DRM_DEV_ERROR(&pll_14nm->pdev->dev,
833825 			"restore vco rate failed. ret=%d\n", ret);
834826 		return ret;
835827 	}
....@@ -1039,7 +1031,7 @@
10391031 	ret = of_clk_add_hw_provider(dev->of_node, of_clk_hw_onecell_get,
10401032 				     pll_14nm->hw_data);
10411033 	if (ret) {
1042
-		dev_err(dev, "failed to register clk provider: %d\n", ret);
1034
+		DRM_DEV_ERROR(dev, "failed to register clk provider: %d\n", ret);
10431035 		return ret;
10441036 	}
10451037 
....@@ -1067,13 +1059,13 @@
10671059 
10681060 	pll_14nm->phy_cmn_mmio = msm_ioremap(pdev, "dsi_phy", "DSI_PHY");
10691061 	if (IS_ERR_OR_NULL(pll_14nm->phy_cmn_mmio)) {
1070
-		dev_err(&pdev->dev, "failed to map CMN PHY base\n");
1062
+		DRM_DEV_ERROR(&pdev->dev, "failed to map CMN PHY base\n");
10711063 		return ERR_PTR(-ENOMEM);
10721064 	}
10731065 
10741066 	pll_14nm->mmio = msm_ioremap(pdev, "dsi_pll", "DSI_PLL");
10751067 	if (IS_ERR_OR_NULL(pll_14nm->mmio)) {
1076
-		dev_err(&pdev->dev, "failed to map PLL base\n");
1068
+		DRM_DEV_ERROR(&pdev->dev, "failed to map PLL base\n");
10771069 		return ERR_PTR(-ENOMEM);
10781070 	}
10791071 
....@@ -1096,7 +1088,7 @@
10961088 
10971089 	ret = pll_14nm_register(pll_14nm);
10981090 	if (ret) {
1099
-		dev_err(&pdev->dev, "failed to register PLL: %d\n", ret);
1091
+		DRM_DEV_ERROR(&pdev->dev, "failed to register PLL: %d\n", ret);
11001092 		return ERR_PTR(ret);
11011093 	}
11021094