add lvds1024*800

hc

2024-01-31 f70575805708cabdedea7498aaa3f710fde4d920

 kernel/drivers/gpu/drm/mgag200/mgag200_reg.h
..
..
@@ -16,9 +16,10 @@
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  *		MGA1064SG Mystique register file
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  */
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-
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 #ifndef _MGA_REG_H_
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 #define _MGA_REG_H_
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+
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+#include <linux/bits.h>
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 #define	MGAREG_DWGCTL		0x1c00
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 #define	MGAREG_MACCESS		0x1c04
..
..
@@ -221,20 +222,40 @@
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 #define MGAREG_MISC_IOADSEL	(0x1 << 0)
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 #define MGAREG_MISC_RAMMAPEN	(0x1 << 1)
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-#define MGAREG_MISC_CLK_SEL_VGA25	(0x0 << 2)
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-#define MGAREG_MISC_CLK_SEL_VGA28	(0x1 << 2)
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-#define MGAREG_MISC_CLK_SEL_MGA_PIX	(0x2 << 2)
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-#define MGAREG_MISC_CLK_SEL_MGA_MSK	(0x3 << 2)
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+#define MGAREG_MISC_CLKSEL_MASK		GENMASK(3, 2)
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+#define MGAREG_MISC_CLKSEL_VGA25	(0x0 << 2)
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+#define MGAREG_MISC_CLKSEL_VGA28	(0x1 << 2)
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+#define MGAREG_MISC_CLKSEL_MGA		(0x3 << 2)
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 #define MGAREG_MISC_VIDEO_DIS	(0x1 << 4)
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 #define MGAREG_MISC_HIGH_PG_SEL	(0x1 << 5)
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+#define MGAREG_MISC_HSYNCPOL		BIT(6)
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+#define MGAREG_MISC_VSYNCPOL		BIT(7)
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 /* MMIO VGA registers */
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 #define MGAREG_SEQ_INDEX	0x1fc4
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 #define MGAREG_SEQ_DATA		0x1fc5
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+
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+#define MGAREG_SEQ0_ASYNCRST	BIT(0)
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+#define MGAREG_SEQ0_SYNCRST	BIT(1)
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+
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+#define MGAREG_SEQ1_SCROFF	BIT(5)
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+
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 #define MGAREG_CRTC_INDEX	0x1fd4
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 #define MGAREG_CRTC_DATA	0x1fd5
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+
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+#define MGAREG_CRTC11_VINTCLR		BIT(4)
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+#define MGAREG_CRTC11_VINTEN		BIT(5)
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+#define MGAREG_CRTC11_CRTCPROTECT	BIT(7)
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+
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 #define MGAREG_CRTCEXT_INDEX	0x1fde
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 #define MGAREG_CRTCEXT_DATA	0x1fdf
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+
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+#define MGAREG_CRTCEXT0_OFFSET_MASK	GENMASK(5, 4)
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+
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+#define MGAREG_CRTCEXT1_VSYNCOFF	BIT(5)
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+#define MGAREG_CRTCEXT1_HSYNCOFF	BIT(4)
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+
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+#define MGAREG_CRTCEXT3_MGAMODE		BIT(7)
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 /* Cursor X and Y position */
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 #define MGA_CURPOSXL 0x3c0c
..
..
@@ -262,6 +283,8 @@
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 #define PCI_MGA_OPTION2		0x50
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 #define PCI_MGA_OPTION3		0x54
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+#define PCI_MGA_OPTION_HARDPWMSK	BIT(14)
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+
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 #define RAMDAC_OFFSET		0x3c00
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 /* TVP3026 direct registers */