.. | .. |
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| 1 | +// SPDX-License-Identifier: GPL-2.0-or-later |
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1 | 2 | /* |
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2 | 3 | * Copyright (C) 2012 Samsung Electronics Co.Ltd |
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3 | 4 | * Authors: |
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4 | 5 | * Eunchul Kim <chulspro.kim@samsung.com> |
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5 | 6 | * Jinyoung Jeon <jy0.jeon@samsung.com> |
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6 | 7 | * Sangmin Lee <lsmin.lee@samsung.com> |
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7 | | - * |
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8 | | - * This program is free software; you can redistribute it and/or modify it |
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9 | | - * under the terms of the GNU General Public License as published by the |
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10 | | - * Free Software Foundation; either version 2 of the License, or (at your |
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11 | | - * option) any later version. |
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12 | | - * |
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13 | 8 | */ |
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14 | | -#include <linux/kernel.h> |
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15 | | -#include <linux/component.h> |
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16 | | -#include <linux/platform_device.h> |
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17 | | -#include <linux/mfd/syscon.h> |
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18 | | -#include <linux/regmap.h> |
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| 9 | + |
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19 | 10 | #include <linux/clk.h> |
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20 | | -#include <linux/pm_runtime.h> |
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| 11 | +#include <linux/component.h> |
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| 12 | +#include <linux/kernel.h> |
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| 13 | +#include <linux/mfd/syscon.h> |
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21 | 14 | #include <linux/of.h> |
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| 15 | +#include <linux/platform_device.h> |
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| 16 | +#include <linux/pm_runtime.h> |
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| 17 | +#include <linux/regmap.h> |
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22 | 18 | #include <linux/spinlock.h> |
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23 | 19 | |
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24 | | -#include <drm/drmP.h> |
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| 20 | +#include <drm/drm_fourcc.h> |
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| 21 | +#include <drm/drm_print.h> |
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25 | 22 | #include <drm/exynos_drm.h> |
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26 | | -#include "regs-fimc.h" |
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| 23 | + |
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27 | 24 | #include "exynos_drm_drv.h" |
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28 | | -#include "exynos_drm_iommu.h" |
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29 | 25 | #include "exynos_drm_ipp.h" |
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| 26 | +#include "regs-fimc.h" |
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30 | 27 | |
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31 | 28 | /* |
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32 | 29 | * FIMC stands for Fully Interactive Mobile Camera and |
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.. | .. |
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49 | 46 | module_param_named(fimc_devs, fimc_mask, uint, 0644); |
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50 | 47 | MODULE_PARM_DESC(fimc_devs, "Alias mask for assigning FIMC devices to Exynos DRM"); |
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51 | 48 | |
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52 | | -#define get_fimc_context(dev) platform_get_drvdata(to_platform_device(dev)) |
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| 49 | +#define get_fimc_context(dev) dev_get_drvdata(dev) |
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53 | 50 | |
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54 | 51 | enum { |
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55 | 52 | FIMC_CLK_LCLK, |
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.. | .. |
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100 | 97 | struct fimc_context { |
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101 | 98 | struct exynos_drm_ipp ipp; |
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102 | 99 | struct drm_device *drm_dev; |
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| 100 | + void *dma_priv; |
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103 | 101 | struct device *dev; |
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104 | 102 | struct exynos_drm_ipp_task *task; |
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105 | 103 | struct exynos_drm_ipp_formats *formats; |
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.. | .. |
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187 | 185 | { |
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188 | 186 | u32 cfg; |
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189 | 187 | |
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190 | | - DRM_DEBUG_KMS("enable[%d]\n", enable); |
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| 188 | + DRM_DEV_DEBUG_KMS(ctx->dev, "enable[%d]\n", enable); |
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191 | 189 | |
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192 | 190 | cfg = fimc_read(ctx, EXYNOS_CIGCTRL); |
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193 | 191 | if (enable) |
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.. | .. |
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202 | 200 | { |
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203 | 201 | u32 cfg; |
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204 | 202 | |
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205 | | - DRM_DEBUG_KMS("enable[%d]\n", enable); |
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| 203 | + DRM_DEV_DEBUG_KMS(ctx->dev, "enable[%d]\n", enable); |
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206 | 204 | |
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207 | 205 | cfg = fimc_read(ctx, EXYNOS_CIGCTRL); |
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208 | 206 | if (enable) { |
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.. | .. |
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226 | 224 | flag = EXYNOS_CISTATUS_OVFIY | EXYNOS_CISTATUS_OVFICB | |
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227 | 225 | EXYNOS_CISTATUS_OVFICR; |
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228 | 226 | |
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229 | | - DRM_DEBUG_KMS("flag[0x%x]\n", flag); |
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| 227 | + DRM_DEV_DEBUG_KMS(ctx->dev, "flag[0x%x]\n", flag); |
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230 | 228 | |
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231 | 229 | if (status & flag) { |
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232 | 230 | fimc_set_bits(ctx, EXYNOS_CIWDOFST, |
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233 | 231 | EXYNOS_CIWDOFST_CLROVFIY | EXYNOS_CIWDOFST_CLROVFICB | |
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234 | 232 | EXYNOS_CIWDOFST_CLROVFICR); |
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235 | 233 | |
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236 | | - dev_err(ctx->dev, "occurred overflow at %d, status 0x%x.\n", |
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237 | | - ctx->id, status); |
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| 234 | + DRM_DEV_ERROR(ctx->dev, |
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| 235 | + "occurred overflow at %d, status 0x%x.\n", |
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| 236 | + ctx->id, status); |
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238 | 237 | return true; |
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239 | 238 | } |
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240 | 239 | |
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.. | .. |
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247 | 246 | |
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248 | 247 | cfg = fimc_read(ctx, EXYNOS_CISTATUS); |
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249 | 248 | |
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250 | | - DRM_DEBUG_KMS("cfg[0x%x]\n", cfg); |
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| 249 | + DRM_DEV_DEBUG_KMS(ctx->dev, "cfg[0x%x]\n", cfg); |
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251 | 250 | |
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252 | 251 | if (!(cfg & EXYNOS_CISTATUS_FRAMEEND)) |
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253 | 252 | return false; |
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.. | .. |
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269 | 268 | if (frame_cnt == 0) |
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270 | 269 | frame_cnt = EXYNOS_CISTATUS2_GET_FRAMECOUNT_PRESENT(cfg); |
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271 | 270 | |
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272 | | - DRM_DEBUG_KMS("present[%d]before[%d]\n", |
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273 | | - EXYNOS_CISTATUS2_GET_FRAMECOUNT_PRESENT(cfg), |
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274 | | - EXYNOS_CISTATUS2_GET_FRAMECOUNT_BEFORE(cfg)); |
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| 271 | + DRM_DEV_DEBUG_KMS(ctx->dev, "present[%d]before[%d]\n", |
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| 272 | + EXYNOS_CISTATUS2_GET_FRAMECOUNT_PRESENT(cfg), |
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| 273 | + EXYNOS_CISTATUS2_GET_FRAMECOUNT_BEFORE(cfg)); |
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275 | 274 | |
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276 | 275 | if (frame_cnt == 0) { |
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277 | | - DRM_ERROR("failed to get frame count.\n"); |
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| 276 | + DRM_DEV_ERROR(ctx->dev, "failed to get frame count.\n"); |
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278 | 277 | return -EIO; |
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279 | 278 | } |
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280 | 279 | |
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281 | 280 | buf_id = frame_cnt - 1; |
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282 | | - DRM_DEBUG_KMS("buf_id[%d]\n", buf_id); |
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| 281 | + DRM_DEV_DEBUG_KMS(ctx->dev, "buf_id[%d]\n", buf_id); |
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283 | 282 | |
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284 | 283 | return buf_id; |
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285 | 284 | } |
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.. | .. |
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288 | 287 | { |
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289 | 288 | u32 cfg; |
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290 | 289 | |
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291 | | - DRM_DEBUG_KMS("enable[%d]\n", enable); |
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| 290 | + DRM_DEV_DEBUG_KMS(ctx->dev, "enable[%d]\n", enable); |
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292 | 291 | |
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293 | 292 | cfg = fimc_read(ctx, EXYNOS_CIOCTRL); |
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294 | 293 | if (enable) |
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.. | .. |
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303 | 302 | { |
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304 | 303 | u32 cfg; |
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305 | 304 | |
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306 | | - DRM_DEBUG_KMS("fmt[0x%x]\n", fmt); |
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| 305 | + DRM_DEV_DEBUG_KMS(ctx->dev, "fmt[0x%x]\n", fmt); |
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307 | 306 | |
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308 | 307 | /* RGB */ |
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309 | 308 | cfg = fimc_read(ctx, EXYNOS_CISCCTRL); |
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.. | .. |
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368 | 367 | { |
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369 | 368 | u32 cfg; |
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370 | 369 | |
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371 | | - DRM_DEBUG_KMS("fmt[0x%x]\n", fmt); |
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| 370 | + DRM_DEV_DEBUG_KMS(ctx->dev, "fmt[0x%x]\n", fmt); |
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372 | 371 | |
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373 | 372 | cfg = fimc_read(ctx, EXYNOS_MSCTRL); |
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374 | 373 | cfg &= ~EXYNOS_MSCTRL_INFORMAT_RGB; |
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.. | .. |
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421 | 420 | unsigned int degree = rotation & DRM_MODE_ROTATE_MASK; |
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422 | 421 | u32 cfg1, cfg2; |
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423 | 422 | |
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424 | | - DRM_DEBUG_KMS("rotation[%x]\n", rotation); |
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| 423 | + DRM_DEV_DEBUG_KMS(ctx->dev, "rotation[%x]\n", rotation); |
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425 | 424 | |
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426 | 425 | cfg1 = fimc_read(ctx, EXYNOS_MSCTRL); |
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427 | 426 | cfg1 &= ~(EXYNOS_MSCTRL_FLIP_X_MIRROR | |
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.. | .. |
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479 | 478 | v1 = buf->rect.y; |
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480 | 479 | v2 = buf->buf.height - buf->rect.h - buf->rect.y; |
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481 | 480 | |
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482 | | - DRM_DEBUG_KMS("x[%d]y[%d]w[%d]h[%d]hsize[%d]vsize[%d]\n", |
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483 | | - buf->rect.x, buf->rect.y, buf->rect.w, buf->rect.h, |
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484 | | - real_width, buf->buf.height); |
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485 | | - DRM_DEBUG_KMS("h1[%d]h2[%d]v1[%d]v2[%d]\n", h1, h2, v1, v2); |
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| 481 | + DRM_DEV_DEBUG_KMS(ctx->dev, "x[%d]y[%d]w[%d]h[%d]hsize[%d]vsize[%d]\n", |
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| 482 | + buf->rect.x, buf->rect.y, buf->rect.w, buf->rect.h, |
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| 483 | + real_width, buf->buf.height); |
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| 484 | + DRM_DEV_DEBUG_KMS(ctx->dev, "h1[%d]h2[%d]v1[%d]v2[%d]\n", h1, h2, v1, |
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| 485 | + v2); |
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486 | 486 | |
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487 | 487 | /* |
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488 | 488 | * set window offset 1, 2 size |
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.. | .. |
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507 | 507 | unsigned int real_width = buf->buf.pitch[0] / buf->format->cpp[0]; |
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508 | 508 | u32 cfg; |
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509 | 509 | |
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510 | | - DRM_DEBUG_KMS("hsize[%d]vsize[%d]\n", real_width, buf->buf.height); |
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| 510 | + DRM_DEV_DEBUG_KMS(ctx->dev, "hsize[%d]vsize[%d]\n", real_width, |
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| 511 | + buf->buf.height); |
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511 | 512 | |
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512 | 513 | /* original size */ |
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513 | 514 | cfg = (EXYNOS_ORGISIZE_HORIZONTAL(real_width) | |
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.. | .. |
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515 | 516 | |
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516 | 517 | fimc_write(ctx, cfg, EXYNOS_ORGISIZE); |
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517 | 518 | |
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518 | | - DRM_DEBUG_KMS("x[%d]y[%d]w[%d]h[%d]\n", buf->rect.x, buf->rect.y, |
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519 | | - buf->rect.w, buf->rect.h); |
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| 519 | + DRM_DEV_DEBUG_KMS(ctx->dev, "x[%d]y[%d]w[%d]h[%d]\n", buf->rect.x, |
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| 520 | + buf->rect.y, buf->rect.w, buf->rect.h); |
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520 | 521 | |
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521 | 522 | /* set input DMA image size */ |
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522 | 523 | cfg = fimc_read(ctx, EXYNOS_CIREAL_ISIZE); |
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.. | .. |
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561 | 562 | { |
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562 | 563 | u32 cfg; |
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563 | 564 | |
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564 | | - DRM_DEBUG_KMS("fmt[0x%x]\n", fmt); |
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| 565 | + DRM_DEV_DEBUG_KMS(ctx->dev, "fmt[0x%x]\n", fmt); |
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565 | 566 | |
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566 | 567 | /* RGB */ |
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567 | 568 | cfg = fimc_read(ctx, EXYNOS_CISCCTRL); |
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.. | .. |
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632 | 633 | { |
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633 | 634 | u32 cfg; |
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634 | 635 | |
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635 | | - DRM_DEBUG_KMS("fmt[0x%x]\n", fmt); |
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| 636 | + DRM_DEV_DEBUG_KMS(ctx->dev, "fmt[0x%x]\n", fmt); |
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636 | 637 | |
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637 | 638 | cfg = fimc_read(ctx, EXYNOS_CIEXTEN); |
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638 | 639 | |
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.. | .. |
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692 | 693 | unsigned int degree = rotation & DRM_MODE_ROTATE_MASK; |
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693 | 694 | u32 cfg; |
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694 | 695 | |
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695 | | - DRM_DEBUG_KMS("rotation[0x%x]\n", rotation); |
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| 696 | + DRM_DEV_DEBUG_KMS(ctx->dev, "rotation[0x%x]\n", rotation); |
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696 | 697 | |
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697 | 698 | cfg = fimc_read(ctx, EXYNOS_CITRGFMT); |
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698 | 699 | cfg &= ~EXYNOS_CITRGFMT_FLIP_MASK; |
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.. | .. |
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776 | 777 | |
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777 | 778 | pre_dst_width = src_w >> hfactor; |
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778 | 779 | pre_dst_height = src_h >> vfactor; |
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779 | | - DRM_DEBUG_KMS("pre_dst_width[%d]pre_dst_height[%d]\n", |
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780 | | - pre_dst_width, pre_dst_height); |
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781 | | - DRM_DEBUG_KMS("hfactor[%d]vfactor[%d]\n", hfactor, vfactor); |
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| 780 | + DRM_DEV_DEBUG_KMS(ctx->dev, "pre_dst_width[%d]pre_dst_height[%d]\n", |
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| 781 | + pre_dst_width, pre_dst_height); |
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| 782 | + DRM_DEV_DEBUG_KMS(ctx->dev, "hfactor[%d]vfactor[%d]\n", hfactor, |
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| 783 | + vfactor); |
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782 | 784 | |
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783 | 785 | sc->hratio = (src_w << 14) / (dst_w << hfactor); |
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784 | 786 | sc->vratio = (src_h << 14) / (dst_h << vfactor); |
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785 | 787 | sc->up_h = (dst_w >= src_w) ? true : false; |
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786 | 788 | sc->up_v = (dst_h >= src_h) ? true : false; |
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787 | | - DRM_DEBUG_KMS("hratio[%d]vratio[%d]up_h[%d]up_v[%d]\n", |
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788 | | - sc->hratio, sc->vratio, sc->up_h, sc->up_v); |
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| 789 | + DRM_DEV_DEBUG_KMS(ctx->dev, "hratio[%d]vratio[%d]up_h[%d]up_v[%d]\n", |
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| 790 | + sc->hratio, sc->vratio, sc->up_h, sc->up_v); |
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789 | 791 | |
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790 | 792 | shfactor = FIMC_SHFACTOR - (hfactor + vfactor); |
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791 | | - DRM_DEBUG_KMS("shfactor[%d]\n", shfactor); |
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| 793 | + DRM_DEV_DEBUG_KMS(ctx->dev, "shfactor[%d]\n", shfactor); |
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792 | 794 | |
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793 | 795 | cfg = (EXYNOS_CISCPRERATIO_SHFACTOR(shfactor) | |
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794 | 796 | EXYNOS_CISCPRERATIO_PREHORRATIO(1 << hfactor) | |
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.. | .. |
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806 | 808 | { |
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807 | 809 | u32 cfg, cfg_ext; |
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808 | 810 | |
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809 | | - DRM_DEBUG_KMS("range[%d]bypass[%d]up_h[%d]up_v[%d]\n", |
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810 | | - sc->range, sc->bypass, sc->up_h, sc->up_v); |
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811 | | - DRM_DEBUG_KMS("hratio[%d]vratio[%d]\n", |
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812 | | - sc->hratio, sc->vratio); |
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| 811 | + DRM_DEV_DEBUG_KMS(ctx->dev, "range[%d]bypass[%d]up_h[%d]up_v[%d]\n", |
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| 812 | + sc->range, sc->bypass, sc->up_h, sc->up_v); |
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| 813 | + DRM_DEV_DEBUG_KMS(ctx->dev, "hratio[%d]vratio[%d]\n", |
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| 814 | + sc->hratio, sc->vratio); |
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813 | 815 | |
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814 | 816 | cfg = fimc_read(ctx, EXYNOS_CISCCTRL); |
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815 | 817 | cfg &= ~(EXYNOS_CISCCTRL_SCALERBYPASS | |
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.. | .. |
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847 | 849 | unsigned int real_width = buf->buf.pitch[0] / buf->format->cpp[0]; |
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848 | 850 | u32 cfg, cfg_ext; |
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849 | 851 | |
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850 | | - DRM_DEBUG_KMS("hsize[%d]vsize[%d]\n", real_width, buf->buf.height); |
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| 852 | + DRM_DEV_DEBUG_KMS(ctx->dev, "hsize[%d]vsize[%d]\n", real_width, |
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| 853 | + buf->buf.height); |
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851 | 854 | |
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852 | 855 | /* original size */ |
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853 | 856 | cfg = (EXYNOS_ORGOSIZE_HORIZONTAL(real_width) | |
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.. | .. |
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855 | 858 | |
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856 | 859 | fimc_write(ctx, cfg, EXYNOS_ORGOSIZE); |
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857 | 860 | |
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858 | | - DRM_DEBUG_KMS("x[%d]y[%d]w[%d]h[%d]\n", buf->rect.x, buf->rect.y, |
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859 | | - buf->rect.w, buf->rect.h); |
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| 861 | + DRM_DEV_DEBUG_KMS(ctx->dev, "x[%d]y[%d]w[%d]h[%d]\n", buf->rect.x, |
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| 862 | + buf->rect.y, |
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| 863 | + buf->rect.w, buf->rect.h); |
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860 | 864 | |
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861 | 865 | /* CSC ITU */ |
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862 | 866 | cfg = fimc_read(ctx, EXYNOS_CIGCTRL); |
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.. | .. |
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906 | 910 | u32 buf_num; |
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907 | 911 | u32 cfg; |
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908 | 912 | |
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909 | | - DRM_DEBUG_KMS("buf_id[%d]enqueu[%d]\n", buf_id, enqueue); |
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| 913 | + DRM_DEV_DEBUG_KMS(ctx->dev, "buf_id[%d]enqueu[%d]\n", buf_id, enqueue); |
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910 | 914 | |
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911 | 915 | spin_lock_irqsave(&ctx->lock, flags); |
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912 | 916 | |
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.. | .. |
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946 | 950 | struct fimc_context *ctx = dev_id; |
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947 | 951 | int buf_id; |
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948 | 952 | |
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949 | | - DRM_DEBUG_KMS("fimc id[%d]\n", ctx->id); |
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| 953 | + DRM_DEV_DEBUG_KMS(ctx->dev, "fimc id[%d]\n", ctx->id); |
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950 | 954 | |
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951 | 955 | fimc_clear_irq(ctx); |
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952 | 956 | if (fimc_check_ovf(ctx)) |
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.. | .. |
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959 | 963 | if (buf_id < 0) |
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960 | 964 | return IRQ_HANDLED; |
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961 | 965 | |
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962 | | - DRM_DEBUG_KMS("buf_id[%d]\n", buf_id); |
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| 966 | + DRM_DEV_DEBUG_KMS(ctx->dev, "buf_id[%d]\n", buf_id); |
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963 | 967 | |
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964 | 968 | if (ctx->task) { |
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965 | 969 | struct exynos_drm_ipp_task *task = ctx->task; |
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.. | .. |
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1129 | 1133 | struct exynos_drm_ipp *ipp = &ctx->ipp; |
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1130 | 1134 | |
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1131 | 1135 | ctx->drm_dev = drm_dev; |
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1132 | | - drm_iommu_attach_device(drm_dev, dev); |
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| 1136 | + ipp->drm_dev = drm_dev; |
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| 1137 | + exynos_drm_register_dma(drm_dev, dev, &ctx->dma_priv); |
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1133 | 1138 | |
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1134 | | - exynos_drm_ipp_register(drm_dev, ipp, &ipp_funcs, |
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| 1139 | + exynos_drm_ipp_register(dev, ipp, &ipp_funcs, |
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1135 | 1140 | DRM_EXYNOS_IPP_CAP_CROP | DRM_EXYNOS_IPP_CAP_ROTATE | |
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1136 | 1141 | DRM_EXYNOS_IPP_CAP_SCALE | DRM_EXYNOS_IPP_CAP_CONVERT, |
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1137 | 1142 | ctx->formats, ctx->num_formats, "fimc"); |
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.. | .. |
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1148 | 1153 | struct drm_device *drm_dev = data; |
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1149 | 1154 | struct exynos_drm_ipp *ipp = &ctx->ipp; |
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1150 | 1155 | |
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1151 | | - exynos_drm_ipp_unregister(drm_dev, ipp); |
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1152 | | - drm_iommu_detach_device(drm_dev, dev); |
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| 1156 | + exynos_drm_ipp_unregister(dev, ipp); |
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| 1157 | + exynos_drm_unregister_dma(drm_dev, dev, &ctx->dma_priv); |
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1153 | 1158 | } |
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1154 | 1159 | |
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1155 | 1160 | static const struct component_ops fimc_component_ops = { |
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.. | .. |
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1381 | 1386 | { |
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1382 | 1387 | struct fimc_context *ctx = get_fimc_context(dev); |
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1383 | 1388 | |
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1384 | | - DRM_DEBUG_KMS("id[%d]\n", ctx->id); |
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| 1389 | + DRM_DEV_DEBUG_KMS(dev, "id[%d]\n", ctx->id); |
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1385 | 1390 | clk_disable_unprepare(ctx->clocks[FIMC_CLK_GATE]); |
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1386 | 1391 | return 0; |
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1387 | 1392 | } |
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.. | .. |
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1390 | 1395 | { |
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1391 | 1396 | struct fimc_context *ctx = get_fimc_context(dev); |
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1392 | 1397 | |
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1393 | | - DRM_DEBUG_KMS("id[%d]\n", ctx->id); |
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| 1398 | + DRM_DEV_DEBUG_KMS(dev, "id[%d]\n", ctx->id); |
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1394 | 1399 | return clk_prepare_enable(ctx->clocks[FIMC_CLK_GATE]); |
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1395 | 1400 | } |
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1396 | 1401 | #endif |
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