add lvds1024*800

hc

2024-01-31 f70575805708cabdedea7498aaa3f710fde4d920

 kernel/drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_1_sh_mask.h
..
..
@@ -194,6 +194,8 @@
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 #define CG_SPLL_FUNC_CNTL_6__SPLL_LF_CNTR__SHIFT 0x19
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 #define CG_SPLL_FUNC_CNTL_7__SPLL_BW_CNTRL_MASK 0xfff
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 #define CG_SPLL_FUNC_CNTL_7__SPLL_BW_CNTRL__SHIFT 0x0
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+#define CG_SPLL_STATUS__SPLL_CHG_STATUS_MASK 0x2
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+#define CG_SPLL_STATUS__SPLL_CHG_STATUS__SHIFT 0x1
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 #define SPLL_CNTL_MODE__SPLL_SW_DIR_CONTROL_MASK 0x1
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 #define SPLL_CNTL_MODE__SPLL_SW_DIR_CONTROL__SHIFT 0x0
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 #define SPLL_CNTL_MODE__SPLL_LEGACY_PDIV_MASK 0x2