add lvds1024*800

hc

2024-01-31 f70575805708cabdedea7498aaa3f710fde4d920

 kernel/drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_1_0_offset.h
..
..
@@ -1964,4 +1964,20 @@
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 #define mmATC_L2_PERFCOUNTER_RSLT_CNTL                                                                 0x084a
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 #define mmATC_L2_PERFCOUNTER_RSLT_CNTL_BASE_IDX                                                        0
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+/* MMEA */
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+#define mmMMEA0_EDC_CNT_VG20                                                                           0x0206
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+#define mmMMEA0_EDC_CNT_VG20_BASE_IDX                                                                  0
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+#define mmMMEA0_EDC_CNT2_VG20                                                                          0x0207
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+#define mmMMEA0_EDC_CNT2_VG20_BASE_IDX                                                                 0
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+#define mmMMEA1_EDC_CNT_VG20                                                                           0x0346
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+#define mmMMEA1_EDC_CNT_VG20_BASE_IDX                                                                  0
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+#define mmMMEA1_EDC_CNT2_VG20                                                                          0x0347
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+#define mmMMEA1_EDC_CNT2_VG20_BASE_IDX                                                                 0
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+
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+// addressBlock: mmhub_utcl2_vmsharedpfdec
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+// base address: 0x6a040
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+#define mmMC_VM_XGMI_LFB_CNTL                                                                          0x0823
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+#define mmMC_VM_XGMI_LFB_CNTL_BASE_IDX                                                                 0
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+#define mmMC_VM_XGMI_LFB_SIZE                                                                          0x0824
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+#define mmMC_VM_XGMI_LFB_SIZE_BASE_IDX                                                                 0
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 #endif