forked from ~ljy/RK356X_SDK_RELEASE
blame | history | patch | commit | commitdiff
hc
2024-01-31 f70575805708cabdedea7498aaa3f710fde4d920 
 kernel/drivers/gpu/arm/bifrost/mmu/mali_kbase_mmu_hw.h
....@@ -1,7 +1,7 @@
11 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
22 /*
33  *
4
- * (C) COPYRIGHT 2014-2015, 2018-2021 ARM Limited. All rights reserved.
4
+ * (C) COPYRIGHT 2014-2015, 2018-2022 ARM Limited. All rights reserved.
55  *
66  * This program is free software and is provided to you under the terms of the
77  * GNU General Public License version 2 as published by the Free Software
....@@ -31,6 +31,8 @@
3131 #ifndef _KBASE_MMU_HW_H_
3232 #define _KBASE_MMU_HW_H_
3333 
34
+#include "mali_kbase_mmu.h"
35
+
3436 /* Forward declarations */
3537 struct kbase_device;
3638 struct kbase_as;
....@@ -53,6 +55,25 @@
5355 };
5456 
5557 /**
58
+ * struct kbase_mmu_hw_op_param  - parameters for kbase_mmu_hw_do_* functions
59
+ * @vpfn:           MMU Virtual Page Frame Number to start the operation on.
60
+ * @nr:             Number of pages to work on.
61
+ * @op:             Operation type (written to ASn_COMMAND).
62
+ * @kctx_id:        Kernel context ID for MMU command tracepoint.
63
+ * @mmu_sync_info:  Indicates whether this call is synchronous wrt MMU ops.
64
+ * @flush_skip_levels: Page table levels to skip flushing. (Only
65
+ *                     applicable if GPU supports feature)
66
+ */
67
+struct kbase_mmu_hw_op_param {
68
+	u64 vpfn;
69
+	u32 nr;
70
+	enum kbase_mmu_op_type op;
71
+	u32 kctx_id;
72
+	enum kbase_caller_mmu_sync_info mmu_sync_info;
73
+	u64 flush_skip_levels;
74
+};
75
+
76
+/**
5677  * kbase_mmu_hw_configure - Configure an address space for use.
5778  * @kbdev:          kbase device to configure.
5879  * @as:             address space to configure.
....@@ -64,23 +85,105 @@
6485 		struct kbase_as *as);
6586 
6687 /**
67
- * kbase_mmu_hw_do_operation - Issue an operation to the MMU.
68
- * @kbdev:         kbase device to issue the MMU operation on.
69
- * @as:            address space to issue the MMU operation on.
70
- * @vpfn:          MMU Virtual Page Frame Number to start the operation on.
71
- * @nr:            Number of pages to work on.
72
- * @type:          Operation type (written to ASn_COMMAND).
73
- * @handling_irq:  Is this operation being called during the handling
74
- *                 of an interrupt?
88
+ * kbase_mmu_hw_do_lock - Issue LOCK command to the MMU and program
89
+ *                        the LOCKADDR register.
7590  *
76
- * Issue an operation (MMU invalidate, MMU flush, etc) on the address space that
77
- * is associated with the provided kbase_context over the specified range
91
+ * @kbdev:     Kbase device to issue the MMU operation on.
92
+ * @as:        Address space to issue the MMU operation on.
93
+ * @op_param:  Pointer to struct containing information about the MMU
94
+ *             operation to perform.
7895  *
79
- * Return: Zero if the operation was successful, non-zero otherwise.
96
+ * hwaccess_lock needs to be held when calling this function.
97
+ *
98
+ * Return: 0 if issuing the command was successful, otherwise an error code.
8099  */
81
-int kbase_mmu_hw_do_operation(struct kbase_device *kbdev, struct kbase_as *as,
82
-		u64 vpfn, u32 nr, u32 type,
83
-		unsigned int handling_irq);
100
+int kbase_mmu_hw_do_lock(struct kbase_device *kbdev, struct kbase_as *as,
101
+			 const struct kbase_mmu_hw_op_param *op_param);
102
+
103
+/**
104
+ * kbase_mmu_hw_do_unlock_no_addr - Issue UNLOCK command to the MMU without
105
+ *                                  programming the LOCKADDR register and wait
106
+ *                                  for it to complete before returning.
107
+ *
108
+ * @kbdev:     Kbase device to issue the MMU operation on.
109
+ * @as:        Address space to issue the MMU operation on.
110
+ * @op_param:  Pointer to struct containing information about the MMU
111
+ *             operation to perform.
112
+ *
113
+ * This function should be called for GPU where GPU command is used to flush
114
+ * the cache(s) instead of MMU command.
115
+ *
116
+ * Return: 0 if issuing the command was successful, otherwise an error code.
117
+ */
118
+int kbase_mmu_hw_do_unlock_no_addr(struct kbase_device *kbdev, struct kbase_as *as,
119
+				   const struct kbase_mmu_hw_op_param *op_param);
120
+
121
+/**
122
+ * kbase_mmu_hw_do_unlock - Issue UNLOCK command to the MMU and wait for it
123
+ *                          to complete before returning.
124
+ *
125
+ * @kbdev:     Kbase device to issue the MMU operation on.
126
+ * @as:        Address space to issue the MMU operation on.
127
+ * @op_param:  Pointer to struct containing information about the MMU
128
+ *             operation to perform.
129
+ *
130
+ * Return: 0 if issuing the command was successful, otherwise an error code.
131
+ */
132
+int kbase_mmu_hw_do_unlock(struct kbase_device *kbdev, struct kbase_as *as,
133
+			   const struct kbase_mmu_hw_op_param *op_param);
134
+/**
135
+ * kbase_mmu_hw_do_flush - Issue a flush operation to the MMU.
136
+ *
137
+ * @kbdev:      Kbase device to issue the MMU operation on.
138
+ * @as:         Address space to issue the MMU operation on.
139
+ * @op_param:   Pointer to struct containing information about the MMU
140
+ *              operation to perform.
141
+ *
142
+ * Issue a flush operation on the address space as per the information
143
+ * specified inside @op_param. This function should not be called for
144
+ * GPUs where MMU command to flush the cache(s) is deprecated.
145
+ * mmu_hw_mutex needs to be held when calling this function.
146
+ *
147
+ * Return: 0 if the operation was successful, non-zero otherwise.
148
+ */
149
+int kbase_mmu_hw_do_flush(struct kbase_device *kbdev, struct kbase_as *as,
150
+			  const struct kbase_mmu_hw_op_param *op_param);
151
+
152
+/**
153
+ * kbase_mmu_hw_do_flush_locked - Issue a flush operation to the MMU.
154
+ *
155
+ * @kbdev:      Kbase device to issue the MMU operation on.
156
+ * @as:         Address space to issue the MMU operation on.
157
+ * @op_param:   Pointer to struct containing information about the MMU
158
+ *              operation to perform.
159
+ *
160
+ * Issue a flush operation on the address space as per the information
161
+ * specified inside @op_param. This function should not be called for
162
+ * GPUs where MMU command to flush the cache(s) is deprecated.
163
+ * Both mmu_hw_mutex and hwaccess_lock need to be held when calling this
164
+ * function.
165
+ *
166
+ * Return: 0 if the operation was successful, non-zero otherwise.
167
+ */
168
+int kbase_mmu_hw_do_flush_locked(struct kbase_device *kbdev, struct kbase_as *as,
169
+				 const struct kbase_mmu_hw_op_param *op_param);
170
+
171
+/**
172
+ * kbase_mmu_hw_do_flush_on_gpu_ctrl - Issue a flush operation to the MMU.
173
+ *
174
+ * @kbdev:      Kbase device to issue the MMU operation on.
175
+ * @as:         Address space to issue the MMU operation on.
176
+ * @op_param:   Pointer to struct containing information about the MMU
177
+ *              operation to perform.
178
+ *
179
+ * Issue a flush operation on the address space as per the information
180
+ * specified inside @op_param. GPU command is used to flush the cache(s)
181
+ * instead of the MMU command.
182
+ *
183
+ * Return: 0 if the operation was successful, non-zero otherwise.
184
+ */
185
+int kbase_mmu_hw_do_flush_on_gpu_ctrl(struct kbase_device *kbdev, struct kbase_as *as,
186
+				      const struct kbase_mmu_hw_op_param *op_param);
84187 
85188 /**
86189  * kbase_mmu_hw_clear_fault - Clear a fault that has been previously reported by