add lvds1024*800

hc

2024-01-31 f70575805708cabdedea7498aaa3f710fde4d920

 kernel/drivers/clk/hisilicon/clkdivider-hi6220.c
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@@ -1,14 +1,10 @@
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+// SPDX-License-Identifier: GPL-2.0-only
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 /*
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  * Hisilicon hi6220 SoC divider clock driver
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  *
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  * Copyright (c) 2015 Hisilicon Limited.
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  *
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  * Author: Bintian Wang <bintian.wang@huawei.com>
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- *
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- * This program is free software; you can redistribute it and/or modify
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- * it under the terms of the GNU General Public License version 2 as
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- * published by the Free Software Foundation.
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- *
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  */
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 #include <linux/kernel.h>
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@@ -107,7 +103,7 @@
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 {
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 	struct hi6220_clk_divider *div;
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 	struct clk *clk;
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-	struct clk_init_data init = {};
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+	struct clk_init_data init;
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 	struct clk_div_table *table;
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 	u32 max_div, min_div;
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 	int i;