forked from ~ljy/RK356X_SDK_RELEASE
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2024-01-31 f70575805708cabdedea7498aaa3f710fde4d920 
 kernel/arch/arm64/boot/dts/rockchip/NK-R36S0.dtsi
....@@ -8,6 +8,7 @@
88 
99 #include <dt-bindings/gpio/gpio.h>
1010 #include <dt-bindings/pinctrl/rockchip.h>
11
+#include <dt-bindings/display/media-bus-format.h>
1112 #include "rk3568.dtsi"
1213 #include "rk3568-evb.dtsi"
1314 
....@@ -17,7 +18,8 @@
1718 
1819 	rk_headset: rk-headset {
1920 		compatible = "rockchip_headset";
20
-		headset_gpio = <&gpio3 RK_PC2 GPIO_ACTIVE_LOW>;
21
+		headset_gpio = <&gpio0 RK_PD5 GPIO_ACTIVE_LOW>;
22
+		spk_ctl_gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_LOW>;//AMP_SD_GPIO4_C2_3V3
2123 		pinctrl-names = "default";
2224 		pinctrl-0 = <&hp_det>;
2325 	};
....@@ -32,15 +34,6 @@
3234 		vin-supply = <&vcc3v3_sys>;
3335 	};
3436 
35
-	vcc3v3_vga: vcc3v3-vga {
36
-		compatible = "regulator-fixed";
37
-		regulator-name = "vcc3v3_vga";
38
-		regulator-always-on;
39
-		regulator-boot-on;
40
-		gpio = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>;
41
-		enable-active-high;
42
-		vin-supply = <&vcc3v3_sys>;
43
-	};
4437 
4538 	pcie30_avdd0v9: pcie30-avdd0v9 {
4639 		compatible = "regulator-fixed";
....@@ -67,7 +60,9 @@
6760 		regulator-name = "vcc3v3_pcie";
6861 		regulator-min-microvolt = <3300000>;
6962 		regulator-max-microvolt = <3300000>;
63
+		regulator-always-on;
7064 		enable-active-high;
65
+		regulator-boot-on;
7166 		gpio = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
7267 		startup-delay-us = <5000>;
7368 		vin-supply = <&dc_12v>;
....@@ -94,38 +89,166 @@
9489 		regulator-boot-on;
9590     	};
9691 #endif
97
-
92
+	ndj_io_init {
93
+         	compatible = "nk_io_control";	
94
+			pinctrl-names = "default";
95
+        	pinctrl-0 = <&nk_io_gpio>;
96
+			
97
+			//gpio_op0 = <&gpio1 RK_PD0 GPIO_ACTIVE_HIGH>;
98
+			
99
+			vcc_5v {
100
+				gpio_num = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; //VCC5_IO_EN_GPIO1_A4_3V3
101
+				gpio_function = <0>;	
102
+			};
103
+			
104
+			vcc_12v {
105
+				gpio_num = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;  //VCC12_IO_EN_GPIO0_C7_3V3
106
+				gpio_function = <0>;
107
+			};
108
+			
109
+			hub_host2_rst {
110
+				gpio_num = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>;  //HUB_RST_GPIO4_D2_3V3
111
+				gpio_function = <3>;
112
+			};
113
+			
114
+			hub_host3 {
115
+				gpio_num = <&gpio4 RK_PB2 GPIO_ACTIVE_HIGH>; //HOST3_EN_GPIO4_B2_1V8
116
+				gpio_function = <0>;
117
+			};
118
+			
119
+			wake_4g {
120
+				gpio_num = <&gpio1 RK_PB1 GPIO_ACTIVE_LOW>; //4G_WAKEUP_GPIO01_B1_3V3
121
+				gpio_function = <0>;
122
+			};
123
+			
124
+			air_mode_4g {
125
+				gpio_num = <&gpio1 RK_PB0 GPIO_ACTIVE_LOW>; //4G_AIR_MODE_GPIO01_B0_3V3
126
+				gpio_function = <0>;
127
+			};
128
+			
129
+			reset_4g {
130
+				gpio_num = <&gpio1 RK_PB2 GPIO_ACTIVE_LOW>; //4G_RST_GPIO01_B2_3V3
131
+				gpio_function = <3>;
132
+			};
133
+			
134
+			en_4g {
135
+				gpio_num = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; //4G_PWREN_H_GPIO0_C6
136
+				gpio_function = <0>;
137
+			};
138
+			
139
+			hp_en {
140
+				gpio_num = <&gpio3 RK_PA6 GPIO_ACTIVE_LOW>;//HP_EN_GPIO3_A6_3V3
141
+				gpio_function = <0>;
142
+			};
143
+			
144
+			wifi_power_en {
145
+				gpio_num = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>; //WIFI_PWREN_GPIO3_C6_1V8
146
+				gpio_function = <0>;
147
+			};
148
+	#if 0		
149
+			do1 {
150
+				gpio_num = <&gpio1 RK_PD0 GPIO_ACTIVE_LOW>; 
151
+				gpio_function = <0>;
152
+			};
153
+			
154
+			do2 {
155
+				gpio_num = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>;
156
+				gpio_function = <0>;
157
+			};
158
+			
159
+			do3 {
160
+				gpio_num = <&gpio1 RK_PD1 GPIO_ACTIVE_HIGH>;
161
+				gpio_function = <0>;
162
+			};
163
+			
164
+			do4 {
165
+				gpio_num = <&gpio1 RK_PD3 GPIO_ACTIVE_HIGH>;
166
+				gpio_function = <0>;
167
+			};
168
+			
169
+			do5 {
170
+				gpio_num = <&gpio2 RK_PD6 GPIO_ACTIVE_LOW>; 
171
+				gpio_function = <0>;
172
+			};
173
+			
174
+			do6 {
175
+				gpio_num = <&gpio2 RK_PD7 GPIO_ACTIVE_LOW>; 
176
+				gpio_function = <0>;
177
+			};
178
+			
179
+			do7 {
180
+				gpio_num = <&gpio3 RK_PA0 GPIO_ACTIVE_LOW>; 
181
+				gpio_function = <0>;
182
+			};
183
+			
184
+			di1 {
185
+				gpio_num = <&gpio2 RK_PD5 GPIO_ACTIVE_HIGH>;
186
+				gpio_function = <1>;
187
+			};
188
+	#endif
189
+		};
190
+#if 0			
98191 	    nk_io_init {
99192                 compatible = "nk_io_control";
100
-				usb_en_oc_gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;  //USB_EN_OC_GPIO0_A5
101
-				lcd_bk_en_gpio = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>; //LCD0_BKLT_EN_3V3
102
-				lcd_pwblk_gpio = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;  //LCD0_BKLT_EN_3V3
103
-				vcc3_io_en_gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; //VCC3_IO_EN_GPIO0_C4_3V3
193
+//				vcc3_io_en_gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; //VCC3_IO_EN_GPIO0_C4_3V3
104194                 hub_host2_5V_rest_gpio = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>; //HUB_RST_GPIO4_D2_3V3
105195                 hub_host3_5v_gpio = <&gpio4 RK_PB2 GPIO_ACTIVE_HIGH>; //HOST3_EN_GPIO4_B2_1V8
106
-//              hub_host3_5V_rest_gpio = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>; 
107196                 vcc_5v_io = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>;   //VCC5_IO_EN_GPIO1_A4_3V3
108197                 vcc_12v_io = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; //VCC12_IO_EN_GPIO0_C7_3V3
109198                 en_4g_gpio = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; //4G_PWREN_H_GPIO0_C6
110199                 reset_4g_gpio = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>; //4G_RST_GPIO01_B2_3V3
111200                 air_mode_4g_gpio = <&gpio1 RK_PB0 GPIO_ACTIVE_HIGH>; //4G_AIR_MODE_GPIO01_B0_3V3
112201                 wake_4g_gpio = <&gpio1 RK_PB1 GPIO_ACTIVE_HIGH>; //4G_WAKEUP_GPIO01_B1_3V3
113
-                
114
-				edp_enable_gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>;
115
-                edp_gpio0 = <&gpio3 RK_PD2 GPIO_ACTIVE_LOW>; //7511_GPIO0-GPIO3_D2
116
-				edp_gpio1 = <&gpio3 RK_PD3 GPIO_ACTIVE_LOW>; //7511_GPIO1-GPIO3_D3
117
-				edp_gpio2 = <&gpio3 RK_PD4 GPIO_ACTIVE_LOW>; //7511_GPIO2-GPIO3_D4
118
-				edp_gpio3 = <&gpio3 RK_PD5 GPIO_ACTIVE_LOW>; //7511_GPIO3-GPIO3_D5
119
-                edp_reset = <&gpio3 RK_PD1 GPIO_ACTIVE_LOW>; //7511_RST_GPIO3_D1
120
-//              tp_reset = <&gpio3 RK_PA7 GPIO_ACTIVE_HIGH>;
121
-//              vddio_mipi = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>;
122
-		
202
+				hp_en_gpio = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>;//HP_EN_GPIO3_A6_3V3
203
+//              spk_out_gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_HIGH>;//AMP_SD_GPIO4_C2_3V3			
123204 				wifi_power_en_gpio = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>; //WIFI_PWREN_GPIO3_C6_1V8
124
-
205
+//				pcie_power_en_gpio = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;//PCIE_PWREN_H_GPIO0_D4				
125206 				pinctrl-names = "default";
126
-				pinctrl-0 = <&nk_io_gpio>;
127
-				nodka_lvds = <9>;
207
+				pinctrl-0 = <&nk_io_gpio>;				
128208         };
209
+#endif	
210
+		panel: panel {
211
+				compatible = "simple-panel";
212
+				backlight = <&backlight>;
213
+				power-supply = <&vcc3v3_lcd0_n>;
214
+				enable-gpios = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>; //LCD0_VDD_H_GPIO2_D4
215
+				reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_LOW>; //7511_RST_GPIO3_D1
216
+				edp-bl-gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;  //LCD0_BKLT_EN_3V3
217
+				edp-bl-en = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>; //LCD0_BKLT_EN_3V3
218
+				bus-format = <MEDIA_BUS_FMT_RGB888_1X24>;
219
+				bpc = <8>;
220
+				prepare-delay-ms = <200>;
221
+				enable-delay-ms = <20>;
222
+				lvds-gpio0 = <&gpio3 RK_PD2 GPIO_ACTIVE_HIGH>; //7511_GPIO0-GPIO3_D2 
223
+				lvds-gpio1 = <&gpio3 RK_PD3 GPIO_ACTIVE_HIGH>; //7511_GPIO1-GPIO3_D3 
224
+				lvds-gpio2 = <&gpio3 RK_PD4 GPIO_ACTIVE_HIGH>; //7511_GPIO2-GPIO3_D4 
225
+				lvds-gpio3 = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>; //7511_GPIO3-GPIO3_D5
226
+				nodka-lvds = <15>;
227
+
228
+				display-timings {
229
+                native-mode = <&timing>;
230
+                timing: timing {
231
+					clock-frequency = <72500000>;
232
+					hactive = <1280>;
233
+					vactive = <800>;
234
+					hfront-porch = <70>;
235
+					hsync-len = <2>;
236
+					hback-porch = <88>;
237
+					vfront-porch = <7>;
238
+					vsync-len = <4>;
239
+					vback-porch = <17>;
240
+					hsync-active = <21>;
241
+					vsync-active = <0>;
242
+					de-active = <0>;
243
+					pixelclk-active = <0>;			
244
+					};
245
+				};
246
+				ports {
247
+					panel_in_lvds: endpoint {
248
+					remote-endpoint = <&lvds_out>;
249
+						};
250
+					};   
251
+				};
129252 };
130253 
131254 &combphy0_us {
....@@ -141,11 +264,11 @@
141264 };
142265 
143266 &csi2_dphy_hw {
144
-	status = "okay";
267
+	status = "disabled";
145268 };
146269 
147270 &csi2_dphy0 {
148
-	status = "okay";
271
+	status = "disabled";
149272 
150273 	ports {
151274 		#address-cells = <1>;
....@@ -188,8 +311,12 @@
188311  * video_phy0 needs to be enabled
189312  * when dsi0 is enabled
190313  */
191
-&dsi0 {
314
+&video_phy0 {
192315 	status = "okay";
316
+};
317
+
318
+&dsi0 {
319
+	status = "disabled";
193320 };
194321 
195322 &dsi0_in_vp0 {
....@@ -197,7 +324,7 @@
197324 };
198325 
199326 &dsi0_in_vp1 {
200
-	status = "okay";
327
+	status = "disabled";
201328 };
202329 
203330 &dsi0_panel {
....@@ -208,6 +335,10 @@
208335  * video_phy1 needs to be enabled
209336  * when dsi1 is enabled
210337  */
338
+ 
339
+&video_phy1 {
340
+	status = "disabled";
341
+}; 
211342 &dsi1 {
212343 	status = "disabled";
213344 };
....@@ -221,31 +352,117 @@
221352 };
222353 
223354 &dsi1_panel {
224
-	power-supply = <&vcc3v3_lcd1_n>;
355
+//	power-supply = <&vcc3v3_lcd1_n>;   //MIPI_3V3EN_GPIO3_A3_d_3V3
356
+    vddio-mipi = <&gpio3 RK_PA4 GPIO_ACTIVE_HIGH>; //MIPI_EN_1V8_GPIO3_A4_d_3V3
357
+    reset-gpios = <&gpio3 RK_PC7 GPIO_ACTIVE_LOW>; //MIPI_RST_L_GPIO3_C7
358
+    vcc-5v-gpio = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; //VCC5_IO_EN_GPIO1_A4_3V3
359
+    pinctrl-names = "default";
360
+    pinctrl-0 = <&lcd1_rst_gpio>;
225361 };
226362 
363
+&route_dsi1 {
364
+	status = "disabled";
365
+	connect = <&vp1_out_dsi1>;
366
+};
367
+
368
+
369
+/*
370
+*  edp_start
371
+*/
372
+
227373 &edp {
228
-	hpd-gpios = <&gpio0 RK_PC2 GPIO_ACTIVE_HIGH>;
229
-	status = "okay";
374
+    force-hpd;
375
+	status = "disabled";
230376 };
231377 
232378 &edp_phy {
233
-	status = "okay";
379
+	status = "disabled";
234380 };
235381 
236382 &edp_in_vp0 {
237
-	status = "okay";
383
+    status = "disabled";
238384 };
239385 
240386 &edp_in_vp1 {
387
+    status = "disabled";
388
+
389
+};
390
+
391
+&route_edp {
392
+    status = "disabled";
393
+    connect = <&vp1_out_edp>;
394
+};
395
+
396
+&route_edp {
241397 	status = "disabled";
242398 };
399
+
400
+&lvds {
401
+	status = "okay";
402
+	ports {
403
+		port@1 {
404
+			reg = <1>;
405
+			lvds_out:endpoint {
406
+				remote-endpoint = <&panel_in_lvds>;
407
+			};
408
+		};
409
+	};
410
+};
411
+
412
+&route_lvds{
413
+	status = "okay";
414
+	connect = <&vp1_out_lvds>;
415
+};
416
+
417
+&lvds_in_vp1 {
418
+	status = "okay";
419
+};
420
+
421
+/*
422
+*  edp_end
423
+*/
424
+
425
+/*
426
+*  Hdmi_start
427
+*/
428
+
429
+&hdmi {
430
+	status = "okay";
431
+	rockchip,phy-table =
432
+		<92812500  0x8009 0x0000 0x0270>,
433
+		<165000000 0x800b 0x0000 0x026d>,
434
+		<185625000 0x800b 0x0000 0x01ed>,
435
+		<297000000 0x800b 0x0000 0x01ad>,
436
+		<594000000 0x8029 0x0000 0x0088>,
437
+		<000000000 0x0000 0x0000 0x0000>;
438
+};
439
+
440
+&route_hdmi {
441
+	status = "okay";
442
+	connect = <&vp0_out_hdmi>;
443
+};
444
+
445
+&hdmi_in_vp0 {
446
+	status = "okay";
447
+};
448
+
449
+&hdmi_in_vp1 {
450
+	status = "disabled";
451
+};
452
+
453
+&hdmi_sound {
454
+	status = "okay";
455
+};
456
+
457
+/*
458
+ *  Hdmi_END
459
+*/
243460 
244461 &gmac0 {
245462 	phy-mode = "rgmii";
246463 	clock_in_out = "output";
247464 
248
-	snps,reset-gpio = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>;
465
+	snps,reset-gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_LOW>;
249466 	snps,reset-active-low;
250467 	/* Reset time is 20ms, 100ms for rtl8211f */
251468 	snps,reset-delays-us = <0 20000 100000>;
....@@ -265,7 +482,9 @@
265482 	rx_delay = <0x2f>;
266483 
267484 	phy-handle = <&rgmii_phy0>;
485
+	
268486 	status = "disabled";
487
+	
269488 };
270489 
271490 &gmac1 {
....@@ -299,9 +518,7 @@
299518  * power-supply should switche to vcc3v3_lcd1_n
300519  * when mipi panel is connected to dsi1.
301520  */
302
-&gt1x {
303
-	power-supply = <&vcc3v3_lcd0_n>;
304
-};
521
+
305522 
306523 &i2c3 {
307524 	status = "okay";
....@@ -317,13 +534,10 @@
317534                 compatible = "nk_mcu";
318535                 reg = <0x15>;
319536         };
320
-
321
-
322
-
323537 };
324538 
325539 &i2c4 {
326
-	status = "okay";
540
+	status = "disabled";
327541 	gc8034: gc8034@37 {
328542 		compatible = "galaxycore,gc8034";
329543 		status = "okay";
....@@ -335,7 +549,6 @@
335549 		reset-gpios = <&gpio3 RK_PB6 GPIO_ACTIVE_LOW>;
336550 		pwdn-gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_LOW>;
337551 		rockchip,grf = <&grf>;
338
-		power-domains = <&power RK3568_PD_VI>;
339552 		rockchip,camera-module-index = <0>;
340553 		rockchip,camera-module-facing = "back";
341554 		rockchip,camera-module-name = "RK-CMK-8M-2-v1";
....@@ -369,7 +582,7 @@
369582 		};
370583 	};
371584 	ov5695: ov5695@36 {
372
-		status = "okay";
585
+		status = "disabled";
373586 		compatible = "ovti,ov5695";
374587 		reg = <0x36>;
375588 		clocks = <&cru CLK_CIF_OUT>;
....@@ -392,6 +605,19 @@
392605 	};
393606 };
394607 
608
+&i2c5 {
609
+	status = "okay";
610
+
611
+	hym8563: hym8563@51 {
612
+		compatible = "haoyu,hym8563";
613
+		reg = <0x51>;
614
+		#clock-cells = <0>;
615
+		clock-frequency = <32768>;
616
+		clock-output-names = "xin32k";
617
+		/* rtc_int is not connected */
618
+	};
619
+};
620
+
395621 &mdio0 {
396622 	rgmii_phy0: phy@0 {
397623 		compatible = "ethernet-phy-ieee802.3-c22";
....@@ -406,20 +632,14 @@
406632 	};
407633 };
408634 
409
-&video_phy0 {
410
-	status = "okay";
411
-};
412635 
413
-&video_phy1 {
414
-	status = "disabled";
415
-};
416636 
417637 &pcie30phy {
418638 	status = "okay";
419639 };
420640 
421
-&pcie3x2 {
422
-	reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
641
+&pcie2x1 {
642
+	reset-gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>;
423643 	vpcie3v3-supply = <&vcc3v3_pcie>;
424644 	status = "okay";
425645 };
....@@ -434,7 +654,8 @@
434654 //	};
435655 	headphone {
436656 		hp_det: hp-det {
437
-			rockchip,pins = <3 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
657
+			rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_down>,
658
+							<4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
438659 		};
439660 	};
440661 
....@@ -449,23 +670,50 @@
449670 			rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
450671 		};
451672 	};
673
+	
674
+	lcd1 {
675
+        lcd1_rst_gpio: lcd1-rst-gpio {
676
+            rockchip,pins = <3 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
677
+        };
678
+    };
679
+		
452680 	nk_io_init{
453681 		nk_io_gpio: nk-io-gpio{
454
-            rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>;
682
+			rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>,
683
+							<0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>,
684
+							<0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>,
685
+							<4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>,
686
+							<4 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>,
687
+							<1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>,
688
+							<0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>,
689
+							<1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>,
690
+							<1 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>,
691
+							<1 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>,
692
+							<3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>,
693
+							<3 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>,
694
+							<3 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>,
695
+							<3 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>,
696
+							<3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>,
697
+							<3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>,
698
+							<2 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>,//93 SPI2_CS0_M1_3V3
699
+							<2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>,//94 SPI2_MOSI_M1_3V3
700
+							<2 RK_PD7 RK_FUNC_GPIO &pcfg_pull_none>,//95 SPI2_MISO_M1_3V3
701
+							<3 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>,//96 SPI2_CLK_M1_3V3
702
+							<0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
455703 		};
456704 	};
457705 };
458706 
459707 &rkisp {
460
-	status = "okay";
708
+	status = "disabled";
461709 };
462710 
463711 &rkisp_mmu {
464
-	status = "okay";
712
+	status = "disabled";
465713 };
466714 
467715 &rkisp_vir0 {
468
-	status = "okay";
716
+	status = "disabled";
469717 
470718 	port {
471719 		#address-cells = <1>;
....@@ -478,15 +726,7 @@
478726 	};
479727 };
480728 
481
-&route_dsi0 {
482
-	status = "okay";
483
-	connect = <&vp1_out_dsi0>;
484
-};
485729 
486
-&route_edp {
487
-	status = "okay";
488
-	connect = <&vp0_out_edp>;
489
-};
490730 
491731 &sata2 {
492732 	status = "okay";
....@@ -525,12 +765,12 @@
525765 };
526766 
527767 &vcc3v3_lcd0_n {
528
-	gpio = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>;
768
+	gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; 
529769 	enable-active-high;
530770 };
531771 
532772 &vcc3v3_lcd1_n {
533
-	gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
773
+	gpio = <&gpio3 RK_PA3 GPIO_ACTIVE_HIGH>; //MIPI_3V3EN_GPIO3_A3_d_3V3
534774 	enable-active-high;
535775 };
536776 
....@@ -546,20 +786,25 @@
546786 	clock-names = "ext_clock";
547787 	//wifi-bt-power-toggle;
548788 	uart_rts_gpios = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>;
549
-	BT,power_gpio = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
550789 	pinctrl-names = "default", "rts_gpio";
551790 	pinctrl-0 = <&uart1m0_rtsn>;
552791 	pinctrl-1 = <&uart1_gpios>;
553
-	BT,reset_gpio    = <&gpio3 RK_PA0 GPIO_ACTIVE_HIGH>;
554
-	BT,wake_gpio     = <&gpio3 RK_PA2 GPIO_ACTIVE_HIGH>;
555
-	BT,wake_host_irq = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>;
556
-	status = "disabled";
792
+	BT,reset_gpio    = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
793
+    BT,wake_gpio     = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>;
794
+    BT,wake_host_irq = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>;
795
+	status = "okay";
557796 };
558797 
559798 &uart0 {
560799 	status = "okay";
561800 };
562801 
802
+&uart1 {	
803
+	pinctrl-names = "default";	
804
+	pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn>;	
805
+	status = "okay";		
806
+};
807
+
563808 &uart3 {
564809 	status = "okay";
565810 	pinctrl-0 = <&uart3m1_xfer>;