add lvds1024*800

hc

2024-01-31 f70575805708cabdedea7498aaa3f710fde4d920

 kernel/arch/arm64/boot/dts/rockchip/NK-R36S0.dtsi
old mode 100644new mode 100755
..
..
@@ -8,12 +8,21 @@
8
8
 
9
9
 #include <dt-bindings/gpio/gpio.h>
10
10
 #include <dt-bindings/pinctrl/rockchip.h>
11
+#include <dt-bindings/display/media-bus-format.h>
11
12
 #include "rk3568.dtsi"
12
13
 #include "rk3568-evb.dtsi"
13
14
 
14
15
 / {
15
16
 	model = "Rockchip RK3568 EVB1 DDR4 V10 Board";
16
17
 	compatible = "rockchip,rk3568-evb1-ddr4-v10", "rockchip,rk3568";
18
+
19
+	rk_headset: rk-headset {
20
+		compatible = "rockchip_headset";
21
+		headset_gpio = <&gpio0 RK_PD5 GPIO_ACTIVE_LOW>;
22
+		spk_ctl_gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_LOW>;//AMP_SD_GPIO4_C2_3V3
23
+		pinctrl-names = "default";
24
+		pinctrl-0 = <&hp_det>;
25
+	};
17
26
 
18
27
 	vcc2v5_sys: vcc2v5-ddr {
19
28
 		compatible = "regulator-fixed";
..
..
@@ -25,15 +34,6 @@
25
34
 		vin-supply = <&vcc3v3_sys>;
26
35
 	};
27
36
 
28
-	vcc3v3_vga: vcc3v3-vga {
29
-		compatible = "regulator-fixed";
30
-		regulator-name = "vcc3v3_vga";
31
-		regulator-always-on;
32
-		regulator-boot-on;
33
-		gpio = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>;
34
-		enable-active-high;
35
-		vin-supply = <&vcc3v3_sys>;
36
-	};
37
37
 
38
38
 	pcie30_avdd0v9: pcie30-avdd0v9 {
39
39
 		compatible = "regulator-fixed";
..
..
@@ -60,7 +60,9 @@
60
60
 		regulator-name = "vcc3v3_pcie";
61
61
 		regulator-min-microvolt = <3300000>;
62
62
 		regulator-max-microvolt = <3300000>;
63
+		regulator-always-on;
63
64
 		enable-active-high;
65
+		regulator-boot-on;
64
66
 		gpio = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
65
67
 		startup-delay-us = <5000>;
66
68
 		vin-supply = <&dc_12v>;
..
..
@@ -85,9 +87,8 @@
85
87
 		enable-active-high;
86
88
 		regulator-always-on;
87
89
 		regulator-boot-on;
88
-	};
90
+    	};
89
91
 #endif
90
-
91
92
 	ndj_io_init {
92
93
          	compatible = "nk_io_control";	
93
94
 			pinctrl-names = "default";
..
..
@@ -136,7 +137,7 @@
136
137
 			};
137
138
 			
138
139
 			hp_en {
139
-				gpio_num = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>;//HP_EN_GPIO3_A6_3V3
140
+				gpio_num = <&gpio3 RK_PA6 GPIO_ACTIVE_LOW>;//HP_EN_GPIO3_A6_3V3
140
141
 				gpio_function = <0>;
141
142
 			};
142
143
 			
..
..
@@ -185,7 +186,69 @@
185
186
 				gpio_function = <1>;
186
187
 			};
187
188
 	#endif
188
-};
189
+		};
190
+#if 0			
191
+	    nk_io_init {
192
+                compatible = "nk_io_control";
193
+//				vcc3_io_en_gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; //VCC3_IO_EN_GPIO0_C4_3V3
194
+                hub_host2_5V_rest_gpio = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>; //HUB_RST_GPIO4_D2_3V3
195
+                hub_host3_5v_gpio = <&gpio4 RK_PB2 GPIO_ACTIVE_HIGH>; //HOST3_EN_GPIO4_B2_1V8
196
+                vcc_5v_io = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>;   //VCC5_IO_EN_GPIO1_A4_3V3
197
+                vcc_12v_io = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; //VCC12_IO_EN_GPIO0_C7_3V3
198
+                en_4g_gpio = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; //4G_PWREN_H_GPIO0_C6
199
+                reset_4g_gpio = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>; //4G_RST_GPIO01_B2_3V3
200
+                air_mode_4g_gpio = <&gpio1 RK_PB0 GPIO_ACTIVE_HIGH>; //4G_AIR_MODE_GPIO01_B0_3V3
201
+                wake_4g_gpio = <&gpio1 RK_PB1 GPIO_ACTIVE_HIGH>; //4G_WAKEUP_GPIO01_B1_3V3
202
+				hp_en_gpio = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>;//HP_EN_GPIO3_A6_3V3
203
+//              spk_out_gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_HIGH>;//AMP_SD_GPIO4_C2_3V3			
204
+				wifi_power_en_gpio = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>; //WIFI_PWREN_GPIO3_C6_1V8
205
+//				pcie_power_en_gpio = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;//PCIE_PWREN_H_GPIO0_D4				
206
+				pinctrl-names = "default";
207
+				pinctrl-0 = <&nk_io_gpio>;				
208
+        };
209
+#endif	
210
+		panel: panel {
211
+				compatible = "simple-panel";
212
+				backlight = <&backlight>;
213
+				power-supply = <&vcc3v3_lcd0_n>;
214
+				enable-gpios = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>; //LCD0_VDD_H_GPIO2_D4
215
+				reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_LOW>; //7511_RST_GPIO3_D1
216
+				edp-bl-gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;  //LCD0_BKLT_EN_3V3
217
+				edp-bl-en = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>; //LCD0_BKLT_EN_3V3
218
+				bus-format = <MEDIA_BUS_FMT_RGB888_1X24>;
219
+				bpc = <8>;
220
+				prepare-delay-ms = <200>;
221
+				enable-delay-ms = <20>;
222
+				lvds-gpio0 = <&gpio3 RK_PD2 GPIO_ACTIVE_HIGH>; //7511_GPIO0-GPIO3_D2 
223
+				lvds-gpio1 = <&gpio3 RK_PD3 GPIO_ACTIVE_HIGH>; //7511_GPIO1-GPIO3_D3 
224
+				lvds-gpio2 = <&gpio3 RK_PD4 GPIO_ACTIVE_HIGH>; //7511_GPIO2-GPIO3_D4 
225
+				lvds-gpio3 = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>; //7511_GPIO3-GPIO3_D5
226
+				nodka-lvds = <15>;
227
+
228
+				display-timings {
229
+                native-mode = <&timing>;
230
+                timing: timing {
231
+					clock-frequency = <72500000>;
232
+					hactive = <1280>;
233
+					vactive = <800>;
234
+					hfront-porch = <70>;
235
+					hsync-len = <2>;
236
+					hback-porch = <88>;
237
+					vfront-porch = <7>;
238
+					vsync-len = <4>;
239
+					vback-porch = <17>;
240
+					hsync-active = <21>;
241
+					vsync-active = <0>;
242
+					de-active = <0>;
243
+					pixelclk-active = <0>;			
244
+					};
245
+				};
246
+				ports {
247
+					panel_in_lvds: endpoint {
248
+					remote-endpoint = <&lvds_out>;
249
+						};
250
+					};   
251
+				};
189
252
 };
190
253
 
191
254
 &combphy0_us {
..
..
@@ -248,6 +311,10 @@
248
311
  * video_phy0 needs to be enabled
249
312
  * when dsi0 is enabled
250
313
  */
314
+&video_phy0 {
315
+	status = "okay";
316
+};
317
+
251
318
 &dsi0 {
252
319
 	status = "disabled";
253
320
 };
..
..
@@ -268,6 +335,10 @@
268
335
  * video_phy1 needs to be enabled
269
336
  * when dsi1 is enabled
270
337
  */
338
+ 
339
+&video_phy1 {
340
+	status = "disabled";
341
+}; 
271
342
 &dsi1 {
272
343
 	status = "disabled";
273
344
 };
..
..
@@ -281,31 +352,117 @@
281
352
 };
282
353
 
283
354
 &dsi1_panel {
284
-	power-supply = <&vcc3v3_lcd1_n>;
355
+//	power-supply = <&vcc3v3_lcd1_n>;   //MIPI_3V3EN_GPIO3_A3_d_3V3
356
+    vddio-mipi = <&gpio3 RK_PA4 GPIO_ACTIVE_HIGH>; //MIPI_EN_1V8_GPIO3_A4_d_3V3
357
+    reset-gpios = <&gpio3 RK_PC7 GPIO_ACTIVE_LOW>; //MIPI_RST_L_GPIO3_C7
358
+    vcc-5v-gpio = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; //VCC5_IO_EN_GPIO1_A4_3V3
359
+    pinctrl-names = "default";
360
+    pinctrl-0 = <&lcd1_rst_gpio>;
285
361
 };
286
362
 
363
+&route_dsi1 {
364
+	status = "disabled";
365
+	connect = <&vp1_out_dsi1>;
366
+};
367
+
368
+
369
+/*
370
+*  edp_start
371
+*/
372
+
287
373
 &edp {
288
-	hpd-gpios = <&gpio0 RK_PC2 GPIO_ACTIVE_HIGH>;
289
-	status = "okay";
374
+    force-hpd;
375
+	status = "disabled";
290
376
 };
291
377
 
292
378
 &edp_phy {
293
-	status = "okay";
379
+	status = "disabled";
294
380
 };
295
381
 
296
382
 &edp_in_vp0 {
297
-	status = "okay";
383
+    status = "disabled";
298
384
 };
299
385
 
300
386
 &edp_in_vp1 {
387
+    status = "disabled";
388
+
389
+};
390
+
391
+&route_edp {
392
+    status = "disabled";
393
+    connect = <&vp1_out_edp>;
394
+};
395
+
396
+&route_edp {
301
397
 	status = "disabled";
302
398
 };
399
+
400
+&lvds {
401
+	status = "okay";
402
+	ports {
403
+		port@1 {
404
+			reg = <1>;
405
+			lvds_out:endpoint {
406
+				remote-endpoint = <&panel_in_lvds>;
407
+			};
408
+		};
409
+	};
410
+};
411
+
412
+&route_lvds{
413
+	status = "okay";
414
+	connect = <&vp1_out_lvds>;
415
+};
416
+
417
+&lvds_in_vp1 {
418
+	status = "okay";
419
+};
420
+
421
+/*
422
+*  edp_end
423
+*/
424
+
425
+/*
426
+*  Hdmi_start
427
+*/
428
+
429
+&hdmi {
430
+	status = "okay";
431
+	rockchip,phy-table =
432
+		<92812500  0x8009 0x0000 0x0270>,
433
+		<165000000 0x800b 0x0000 0x026d>,
434
+		<185625000 0x800b 0x0000 0x01ed>,
435
+		<297000000 0x800b 0x0000 0x01ad>,
436
+		<594000000 0x8029 0x0000 0x0088>,
437
+		<000000000 0x0000 0x0000 0x0000>;
438
+};
439
+
440
+&route_hdmi {
441
+	status = "okay";
442
+	connect = <&vp0_out_hdmi>;
443
+};
444
+
445
+&hdmi_in_vp0 {
446
+	status = "okay";
447
+};
448
+
449
+&hdmi_in_vp1 {
450
+	status = "disabled";
451
+};
452
+
453
+&hdmi_sound {
454
+	status = "okay";
455
+};
456
+
457
+/*
458
+ *  Hdmi_END
459
+*/
303
460
 
304
461
 &gmac0 {
305
462
 	phy-mode = "rgmii";
306
463
 	clock_in_out = "output";
307
464
 
308
-	snps,reset-gpio = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>;
465
+	snps,reset-gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_LOW>;
309
466
 	snps,reset-active-low;
310
467
 	/* Reset time is 20ms, 100ms for rtl8211f */
311
468
 	snps,reset-delays-us = <0 20000 100000>;
..
..
@@ -325,7 +482,9 @@
325
482
 	rx_delay = <0x2f>;
326
483
 
327
484
 	phy-handle = <&rgmii_phy0>;
485
+	
328
486
 	status = "disabled";
487
+	
329
488
 };
330
489
 
331
490
 &gmac1 {
..
..
@@ -359,8 +518,22 @@
359
518
  * power-supply should switche to vcc3v3_lcd1_n
360
519
  * when mipi panel is connected to dsi1.
361
520
  */
362
-&gt1x {
363
-	power-supply = <&vcc3v3_lcd0_n>;
521
+
522
+
523
+&i2c3 {
524
+	status = "okay";
525
+       //mac eeprom
526
+        eeprom@51 {
527
+                //compatible = "atmel,24c02";
528
+                compatible = "atmel,24c256";
529
+                reg = <0x51>;
530
+        };
531
+	
532
+	  //nk-mcu
533
+        nkmcu@15 {
534
+                compatible = "nk_mcu";
535
+                reg = <0x15>;
536
+        };
364
537
 };
365
538
 
366
539
 &i2c4 {
..
..
@@ -376,7 +549,6 @@
376
549
 		reset-gpios = <&gpio3 RK_PB6 GPIO_ACTIVE_LOW>;
377
550
 		pwdn-gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_LOW>;
378
551
 		rockchip,grf = <&grf>;
379
-		power-domains = <&power RK3568_PD_VI>;
380
552
 		rockchip,camera-module-index = <0>;
381
553
 		rockchip,camera-module-facing = "back";
382
554
 		rockchip,camera-module-name = "RK-CMK-8M-2-v1";
..
..
@@ -433,6 +605,19 @@
433
605
 	};
434
606
 };
435
607
 
608
+&i2c5 {
609
+	status = "okay";
610
+
611
+	hym8563: hym8563@51 {
612
+		compatible = "haoyu,hym8563";
613
+		reg = <0x51>;
614
+		#clock-cells = <0>;
615
+		clock-frequency = <32768>;
616
+		clock-output-names = "xin32k";
617
+		/* rtc_int is not connected */
618
+	};
619
+};
620
+
436
621
 &mdio0 {
437
622
 	rgmii_phy0: phy@0 {
438
623
 		compatible = "ethernet-phy-ieee802.3-c22";
..
..
@@ -447,50 +632,51 @@
447
632
 	};
448
633
 };
449
634
 
450
-&video_phy0 {
451
-	status = "disabled";
452
-};
453
635
 
454
-&video_phy1 {
455
-	status = "disabled";
456
-};
457
636
 
458
637
 &pcie30phy {
459
638
 	status = "okay";
460
639
 };
461
640
 
462
-&pcie3x2 {
463
-	reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
641
+&pcie2x1 {
642
+	reset-gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>;
464
643
 	vpcie3v3-supply = <&vcc3v3_pcie>;
465
644
 	status = "okay";
466
645
 };
467
646
 
468
647
 &pinctrl {
469
-	cam {
470
-		camera_pwr: camera-pwr {
471
-			rockchip,pins =
472
-				/* camera power en */
473
-				<0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
474
-		};
475
-	};
648
+//	cam {
649
+//		camera_pwr: camera-pwr {
650
+//			rockchip,pins =
651
+//				/* camera power en */
652
+//				<0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
653
+//		};
654
+//	};
476
655
 	headphone {
477
656
 		hp_det: hp-det {
478
-			rockchip,pins = <3 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
657
+			rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_down>,
658
+							<4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
479
659
 		};
480
660
 	};
481
661
 
482
662
 	wireless-wlan {
483
663
 		wifi_host_wake_irq: wifi-host-wake-irq {
484
-			rockchip,pins = <3 RK_PD4 RK_FUNC_GPIO &pcfg_pull_down>;
664
+			rockchip,pins = <2 RK_PB2 RK_FUNC_GPIO &pcfg_pull_down>;
485
665
 		};
486
666
 	};
487
667
 
488
668
 	wireless-bluetooth {
489
-		uart8_gpios: uart8-gpios {
490
-			rockchip,pins = <2 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
669
+		uart1_gpios: uart1-gpios {
670
+			rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
491
671
 		};
492
672
 	};
493
673
 	
674
+	lcd1 {
675
+        lcd1_rst_gpio: lcd1-rst-gpio {
676
+            rockchip,pins = <3 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
677
+        };
678
+    };
679
+		
494
680
 	nk_io_init{
495
681
 		nk_io_gpio: nk-io-gpio{
496
682
 			rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>,
..
..
@@ -500,7 +686,7 @@
500
686
 							<4 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>,
501
687
 							<1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>,
502
688
 							<0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>,
503
-							<1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>, 
689
+							<1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>,
504
690
 							<1 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>,
505
691
 							<1 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>,
506
692
 							<3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>,
..
..
@@ -518,10 +704,6 @@
518
704
 	};
519
705
 };
520
706
 
521
-&rk809_sound {
522
-	hp-det-gpio = <&gpio3 RK_PC2 GPIO_ACTIVE_LOW>;
523
-};
524
-
525
707
 &rkisp {
526
708
 	status = "disabled";
527
709
 };
..
..
@@ -531,7 +713,7 @@
531
713
 };
532
714
 
533
715
 &rkisp_vir0 {
534
-	status = "okay";
716
+	status = "disabled";
535
717
 
536
718
 	port {
537
719
 		#address-cells = <1>;
..
..
@@ -544,34 +726,30 @@
544
726
 	};
545
727
 };
546
728
 
547
-&route_dsi0 {
548
-	status = "disabled";
549
-	connect = <&vp1_out_dsi0>;
550
-};
551
729
 
552
-&route_edp {
553
-	status = "okay";
554
-	connect = <&vp0_out_edp>;
555
-};
556
730
 
557
731
 &sata2 {
558
732
 	status = "okay";
559
733
 };
560
734
 
561
735
 &sdmmc2 {
562
-	max-frequency = <150000000>;
563
-	supports-sdio;
564
-	bus-width = <4>;
565
-	disable-wp;
566
-	cap-sd-highspeed;
567
-	cap-sdio-irq;
568
-	keep-power-in-suspend;
569
-	mmc-pwrseq = <&sdio_pwrseq>;
570
-	non-removable;
571
-	pinctrl-names = "default";
572
-	pinctrl-0 = <&sdmmc2m0_bus4 &sdmmc2m0_cmd &sdmmc2m0_clk>;
573
-	sd-uhs-sdr104;
574
-	status = "okay";
736
+        status = "disabled";
737
+};
738
+
739
+&sdmmc1 {
740
+        max-frequency = <150000000>;
741
+        supports-sdio;
742
+        bus-width = <4>;
743
+        disable-wp;
744
+        cap-sd-highspeed;
745
+        cap-sdio-irq;
746
+        keep-power-in-suspend;
747
+        mmc-pwrseq = <&sdio_pwrseq>;
748
+        non-removable;
749
+        pinctrl-names = "default";
750
+        pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>;
751
+        sd-uhs-sdr104;
752
+        status = "okay";
575
753
 };
576
754
 
577
755
 &spdif_8ch {
..
..
@@ -581,25 +759,25 @@
581
759
 };
582
760
 
583
761
 &uart8 {
584
-	status = "okay";
762
+	status = "disabled";
585
763
 	pinctrl-names = "default";
586
764
 	pinctrl-0 = <&uart8m0_xfer &uart8m0_ctsn>;
587
765
 };
588
766
 
589
767
 &vcc3v3_lcd0_n {
590
-	gpio = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
768
+	gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; 
591
769
 	enable-active-high;
592
770
 };
593
771
 
594
772
 &vcc3v3_lcd1_n {
595
-	gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
773
+	gpio = <&gpio3 RK_PA3 GPIO_ACTIVE_HIGH>; //MIPI_3V3EN_GPIO3_A3_d_3V3
596
774
 	enable-active-high;
597
775
 };
598
776
 
599
777
 &wireless_wlan {
600
778
 	pinctrl-names = "default";
601
779
 	pinctrl-0 = <&wifi_host_wake_irq>;
602
-	WIFI,host_wake_irq = <&gpio3 RK_PD4 GPIO_ACTIVE_HIGH>;
780
+	WIFI,host_wake_irq = <&gpio2 RK_PB2 GPIO_ACTIVE_HIGH>;
603
781
 };
604
782
 
605
783
 &wireless_bluetooth {
..
..
@@ -607,12 +785,47 @@
607
785
 	clocks = <&rk809 1>;
608
786
 	clock-names = "ext_clock";
609
787
 	//wifi-bt-power-toggle;
610
-	uart_rts_gpios = <&gpio2 RK_PB1 GPIO_ACTIVE_LOW>;
788
+	uart_rts_gpios = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>;
611
789
 	pinctrl-names = "default", "rts_gpio";
612
-	pinctrl-0 = <&uart8m0_rtsn>;
613
-	pinctrl-1 = <&uart8_gpios>;
614
-	BT,reset_gpio    = <&gpio3 RK_PA0 GPIO_ACTIVE_HIGH>;
615
-	BT,wake_gpio     = <&gpio3 RK_PA2 GPIO_ACTIVE_HIGH>;
616
-	BT,wake_host_irq = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>;
790
+	pinctrl-0 = <&uart1m0_rtsn>;
791
+	pinctrl-1 = <&uart1_gpios>;
792
+	BT,reset_gpio    = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
793
+    BT,wake_gpio     = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>;
794
+    BT,wake_host_irq = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>;
617
795
 	status = "okay";
618
796
 };
797
+
798
+&uart0 {
799
+	status = "okay";
800
+};
801
+
802
+&uart1 {	
803
+	pinctrl-names = "default";	
804
+	pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn>;	
805
+	status = "okay";		
806
+};
807
+
808
+&uart3 {
809
+	status = "okay";
810
+	pinctrl-0 = <&uart3m1_xfer>;
811
+};
812
+
813
+&uart4 {
814
+	status = "okay";
815
+	pinctrl-0 = <&uart4m1_xfer>;
816
+};
817
+
818
+&uart5 {
819
+	status = "okay";
820
+	pinctrl-0 = <&uart5m1_xfer>;
821
+};
822
+
823
+&uart7 {
824
+	status = "okay";
825
+	pinctrl-0 = <&uart7m1_xfer>;
826
+};
827
+
828
+&uart9 {
829
+	status = "okay";
830
+	pinctrl-0 = <&uart9m1_xfer>;
831
+};