~hc/RK356X_SDK_RELEASE.git

..	..	@@ -8,6 +8,7 @@
8	8
9	9	#include <dt-bindings/gpio/gpio.h>
10	10	#include <dt-bindings/pinctrl/rockchip.h>
	11	+#include <dt-bindings/display/media-bus-format.h>
11	12	#include "rk3568.dtsi"
12	13	#include "rk3568-evb.dtsi"
13	14
..	..	@@ -17,7 +18,8 @@
17	18
18	19	rk_headset: rk-headset {
19	20	compatible = "rockchip_headset";
20		- headset_gpio = <&gpio3 RK_PC2 GPIO_ACTIVE_LOW>;
	21	+ headset_gpio = <&gpio0 RK_PD5 GPIO_ACTIVE_LOW>;
	22	+ spk_ctl_gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_LOW>;//AMP_SD_GPIO4_C2_3V3
21	23	pinctrl-names = "default";
22	24	pinctrl-0 = <&hp_det>;
23	25	};
..	..	@@ -32,15 +34,6 @@
32	34	vin-supply = <&vcc3v3_sys>;
33	35	};
34	36
35		- vcc3v3_vga: vcc3v3-vga {
36		- compatible = "regulator-fixed";
37		- regulator-name = "vcc3v3_vga";
38		- regulator-always-on;
39		- regulator-boot-on;
40		- gpio = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>;
41		- enable-active-high;
42		- vin-supply = <&vcc3v3_sys>;
43		- };
44	37
45	38	pcie30_avdd0v9: pcie30-avdd0v9 {
46	39	compatible = "regulator-fixed";
..	..	@@ -67,7 +60,9 @@
67	60	regulator-name = "vcc3v3_pcie";
68	61	regulator-min-microvolt = <3300000>;
69	62	regulator-max-microvolt = <3300000>;
	63	+ regulator-always-on;
70	64	enable-active-high;
	65	+ regulator-boot-on;
71	66	gpio = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
72	67	startup-delay-us = <5000>;
73	68	vin-supply = <&dc_12v>;
..	..	@@ -82,7 +77,7 @@
82	77	regulator-max-microvolt = <3300000>;
83	78	vin-supply = <&vcc5v0_sys>;
84	79	};
85		-
	80	+#if 0
86	81	vcc_camera: vcc-camera-regulator {
87	82	compatible = "regulator-fixed";
88	83	gpio = <&gpio0 RK_PC1 GPIO_ACTIVE_HIGH>;
..	..	@@ -92,43 +87,168 @@
92	87	enable-active-high;
93	88	regulator-always-on;
94	89	regulator-boot-on;
95		-
96	90	};
97		-
	91	+#endif
	92	+ ndj_io_init {
	93	+ compatible = "nk_io_control";
	94	+ pinctrl-names = "default";
	95	+ pinctrl-0 = <&nk_io_gpio>;
	96	+
	97	+ //gpio_op0 = <&gpio1 RK_PD0 GPIO_ACTIVE_HIGH>;
	98	+
	99	+ vcc_5v {
	100	+ gpio_num = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; //VCC5_IO_EN_GPIO1_A4_3V3
	101	+ gpio_function = <0>;
	102	+ };
	103	+
	104	+ vcc_12v {
	105	+ gpio_num = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; //VCC12_IO_EN_GPIO0_C7_3V3
	106	+ gpio_function = <0>;
	107	+ };
	108	+
	109	+ hub_host2_rst {
	110	+ gpio_num = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>; //HUB_RST_GPIO4_D2_3V3
	111	+ gpio_function = <3>;
	112	+ };
	113	+
	114	+ hub_host3 {
	115	+ gpio_num = <&gpio4 RK_PB2 GPIO_ACTIVE_HIGH>; //HOST3_EN_GPIO4_B2_1V8
	116	+ gpio_function = <0>;
	117	+ };
	118	+
	119	+ wake_4g {
	120	+ gpio_num = <&gpio1 RK_PB1 GPIO_ACTIVE_LOW>; //4G_WAKEUP_GPIO01_B1_3V3
	121	+ gpio_function = <0>;
	122	+ };
	123	+
	124	+ air_mode_4g {
	125	+ gpio_num = <&gpio1 RK_PB0 GPIO_ACTIVE_LOW>; //4G_AIR_MODE_GPIO01_B0_3V3
	126	+ gpio_function = <0>;
	127	+ };
	128	+
	129	+ reset_4g {
	130	+ gpio_num = <&gpio1 RK_PB2 GPIO_ACTIVE_LOW>; //4G_RST_GPIO01_B2_3V3
	131	+ gpio_function = <3>;
	132	+ };
	133	+
	134	+ en_4g {
	135	+ gpio_num = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; //4G_PWREN_H_GPIO0_C6
	136	+ gpio_function = <0>;
	137	+ };
	138	+
	139	+ hp_en {
	140	+ gpio_num = <&gpio3 RK_PA6 GPIO_ACTIVE_LOW>;//HP_EN_GPIO3_A6_3V3
	141	+ gpio_function = <0>;
	142	+ };
	143	+
	144	+ wifi_power_en {
	145	+ gpio_num = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>; //WIFI_PWREN_GPIO3_C6_1V8
	146	+ gpio_function = <0>;
	147	+ };
	148	+ #if 0
	149	+ do1 {
	150	+ gpio_num = <&gpio1 RK_PD0 GPIO_ACTIVE_LOW>;
	151	+ gpio_function = <0>;
	152	+ };
	153	+
	154	+ do2 {
	155	+ gpio_num = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>;
	156	+ gpio_function = <0>;
	157	+ };
	158	+
	159	+ do3 {
	160	+ gpio_num = <&gpio1 RK_PD1 GPIO_ACTIVE_HIGH>;
	161	+ gpio_function = <0>;
	162	+ };
	163	+
	164	+ do4 {
	165	+ gpio_num = <&gpio1 RK_PD3 GPIO_ACTIVE_HIGH>;
	166	+ gpio_function = <0>;
	167	+ };
	168	+
	169	+ do5 {
	170	+ gpio_num = <&gpio2 RK_PD6 GPIO_ACTIVE_LOW>;
	171	+ gpio_function = <0>;
	172	+ };
	173	+
	174	+ do6 {
	175	+ gpio_num = <&gpio2 RK_PD7 GPIO_ACTIVE_LOW>;
	176	+ gpio_function = <0>;
	177	+ };
	178	+
	179	+ do7 {
	180	+ gpio_num = <&gpio3 RK_PA0 GPIO_ACTIVE_LOW>;
	181	+ gpio_function = <0>;
	182	+ };
	183	+
	184	+ di1 {
	185	+ gpio_num = <&gpio2 RK_PD5 GPIO_ACTIVE_HIGH>;
	186	+ gpio_function = <1>;
	187	+ };
	188	+ #endif
	189	+ };
	190	+#if 0
98	191	nk_io_init {
99	192	compatible = "nk_io_control";
100		- hub_host2_5v_gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>; //USB_HOST_PWREN_H_GPIO0_A6
101		- usb_en_oc_gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>; //USB_EN_OC_GPIO0_A5
102		- lcd_bk_en_gpio = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>; //LCD0_BKLT_EN_3V3
103		- lcd_pwblk_gpio = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>; //LCD0_BKLT_EN_3V3
104		- vcc3_io_en_gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; //VCC3_IO_EN_GPIO0_C4_3V3
	193	+// vcc3_io_en_gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; //VCC3_IO_EN_GPIO0_C4_3V3
105	194	hub_host2_5V_rest_gpio = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>; //HUB_RST_GPIO4_D2_3V3
106	195	hub_host3_5v_gpio = <&gpio4 RK_PB2 GPIO_ACTIVE_HIGH>; //HOST3_EN_GPIO4_B2_1V8
107		-// hub_host3_5V_rest_gpio = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>;
108	196	vcc_5v_io = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; //VCC5_IO_EN_GPIO1_A4_3V3
109	197	vcc_12v_io = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; //VCC12_IO_EN_GPIO0_C7_3V3
110	198	en_4g_gpio = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; //4G_PWREN_H_GPIO0_C6
111	199	reset_4g_gpio = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>; //4G_RST_GPIO01_B2_3V3
112	200	air_mode_4g_gpio = <&gpio1 RK_PB0 GPIO_ACTIVE_HIGH>; //4G_AIR_MODE_GPIO01_B0_3V3
113	201	wake_4g_gpio = <&gpio1 RK_PB1 GPIO_ACTIVE_HIGH>; //4G_WAKEUP_GPIO01_B1_3V3
114		-
115		- edp_enable_gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>;
116		- edp_gpio0 = <&gpio3 RK_PD2 GPIO_ACTIVE_LOW>; //7511_GPIO0-GPIO3_D2
117		- edp_gpio1 = <&gpio3 RK_PD3 GPIO_ACTIVE_LOW>; //7511_GPIO1-GPIO3_D3
118		- edp_gpio2 = <&gpio3 RK_PD4 GPIO_ACTIVE_LOW>; //7511_GPIO2-GPIO3_D4
119		- edp_gpio3 = <&gpio3 RK_PD5 GPIO_ACTIVE_LOW>; //7511_GPIO3-GPIO3_D5
120		- edp_reset = <&gpio3 RK_PD1 GPIO_ACTIVE_LOW>; //7511_RST_GPIO3_D1
121		-// tp_reset = <&gpio3 RK_PA7 GPIO_ACTIVE_HIGH>;
122		-// vddio_mipi = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>;
123		-
124		- wifi_power_en_gpio = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>; //WIFI_PWREN_GPIO3_C6_1V8
125		-
126		- // pinctrl-names = "default";
127		-// pinctrl-0 = <&nk_io_gpio>;
128		- nodka_lvds = <9>;
	202	+ hp_en_gpio = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>;//HP_EN_GPIO3_A6_3V3
	203	+// spk_out_gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_HIGH>;//AMP_SD_GPIO4_C2_3V3
	204	+ wifi_power_en_gpio = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>; //WIFI_PWREN_GPIO3_C6_1V8
	205	+// pcie_power_en_gpio = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;//PCIE_PWREN_H_GPIO0_D4
	206	+ pinctrl-names = "default";
	207	+ pinctrl-0 = <&nk_io_gpio>;
129	208	};
	209	+#endif
	210	+ panel: panel {
	211	+ compatible = "simple-panel";
	212	+ backlight = <&backlight>;
	213	+ power-supply = <&vcc3v3_lcd0_n>;
	214	+ enable-gpios = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>; //LCD0_VDD_H_GPIO2_D4
	215	+ reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_LOW>; //7511_RST_GPIO3_D1
	216	+ edp-bl-gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>; //LCD0_BKLT_EN_3V3
	217	+ edp-bl-en = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>; //LCD0_BKLT_EN_3V3
	218	+ bus-format = <MEDIA_BUS_FMT_RGB888_1X24>;
	219	+ bpc = <8>;
	220	+ prepare-delay-ms = <200>;
	221	+ enable-delay-ms = <20>;
	222	+ lvds-gpio0 = <&gpio3 RK_PD2 GPIO_ACTIVE_HIGH>; //7511_GPIO0-GPIO3_D2
	223	+ lvds-gpio1 = <&gpio3 RK_PD3 GPIO_ACTIVE_HIGH>; //7511_GPIO1-GPIO3_D3
	224	+ lvds-gpio2 = <&gpio3 RK_PD4 GPIO_ACTIVE_HIGH>; //7511_GPIO2-GPIO3_D4
	225	+ lvds-gpio3 = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>; //7511_GPIO3-GPIO3_D5
	226	+ nodka-lvds = <15>;
130	227
131		-
	228	+ display-timings {
	229	+ native-mode = <&timing>;
	230	+ timing: timing {
	231	+ clock-frequency = <72500000>;
	232	+ hactive = <1280>;
	233	+ vactive = <800>;
	234	+ hfront-porch = <70>;
	235	+ hsync-len = <2>;
	236	+ hback-porch = <88>;
	237	+ vfront-porch = <7>;
	238	+ vsync-len = <4>;
	239	+ vback-porch = <17>;
	240	+ hsync-active = <21>;
	241	+ vsync-active = <0>;
	242	+ de-active = <0>;
	243	+ pixelclk-active = <0>;
	244	+ };
	245	+ };
	246	+ ports {
	247	+ panel_in_lvds: endpoint {
	248	+ remote-endpoint = <&lvds_out>;
	249	+ };
	250	+ };
	251	+ };
132	252	};
133	253
134	254	&combphy0_us {
..	..	@@ -144,11 +264,11 @@
144	264	};
145	265
146	266	&csi2_dphy_hw {
147		- status = "okay";
	267	+ status = "disabled";
148	268	};
149	269
150	270	&csi2_dphy0 {
151		- status = "okay";
	271	+ status = "disabled";
152	272
153	273	ports {
154	274	#address-cells = <1>;
..	..	@@ -191,8 +311,12 @@
191	311	* video_phy0 needs to be enabled
192	312	* when dsi0 is enabled
193	313	*/
194		-&dsi0 {
	314	+&video_phy0 {
195	315	status = "okay";
	316	+};
	317	+
	318	+&dsi0 {
	319	+ status = "disabled";
196	320	};
197	321
198	322	&dsi0_in_vp0 {
..	..	@@ -200,7 +324,7 @@
200	324	};
201	325
202	326	&dsi0_in_vp1 {
203		- status = "okay";
	327	+ status = "disabled";
204	328	};
205	329
206	330	&dsi0_panel {
..	..	@@ -211,6 +335,10 @@
211	335	* video_phy1 needs to be enabled
212	336	* when dsi1 is enabled
213	337	*/
	338	+
	339	+&video_phy1 {
	340	+ status = "disabled";
	341	+};
214	342	&dsi1 {
215	343	status = "disabled";
216	344	};
..	..	@@ -224,31 +352,117 @@
224	352	};
225	353
226	354	&dsi1_panel {
227		- power-supply = <&vcc3v3_lcd1_n>;
	355	+// power-supply = <&vcc3v3_lcd1_n>; //MIPI_3V3EN_GPIO3_A3_d_3V3
	356	+ vddio-mipi = <&gpio3 RK_PA4 GPIO_ACTIVE_HIGH>; //MIPI_EN_1V8_GPIO3_A4_d_3V3
	357	+ reset-gpios = <&gpio3 RK_PC7 GPIO_ACTIVE_LOW>; //MIPI_RST_L_GPIO3_C7
	358	+ vcc-5v-gpio = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; //VCC5_IO_EN_GPIO1_A4_3V3
	359	+ pinctrl-names = "default";
	360	+ pinctrl-0 = <&lcd1_rst_gpio>;
228	361	};
229	362
	363	+&route_dsi1 {
	364	+ status = "disabled";
	365	+ connect = <&vp1_out_dsi1>;
	366	+};
	367	+
	368	+
	369	+/*
	370	+* edp_start
	371	+*/
	372	+
230	373	&edp {
231		- hpd-gpios = <&gpio0 RK_PC2 GPIO_ACTIVE_HIGH>;
232		- status = "okay";
	374	+ force-hpd;
	375	+ status = "disabled";
233	376	};
234	377
235	378	&edp_phy {
236		- status = "okay";
	379	+ status = "disabled";
237	380	};
238	381
239	382	&edp_in_vp0 {
240		- status = "okay";
	383	+ status = "disabled";
241	384	};
242	385
243	386	&edp_in_vp1 {
	387	+ status = "disabled";
	388	+
	389	+};
	390	+
	391	+&route_edp {
	392	+ status = "disabled";
	393	+ connect = <&vp1_out_edp>;
	394	+};
	395	+
	396	+&route_edp {
244	397	status = "disabled";
245	398	};
	399	+
	400	+&lvds {
	401	+ status = "okay";
	402	+ ports {
	403	+ port@1 {
	404	+ reg = <1>;
	405	+ lvds_out:endpoint {
	406	+ remote-endpoint = <&panel_in_lvds>;
	407	+ };
	408	+ };
	409	+ };
	410	+};
	411	+
	412	+&route_lvds{
	413	+ status = "okay";
	414	+ connect = <&vp1_out_lvds>;
	415	+};
	416	+
	417	+&lvds_in_vp1 {
	418	+ status = "okay";
	419	+};
	420	+
	421	+/*
	422	+* edp_end
	423	+*/
	424	+
	425	+/*
	426	+* Hdmi_start
	427	+*/
	428	+
	429	+&hdmi {
	430	+ status = "okay";
	431	+ rockchip,phy-table =
	432	+ <92812500 0x8009 0x0000 0x0270>,
	433	+ <165000000 0x800b 0x0000 0x026d>,
	434	+ <185625000 0x800b 0x0000 0x01ed>,
	435	+ <297000000 0x800b 0x0000 0x01ad>,
	436	+ <594000000 0x8029 0x0000 0x0088>,
	437	+ <000000000 0x0000 0x0000 0x0000>;
	438	+};
	439	+
	440	+&route_hdmi {
	441	+ status = "okay";
	442	+ connect = <&vp0_out_hdmi>;
	443	+};
	444	+
	445	+&hdmi_in_vp0 {
	446	+ status = "okay";
	447	+};
	448	+
	449	+&hdmi_in_vp1 {
	450	+ status = "disabled";
	451	+};
	452	+
	453	+&hdmi_sound {
	454	+ status = "okay";
	455	+};
	456	+
	457	+/*
	458	+ * Hdmi_END
	459	+*/
246	460
247	461	&gmac0 {
248	462	phy-mode = "rgmii";
249	463	clock_in_out = "output";
250	464
251		- snps,reset-gpio = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>;
	465	+ snps,reset-gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_LOW>;
252	466	snps,reset-active-low;
253	467	/* Reset time is 20ms, 100ms for rtl8211f */
254	468	snps,reset-delays-us = <0 20000 100000>;
..	..	@@ -268,7 +482,9 @@
268	482	rx_delay = <0x2f>;
269	483
270	484	phy-handle = <&rgmii_phy0>;
	485	+
271	486	status = "disabled";
	487	+
272	488	};
273	489
274	490	&gmac1 {
..	..	@@ -302,9 +518,7 @@
302	518	* power-supply should switche to vcc3v3_lcd1_n
303	519	* when mipi panel is connected to dsi1.
304	520	*/
305		-&gt1x {
306		- power-supply = <&vcc3v3_lcd0_n>;
307		-};
	521	+
308	522
309	523	&i2c3 {
310	524	status = "okay";
..	..	@@ -320,13 +534,10 @@
320	534	compatible = "nk_mcu";
321	535	reg = <0x15>;
322	536	};
323		-
324		-
325		-
326	537	};
327	538
328	539	&i2c4 {
329		- status = "okay";
	540	+ status = "disabled";
330	541	gc8034: gc8034@37 {
331	542	compatible = "galaxycore,gc8034";
332	543	status = "okay";
..	..	@@ -338,7 +549,6 @@
338	549	reset-gpios = <&gpio3 RK_PB6 GPIO_ACTIVE_LOW>;
339	550	pwdn-gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_LOW>;
340	551	rockchip,grf = <&grf>;
341		- power-domains = <&power RK3568_PD_VI>;
342	552	rockchip,camera-module-index = <0>;
343	553	rockchip,camera-module-facing = "back";
344	554	rockchip,camera-module-name = "RK-CMK-8M-2-v1";
..	..	@@ -372,7 +582,7 @@
372	582	};
373	583	};
374	584	ov5695: ov5695@36 {
375		- status = "okay";
	585	+ status = "disabled";
376	586	compatible = "ovti,ov5695";
377	587	reg = <0x36>;
378	588	clocks = <&cru CLK_CIF_OUT>;
..	..	@@ -395,6 +605,19 @@
395	605	};
396	606	};
397	607
	608	+&i2c5 {
	609	+ status = "okay";
	610	+
	611	+ hym8563: hym8563@51 {
	612	+ compatible = "haoyu,hym8563";
	613	+ reg = <0x51>;
	614	+ #clock-cells = <0>;
	615	+ clock-frequency = <32768>;
	616	+ clock-output-names = "xin32k";
	617	+ /* rtc_int is not connected */
	618	+ };
	619	+};
	620	+
398	621	&mdio0 {
399	622	rgmii_phy0: phy@0 {
400	623	compatible = "ethernet-phy-ieee802.3-c22";
..	..	@@ -409,73 +632,88 @@
409	632	};
410	633	};
411	634
412		-&video_phy0 {
413		- status = "okay";
414		-};
415	635
416		-&video_phy1 {
417		- status = "disabled";
418		-};
419	636
420	637	&pcie30phy {
421	638	status = "okay";
422	639	};
423	640
424		-&pcie3x2 {
425		- reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
	641	+&pcie2x1 {
	642	+ reset-gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>;
426	643	vpcie3v3-supply = <&vcc3v3_pcie>;
427	644	status = "okay";
428	645	};
429	646
430	647	&pinctrl {
431		- cam {
432		- camera_pwr: camera-pwr {
433		- rockchip,pins =
434		- /* camera power en */
435		- <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
436		- };
437		- };
	648	+// cam {
	649	+// camera_pwr: camera-pwr {
	650	+// rockchip,pins =
	651	+// /* camera power en */
	652	+// <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
	653	+// };
	654	+// };
438	655	headphone {
439	656	hp_det: hp-det {
440		- rockchip,pins = <3 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
	657	+ rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_down>,
	658	+ <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
441	659	};
442	660	};
443	661
444	662	wireless-wlan {
445	663	wifi_host_wake_irq: wifi-host-wake-irq {
446		- rockchip,pins = <3 RK_PD4 RK_FUNC_GPIO &pcfg_pull_down>;
	664	+ rockchip,pins = <2 RK_PB2 RK_FUNC_GPIO &pcfg_pull_down>;
447	665	};
448	666	};
449	667
450	668	wireless-bluetooth {
451		- uart8_gpios: uart8-gpios {
452		- rockchip,pins = <2 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
	669	+ uart1_gpios: uart1-gpios {
	670	+ rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
453	671	};
454	672	};
455		-
456		- nk_io_gpio: nk_io_gpio_col{
457		- rockchip,pins =
458		- <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>,
459		- <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>,
460		- <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>,
461		- <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>,
462		- <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>,
463		- <0 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up>,
464		- <1 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>,
465		- <3 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>;
	673	+
	674	+ lcd1 {
	675	+ lcd1_rst_gpio: lcd1-rst-gpio {
	676	+ rockchip,pins = <3 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
	677	+ };
	678	+ };
	679	+
	680	+ nk_io_init{
	681	+ nk_io_gpio: nk-io-gpio{
	682	+ rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>,
	683	+ <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>,
	684	+ <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>,
	685	+ <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>,
	686	+ <4 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>,
	687	+ <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>,
	688	+ <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>,
	689	+ <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>,
	690	+ <1 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>,
	691	+ <1 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>,
	692	+ <3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>,
	693	+ <3 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>,
	694	+ <3 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>,
	695	+ <3 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>,
	696	+ <3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>,
	697	+ <3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>,
	698	+ <2 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>,//93 SPI2_CS0_M1_3V3
	699	+ <2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>,//94 SPI2_MOSI_M1_3V3
	700	+ <2 RK_PD7 RK_FUNC_GPIO &pcfg_pull_none>,//95 SPI2_MISO_M1_3V3
	701	+ <3 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>,//96 SPI2_CLK_M1_3V3
	702	+ <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
	703	+ };
466	704	};
467	705	};
468	706
469	707	&rkisp {
470		- status = "okay";
	708	+ status = "disabled";
471	709	};
472	710
473	711	&rkisp_mmu {
474		- status = "okay";
	712	+ status = "disabled";
475	713	};
476	714
477	715	&rkisp_vir0 {
478		- status = "okay";
	716	+ status = "disabled";
479	717
480	718	port {
481	719	#address-cells = <1>;
..	..	@@ -488,34 +726,30 @@
488	726	};
489	727	};
490	728
491		-&route_dsi0 {
492		- status = "okay";
493		- connect = <&vp1_out_dsi0>;
494		-};
495	729
496		-&route_edp {
497		- status = "okay";
498		- connect = <&vp0_out_edp>;
499		-};
500	730
501	731	&sata2 {
502	732	status = "okay";
503	733	};
504	734
505	735	&sdmmc2 {
506		- max-frequency = <150000000>;
507		- supports-sdio;
508		- bus-width = <4>;
509		- disable-wp;
510		- cap-sd-highspeed;
511		- cap-sdio-irq;
512		- keep-power-in-suspend;
513		- mmc-pwrseq = <&sdio_pwrseq>;
514		- non-removable;
515		- pinctrl-names = "default";
516		- pinctrl-0 = <&sdmmc2m0_bus4 &sdmmc2m0_cmd &sdmmc2m0_clk>;
517		- sd-uhs-sdr104;
518		- status = "okay";
	736	+ status = "disabled";
	737	+};
	738	+
	739	+&sdmmc1 {
	740	+ max-frequency = <150000000>;
	741	+ supports-sdio;
	742	+ bus-width = <4>;
	743	+ disable-wp;
	744	+ cap-sd-highspeed;
	745	+ cap-sdio-irq;
	746	+ keep-power-in-suspend;
	747	+ mmc-pwrseq = <&sdio_pwrseq>;
	748	+ non-removable;
	749	+ pinctrl-names = "default";
	750	+ pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>;
	751	+ sd-uhs-sdr104;
	752	+ status = "okay";
519	753	};
520	754
521	755	&spdif_8ch {
..	..	@@ -531,12 +765,12 @@
531	765	};
532	766
533	767	&vcc3v3_lcd0_n {
534		- gpio = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>;
	768	+ gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>;
535	769	enable-active-high;
536	770	};
537	771
538	772	&vcc3v3_lcd1_n {
539		- gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
	773	+ gpio = <&gpio3 RK_PA3 GPIO_ACTIVE_HIGH>; //MIPI_3V3EN_GPIO3_A3_d_3V3
540	774	enable-active-high;
541	775	};
542	776
..	..	@@ -551,12 +785,47 @@
551	785	clocks = <&rk809 1>;
552	786	clock-names = "ext_clock";
553	787	//wifi-bt-power-toggle;
554		- uart_rts_gpios = <&gpio2 RK_PB1 GPIO_ACTIVE_LOW>;
	788	+ uart_rts_gpios = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>;
555	789	pinctrl-names = "default", "rts_gpio";
556		- pinctrl-0 = <&uart8m0_rtsn>;
557		- pinctrl-1 = <&uart8_gpios>;
558		- BT,reset_gpio = <&gpio3 RK_PA0 GPIO_ACTIVE_HIGH>;
559		- BT,wake_gpio = <&gpio3 RK_PA2 GPIO_ACTIVE_HIGH>;
560		- BT,wake_host_irq = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>;
	790	+ pinctrl-0 = <&uart1m0_rtsn>;
	791	+ pinctrl-1 = <&uart1_gpios>;
	792	+ BT,reset_gpio = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
	793	+ BT,wake_gpio = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>;
	794	+ BT,wake_host_irq = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>;
561	795	status = "okay";
562	796	};
	797	+
	798	+&uart0 {
	799	+ status = "okay";
	800	+};
	801	+
	802	+&uart1 {
	803	+ pinctrl-names = "default";
	804	+ pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn>;
	805	+ status = "okay";
	806	+};
	807	+
	808	+&uart3 {
	809	+ status = "okay";
	810	+ pinctrl-0 = <&uart3m1_xfer>;
	811	+};
	812	+
	813	+&uart4 {
	814	+ status = "okay";
	815	+ pinctrl-0 = <&uart4m1_xfer>;
	816	+};
	817	+
	818	+&uart5 {
	819	+ status = "okay";
	820	+ pinctrl-0 = <&uart5m1_xfer>;
	821	+};
	822	+
	823	+&uart7 {
	824	+ status = "okay";
	825	+ pinctrl-0 = <&uart7m1_xfer>;
	826	+};
	827	+
	828	+&uart9 {
	829	+ status = "okay";
	830	+ pinctrl-0 = <&uart9m1_xfer>;
	831	+};