forked from ~ljy/RK356X_SDK_RELEASE
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2024-01-31 f70575805708cabdedea7498aaa3f710fde4d920 
 kernel/arch/arm64/boot/dts/rockchip/NK-R36S0.dtsi
....@@ -8,6 +8,7 @@
88 
99 #include <dt-bindings/gpio/gpio.h>
1010 #include <dt-bindings/pinctrl/rockchip.h>
11
+#include <dt-bindings/display/media-bus-format.h>
1112 #include "rk3568.dtsi"
1213 #include "rk3568-evb.dtsi"
1314 
....@@ -18,6 +19,7 @@
1819 	rk_headset: rk-headset {
1920 		compatible = "rockchip_headset";
2021 		headset_gpio = <&gpio0 RK_PD5 GPIO_ACTIVE_LOW>;
22
+		spk_ctl_gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_LOW>;//AMP_SD_GPIO4_C2_3V3
2123 		pinctrl-names = "default";
2224 		pinctrl-0 = <&hp_det>;
2325 	};
....@@ -58,7 +60,9 @@
5860 		regulator-name = "vcc3v3_pcie";
5961 		regulator-min-microvolt = <3300000>;
6062 		regulator-max-microvolt = <3300000>;
63
+		regulator-always-on;
6164 		enable-active-high;
65
+		regulator-boot-on;
6266 		gpio = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
6367 		startup-delay-us = <5000>;
6468 		vin-supply = <&dc_12v>;
....@@ -85,16 +89,110 @@
8589 		regulator-boot-on;
8690     	};
8791 #endif
88
-
92
+	ndj_io_init {
93
+         	compatible = "nk_io_control";	
94
+			pinctrl-names = "default";
95
+        	pinctrl-0 = <&nk_io_gpio>;
96
+			
97
+			//gpio_op0 = <&gpio1 RK_PD0 GPIO_ACTIVE_HIGH>;
98
+			
99
+			vcc_5v {
100
+				gpio_num = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; //VCC5_IO_EN_GPIO1_A4_3V3
101
+				gpio_function = <0>;	
102
+			};
103
+			
104
+			vcc_12v {
105
+				gpio_num = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;  //VCC12_IO_EN_GPIO0_C7_3V3
106
+				gpio_function = <0>;
107
+			};
108
+			
109
+			hub_host2_rst {
110
+				gpio_num = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>;  //HUB_RST_GPIO4_D2_3V3
111
+				gpio_function = <3>;
112
+			};
113
+			
114
+			hub_host3 {
115
+				gpio_num = <&gpio4 RK_PB2 GPIO_ACTIVE_HIGH>; //HOST3_EN_GPIO4_B2_1V8
116
+				gpio_function = <0>;
117
+			};
118
+			
119
+			wake_4g {
120
+				gpio_num = <&gpio1 RK_PB1 GPIO_ACTIVE_LOW>; //4G_WAKEUP_GPIO01_B1_3V3
121
+				gpio_function = <0>;
122
+			};
123
+			
124
+			air_mode_4g {
125
+				gpio_num = <&gpio1 RK_PB0 GPIO_ACTIVE_LOW>; //4G_AIR_MODE_GPIO01_B0_3V3
126
+				gpio_function = <0>;
127
+			};
128
+			
129
+			reset_4g {
130
+				gpio_num = <&gpio1 RK_PB2 GPIO_ACTIVE_LOW>; //4G_RST_GPIO01_B2_3V3
131
+				gpio_function = <3>;
132
+			};
133
+			
134
+			en_4g {
135
+				gpio_num = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; //4G_PWREN_H_GPIO0_C6
136
+				gpio_function = <0>;
137
+			};
138
+			
139
+			hp_en {
140
+				gpio_num = <&gpio3 RK_PA6 GPIO_ACTIVE_LOW>;//HP_EN_GPIO3_A6_3V3
141
+				gpio_function = <0>;
142
+			};
143
+			
144
+			wifi_power_en {
145
+				gpio_num = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>; //WIFI_PWREN_GPIO3_C6_1V8
146
+				gpio_function = <0>;
147
+			};
148
+	#if 0		
149
+			do1 {
150
+				gpio_num = <&gpio1 RK_PD0 GPIO_ACTIVE_LOW>; 
151
+				gpio_function = <0>;
152
+			};
153
+			
154
+			do2 {
155
+				gpio_num = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>;
156
+				gpio_function = <0>;
157
+			};
158
+			
159
+			do3 {
160
+				gpio_num = <&gpio1 RK_PD1 GPIO_ACTIVE_HIGH>;
161
+				gpio_function = <0>;
162
+			};
163
+			
164
+			do4 {
165
+				gpio_num = <&gpio1 RK_PD3 GPIO_ACTIVE_HIGH>;
166
+				gpio_function = <0>;
167
+			};
168
+			
169
+			do5 {
170
+				gpio_num = <&gpio2 RK_PD6 GPIO_ACTIVE_LOW>; 
171
+				gpio_function = <0>;
172
+			};
173
+			
174
+			do6 {
175
+				gpio_num = <&gpio2 RK_PD7 GPIO_ACTIVE_LOW>; 
176
+				gpio_function = <0>;
177
+			};
178
+			
179
+			do7 {
180
+				gpio_num = <&gpio3 RK_PA0 GPIO_ACTIVE_LOW>; 
181
+				gpio_function = <0>;
182
+			};
183
+			
184
+			di1 {
185
+				gpio_num = <&gpio2 RK_PD5 GPIO_ACTIVE_HIGH>;
186
+				gpio_function = <1>;
187
+			};
188
+	#endif
189
+		};
190
+#if 0			
89191 	    nk_io_init {
90192                 compatible = "nk_io_control";
91
-//				usb_en_oc_gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;  //USB_EN_OC_GPIO0_A5
92
-				lcd_bk_en_gpio = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>; //LCD0_BKLT_EN_3V3
93
-				lcd_pwblk_gpio = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;  //LCD0_BKLT_EN_3V3
94
-				vcc3_io_en_gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; //VCC3_IO_EN_GPIO0_C4_3V3
193
+//				vcc3_io_en_gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; //VCC3_IO_EN_GPIO0_C4_3V3
95194                 hub_host2_5V_rest_gpio = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>; //HUB_RST_GPIO4_D2_3V3
96195                 hub_host3_5v_gpio = <&gpio4 RK_PB2 GPIO_ACTIVE_HIGH>; //HOST3_EN_GPIO4_B2_1V8
97
-//              hub_host3_5V_rest_gpio = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>; 
98196                 vcc_5v_io = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>;   //VCC5_IO_EN_GPIO1_A4_3V3
99197                 vcc_12v_io = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; //VCC12_IO_EN_GPIO0_C7_3V3
100198                 en_4g_gpio = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; //4G_PWREN_H_GPIO0_C6
....@@ -102,23 +200,55 @@
102200                 air_mode_4g_gpio = <&gpio1 RK_PB0 GPIO_ACTIVE_HIGH>; //4G_AIR_MODE_GPIO01_B0_3V3
103201                 wake_4g_gpio = <&gpio1 RK_PB1 GPIO_ACTIVE_HIGH>; //4G_WAKEUP_GPIO01_B1_3V3
104202 				hp_en_gpio = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>;//HP_EN_GPIO3_A6_3V3
105
-                spk_out_gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_HIGH>;//AMP_SD_GPIO4_C2_3V3
106
-				
107
-				edp_enable_gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>;
108
-                edp_gpio0 = <&gpio3 RK_PD2 GPIO_ACTIVE_HIGH>; //7511_GPIO0-GPIO3_D2
109
-				edp_gpio1 = <&gpio3 RK_PD3 GPIO_ACTIVE_HIGH>; //7511_GPIO1-GPIO3_D3
110
-				edp_gpio2 = <&gpio3 RK_PD4 GPIO_ACTIVE_HIGH>; //7511_GPIO2-GPIO3_D4
111
-				edp_gpio3 = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>; //7511_GPIO3-GPIO3_D5
112
-                edp_reset = <&gpio3 RK_PD1 GPIO_ACTIVE_LOW>; //7511_RST_GPIO3_D1
113
-//              tp_reset = <&gpio3 RK_PA7 GPIO_ACTIVE_HIGH>;
114
-//              vddio_mipi = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>;
115
-		
203
+//              spk_out_gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_HIGH>;//AMP_SD_GPIO4_C2_3V3			
116204 				wifi_power_en_gpio = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>; //WIFI_PWREN_GPIO3_C6_1V8
117
-
205
+//				pcie_power_en_gpio = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;//PCIE_PWREN_H_GPIO0_D4				
118206 				pinctrl-names = "default";
119
-				pinctrl-0 = <&nk_io_gpio>;
120
-				nodka_lvds = <9>;
207
+				pinctrl-0 = <&nk_io_gpio>;				
121208         };
209
+#endif	
210
+		panel: panel {
211
+				compatible = "simple-panel";
212
+				backlight = <&backlight>;
213
+				power-supply = <&vcc3v3_lcd0_n>;
214
+				enable-gpios = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>; //LCD0_VDD_H_GPIO2_D4
215
+				reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_LOW>; //7511_RST_GPIO3_D1
216
+				edp-bl-gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;  //LCD0_BKLT_EN_3V3
217
+				edp-bl-en = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>; //LCD0_BKLT_EN_3V3
218
+				bus-format = <MEDIA_BUS_FMT_RGB888_1X24>;
219
+				bpc = <8>;
220
+				prepare-delay-ms = <200>;
221
+				enable-delay-ms = <20>;
222
+				lvds-gpio0 = <&gpio3 RK_PD2 GPIO_ACTIVE_HIGH>; //7511_GPIO0-GPIO3_D2 
223
+				lvds-gpio1 = <&gpio3 RK_PD3 GPIO_ACTIVE_HIGH>; //7511_GPIO1-GPIO3_D3 
224
+				lvds-gpio2 = <&gpio3 RK_PD4 GPIO_ACTIVE_HIGH>; //7511_GPIO2-GPIO3_D4 
225
+				lvds-gpio3 = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>; //7511_GPIO3-GPIO3_D5
226
+				nodka-lvds = <15>;
227
+
228
+				display-timings {
229
+                native-mode = <&timing>;
230
+                timing: timing {
231
+					clock-frequency = <72500000>;
232
+					hactive = <1280>;
233
+					vactive = <800>;
234
+					hfront-porch = <70>;
235
+					hsync-len = <2>;
236
+					hback-porch = <88>;
237
+					vfront-porch = <7>;
238
+					vsync-len = <4>;
239
+					vback-porch = <17>;
240
+					hsync-active = <21>;
241
+					vsync-active = <0>;
242
+					de-active = <0>;
243
+					pixelclk-active = <0>;			
244
+					};
245
+				};
246
+				ports {
247
+					panel_in_lvds: endpoint {
248
+					remote-endpoint = <&lvds_out>;
249
+						};
250
+					};   
251
+				};
122252 };
123253 
124254 &combphy0_us {
....@@ -134,11 +264,11 @@
134264 };
135265 
136266 &csi2_dphy_hw {
137
-	status = "okay";
267
+	status = "disabled";
138268 };
139269 
140270 &csi2_dphy0 {
141
-	status = "okay";
271
+	status = "disabled";
142272 
143273 	ports {
144274 		#address-cells = <1>;
....@@ -181,8 +311,12 @@
181311  * video_phy0 needs to be enabled
182312  * when dsi0 is enabled
183313  */
184
-&dsi0 {
314
+&video_phy0 {
185315 	status = "okay";
316
+};
317
+
318
+&dsi0 {
319
+	status = "disabled";
186320 };
187321 
188322 &dsi0_in_vp0 {
....@@ -190,7 +324,7 @@
190324 };
191325 
192326 &dsi0_in_vp1 {
193
-	status = "okay";
327
+	status = "disabled";
194328 };
195329 
196330 &dsi0_panel {
....@@ -201,6 +335,10 @@
201335  * video_phy1 needs to be enabled
202336  * when dsi1 is enabled
203337  */
338
+ 
339
+&video_phy1 {
340
+	status = "disabled";
341
+}; 
204342 &dsi1 {
205343 	status = "disabled";
206344 };
....@@ -214,31 +352,117 @@
214352 };
215353 
216354 &dsi1_panel {
217
-	power-supply = <&vcc3v3_lcd1_n>;
355
+//	power-supply = <&vcc3v3_lcd1_n>;   //MIPI_3V3EN_GPIO3_A3_d_3V3
356
+    vddio-mipi = <&gpio3 RK_PA4 GPIO_ACTIVE_HIGH>; //MIPI_EN_1V8_GPIO3_A4_d_3V3
357
+    reset-gpios = <&gpio3 RK_PC7 GPIO_ACTIVE_LOW>; //MIPI_RST_L_GPIO3_C7
358
+    vcc-5v-gpio = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; //VCC5_IO_EN_GPIO1_A4_3V3
359
+    pinctrl-names = "default";
360
+    pinctrl-0 = <&lcd1_rst_gpio>;
218361 };
219362 
363
+&route_dsi1 {
364
+	status = "disabled";
365
+	connect = <&vp1_out_dsi1>;
366
+};
367
+
368
+
369
+/*
370
+*  edp_start
371
+*/
372
+
220373 &edp {
221
-	hpd-gpios = <&gpio0 RK_PC2 GPIO_ACTIVE_HIGH>;
222
-	status = "okay";
374
+    force-hpd;
375
+	status = "disabled";
223376 };
224377 
225378 &edp_phy {
226
-	status = "okay";
379
+	status = "disabled";
227380 };
228381 
229382 &edp_in_vp0 {
230
-	status = "okay";
383
+    status = "disabled";
231384 };
232385 
233386 &edp_in_vp1 {
387
+    status = "disabled";
388
+
389
+};
390
+
391
+&route_edp {
392
+    status = "disabled";
393
+    connect = <&vp1_out_edp>;
394
+};
395
+
396
+&route_edp {
234397 	status = "disabled";
235398 };
399
+
400
+&lvds {
401
+	status = "okay";
402
+	ports {
403
+		port@1 {
404
+			reg = <1>;
405
+			lvds_out:endpoint {
406
+				remote-endpoint = <&panel_in_lvds>;
407
+			};
408
+		};
409
+	};
410
+};
411
+
412
+&route_lvds{
413
+	status = "okay";
414
+	connect = <&vp1_out_lvds>;
415
+};
416
+
417
+&lvds_in_vp1 {
418
+	status = "okay";
419
+};
420
+
421
+/*
422
+*  edp_end
423
+*/
424
+
425
+/*
426
+*  Hdmi_start
427
+*/
428
+
429
+&hdmi {
430
+	status = "okay";
431
+	rockchip,phy-table =
432
+		<92812500  0x8009 0x0000 0x0270>,
433
+		<165000000 0x800b 0x0000 0x026d>,
434
+		<185625000 0x800b 0x0000 0x01ed>,
435
+		<297000000 0x800b 0x0000 0x01ad>,
436
+		<594000000 0x8029 0x0000 0x0088>,
437
+		<000000000 0x0000 0x0000 0x0000>;
438
+};
439
+
440
+&route_hdmi {
441
+	status = "okay";
442
+	connect = <&vp0_out_hdmi>;
443
+};
444
+
445
+&hdmi_in_vp0 {
446
+	status = "okay";
447
+};
448
+
449
+&hdmi_in_vp1 {
450
+	status = "disabled";
451
+};
452
+
453
+&hdmi_sound {
454
+	status = "okay";
455
+};
456
+
457
+/*
458
+ *  Hdmi_END
459
+*/
236460 
237461 &gmac0 {
238462 	phy-mode = "rgmii";
239463 	clock_in_out = "output";
240464 
241
-	snps,reset-gpio = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>;
465
+	snps,reset-gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_LOW>;
242466 	snps,reset-active-low;
243467 	/* Reset time is 20ms, 100ms for rtl8211f */
244468 	snps,reset-delays-us = <0 20000 100000>;
....@@ -258,7 +482,9 @@
258482 	rx_delay = <0x2f>;
259483 
260484 	phy-handle = <&rgmii_phy0>;
485
+	
261486 	status = "disabled";
487
+	
262488 };
263489 
264490 &gmac1 {
....@@ -292,9 +518,7 @@
292518  * power-supply should switche to vcc3v3_lcd1_n
293519  * when mipi panel is connected to dsi1.
294520  */
295
-&gt1x {
296
-	power-supply = <&vcc3v3_lcd0_n>;
297
-};
521
+
298522 
299523 &i2c3 {
300524 	status = "okay";
....@@ -313,7 +537,7 @@
313537 };
314538 
315539 &i2c4 {
316
-	status = "okay";
540
+	status = "disabled";
317541 	gc8034: gc8034@37 {
318542 		compatible = "galaxycore,gc8034";
319543 		status = "okay";
....@@ -325,7 +549,6 @@
325549 		reset-gpios = <&gpio3 RK_PB6 GPIO_ACTIVE_LOW>;
326550 		pwdn-gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_LOW>;
327551 		rockchip,grf = <&grf>;
328
-		power-domains = <&power RK3568_PD_VI>;
329552 		rockchip,camera-module-index = <0>;
330553 		rockchip,camera-module-facing = "back";
331554 		rockchip,camera-module-name = "RK-CMK-8M-2-v1";
....@@ -359,7 +582,7 @@
359582 		};
360583 	};
361584 	ov5695: ov5695@36 {
362
-		status = "okay";
585
+		status = "disabled";
363586 		compatible = "ovti,ov5695";
364587 		reg = <0x36>;
365588 		clocks = <&cru CLK_CIF_OUT>;
....@@ -409,20 +632,14 @@
409632 	};
410633 };
411634 
412
-&video_phy0 {
413
-	status = "okay";
414
-};
415635 
416
-&video_phy1 {
417
-	status = "disabled";
418
-};
419636 
420637 &pcie30phy {
421638 	status = "okay";
422639 };
423640 
424
-&pcie3x2 {
425
-	reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
641
+&pcie2x1 {
642
+	reset-gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>;
426643 	vpcie3v3-supply = <&vcc3v3_pcie>;
427644 	status = "okay";
428645 };
....@@ -437,7 +654,8 @@
437654 //	};
438655 	headphone {
439656 		hp_det: hp-det {
440
-			rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_down>;
657
+			rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_down>,
658
+							<4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
441659 		};
442660 	};
443661 
....@@ -452,6 +670,13 @@
452670 			rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
453671 		};
454672 	};
673
+	
674
+	lcd1 {
675
+        lcd1_rst_gpio: lcd1-rst-gpio {
676
+            rockchip,pins = <3 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
677
+        };
678
+    };
679
+		
455680 	nk_io_init{
456681 		nk_io_gpio: nk-io-gpio{
457682 			rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>,
....@@ -465,27 +690,30 @@
465690 							<1 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>,
466691 							<1 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>,
467692 							<3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>,
468
-							<4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>,
469693 							<3 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>,
470694 							<3 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>,
471695 							<3 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>,
472696 							<3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>,
473697 							<3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>,
698
+							<2 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>,//93 SPI2_CS0_M1_3V3
699
+							<2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>,//94 SPI2_MOSI_M1_3V3
700
+							<2 RK_PD7 RK_FUNC_GPIO &pcfg_pull_none>,//95 SPI2_MISO_M1_3V3
701
+							<3 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>,//96 SPI2_CLK_M1_3V3
474702 							<0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
475703 		};
476704 	};
477705 };
478706 
479707 &rkisp {
480
-	status = "okay";
708
+	status = "disabled";
481709 };
482710 
483711 &rkisp_mmu {
484
-	status = "okay";
712
+	status = "disabled";
485713 };
486714 
487715 &rkisp_vir0 {
488
-	status = "okay";
716
+	status = "disabled";
489717 
490718 	port {
491719 		#address-cells = <1>;
....@@ -498,15 +726,7 @@
498726 	};
499727 };
500728 
501
-&route_dsi0 {
502
-	status = "okay";
503
-	connect = <&vp1_out_dsi0>;
504
-};
505729 
506
-&route_edp {
507
-	status = "okay";
508
-	connect = <&vp0_out_edp>;
509
-};
510730 
511731 &sata2 {
512732 	status = "okay";
....@@ -545,12 +765,12 @@
545765 };
546766 
547767 &vcc3v3_lcd0_n {
548
-	gpio = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>;
768
+	gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; 
549769 	enable-active-high;
550770 };
551771 
552772 &vcc3v3_lcd1_n {
553
-	gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
773
+	gpio = <&gpio3 RK_PA3 GPIO_ACTIVE_HIGH>; //MIPI_3V3EN_GPIO3_A3_d_3V3
554774 	enable-active-high;
555775 };
556776 
....@@ -566,20 +786,25 @@
566786 	clock-names = "ext_clock";
567787 	//wifi-bt-power-toggle;
568788 	uart_rts_gpios = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>;
569
-	BT,power_gpio = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
570789 	pinctrl-names = "default", "rts_gpio";
571790 	pinctrl-0 = <&uart1m0_rtsn>;
572791 	pinctrl-1 = <&uart1_gpios>;
573
-	BT,reset_gpio    = <&gpio3 RK_PA0 GPIO_ACTIVE_HIGH>;
574
-	BT,wake_gpio     = <&gpio3 RK_PA2 GPIO_ACTIVE_HIGH>;
575
-	BT,wake_host_irq = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>;
576
-	status = "disabled";
792
+	BT,reset_gpio    = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
793
+    BT,wake_gpio     = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>;
794
+    BT,wake_host_irq = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>;
795
+	status = "okay";
577796 };
578797 
579798 &uart0 {
580799 	status = "okay";
581800 };
582801 
802
+&uart1 {	
803
+	pinctrl-names = "default";	
804
+	pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn>;	
805
+	status = "okay";		
806
+};
807
+
583808 &uart3 {
584809 	status = "okay";
585810 	pinctrl-0 = <&uart3m1_xfer>;