| .. | .. |
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| 93 | 93 | compatible = "nk_io_control"; |
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| 94 | 94 | pinctrl-names = "default"; |
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| 95 | 95 | pinctrl-0 = <&nk_io_gpio>; |
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| 96 | + |
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| 97 | + //gpio_op0 = <&gpio1 RK_PD0 GPIO_ACTIVE_HIGH>; |
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| 98 | + |
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| 96 | 99 | vcc_5v { |
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| 97 | 100 | gpio_num = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; //VCC5_IO_EN_GPIO1_A4_3V3 |
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| 98 | 101 | gpio_function = <0>; |
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| .. | .. |
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| 134 | 137 | }; |
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| 135 | 138 | |
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| 136 | 139 | hp_en { |
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| 137 | | - gpio_num = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>;//HP_EN_GPIO3_A6_3V3 |
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| 140 | + gpio_num = <&gpio3 RK_PA6 GPIO_ACTIVE_LOW>;//HP_EN_GPIO3_A6_3V3 |
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| 138 | 141 | gpio_function = <0>; |
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| 139 | 142 | }; |
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| 140 | 143 | |
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| .. | .. |
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| 142 | 145 | gpio_num = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>; //WIFI_PWREN_GPIO3_C6_1V8 |
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| 143 | 146 | gpio_function = <0>; |
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| 144 | 147 | }; |
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| 148 | + #if 0 |
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| 149 | + do1 { |
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| 150 | + gpio_num = <&gpio1 RK_PD0 GPIO_ACTIVE_LOW>; |
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| 151 | + gpio_function = <0>; |
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| 152 | + }; |
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| 153 | + |
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| 154 | + do2 { |
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| 155 | + gpio_num = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>; |
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| 156 | + gpio_function = <0>; |
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| 157 | + }; |
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| 158 | + |
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| 159 | + do3 { |
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| 160 | + gpio_num = <&gpio1 RK_PD1 GPIO_ACTIVE_HIGH>; |
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| 161 | + gpio_function = <0>; |
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| 162 | + }; |
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| 163 | + |
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| 164 | + do4 { |
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| 165 | + gpio_num = <&gpio1 RK_PD3 GPIO_ACTIVE_HIGH>; |
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| 166 | + gpio_function = <0>; |
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| 167 | + }; |
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| 168 | + |
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| 169 | + do5 { |
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| 170 | + gpio_num = <&gpio2 RK_PD6 GPIO_ACTIVE_LOW>; |
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| 171 | + gpio_function = <0>; |
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| 172 | + }; |
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| 173 | + |
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| 174 | + do6 { |
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| 175 | + gpio_num = <&gpio2 RK_PD7 GPIO_ACTIVE_LOW>; |
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| 176 | + gpio_function = <0>; |
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| 177 | + }; |
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| 178 | + |
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| 179 | + do7 { |
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| 180 | + gpio_num = <&gpio3 RK_PA0 GPIO_ACTIVE_LOW>; |
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| 181 | + gpio_function = <0>; |
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| 182 | + }; |
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| 183 | + |
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| 184 | + di1 { |
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| 185 | + gpio_num = <&gpio2 RK_PD5 GPIO_ACTIVE_HIGH>; |
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| 186 | + gpio_function = <1>; |
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| 187 | + }; |
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| 188 | + #endif |
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| 145 | 189 | }; |
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| 146 | 190 | #if 0 |
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| 147 | 191 | nk_io_init { |
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| .. | .. |
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| 182 | 226 | nodka-lvds = <15>; |
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| 183 | 227 | |
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| 184 | 228 | display-timings { |
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| 185 | | - native-mode = <&timing0>; |
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| 186 | | - timing0: timing0 { |
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| 229 | + native-mode = <&timing>; |
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| 230 | + timing: timing { |
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| 187 | 231 | clock-frequency = <72500000>; |
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| 188 | 232 | hactive = <1280>; |
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| 189 | 233 | vactive = <800>; |
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| .. | .. |
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| 200 | 244 | }; |
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| 201 | 245 | }; |
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| 202 | 246 | ports { |
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| 203 | | - panel_in: endpoint { |
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| 204 | | - remote-endpoint = <&edp_out>; |
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| 247 | + panel_in_lvds: endpoint { |
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| 248 | + remote-endpoint = <&lvds_out>; |
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| 205 | 249 | }; |
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| 206 | 250 | }; |
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| 207 | 251 | }; |
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| .. | .. |
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| 268 | 312 | * when dsi0 is enabled |
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| 269 | 313 | */ |
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| 270 | 314 | &video_phy0 { |
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| 271 | | - status = "disabled"; |
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| 315 | + status = "okay"; |
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| 272 | 316 | }; |
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| 273 | 317 | |
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| 274 | 318 | &dsi0 { |
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| .. | .. |
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| 293 | 337 | */ |
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| 294 | 338 | |
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| 295 | 339 | &video_phy1 { |
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| 296 | | - status = "okay"; |
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| 340 | + status = "disabled"; |
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| 297 | 341 | }; |
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| 298 | 342 | &dsi1 { |
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| 299 | 343 | status = "disabled"; |
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| .. | .. |
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| 304 | 348 | }; |
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| 305 | 349 | |
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| 306 | 350 | &dsi1_in_vp1 { |
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| 307 | | - status = "okay"; |
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| 351 | + status = "disabled"; |
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| 308 | 352 | }; |
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| 309 | 353 | |
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| 310 | 354 | &dsi1_panel { |
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| 311 | | - power-supply = <&vcc3v3_lcd1_n>; //MIPI_3V3EN_GPIO3_A3_d_3V3 |
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| 355 | +// power-supply = <&vcc3v3_lcd1_n>; //MIPI_3V3EN_GPIO3_A3_d_3V3 |
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| 312 | 356 | vddio-mipi = <&gpio3 RK_PA4 GPIO_ACTIVE_HIGH>; //MIPI_EN_1V8_GPIO3_A4_d_3V3 |
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| 313 | 357 | reset-gpios = <&gpio3 RK_PC7 GPIO_ACTIVE_LOW>; //MIPI_RST_L_GPIO3_C7 |
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| 314 | 358 | vcc-5v-gpio = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; //VCC5_IO_EN_GPIO1_A4_3V3 |
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| .. | .. |
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| 328 | 372 | |
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| 329 | 373 | &edp { |
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| 330 | 374 | force-hpd; |
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| 331 | | - status = "okay"; |
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| 332 | | - ports { |
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| 333 | | - port@1 { |
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| 334 | | - reg = <1>; |
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| 335 | | - edp_out: endpoint { |
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| 336 | | - remote-endpoint = <&panel_in>; |
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| 337 | | - }; |
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| 338 | | - }; |
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| 339 | | - }; |
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| 375 | + status = "disabled"; |
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| 340 | 376 | }; |
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| 341 | 377 | |
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| 342 | 378 | &edp_phy { |
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| 343 | | - status = "okay"; |
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| 344 | | - |
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| 379 | + status = "disabled"; |
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| 345 | 380 | }; |
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| 346 | 381 | |
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| 347 | 382 | &edp_in_vp0 { |
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| .. | .. |
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| 349 | 384 | }; |
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| 350 | 385 | |
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| 351 | 386 | &edp_in_vp1 { |
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| 352 | | - status = "okay"; |
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| 387 | + status = "disabled"; |
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| 353 | 388 | |
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| 354 | 389 | }; |
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| 355 | 390 | |
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| 356 | 391 | &route_edp { |
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| 357 | | - status = "okay"; |
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| 392 | + status = "disabled"; |
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| 358 | 393 | connect = <&vp1_out_edp>; |
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| 359 | 394 | }; |
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| 360 | 395 | |
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| 361 | 396 | &route_edp { |
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| 397 | + status = "disabled"; |
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| 398 | +}; |
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| 399 | + |
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| 400 | +&lvds { |
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| 401 | + status = "okay"; |
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| 402 | + ports { |
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| 403 | + port@1 { |
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| 404 | + reg = <1>; |
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| 405 | + lvds_out:endpoint { |
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| 406 | + remote-endpoint = <&panel_in_lvds>; |
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| 407 | + }; |
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| 408 | + }; |
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| 409 | + }; |
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| 410 | +}; |
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| 411 | + |
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| 412 | +&route_lvds{ |
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| 413 | + status = "okay"; |
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| 414 | + connect = <&vp1_out_lvds>; |
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| 415 | +}; |
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| 416 | + |
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| 417 | +&lvds_in_vp1 { |
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| 362 | 418 | status = "okay"; |
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| 363 | 419 | }; |
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| 420 | + |
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| 364 | 421 | /* |
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| 365 | 422 | * edp_end |
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| 366 | 423 | */ |
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| .. | .. |
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| 405 | 462 | phy-mode = "rgmii"; |
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| 406 | 463 | clock_in_out = "output"; |
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| 407 | 464 | |
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| 408 | | - snps,reset-gpio = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>; |
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| 465 | + snps,reset-gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_LOW>; |
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| 409 | 466 | snps,reset-active-low; |
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| 410 | 467 | /* Reset time is 20ms, 100ms for rtl8211f */ |
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| 411 | 468 | snps,reset-delays-us = <0 20000 100000>; |
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| .. | .. |
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| 425 | 482 | rx_delay = <0x2f>; |
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| 426 | 483 | |
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| 427 | 484 | phy-handle = <&rgmii_phy0>; |
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| 485 | + |
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| 428 | 486 | status = "disabled"; |
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| 487 | + |
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| 429 | 488 | }; |
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| 430 | 489 | |
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| 431 | 490 | &gmac1 { |
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| .. | .. |
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| 459 | 518 | * power-supply should switche to vcc3v3_lcd1_n |
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| 460 | 519 | * when mipi panel is connected to dsi1. |
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| 461 | 520 | */ |
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| 462 | | ->1x { |
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| 463 | | - power-supply = <&vcc3v3_lcd0_n>; |
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| 464 | | -}; |
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| 521 | + |
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| 465 | 522 | |
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| 466 | 523 | &i2c3 { |
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| 467 | 524 | status = "okay"; |
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| .. | .. |
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| 480 | 537 | }; |
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| 481 | 538 | |
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| 482 | 539 | &i2c4 { |
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| 483 | | - status = "okay"; |
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| 540 | + status = "disabled"; |
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| 484 | 541 | gc8034: gc8034@37 { |
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| 485 | 542 | compatible = "galaxycore,gc8034"; |
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| 486 | 543 | status = "okay"; |
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| .. | .. |
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| 492 | 549 | reset-gpios = <&gpio3 RK_PB6 GPIO_ACTIVE_LOW>; |
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| 493 | 550 | pwdn-gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_LOW>; |
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| 494 | 551 | rockchip,grf = <&grf>; |
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| 495 | | - power-domains = <&power RK3568_PD_VI>; |
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| 496 | 552 | rockchip,camera-module-index = <0>; |
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| 497 | 553 | rockchip,camera-module-facing = "back"; |
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| 498 | 554 | rockchip,camera-module-name = "RK-CMK-8M-2-v1"; |
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| .. | .. |
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| 526 | 582 | }; |
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| 527 | 583 | }; |
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| 528 | 584 | ov5695: ov5695@36 { |
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| 529 | | - status = "okay"; |
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| 585 | + status = "disabled"; |
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| 530 | 586 | compatible = "ovti,ov5695"; |
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| 531 | 587 | reg = <0x36>; |
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| 532 | 588 | clocks = <&cru CLK_CIF_OUT>; |
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| .. | .. |
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| 669 | 725 | }; |
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| 670 | 726 | }; |
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| 671 | 727 | }; |
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| 672 | | - |
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| 673 | | - |
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| 674 | 728 | |
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| 675 | 729 | |
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| 676 | 730 | |
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