| .. | .. |
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| 32 | 32 | sync_cache_w(&pen_release); |
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| 33 | 33 | } |
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| 34 | 34 | |
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| 35 | | -static DEFINE_SPINLOCK(boot_lock); |
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| 35 | +static DEFINE_RAW_SPINLOCK(boot_lock); |
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| 36 | 36 | |
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| 37 | 37 | static void __iomem *scu_base = IOMEM(VA_SCU_BASE); |
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| 38 | 38 | |
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| .. | .. |
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| 47 | 47 | /* |
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| 48 | 48 | * Synchronise with the boot thread. |
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| 49 | 49 | */ |
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| 50 | | - spin_lock(&boot_lock); |
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| 51 | | - spin_unlock(&boot_lock); |
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| 50 | + raw_spin_lock(&boot_lock); |
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| 51 | + raw_spin_unlock(&boot_lock); |
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| 52 | 52 | } |
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| 53 | 53 | |
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| 54 | 54 | static int spear13xx_boot_secondary(unsigned int cpu, struct task_struct *idle) |
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| .. | .. |
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| 59 | 59 | * set synchronisation state between this boot processor |
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| 60 | 60 | * and the secondary one |
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| 61 | 61 | */ |
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| 62 | | - spin_lock(&boot_lock); |
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| 62 | + raw_spin_lock(&boot_lock); |
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| 63 | 63 | |
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| 64 | 64 | /* |
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| 65 | 65 | * The secondary processor is waiting to be released from |
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| .. | .. |
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| 84 | 84 | * now the secondary core is starting up let it run its |
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| 85 | 85 | * calibrations, then wait for it to finish |
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| 86 | 86 | */ |
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| 87 | | - spin_unlock(&boot_lock); |
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| 87 | + raw_spin_unlock(&boot_lock); |
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| 88 | 88 | |
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| 89 | 89 | return pen_release != -1 ? -ENOSYS : 0; |
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| 90 | 90 | } |
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