.. | .. |
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78 | 78 | u32 low_rm; |
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79 | 79 | u32 current_rm; |
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80 | 80 | u32 target_rm; |
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| 81 | + u32 pvtpll_clk_id; |
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| 82 | + bool pvtpll_low_temp; |
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81 | 83 | }; |
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82 | 84 | |
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83 | 85 | #if IS_ENABLED(CONFIG_ROCKCHIP_OPP) |
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.. | .. |
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87 | 89 | int *volt_sel, int *scale_sel); |
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88 | 90 | void rockchip_pvtpll_calibrate_opp(struct rockchip_opp_info *info); |
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89 | 91 | void rockchip_pvtpll_add_length(struct rockchip_opp_info *info); |
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| 92 | +void rockchip_init_pvtpll_table(struct rockchip_opp_info *info, int bin); |
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90 | 93 | void rockchip_of_get_pvtm_sel(struct device *dev, struct device_node *np, |
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91 | 94 | char *reg_name, int bin, int process, |
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92 | 95 | int *volt_sel, int *scale_sel); |
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.. | .. |
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130 | 133 | int rockchip_init_opp_table(struct device *dev, |
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131 | 134 | struct rockchip_opp_info *info, |
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132 | 135 | char *lkg_name, char *reg_name); |
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| 136 | +void rockchip_uninit_opp_table(struct device *dev, |
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| 137 | + struct rockchip_opp_info *info); |
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133 | 138 | #else |
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134 | 139 | static inline int rockchip_of_get_leakage(struct device *dev, char *lkg_name, |
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135 | 140 | int *leakage) |
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.. | .. |
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149 | 154 | } |
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150 | 155 | |
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151 | 156 | static inline void rockchip_pvtpll_add_length(struct rockchip_opp_info *info) |
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| 157 | +{ |
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| 158 | +} |
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| 159 | + |
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| 160 | +static inline void rockchip_init_pvtpll_table(struct rockchip_opp_info *info, |
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| 161 | + int bin) |
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152 | 162 | { |
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153 | 163 | } |
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154 | 164 | |
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.. | .. |
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266 | 276 | return -EOPNOTSUPP; |
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267 | 277 | } |
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268 | 278 | |
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| 279 | +static inline void rockchip_uninit_opp_table(struct device *dev, |
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| 280 | + struct rockchip_opp_info *info) |
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| 281 | +{ |
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| 282 | +} |
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| 283 | + |
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269 | 284 | #endif /* CONFIG_ROCKCHIP_OPP */ |
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270 | 285 | |
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271 | 286 | #endif |
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