enable tun/tap/iptables

hc

2024-05-10 ee930fffee469d076998274a2ca55e13dc1efb67

 kernel/include/linux/platform_data/mtd-davinci.h
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@@ -1,3 +1,4 @@
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+/* SPDX-License-Identifier: GPL-2.0-or-later */
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 /*
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  * mach-davinci/nand.h
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  *
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  *   Dirk Behme <Dirk.Behme@gmail.com>
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  *
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  * --------------------------------------------------------------------------
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- *
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- * This program is free software; you can redistribute it and/or modify
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- * it under the terms of the GNU General Public License as published by
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- * the Free Software Foundation; either version 2 of the License, or
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- * (at your option) any later version.
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- *
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- * This program is distributed in the hope that it will be useful,
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- * but WITHOUT ANY WARRANTY; without even the implied warranty of
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- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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- * GNU General Public License for more details.
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- *
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- * You should have received a copy of the GNU General Public License
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- * along with this program; if not, write to the Free Software
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- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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  */
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 #ifndef __ARCH_ARM_DAVINCI_NAND_H
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@@ -73,15 +60,16 @@
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 	struct mtd_partition	*parts;
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 	unsigned		nr_parts;
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-	/* none  == NAND_ECC_NONE (strongly *not* advised!!)
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-	 * soft  == NAND_ECC_SOFT
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-	 * else  == NAND_ECC_HW, according to ecc_bits
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+	/* none  == NAND_ECC_ENGINE_TYPE_NONE (strongly *not* advised!!)
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+	 * soft  == NAND_ECC_ENGINE_TYPE_SOFT
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+	 * else  == NAND_ECC_ENGINE_TYPE_ON_HOST, according to ecc_bits
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 	 *
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 	 * All DaVinci-family chips support 1-bit hardware ECC.
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 	 * Newer ones also support 4-bit ECC, but are awkward
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 	 * using it with large page chips.
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 	 */
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-	nand_ecc_modes_t	ecc_mode;
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+	enum nand_ecc_engine_type engine_type;
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+	enum nand_ecc_placement ecc_placement;
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 	u8			ecc_bits;
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 	/* e.g. NAND_BUSWIDTH_16 */