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hc
2024-05-10 ee930fffee469d076998274a2ca55e13dc1efb67 
 kernel/drivers/pci/controller/dwc/pcie-hisi.c
....@@ -10,15 +10,10 @@
1010  */
1111 #include <linux/interrupt.h>
1212 #include <linux/init.h>
13
-#include <linux/mfd/syscon.h>
14
-#include <linux/of_address.h>
15
-#include <linux/of_pci.h>
1613 #include <linux/platform_device.h>
17
-#include <linux/of_device.h>
1814 #include <linux/pci.h>
1915 #include <linux/pci-acpi.h>
2016 #include <linux/pci-ecam.h>
21
-#include <linux/regmap.h>
2217 #include "../../pci.h"
2318 
2419 #if defined(CONFIG_PCI_HISI) || (defined(CONFIG_ACPI) && defined(CONFIG_PCI_QUIRKS))
....@@ -104,7 +99,7 @@
10499 	return 0;
105100 }
106101 
107
-struct pci_ecam_ops hisi_pcie_ops = {
102
+const struct pci_ecam_ops hisi_pcie_ops = {
108103 	.bus_shift    = 20,
109104 	.init         =  hisi_pcie_init,
110105 	.pci_ops      = {
....@@ -117,229 +112,6 @@
117112 #endif
118113 
119114 #ifdef CONFIG_PCI_HISI
120
-
121
-#include "pcie-designware.h"
122
-
123
-#define PCIE_SUBCTRL_SYS_STATE4_REG		0x6818
124
-#define PCIE_HIP06_CTRL_OFF			0x1000
125
-#define PCIE_SYS_STATE4				(PCIE_HIP06_CTRL_OFF + 0x31c)
126
-#define PCIE_LTSSM_LINKUP_STATE			0x11
127
-#define PCIE_LTSSM_STATE_MASK			0x3F
128
-
129
-#define to_hisi_pcie(x)	dev_get_drvdata((x)->dev)
130
-
131
-struct hisi_pcie;
132
-
133
-struct pcie_soc_ops {
134
-	int (*hisi_pcie_link_up)(struct hisi_pcie *hisi_pcie);
135
-};
136
-
137
-struct hisi_pcie {
138
-	struct dw_pcie *pci;
139
-	struct regmap *subctrl;
140
-	u32 port_id;
141
-	const struct pcie_soc_ops *soc_ops;
142
-};
143
-
144
-/* HipXX PCIe host only supports 32-bit config access */
145
-static int hisi_pcie_cfg_read(struct pcie_port *pp, int where, int size,
146
-			      u32 *val)
147
-{
148
-	u32 reg;
149
-	u32 reg_val;
150
-	void *walker = &reg_val;
151
-	struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
152
-
153
-	walker += (where & 0x3);
154
-	reg = where & ~0x3;
155
-	reg_val = dw_pcie_readl_dbi(pci, reg);
156
-
157
-	if (size == 1)
158
-		*val = *(u8 __force *) walker;
159
-	else if (size == 2)
160
-		*val = *(u16 __force *) walker;
161
-	else if (size == 4)
162
-		*val = reg_val;
163
-	else
164
-		return PCIBIOS_BAD_REGISTER_NUMBER;
165
-
166
-	return PCIBIOS_SUCCESSFUL;
167
-}
168
-
169
-/* HipXX PCIe host only supports 32-bit config access */
170
-static int hisi_pcie_cfg_write(struct pcie_port *pp, int where, int  size,
171
-				u32 val)
172
-{
173
-	u32 reg_val;
174
-	u32 reg;
175
-	void *walker = &reg_val;
176
-	struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
177
-
178
-	walker += (where & 0x3);
179
-	reg = where & ~0x3;
180
-	if (size == 4)
181
-		dw_pcie_writel_dbi(pci, reg, val);
182
-	else if (size == 2) {
183
-		reg_val = dw_pcie_readl_dbi(pci, reg);
184
-		*(u16 __force *) walker = val;
185
-		dw_pcie_writel_dbi(pci, reg, reg_val);
186
-	} else if (size == 1) {
187
-		reg_val = dw_pcie_readl_dbi(pci, reg);
188
-		*(u8 __force *) walker = val;
189
-		dw_pcie_writel_dbi(pci, reg, reg_val);
190
-	} else
191
-		return PCIBIOS_BAD_REGISTER_NUMBER;
192
-
193
-	return PCIBIOS_SUCCESSFUL;
194
-}
195
-
196
-static int hisi_pcie_link_up_hip05(struct hisi_pcie *hisi_pcie)
197
-{
198
-	u32 val;
199
-
200
-	regmap_read(hisi_pcie->subctrl, PCIE_SUBCTRL_SYS_STATE4_REG +
201
-		    0x100 * hisi_pcie->port_id, &val);
202
-
203
-	return ((val & PCIE_LTSSM_STATE_MASK) == PCIE_LTSSM_LINKUP_STATE);
204
-}
205
-
206
-static int hisi_pcie_link_up_hip06(struct hisi_pcie *hisi_pcie)
207
-{
208
-	struct dw_pcie *pci = hisi_pcie->pci;
209
-	u32 val;
210
-
211
-	val = dw_pcie_readl_dbi(pci, PCIE_SYS_STATE4);
212
-
213
-	return ((val & PCIE_LTSSM_STATE_MASK) == PCIE_LTSSM_LINKUP_STATE);
214
-}
215
-
216
-static int hisi_pcie_link_up(struct dw_pcie *pci)
217
-{
218
-	struct hisi_pcie *hisi_pcie = to_hisi_pcie(pci);
219
-
220
-	return hisi_pcie->soc_ops->hisi_pcie_link_up(hisi_pcie);
221
-}
222
-
223
-static const struct dw_pcie_host_ops hisi_pcie_host_ops = {
224
-	.rd_own_conf = hisi_pcie_cfg_read,
225
-	.wr_own_conf = hisi_pcie_cfg_write,
226
-};
227
-
228
-static int hisi_add_pcie_port(struct hisi_pcie *hisi_pcie,
229
-			      struct platform_device *pdev)
230
-{
231
-	struct dw_pcie *pci = hisi_pcie->pci;
232
-	struct pcie_port *pp = &pci->pp;
233
-	struct device *dev = &pdev->dev;
234
-	int ret;
235
-	u32 port_id;
236
-
237
-	if (of_property_read_u32(dev->of_node, "port-id", &port_id)) {
238
-		dev_err(dev, "failed to read port-id\n");
239
-		return -EINVAL;
240
-	}
241
-	if (port_id > 3) {
242
-		dev_err(dev, "Invalid port-id: %d\n", port_id);
243
-		return -EINVAL;
244
-	}
245
-	hisi_pcie->port_id = port_id;
246
-
247
-	pp->ops = &hisi_pcie_host_ops;
248
-
249
-	ret = dw_pcie_host_init(pp);
250
-	if (ret) {
251
-		dev_err(dev, "failed to initialize host\n");
252
-		return ret;
253
-	}
254
-
255
-	return 0;
256
-}
257
-
258
-static const struct dw_pcie_ops dw_pcie_ops = {
259
-	.link_up = hisi_pcie_link_up,
260
-};
261
-
262
-static int hisi_pcie_probe(struct platform_device *pdev)
263
-{
264
-	struct device *dev = &pdev->dev;
265
-	struct dw_pcie *pci;
266
-	struct hisi_pcie *hisi_pcie;
267
-	struct resource *reg;
268
-	int ret;
269
-
270
-	hisi_pcie = devm_kzalloc(dev, sizeof(*hisi_pcie), GFP_KERNEL);
271
-	if (!hisi_pcie)
272
-		return -ENOMEM;
273
-
274
-	pci = devm_kzalloc(dev, sizeof(*pci), GFP_KERNEL);
275
-	if (!pci)
276
-		return -ENOMEM;
277
-
278
-	pci->dev = dev;
279
-	pci->ops = &dw_pcie_ops;
280
-
281
-	hisi_pcie->pci = pci;
282
-
283
-	hisi_pcie->soc_ops = of_device_get_match_data(dev);
284
-
285
-	hisi_pcie->subctrl =
286
-	    syscon_regmap_lookup_by_compatible("hisilicon,pcie-sas-subctrl");
287
-	if (IS_ERR(hisi_pcie->subctrl)) {
288
-		dev_err(dev, "cannot get subctrl base\n");
289
-		return PTR_ERR(hisi_pcie->subctrl);
290
-	}
291
-
292
-	reg = platform_get_resource_byname(pdev, IORESOURCE_MEM, "rc_dbi");
293
-	pci->dbi_base = devm_pci_remap_cfg_resource(dev, reg);
294
-	if (IS_ERR(pci->dbi_base))
295
-		return PTR_ERR(pci->dbi_base);
296
-	platform_set_drvdata(pdev, hisi_pcie);
297
-
298
-	ret = hisi_add_pcie_port(hisi_pcie, pdev);
299
-	if (ret)
300
-		return ret;
301
-
302
-	return 0;
303
-}
304
-
305
-static struct pcie_soc_ops hip05_ops = {
306
-		&hisi_pcie_link_up_hip05
307
-};
308
-
309
-static struct pcie_soc_ops hip06_ops = {
310
-		&hisi_pcie_link_up_hip06
311
-};
312
-
313
-static const struct of_device_id hisi_pcie_of_match[] = {
314
-	{
315
-			.compatible = "hisilicon,hip05-pcie",
316
-			.data	    = (void *) &hip05_ops,
317
-	},
318
-	{
319
-			.compatible = "hisilicon,hip06-pcie",
320
-			.data	    = (void *) &hip06_ops,
321
-	},
322
-	{},
323
-};
324
-
325
-static struct platform_driver hisi_pcie_driver = {
326
-	.probe  = hisi_pcie_probe,
327
-	.driver = {
328
-		   .name = "hisi-pcie",
329
-		   .of_match_table = hisi_pcie_of_match,
330
-		   .suppress_bind_attrs = true,
331
-	},
332
-};
333
-builtin_platform_driver(hisi_pcie_driver);
334
-
335
-static int hisi_pcie_almost_ecam_probe(struct platform_device *pdev)
336
-{
337
-	struct device *dev = &pdev->dev;
338
-	struct pci_ecam_ops *ops;
339
-
340
-	ops = (struct pci_ecam_ops *)of_device_get_match_data(dev);
341
-	return pci_host_common_probe(pdev, ops);
342
-}
343115 
344116 static int hisi_pcie_platform_init(struct pci_config_window *cfg)
345117 {
....@@ -362,7 +134,7 @@
362134 	return 0;
363135 }
364136 
365
-struct pci_ecam_ops hisi_pcie_platform_ops = {
137
+static const struct pci_ecam_ops hisi_pcie_platform_ops = {
366138 	.bus_shift    = 20,
367139 	.init         =  hisi_pcie_platform_init,
368140 	.pci_ops      = {
....@@ -375,17 +147,17 @@
375147 static const struct of_device_id hisi_pcie_almost_ecam_of_match[] = {
376148 	{
377149 		.compatible =  "hisilicon,hip06-pcie-ecam",
378
-		.data	    = (void *) &hisi_pcie_platform_ops,
150
+		.data	    =  &hisi_pcie_platform_ops,
379151 	},
380152 	{
381153 		.compatible =  "hisilicon,hip07-pcie-ecam",
382
-		.data       = (void *) &hisi_pcie_platform_ops,
154
+		.data       =  &hisi_pcie_platform_ops,
383155 	},
384156 	{},
385157 };
386158 
387159 static struct platform_driver hisi_pcie_almost_ecam_driver = {
388
-	.probe  = hisi_pcie_almost_ecam_probe,
160
+	.probe  = pci_host_common_probe,
389161 	.driver = {
390162 		   .name = "hisi-pcie-almost-ecam",
391163 		   .of_match_table = hisi_pcie_almost_ecam_of_match,