enable tun/tap/iptables

hc

2024-05-10 ee930fffee469d076998274a2ca55e13dc1efb67

 kernel/drivers/pci/controller/dwc/pcie-armada8k.c
..
..
@@ -25,10 +25,14 @@
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25
 
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 #include "pcie-designware.h"
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27
 
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+#define ARMADA8K_PCIE_MAX_LANES PCIE_LNK_X4
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+
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 struct armada8k_pcie {
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 	struct dw_pcie *pci;
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 	struct clk *clk;
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 	struct clk *clk_reg;
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+	struct phy *phy[ARMADA8K_PCIE_MAX_LANES];
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+	unsigned int phy_count;
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 };
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37
 
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 #define PCIE_VENDOR_REGS_OFFSET		0x8000
..
..
@@ -55,7 +59,7 @@
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 #define PCIE_ARUSER_REG			(PCIE_VENDOR_REGS_OFFSET + 0x5C)
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 #define PCIE_AWUSER_REG			(PCIE_VENDOR_REGS_OFFSET + 0x60)
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 /*
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- * AR/AW Cache defauls: Normal memory, Write-Back, Read / Write
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+ * AR/AW Cache defaults: Normal memory, Write-Back, Read / Write
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  * allocate
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  */
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 #define ARCACHE_DEFAULT_VALUE		0x3511
..
..
@@ -66,6 +70,75 @@
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 #define AX_USER_DOMAIN_SHIFT		4
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 #define to_armada8k_pcie(x)	dev_get_drvdata((x)->dev)
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+
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+static void armada8k_pcie_disable_phys(struct armada8k_pcie *pcie)
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+{
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+	int i;
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+
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+	for (i = 0; i < ARMADA8K_PCIE_MAX_LANES; i++) {
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+		phy_power_off(pcie->phy[i]);
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+		phy_exit(pcie->phy[i]);
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+	}
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+}
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+
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+static int armada8k_pcie_enable_phys(struct armada8k_pcie *pcie)
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+{
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+	int ret;
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+	int i;
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+
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+	for (i = 0; i < ARMADA8K_PCIE_MAX_LANES; i++) {
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+		ret = phy_init(pcie->phy[i]);
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+		if (ret)
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+			return ret;
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+
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+		ret = phy_set_mode_ext(pcie->phy[i], PHY_MODE_PCIE,
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+				       pcie->phy_count);
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+		if (ret) {
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+			phy_exit(pcie->phy[i]);
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+			return ret;
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+		}
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+
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+		ret = phy_power_on(pcie->phy[i]);
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+		if (ret) {
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+			phy_exit(pcie->phy[i]);
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+			return ret;
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+		}
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+	}
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+
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+	return 0;
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+}
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+
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+static int armada8k_pcie_setup_phys(struct armada8k_pcie *pcie)
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+{
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+	struct dw_pcie *pci = pcie->pci;
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+	struct device *dev = pci->dev;
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+	struct device_node *node = dev->of_node;
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+	int ret = 0;
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+	int i;
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+
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+	for (i = 0; i < ARMADA8K_PCIE_MAX_LANES; i++) {
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+		pcie->phy[i] = devm_of_phy_get_by_index(dev, node, i);
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+		if (IS_ERR(pcie->phy[i])) {
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+			if (PTR_ERR(pcie->phy[i]) != -ENODEV)
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+				return PTR_ERR(pcie->phy[i]);
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+
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+			pcie->phy[i] = NULL;
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+			continue;
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+		}
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+
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+		pcie->phy_count++;
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+	}
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+
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+	/* Old bindings miss the PHY handle, so just warn if there is no PHY */
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+	if (!pcie->phy_count)
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+		dev_warn(dev, "No available PHY\n");
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+
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+	ret = armada8k_pcie_enable_phys(pcie);
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+	if (ret)
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+		dev_err(dev, "Failed to initialize PHY(s) (%d)\n", ret);
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+
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+	return ret;
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+}
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142
 
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 static int armada8k_pcie_link_up(struct dw_pcie *pci)
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 {
..
..
@@ -175,10 +248,8 @@
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 	pp->ops = &armada8k_pcie_host_ops;
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249
 
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 	pp->irq = platform_get_irq(pdev, 0);
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-	if (pp->irq < 0) {
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-		dev_err(dev, "failed to get irq for port\n");
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+	if (pp->irq < 0)
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 		return pp->irq;
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-	}
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253
 
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 	ret = devm_request_irq(dev, pp->irq, armada8k_pcie_irq_handler,
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 			       IRQF_SHARED, "armada8k-pcie", pcie);
..
..
@@ -244,19 +315,24 @@
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 	base = platform_get_resource_byname(pdev, IORESOURCE_MEM, "ctrl");
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 	pci->dbi_base = devm_pci_remap_cfg_resource(dev, base);
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 	if (IS_ERR(pci->dbi_base)) {
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-		dev_err(dev, "couldn't remap regs base %p\n", base);
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 		ret = PTR_ERR(pci->dbi_base);
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 		goto fail_clkreg;
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 	}
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+
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+	ret = armada8k_pcie_setup_phys(pcie);
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+	if (ret)
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+		goto fail_clkreg;
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325
 
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 	platform_set_drvdata(pdev, pcie);
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 	ret = armada8k_add_pcie_port(pcie, pdev);
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 	if (ret)
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-		goto fail_clkreg;
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+		goto disable_phy;
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331
 
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 	return 0;
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333
 
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+disable_phy:
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+	armada8k_pcie_disable_phys(pcie);
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 fail_clkreg:
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 	clk_disable_unprepare(pcie->clk_reg);
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 fail: