enable tun/tap/iptables

hc

2024-05-10 ee930fffee469d076998274a2ca55e13dc1efb67

 kernel/drivers/net/ethernet/intel/i40e/i40e_diag.c
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@@ -44,7 +44,7 @@
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 	return 0;
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 }
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-struct i40e_diag_reg_test_info i40e_reg_list[] = {
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+const struct i40e_diag_reg_test_info i40e_reg_list[] = {
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 	/* offset               mask         elements   stride */
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 	{I40E_QTX_CTL(0),       0x0000FFBF, 1,
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 		I40E_QTX_CTL(1) - I40E_QTX_CTL(0)},
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@@ -78,27 +78,28 @@
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 {
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 	i40e_status ret_code = 0;
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 	u32 reg, mask;
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+	u32 elements;
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 	u32 i, j;
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 	for (i = 0; i40e_reg_list[i].offset != 0 &&
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 					     !ret_code; i++) {
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+		elements = i40e_reg_list[i].elements;
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 		/* set actual reg range for dynamically allocated resources */
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 		if (i40e_reg_list[i].offset == I40E_QTX_CTL(0) &&
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 		    hw->func_caps.num_tx_qp != 0)
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-			i40e_reg_list[i].elements = hw->func_caps.num_tx_qp;
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+			elements = hw->func_caps.num_tx_qp;
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 		if ((i40e_reg_list[i].offset == I40E_PFINT_ITRN(0, 0) ||
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 		     i40e_reg_list[i].offset == I40E_PFINT_ITRN(1, 0) ||
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 		     i40e_reg_list[i].offset == I40E_PFINT_ITRN(2, 0) ||
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 		     i40e_reg_list[i].offset == I40E_QINT_TQCTL(0) ||
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 		     i40e_reg_list[i].offset == I40E_QINT_RQCTL(0)) &&
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 		    hw->func_caps.num_msix_vectors != 0)
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-			i40e_reg_list[i].elements =
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-				hw->func_caps.num_msix_vectors - 1;
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+			elements = hw->func_caps.num_msix_vectors - 1;
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 		/* test register access */
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 		mask = i40e_reg_list[i].mask;
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-		for (j = 0; j < i40e_reg_list[i].elements && !ret_code; j++) {
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+		for (j = 0; j < elements && !ret_code; j++) {
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 			reg = i40e_reg_list[i].offset +
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 			      (j * i40e_reg_list[i].stride);
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 			ret_code = i40e_diag_reg_pattern_test(hw, reg, mask);