enable tun/tap/iptables

hc

2024-05-10 ee930fffee469d076998274a2ca55e13dc1efb67

 kernel/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/priv.h
..
..
@@ -1,4 +1,4 @@
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-/* SPDX-License-Identifier: GPL-2.0 */
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+/* SPDX-License-Identifier: MIT */
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 #ifndef __NVKM_MMU_PRIV_H__
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 #define __NVKM_MMU_PRIV_H__
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 #define nvkm_mmu(p) container_of((p), struct nvkm_mmu, subdev)
..
..
@@ -28,24 +28,24 @@
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 	struct {
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 		struct nvkm_sclass user;
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-		int (*ctor)(struct nvkm_mmu *, u64 addr, u64 size,
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+		int (*ctor)(struct nvkm_mmu *, bool managed, u64 addr, u64 size,
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 			    void *argv, u32 argc, struct lock_class_key *,
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 			    const char *name, struct nvkm_vmm **);
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 		bool global;
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 		u32 pd_offset;
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 	} vmm;
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-	const u8 *(*kind)(struct nvkm_mmu *, int *count);
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+	const u8 *(*kind)(struct nvkm_mmu *, int *count, u8 *invalid);
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 	bool kind_sys;
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 };
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 extern const struct nvkm_mmu_func nv04_mmu;
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-const u8 *nv50_mmu_kind(struct nvkm_mmu *, int *count);
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+const u8 *nv50_mmu_kind(struct nvkm_mmu *, int *count, u8 *invalid);
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-const u8 *gf100_mmu_kind(struct nvkm_mmu *, int *count);
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+const u8 *gf100_mmu_kind(struct nvkm_mmu *, int *count, u8 *invalid);
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-const u8 *gm200_mmu_kind(struct nvkm_mmu *, int *);
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+const u8 *gm200_mmu_kind(struct nvkm_mmu *, int *, u8 *);
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 struct nvkm_mmu_pt {
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 	union {