hc
2024-05-10 ee930fffee469d076998274a2ca55e13dc1efb67
kernel/drivers/dma/fsldma.c
....@@ -1,3 +1,4 @@
1
+// SPDX-License-Identifier: GPL-2.0-or-later
12 /*
23 * Freescale MPC85xx, MPC83xx DMA Engine support
34 *
....@@ -16,12 +17,6 @@
1617 * command for PCI read operations, instead of using the default PCI Read Line
1718 * command. Please be aware that this setting may result in read pre-fetching
1819 * on some platforms.
19
- *
20
- * This is free software; you can redistribute it and/or modify
21
- * it under the terms of the GNU General Public License as published by
22
- * the Free Software Foundation; either version 2 of the License, or
23
- * (at your option) any later version.
24
- *
2520 */
2621
2722 #include <linux/init.h>
....@@ -53,42 +48,42 @@
5348
5449 static void set_sr(struct fsldma_chan *chan, u32 val)
5550 {
56
- DMA_OUT(chan, &chan->regs->sr, val, 32);
51
+ FSL_DMA_OUT(chan, &chan->regs->sr, val, 32);
5752 }
5853
5954 static u32 get_sr(struct fsldma_chan *chan)
6055 {
61
- return DMA_IN(chan, &chan->regs->sr, 32);
56
+ return FSL_DMA_IN(chan, &chan->regs->sr, 32);
6257 }
6358
6459 static void set_mr(struct fsldma_chan *chan, u32 val)
6560 {
66
- DMA_OUT(chan, &chan->regs->mr, val, 32);
61
+ FSL_DMA_OUT(chan, &chan->regs->mr, val, 32);
6762 }
6863
6964 static u32 get_mr(struct fsldma_chan *chan)
7065 {
71
- return DMA_IN(chan, &chan->regs->mr, 32);
66
+ return FSL_DMA_IN(chan, &chan->regs->mr, 32);
7267 }
7368
7469 static void set_cdar(struct fsldma_chan *chan, dma_addr_t addr)
7570 {
76
- DMA_OUT(chan, &chan->regs->cdar, addr | FSL_DMA_SNEN, 64);
71
+ FSL_DMA_OUT(chan, &chan->regs->cdar, addr | FSL_DMA_SNEN, 64);
7772 }
7873
7974 static dma_addr_t get_cdar(struct fsldma_chan *chan)
8075 {
81
- return DMA_IN(chan, &chan->regs->cdar, 64) & ~FSL_DMA_SNEN;
76
+ return FSL_DMA_IN(chan, &chan->regs->cdar, 64) & ~FSL_DMA_SNEN;
8277 }
8378
8479 static void set_bcr(struct fsldma_chan *chan, u32 val)
8580 {
86
- DMA_OUT(chan, &chan->regs->bcr, val, 32);
81
+ FSL_DMA_OUT(chan, &chan->regs->bcr, val, 32);
8782 }
8883
8984 static u32 get_bcr(struct fsldma_chan *chan)
9085 {
91
- return DMA_IN(chan, &chan->regs->bcr, 32);
86
+ return FSL_DMA_IN(chan, &chan->regs->bcr, 32);
9287 }
9388
9489 /*
....@@ -981,13 +976,13 @@
981976 return IRQ_HANDLED;
982977 }
983978
984
-static void dma_do_tasklet(unsigned long data)
979
+static void dma_do_tasklet(struct tasklet_struct *t)
985980 {
986
- struct fsldma_chan *chan = (struct fsldma_chan *)data;
981
+ struct fsldma_chan *chan = from_tasklet(chan, t, tasklet);
987982
988983 chan_dbg(chan, "tasklet entry\n");
989984
990
- spin_lock_bh(&chan->desc_lock);
985
+ spin_lock(&chan->desc_lock);
991986
992987 /* the hardware is now idle and ready for more */
993988 chan->idle = true;
....@@ -995,7 +990,7 @@
995990 /* Run all cleanup for descriptors which have been completed */
996991 fsldma_cleanup_descriptors(chan);
997992
998
- spin_unlock_bh(&chan->desc_lock);
993
+ spin_unlock(&chan->desc_lock);
999994
1000995 chan_dbg(chan, "tasklet exit\n");
1001996 }
....@@ -1156,7 +1151,7 @@
11561151 }
11571152
11581153 fdev->chan[chan->id] = chan;
1159
- tasklet_init(&chan->tasklet, dma_do_tasklet, (unsigned long)chan);
1154
+ tasklet_setup(&chan->tasklet, dma_do_tasklet);
11601155 snprintf(chan->name, sizeof(chan->name), "chan%d", chan->id);
11611156
11621157 /* Initialize the channel */
....@@ -1168,6 +1163,7 @@
11681163 switch (chan->feature & FSL_DMA_IP_MASK) {
11691164 case FSL_DMA_IP_85XX:
11701165 chan->toggle_ext_pause = fsl_chan_toggle_ext_pause;
1166
+ fallthrough;
11711167 case FSL_DMA_IP_83XX:
11721168 chan->toggle_ext_start = fsl_chan_toggle_ext_start;
11731169 chan->set_src_loop_size = fsl_chan_set_src_loop_size;