| .. | .. | 
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|  | 1 | +// SPDX-License-Identifier: GPL-2.0-or-later | 
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| 1 | 2 | /* | 
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| 2 | 3 | * Generic implementation of 64-bit atomics using spinlocks, | 
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| 3 | 4 | * useful on processors that don't have 64-bit atomic instructions. | 
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| 4 | 5 | * | 
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| 5 | 6 | * Copyright © 2009 Paul Mackerras, IBM Corp. <paulus@au1.ibm.com> | 
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| 6 |  | - * | 
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| 7 |  | - * This program is free software; you can redistribute it and/or | 
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| 8 |  | - * modify it under the terms of the GNU General Public License | 
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| 9 |  | - * as published by the Free Software Foundation; either version | 
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| 10 |  | - * 2 of the License, or (at your option) any later version. | 
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| 11 | 7 | */ | 
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| 12 | 8 | #include <linux/types.h> | 
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| 13 | 9 | #include <linux/cache.h> | 
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| .. | .. | 
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| 46 | 42 | return &atomic64_lock[addr & (NR_LOCKS - 1)].lock; | 
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| 47 | 43 | } | 
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| 48 | 44 |  | 
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| 49 |  | -long long atomic64_read(const atomic64_t *v) | 
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|  | 45 | +s64 atomic64_read(const atomic64_t *v) | 
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| 50 | 46 | { | 
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| 51 | 47 | unsigned long flags; | 
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| 52 | 48 | raw_spinlock_t *lock = lock_addr(v); | 
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| 53 |  | -	long long val; | 
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|  | 49 | +	s64 val; | 
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| 54 | 50 |  | 
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| 55 | 51 | raw_spin_lock_irqsave(lock, flags); | 
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| 56 | 52 | val = v->counter; | 
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| .. | .. | 
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| 59 | 55 | } | 
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| 60 | 56 | EXPORT_SYMBOL(atomic64_read); | 
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| 61 | 57 |  | 
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| 62 |  | -void atomic64_set(atomic64_t *v, long long i) | 
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|  | 58 | +void atomic64_set(atomic64_t *v, s64 i) | 
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| 63 | 59 | { | 
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| 64 | 60 | unsigned long flags; | 
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| 65 | 61 | raw_spinlock_t *lock = lock_addr(v); | 
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| .. | .. | 
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| 71 | 67 | EXPORT_SYMBOL(atomic64_set); | 
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| 72 | 68 |  | 
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| 73 | 69 | #define ATOMIC64_OP(op, c_op)						\ | 
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| 74 |  | -void atomic64_##op(long long a, atomic64_t *v)				\ | 
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|  | 70 | +void atomic64_##op(s64 a, atomic64_t *v)				\ | 
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| 75 | 71 | {									\ | 
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| 76 | 72 | unsigned long flags;						\ | 
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| 77 | 73 | raw_spinlock_t *lock = lock_addr(v);				\ | 
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| .. | .. | 
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| 83 | 79 | EXPORT_SYMBOL(atomic64_##op); | 
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| 84 | 80 |  | 
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| 85 | 81 | #define ATOMIC64_OP_RETURN(op, c_op)					\ | 
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| 86 |  | -long long atomic64_##op##_return(long long a, atomic64_t *v)		\ | 
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|  | 82 | +s64 atomic64_##op##_return(s64 a, atomic64_t *v)			\ | 
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| 87 | 83 | {									\ | 
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| 88 | 84 | unsigned long flags;						\ | 
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| 89 | 85 | raw_spinlock_t *lock = lock_addr(v);				\ | 
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| 90 |  | -	long long val;							\ | 
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|  | 86 | +	s64 val;							\ | 
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| 91 | 87 | \ | 
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| 92 | 88 | raw_spin_lock_irqsave(lock, flags);				\ | 
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| 93 | 89 | val = (v->counter c_op a);					\ | 
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| .. | .. | 
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| 97 | 93 | EXPORT_SYMBOL(atomic64_##op##_return); | 
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| 98 | 94 |  | 
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| 99 | 95 | #define ATOMIC64_FETCH_OP(op, c_op)					\ | 
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| 100 |  | -long long atomic64_fetch_##op(long long a, atomic64_t *v)		\ | 
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|  | 96 | +s64 atomic64_fetch_##op(s64 a, atomic64_t *v)				\ | 
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| 101 | 97 | {									\ | 
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| 102 | 98 | unsigned long flags;						\ | 
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| 103 | 99 | raw_spinlock_t *lock = lock_addr(v);				\ | 
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| 104 |  | -	long long val;							\ | 
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|  | 100 | +	s64 val;							\ | 
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| 105 | 101 | \ | 
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| 106 | 102 | raw_spin_lock_irqsave(lock, flags);				\ | 
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| 107 | 103 | val = v->counter;						\ | 
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| .. | .. | 
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| 134 | 130 | #undef ATOMIC64_OP_RETURN | 
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| 135 | 131 | #undef ATOMIC64_OP | 
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| 136 | 132 |  | 
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| 137 |  | -long long atomic64_dec_if_positive(atomic64_t *v) | 
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|  | 133 | +s64 atomic64_dec_if_positive(atomic64_t *v) | 
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| 138 | 134 | { | 
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| 139 | 135 | unsigned long flags; | 
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| 140 | 136 | raw_spinlock_t *lock = lock_addr(v); | 
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| 141 |  | -	long long val; | 
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|  | 137 | +	s64 val; | 
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| 142 | 138 |  | 
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| 143 | 139 | raw_spin_lock_irqsave(lock, flags); | 
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| 144 | 140 | val = v->counter - 1; | 
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| .. | .. | 
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| 149 | 145 | } | 
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| 150 | 146 | EXPORT_SYMBOL(atomic64_dec_if_positive); | 
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| 151 | 147 |  | 
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| 152 |  | -long long atomic64_cmpxchg(atomic64_t *v, long long o, long long n) | 
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|  | 148 | +s64 atomic64_cmpxchg(atomic64_t *v, s64 o, s64 n) | 
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| 153 | 149 | { | 
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| 154 | 150 | unsigned long flags; | 
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| 155 | 151 | raw_spinlock_t *lock = lock_addr(v); | 
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| 156 |  | -	long long val; | 
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|  | 152 | +	s64 val; | 
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| 157 | 153 |  | 
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| 158 | 154 | raw_spin_lock_irqsave(lock, flags); | 
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| 159 | 155 | val = v->counter; | 
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| .. | .. | 
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| 164 | 160 | } | 
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| 165 | 161 | EXPORT_SYMBOL(atomic64_cmpxchg); | 
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| 166 | 162 |  | 
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| 167 |  | -long long atomic64_xchg(atomic64_t *v, long long new) | 
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|  | 163 | +s64 atomic64_xchg(atomic64_t *v, s64 new) | 
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| 168 | 164 | { | 
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| 169 | 165 | unsigned long flags; | 
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| 170 | 166 | raw_spinlock_t *lock = lock_addr(v); | 
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| 171 |  | -	long long val; | 
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|  | 167 | +	s64 val; | 
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| 172 | 168 |  | 
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| 173 | 169 | raw_spin_lock_irqsave(lock, flags); | 
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| 174 | 170 | val = v->counter; | 
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| .. | .. | 
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| 178 | 174 | } | 
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| 179 | 175 | EXPORT_SYMBOL(atomic64_xchg); | 
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| 180 | 176 |  | 
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| 181 |  | -long long atomic64_fetch_add_unless(atomic64_t *v, long long a, long long u) | 
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|  | 177 | +s64 atomic64_fetch_add_unless(atomic64_t *v, s64 a, s64 u) | 
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| 182 | 178 | { | 
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| 183 | 179 | unsigned long flags; | 
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| 184 | 180 | raw_spinlock_t *lock = lock_addr(v); | 
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| 185 |  | -	long long val; | 
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|  | 181 | +	s64 val; | 
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| 186 | 182 |  | 
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| 187 | 183 | raw_spin_lock_irqsave(lock, flags); | 
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| 188 | 184 | val = v->counter; | 
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