| .. | .. |
|---|
| 66 | 66 | #define ACM_NR 16 |
|---|
| 67 | 67 | |
|---|
| 68 | 68 | struct acm_wb { |
|---|
| 69 | | - unsigned char *buf; |
|---|
| 69 | + u8 *buf; |
|---|
| 70 | 70 | dma_addr_t dmah; |
|---|
| 71 | | - int len; |
|---|
| 72 | | - int use; |
|---|
| 71 | + unsigned int len; |
|---|
| 73 | 72 | struct urb *urb; |
|---|
| 74 | 73 | struct acm *instance; |
|---|
| 74 | + bool use; |
|---|
| 75 | 75 | }; |
|---|
| 76 | 76 | |
|---|
| 77 | 77 | struct acm_rb { |
|---|
| .. | .. |
|---|
| 110 | 110 | unsigned long flags; |
|---|
| 111 | 111 | # define EVENT_TTY_WAKEUP 0 |
|---|
| 112 | 112 | # define EVENT_RX_STALL 1 |
|---|
| 113 | +# define ACM_THROTTLED 2 |
|---|
| 113 | 114 | # define ACM_ERROR_DELAY 3 |
|---|
| 114 | 115 | unsigned long urbs_in_error_delay; /* these need to be restarted after a delay */ |
|---|
| 115 | 116 | struct usb_cdc_line_coding line; /* bits, stop, parity */ |
|---|
| .. | .. |
|---|
| 126 | 127 | unsigned int ctrl_caps; /* control capabilities from the class specific header */ |
|---|
| 127 | 128 | unsigned int susp_count; /* number of suspended interfaces */ |
|---|
| 128 | 129 | unsigned int combined_interfaces:1; /* control and data collapsed */ |
|---|
| 129 | | - unsigned int throttled:1; /* actually throttled */ |
|---|
| 130 | | - unsigned int throttle_req:1; /* throttle requested */ |
|---|
| 131 | 130 | u8 bInterval; |
|---|
| 132 | 131 | struct usb_anchor delayed; /* writes queued for a device about to be woken */ |
|---|
| 133 | 132 | unsigned long quirks; |
|---|
| 134 | 133 | }; |
|---|
| 135 | 134 | |
|---|
| 136 | | -#define CDC_DATA_INTERFACE_TYPE 0x0a |
|---|
| 137 | | - |
|---|
| 138 | 135 | /* constants describing various quirks and errors */ |
|---|
| 139 | 136 | #define NO_UNION_NORMAL BIT(0) |
|---|
| 140 | 137 | #define SINGLE_RX_URB BIT(1) |
|---|
| 141 | 138 | #define NO_CAP_LINE BIT(2) |
|---|
| 142 | | -#define NO_DATA_INTERFACE BIT(4) |
|---|
| 143 | | -#define IGNORE_DEVICE BIT(5) |
|---|
| 144 | | -#define QUIRK_CONTROL_LINE_STATE BIT(6) |
|---|
| 145 | | -#define CLEAR_HALT_CONDITIONS BIT(7) |
|---|
| 146 | | -#define SEND_ZERO_PACKET BIT(8) |
|---|
| 147 | | -#define DISABLE_ECHO BIT(9) |
|---|
| 139 | +#define IGNORE_DEVICE BIT(3) |
|---|
| 140 | +#define QUIRK_CONTROL_LINE_STATE BIT(4) |
|---|
| 141 | +#define CLEAR_HALT_CONDITIONS BIT(5) |
|---|
| 142 | +#define SEND_ZERO_PACKET BIT(6) |
|---|
| 143 | +#define DISABLE_ECHO BIT(7) |
|---|