| .. | .. |
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| 15 | 15 | * Modified to support SH7300 SCIF. Takashi Kusuda (Jun 2003). |
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| 16 | 16 | * Removed SH7300 support (Jul 2007). |
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| 17 | 17 | */ |
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| 18 | | -#if defined(CONFIG_SERIAL_SH_SCI_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) |
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| 19 | | -#define SUPPORT_SYSRQ |
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| 20 | | -#endif |
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| 21 | | - |
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| 22 | 18 | #undef DEBUG |
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| 23 | 19 | |
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| 24 | 20 | #include <linux/clk.h> |
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| .. | .. |
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| 35 | 31 | #include <linux/ioport.h> |
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| 36 | 32 | #include <linux/ktime.h> |
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| 37 | 33 | #include <linux/major.h> |
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| 34 | +#include <linux/minmax.h> |
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| 38 | 35 | #include <linux/module.h> |
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| 39 | 36 | #include <linux/mm.h> |
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| 40 | 37 | #include <linux/of.h> |
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| .. | .. |
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| 54 | 51 | |
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| 55 | 52 | #ifdef CONFIG_SUPERH |
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| 56 | 53 | #include <asm/sh_bios.h> |
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| 54 | +#include <asm/platform_early.h> |
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| 57 | 55 | #endif |
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| 58 | 56 | |
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| 59 | 57 | #include "serial_mctrl_gpio.h" |
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| .. | .. |
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| 1107 | 1105 | scif_set_rtrg(port, 1); |
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| 1108 | 1106 | } |
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| 1109 | 1107 | |
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| 1110 | | -static ssize_t rx_trigger_show(struct device *dev, |
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| 1111 | | - struct device_attribute *attr, |
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| 1112 | | - char *buf) |
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| 1108 | +static ssize_t rx_fifo_trigger_show(struct device *dev, |
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| 1109 | + struct device_attribute *attr, char *buf) |
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| 1113 | 1110 | { |
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| 1114 | 1111 | struct uart_port *port = dev_get_drvdata(dev); |
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| 1115 | 1112 | struct sci_port *sci = to_sci_port(port); |
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| .. | .. |
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| 1117 | 1114 | return sprintf(buf, "%d\n", sci->rx_trigger); |
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| 1118 | 1115 | } |
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| 1119 | 1116 | |
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| 1120 | | -static ssize_t rx_trigger_store(struct device *dev, |
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| 1121 | | - struct device_attribute *attr, |
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| 1122 | | - const char *buf, |
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| 1123 | | - size_t count) |
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| 1117 | +static ssize_t rx_fifo_trigger_store(struct device *dev, |
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| 1118 | + struct device_attribute *attr, |
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| 1119 | + const char *buf, size_t count) |
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| 1124 | 1120 | { |
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| 1125 | 1121 | struct uart_port *port = dev_get_drvdata(dev); |
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| 1126 | 1122 | struct sci_port *sci = to_sci_port(port); |
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| .. | .. |
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| 1138 | 1134 | return count; |
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| 1139 | 1135 | } |
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| 1140 | 1136 | |
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| 1141 | | -static DEVICE_ATTR(rx_fifo_trigger, 0644, rx_trigger_show, rx_trigger_store); |
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| 1137 | +static DEVICE_ATTR_RW(rx_fifo_trigger); |
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| 1142 | 1138 | |
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| 1143 | 1139 | static ssize_t rx_fifo_timeout_show(struct device *dev, |
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| 1144 | 1140 | struct device_attribute *attr, |
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| .. | .. |
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| 1248 | 1244 | return -1; |
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| 1249 | 1245 | } |
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| 1250 | 1246 | |
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| 1251 | | -static void sci_rx_dma_release(struct sci_port *s) |
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| 1247 | +static void sci_dma_rx_chan_invalidate(struct sci_port *s) |
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| 1248 | +{ |
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| 1249 | + unsigned int i; |
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| 1250 | + |
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| 1251 | + s->chan_rx = NULL; |
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| 1252 | + for (i = 0; i < ARRAY_SIZE(s->cookie_rx); i++) |
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| 1253 | + s->cookie_rx[i] = -EINVAL; |
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| 1254 | + s->active_rx = 0; |
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| 1255 | +} |
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| 1256 | + |
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| 1257 | +static void sci_dma_rx_release(struct sci_port *s) |
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| 1252 | 1258 | { |
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| 1253 | 1259 | struct dma_chan *chan = s->chan_rx_saved; |
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| 1254 | 1260 | |
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| 1255 | | - s->chan_rx_saved = s->chan_rx = NULL; |
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| 1256 | | - s->cookie_rx[0] = s->cookie_rx[1] = -EINVAL; |
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| 1261 | + s->chan_rx_saved = NULL; |
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| 1262 | + sci_dma_rx_chan_invalidate(s); |
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| 1257 | 1263 | dmaengine_terminate_sync(chan); |
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| 1258 | 1264 | dma_free_coherent(chan->device->dev, s->buf_len_rx * 2, s->rx_buf[0], |
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| 1259 | 1265 | sg_dma_address(&s->sg_rx[0])); |
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| .. | .. |
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| 1267 | 1273 | ktime_t t = ktime_set(sec, nsec); |
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| 1268 | 1274 | |
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| 1269 | 1275 | hrtimer_start(hrt, t, HRTIMER_MODE_REL); |
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| 1276 | +} |
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| 1277 | + |
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| 1278 | +static void sci_dma_rx_reenable_irq(struct sci_port *s) |
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| 1279 | +{ |
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| 1280 | + struct uart_port *port = &s->port; |
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| 1281 | + u16 scr; |
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| 1282 | + |
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| 1283 | + /* Direct new serial port interrupts back to CPU */ |
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| 1284 | + scr = serial_port_in(port, SCSCR); |
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| 1285 | + if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) { |
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| 1286 | + scr &= ~SCSCR_RDRQE; |
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| 1287 | + enable_irq(s->irqs[SCIx_RXI_IRQ]); |
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| 1288 | + } |
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| 1289 | + serial_port_out(port, SCSCR, scr | SCSCR_RIE); |
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| 1270 | 1290 | } |
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| 1271 | 1291 | |
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| 1272 | 1292 | static void sci_dma_rx_complete(void *arg) |
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| .. | .. |
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| 1318 | 1338 | dev_warn(port->dev, "Failed submitting Rx DMA descriptor\n"); |
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| 1319 | 1339 | /* Switch to PIO */ |
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| 1320 | 1340 | spin_lock_irqsave(&port->lock, flags); |
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| 1321 | | - s->chan_rx = NULL; |
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| 1322 | | - sci_start_rx(port); |
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| 1341 | + dmaengine_terminate_async(chan); |
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| 1342 | + sci_dma_rx_chan_invalidate(s); |
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| 1343 | + sci_dma_rx_reenable_irq(s); |
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| 1323 | 1344 | spin_unlock_irqrestore(&port->lock, flags); |
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| 1324 | 1345 | } |
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| 1325 | 1346 | |
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| 1326 | | -static void sci_tx_dma_release(struct sci_port *s) |
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| 1347 | +static void sci_dma_tx_release(struct sci_port *s) |
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| 1327 | 1348 | { |
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| 1328 | 1349 | struct dma_chan *chan = s->chan_tx_saved; |
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| 1329 | 1350 | |
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| .. | .. |
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| 1336 | 1357 | dma_release_channel(chan); |
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| 1337 | 1358 | } |
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| 1338 | 1359 | |
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| 1339 | | -static int sci_submit_rx(struct sci_port *s, bool port_lock_held) |
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| 1360 | +static int sci_dma_rx_submit(struct sci_port *s, bool port_lock_held) |
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| 1340 | 1361 | { |
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| 1341 | 1362 | struct dma_chan *chan = s->chan_rx; |
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| 1342 | 1363 | struct uart_port *port = &s->port; |
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| .. | .. |
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| 1372 | 1393 | spin_lock_irqsave(&port->lock, flags); |
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| 1373 | 1394 | if (i) |
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| 1374 | 1395 | dmaengine_terminate_async(chan); |
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| 1375 | | - for (i = 0; i < 2; i++) |
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| 1376 | | - s->cookie_rx[i] = -EINVAL; |
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| 1377 | | - s->active_rx = 0; |
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| 1378 | | - s->chan_rx = NULL; |
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| 1396 | + sci_dma_rx_chan_invalidate(s); |
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| 1379 | 1397 | sci_start_rx(port); |
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| 1380 | 1398 | if (!port_lock_held) |
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| 1381 | 1399 | spin_unlock_irqrestore(&port->lock, flags); |
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| 1382 | 1400 | return -EAGAIN; |
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| 1383 | 1401 | } |
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| 1384 | 1402 | |
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| 1385 | | -static void work_fn_tx(struct work_struct *work) |
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| 1403 | +static void sci_dma_tx_work_fn(struct work_struct *work) |
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| 1386 | 1404 | { |
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| 1387 | 1405 | struct sci_port *s = container_of(work, struct sci_port, work_tx); |
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| 1388 | 1406 | struct dma_async_tx_descriptor *desc; |
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| .. | .. |
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| 1449 | 1467 | return; |
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| 1450 | 1468 | } |
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| 1451 | 1469 | |
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| 1452 | | -static enum hrtimer_restart rx_timer_fn(struct hrtimer *t) |
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| 1470 | +static enum hrtimer_restart sci_dma_rx_timer_fn(struct hrtimer *t) |
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| 1453 | 1471 | { |
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| 1454 | 1472 | struct sci_port *s = container_of(t, struct sci_port, rx_timer); |
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| 1455 | 1473 | struct dma_chan *chan = s->chan_rx; |
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| .. | .. |
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| 1459 | 1477 | unsigned long flags; |
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| 1460 | 1478 | unsigned int read; |
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| 1461 | 1479 | int active, count; |
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| 1462 | | - u16 scr; |
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| 1463 | 1480 | |
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| 1464 | 1481 | dev_dbg(port->dev, "DMA Rx timed out\n"); |
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| 1465 | 1482 | |
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| .. | .. |
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| 1507 | 1524 | } |
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| 1508 | 1525 | |
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| 1509 | 1526 | if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) |
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| 1510 | | - sci_submit_rx(s, true); |
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| 1527 | + sci_dma_rx_submit(s, true); |
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| 1511 | 1528 | |
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| 1512 | | - /* Direct new serial port interrupts back to CPU */ |
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| 1513 | | - scr = serial_port_in(port, SCSCR); |
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| 1514 | | - if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) { |
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| 1515 | | - scr &= ~SCSCR_RDRQE; |
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| 1516 | | - enable_irq(s->irqs[SCIx_RXI_IRQ]); |
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| 1517 | | - } |
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| 1518 | | - serial_port_out(port, SCSCR, scr | SCSCR_RIE); |
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| 1529 | + sci_dma_rx_reenable_irq(s); |
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| 1519 | 1530 | |
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| 1520 | 1531 | spin_unlock_irqrestore(&port->lock, flags); |
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| 1521 | 1532 | |
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| .. | .. |
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| 1532 | 1543 | chan = dma_request_slave_channel(port->dev, |
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| 1533 | 1544 | dir == DMA_MEM_TO_DEV ? "tx" : "rx"); |
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| 1534 | 1545 | if (!chan) { |
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| 1535 | | - dev_warn(port->dev, "dma_request_slave_channel failed\n"); |
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| 1546 | + dev_dbg(port->dev, "dma_request_slave_channel failed\n"); |
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| 1536 | 1547 | return NULL; |
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| 1537 | 1548 | } |
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| 1538 | 1549 | |
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| .. | .. |
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| 1600 | 1611 | __func__, UART_XMIT_SIZE, |
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| 1601 | 1612 | port->state->xmit.buf, &s->tx_dma_addr); |
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| 1602 | 1613 | |
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| 1603 | | - INIT_WORK(&s->work_tx, work_fn_tx); |
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| 1614 | + INIT_WORK(&s->work_tx, sci_dma_tx_work_fn); |
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| 1604 | 1615 | s->chan_tx_saved = s->chan_tx = chan; |
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| 1605 | 1616 | } |
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| 1606 | 1617 | } |
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| .. | .. |
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| 1635 | 1646 | } |
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| 1636 | 1647 | |
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| 1637 | 1648 | hrtimer_init(&s->rx_timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL); |
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| 1638 | | - s->rx_timer.function = rx_timer_fn; |
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| 1649 | + s->rx_timer.function = sci_dma_rx_timer_fn; |
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| 1639 | 1650 | |
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| 1640 | 1651 | s->chan_rx_saved = s->chan_rx = chan; |
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| 1641 | 1652 | |
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| 1642 | 1653 | if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) |
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| 1643 | | - sci_submit_rx(s, false); |
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| 1654 | + sci_dma_rx_submit(s, false); |
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| 1644 | 1655 | } |
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| 1645 | 1656 | } |
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| 1646 | 1657 | |
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| .. | .. |
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| 1649 | 1660 | struct sci_port *s = to_sci_port(port); |
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| 1650 | 1661 | |
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| 1651 | 1662 | if (s->chan_tx_saved) |
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| 1652 | | - sci_tx_dma_release(s); |
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| 1663 | + sci_dma_tx_release(s); |
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| 1653 | 1664 | if (s->chan_rx_saved) |
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| 1654 | | - sci_rx_dma_release(s); |
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| 1665 | + sci_dma_rx_release(s); |
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| 1655 | 1666 | } |
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| 1656 | 1667 | |
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| 1657 | 1668 | static void sci_flush_buffer(struct uart_port *port) |
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| .. | .. |
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| 1696 | 1707 | disable_irq_nosync(irq); |
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| 1697 | 1708 | scr |= SCSCR_RDRQE; |
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| 1698 | 1709 | } else { |
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| 1699 | | - if (sci_submit_rx(s, false) < 0) |
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| 1710 | + if (sci_dma_rx_submit(s, false) < 0) |
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| 1700 | 1711 | goto handle_pio; |
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| 1701 | 1712 | |
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| 1702 | 1713 | scr &= ~SCSCR_RIE; |
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| .. | .. |
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| 1727 | 1738 | * of whether the I_IXOFF is set, otherwise, how is the interrupt |
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| 1728 | 1739 | * to be disabled? |
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| 1729 | 1740 | */ |
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| 1730 | | - sci_receive_chars(ptr); |
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| 1741 | + sci_receive_chars(port); |
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| 1731 | 1742 | |
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| 1732 | 1743 | return IRQ_HANDLED; |
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| 1733 | 1744 | } |
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| .. | .. |
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| 1787 | 1798 | } else { |
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| 1788 | 1799 | sci_handle_fifo_overrun(port); |
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| 1789 | 1800 | if (!s->chan_rx) |
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| 1790 | | - sci_receive_chars(ptr); |
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| 1801 | + sci_receive_chars(port); |
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| 1791 | 1802 | } |
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| 1792 | 1803 | |
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| 1793 | 1804 | sci_clear_SCxSR(port, SCxSR_ERROR_CLEAR(port)); |
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| .. | .. |
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| 2106 | 2117 | if (s->autorts) { |
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| 2107 | 2118 | if (sci_get_cts(port)) |
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| 2108 | 2119 | mctrl |= TIOCM_CTS; |
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| 2109 | | - } else if (IS_ERR_OR_NULL(mctrl_gpio_to_gpiod(gpios, UART_GPIO_CTS))) { |
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| 2120 | + } else if (!mctrl_gpio_to_gpiod(gpios, UART_GPIO_CTS)) { |
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| 2110 | 2121 | mctrl |= TIOCM_CTS; |
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| 2111 | 2122 | } |
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| 2112 | | - if (IS_ERR_OR_NULL(mctrl_gpio_to_gpiod(gpios, UART_GPIO_DSR))) |
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| 2123 | + if (!mctrl_gpio_to_gpiod(gpios, UART_GPIO_DSR)) |
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| 2113 | 2124 | mctrl |= TIOCM_DSR; |
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| 2114 | | - if (IS_ERR_OR_NULL(mctrl_gpio_to_gpiod(gpios, UART_GPIO_DCD))) |
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| 2125 | + if (!mctrl_gpio_to_gpiod(gpios, UART_GPIO_DCD)) |
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| 2115 | 2126 | mctrl |= TIOCM_CAR; |
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| 2116 | 2127 | |
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| 2117 | 2128 | return mctrl; |
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| .. | .. |
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| 2382 | 2393 | int best_clk = -1; |
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| 2383 | 2394 | unsigned long flags; |
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| 2384 | 2395 | |
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| 2385 | | - if ((termios->c_cflag & CSIZE) == CS7) |
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| 2396 | + if ((termios->c_cflag & CSIZE) == CS7) { |
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| 2386 | 2397 | smr_val |= SCSMR_CHR; |
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| 2398 | + } else { |
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| 2399 | + termios->c_cflag &= ~CSIZE; |
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| 2400 | + termios->c_cflag |= CS8; |
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| 2401 | + } |
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| 2387 | 2402 | if (termios->c_cflag & PARENB) |
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| 2388 | 2403 | smr_val |= SCSMR_PE; |
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| 2389 | 2404 | if (termios->c_cflag & PARODD) |
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| .. | .. |
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| 2686 | 2701 | return 0; |
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| 2687 | 2702 | |
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| 2688 | 2703 | if (port->dev->of_node || (port->flags & UPF_IOREMAP)) { |
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| 2689 | | - port->membase = ioremap_nocache(port->mapbase, sport->reg_size); |
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| 2704 | + port->membase = ioremap(port->mapbase, sport->reg_size); |
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| 2690 | 2705 | if (unlikely(!port->membase)) { |
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| 2691 | 2706 | dev_err(port->dev, "can't remap port#%d\n", port->line); |
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| 2692 | 2707 | return -ENXIO; |
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| .. | .. |
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| 2893 | 2908 | port->ops = &sci_uart_ops; |
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| 2894 | 2909 | port->iotype = UPIO_MEM; |
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| 2895 | 2910 | port->line = index; |
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| 2911 | + port->has_sysrq = IS_ENABLED(CONFIG_SERIAL_SH_SCI_CONSOLE); |
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| 2896 | 2912 | |
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| 2897 | 2913 | res = platform_get_resource(dev, IORESOURCE_MEM, 0); |
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| 2898 | 2914 | if (res == NULL) |
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| .. | .. |
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| 2901 | 2917 | port->mapbase = res->start; |
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| 2902 | 2918 | sci_port->reg_size = resource_size(res); |
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| 2903 | 2919 | |
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| 2904 | | - for (i = 0; i < ARRAY_SIZE(sci_port->irqs); ++i) |
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| 2905 | | - sci_port->irqs[i] = platform_get_irq(dev, i); |
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| 2920 | + for (i = 0; i < ARRAY_SIZE(sci_port->irqs); ++i) { |
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| 2921 | + if (i) |
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| 2922 | + sci_port->irqs[i] = platform_get_irq_optional(dev, i); |
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| 2923 | + else |
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| 2924 | + sci_port->irqs[i] = platform_get_irq(dev, i); |
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| 2925 | + } |
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| 2926 | + |
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| 2927 | + /* |
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| 2928 | + * The fourth interrupt on SCI port is transmit end interrupt, so |
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| 2929 | + * shuffle the interrupts. |
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| 2930 | + */ |
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| 2931 | + if (p->type == PORT_SCI) |
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| 2932 | + swap(sci_port->irqs[SCIx_BRI_IRQ], sci_port->irqs[SCIx_TEI_IRQ]); |
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| 2906 | 2933 | |
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| 2907 | 2934 | /* The SCI generates several interrupts. They can be muxed together or |
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| 2908 | 2935 | * connected to different interrupt lines. In the muxed case only one |
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| .. | .. |
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| 2969 | 2996 | port->flags = UPF_FIXED_PORT | UPF_BOOT_AUTOCONF | p->flags; |
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| 2970 | 2997 | port->fifosize = sci_port->params->fifosize; |
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| 2971 | 2998 | |
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| 2972 | | - if (port->type == PORT_SCI) { |
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| 2999 | + if (port->type == PORT_SCI && !dev->dev.of_node) { |
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| 2973 | 3000 | if (sci_port->reg_size >= 0x20) |
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| 2974 | 3001 | port->regshift = 2; |
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| 2975 | 3002 | else |
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| .. | .. |
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| 3017 | 3044 | unsigned long flags; |
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| 3018 | 3045 | int locked = 1; |
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| 3019 | 3046 | |
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| 3020 | | -#if defined(SUPPORT_SYSRQ) |
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| 3021 | 3047 | if (port->sysrq) |
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| 3022 | 3048 | locked = 0; |
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| 3023 | | - else |
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| 3024 | | -#endif |
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| 3025 | | - if (oops_in_progress) |
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| 3049 | + else if (oops_in_progress) |
|---|
| 3026 | 3050 | locked = spin_trylock_irqsave(&port->lock, flags); |
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| 3027 | 3051 | else |
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| 3028 | 3052 | spin_lock_irqsave(&port->lock, flags); |
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| .. | .. |
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| 3093 | 3117 | .data = &sci_uart_driver, |
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| 3094 | 3118 | }; |
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| 3095 | 3119 | |
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| 3120 | +#ifdef CONFIG_SUPERH |
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| 3096 | 3121 | static struct console early_serial_console = { |
|---|
| 3097 | 3122 | .name = "early_ttySC", |
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| 3098 | 3123 | .write = serial_console_write, |
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| .. | .. |
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| 3121 | 3146 | register_console(&early_serial_console); |
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| 3122 | 3147 | return 0; |
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| 3123 | 3148 | } |
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| 3149 | +#endif |
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| 3124 | 3150 | |
|---|
| 3125 | 3151 | #define SCI_CONSOLE (&serial_console) |
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| 3126 | 3152 | |
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| .. | .. |
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| 3157 | 3183 | |
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| 3158 | 3184 | sci_cleanup_single(port); |
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| 3159 | 3185 | |
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| 3160 | | - if (port->port.fifosize > 1) { |
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| 3161 | | - sysfs_remove_file(&dev->dev.kobj, |
|---|
| 3162 | | - &dev_attr_rx_fifo_trigger.attr); |
|---|
| 3163 | | - } |
|---|
| 3164 | | - if (type == PORT_SCIFA || type == PORT_SCIFB || type == PORT_HSCIF) { |
|---|
| 3165 | | - sysfs_remove_file(&dev->dev.kobj, |
|---|
| 3166 | | - &dev_attr_rx_fifo_timeout.attr); |
|---|
| 3167 | | - } |
|---|
| 3186 | + if (port->port.fifosize > 1) |
|---|
| 3187 | + device_remove_file(&dev->dev, &dev_attr_rx_fifo_trigger); |
|---|
| 3188 | + if (type == PORT_SCIFA || type == PORT_SCIFB || type == PORT_HSCIF) |
|---|
| 3189 | + device_remove_file(&dev->dev, &dev_attr_rx_fifo_timeout); |
|---|
| 3168 | 3190 | |
|---|
| 3169 | 3191 | return 0; |
|---|
| 3170 | 3192 | } |
|---|
| .. | .. |
|---|
| 3292 | 3314 | return ret; |
|---|
| 3293 | 3315 | |
|---|
| 3294 | 3316 | sciport->gpios = mctrl_gpio_init(&sciport->port, 0); |
|---|
| 3295 | | - if (IS_ERR(sciport->gpios) && PTR_ERR(sciport->gpios) != -ENOSYS) |
|---|
| 3317 | + if (IS_ERR(sciport->gpios)) |
|---|
| 3296 | 3318 | return PTR_ERR(sciport->gpios); |
|---|
| 3297 | 3319 | |
|---|
| 3298 | 3320 | if (sciport->has_rtscts) { |
|---|
| 3299 | | - if (!IS_ERR_OR_NULL(mctrl_gpio_to_gpiod(sciport->gpios, |
|---|
| 3300 | | - UART_GPIO_CTS)) || |
|---|
| 3301 | | - !IS_ERR_OR_NULL(mctrl_gpio_to_gpiod(sciport->gpios, |
|---|
| 3302 | | - UART_GPIO_RTS))) { |
|---|
| 3321 | + if (mctrl_gpio_to_gpiod(sciport->gpios, UART_GPIO_CTS) || |
|---|
| 3322 | + mctrl_gpio_to_gpiod(sciport->gpios, UART_GPIO_RTS)) { |
|---|
| 3303 | 3323 | dev_err(&dev->dev, "Conflicting RTS/CTS config\n"); |
|---|
| 3304 | 3324 | return -EINVAL; |
|---|
| 3305 | 3325 | } |
|---|
| .. | .. |
|---|
| 3327 | 3347 | * the special early probe. We don't have sufficient device state |
|---|
| 3328 | 3348 | * to make it beyond this yet. |
|---|
| 3329 | 3349 | */ |
|---|
| 3330 | | - if (is_early_platform_device(dev)) |
|---|
| 3350 | +#ifdef CONFIG_SUPERH |
|---|
| 3351 | + if (is_sh_early_platform_device(dev)) |
|---|
| 3331 | 3352 | return sci_probe_earlyprintk(dev); |
|---|
| 3353 | +#endif |
|---|
| 3332 | 3354 | |
|---|
| 3333 | 3355 | if (dev->dev.of_node) { |
|---|
| 3334 | 3356 | p = sci_parse_dt(dev, &dev_id); |
|---|
| .. | .. |
|---|
| 3352 | 3374 | return ret; |
|---|
| 3353 | 3375 | |
|---|
| 3354 | 3376 | if (sp->port.fifosize > 1) { |
|---|
| 3355 | | - ret = sysfs_create_file(&dev->dev.kobj, |
|---|
| 3356 | | - &dev_attr_rx_fifo_trigger.attr); |
|---|
| 3377 | + ret = device_create_file(&dev->dev, &dev_attr_rx_fifo_trigger); |
|---|
| 3357 | 3378 | if (ret) |
|---|
| 3358 | 3379 | return ret; |
|---|
| 3359 | 3380 | } |
|---|
| 3360 | 3381 | if (sp->port.type == PORT_SCIFA || sp->port.type == PORT_SCIFB || |
|---|
| 3361 | 3382 | sp->port.type == PORT_HSCIF) { |
|---|
| 3362 | | - ret = sysfs_create_file(&dev->dev.kobj, |
|---|
| 3363 | | - &dev_attr_rx_fifo_timeout.attr); |
|---|
| 3383 | + ret = device_create_file(&dev->dev, &dev_attr_rx_fifo_timeout); |
|---|
| 3364 | 3384 | if (ret) { |
|---|
| 3365 | 3385 | if (sp->port.fifosize > 1) { |
|---|
| 3366 | | - sysfs_remove_file(&dev->dev.kobj, |
|---|
| 3367 | | - &dev_attr_rx_fifo_trigger.attr); |
|---|
| 3386 | + device_remove_file(&dev->dev, |
|---|
| 3387 | + &dev_attr_rx_fifo_trigger); |
|---|
| 3368 | 3388 | } |
|---|
| 3369 | 3389 | return ret; |
|---|
| 3370 | 3390 | } |
|---|
| .. | .. |
|---|
| 3425 | 3445 | uart_unregister_driver(&sci_uart_driver); |
|---|
| 3426 | 3446 | } |
|---|
| 3427 | 3447 | |
|---|
| 3428 | | -#ifdef CONFIG_SERIAL_SH_SCI_CONSOLE |
|---|
| 3429 | | -early_platform_init_buffer("earlyprintk", &sci_driver, |
|---|
| 3448 | +#if defined(CONFIG_SUPERH) && defined(CONFIG_SERIAL_SH_SCI_CONSOLE) |
|---|
| 3449 | +sh_early_platform_init_buffer("earlyprintk", &sci_driver, |
|---|
| 3430 | 3450 | early_serial_buf, ARRAY_SIZE(early_serial_buf)); |
|---|
| 3431 | 3451 | #endif |
|---|
| 3432 | 3452 | #ifdef CONFIG_SERIAL_SH_SCI_EARLYCON |
|---|
| .. | .. |
|---|
| 3462 | 3482 | { |
|---|
| 3463 | 3483 | return early_console_setup(device, PORT_SCIF); |
|---|
| 3464 | 3484 | } |
|---|
| 3485 | +static int __init rzscifa_early_console_setup(struct earlycon_device *device, |
|---|
| 3486 | + const char *opt) |
|---|
| 3487 | +{ |
|---|
| 3488 | + port_cfg.regtype = SCIx_RZ_SCIFA_REGTYPE; |
|---|
| 3489 | + return early_console_setup(device, PORT_SCIF); |
|---|
| 3490 | +} |
|---|
| 3465 | 3491 | static int __init scifa_early_console_setup(struct earlycon_device *device, |
|---|
| 3466 | 3492 | const char *opt) |
|---|
| 3467 | 3493 | { |
|---|
| .. | .. |
|---|
| 3480 | 3506 | |
|---|
| 3481 | 3507 | OF_EARLYCON_DECLARE(sci, "renesas,sci", sci_early_console_setup); |
|---|
| 3482 | 3508 | OF_EARLYCON_DECLARE(scif, "renesas,scif", scif_early_console_setup); |
|---|
| 3509 | +OF_EARLYCON_DECLARE(scif, "renesas,scif-r7s9210", rzscifa_early_console_setup); |
|---|
| 3483 | 3510 | OF_EARLYCON_DECLARE(scifa, "renesas,scifa", scifa_early_console_setup); |
|---|
| 3484 | 3511 | OF_EARLYCON_DECLARE(scifb, "renesas,scifb", scifb_early_console_setup); |
|---|
| 3485 | 3512 | OF_EARLYCON_DECLARE(hscif, "renesas,hscif", hscif_early_console_setup); |
|---|