write in 30M

hc

2024-02-20 ea08eeccae9297f7aabd2ef7f0c2517ac4549acc

 kernel/drivers/s390/cio/qdio_main.c
..
..
@@ -31,38 +31,41 @@
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 MODULE_LICENSE("GPL");
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 static inline int do_siga_sync(unsigned long schid,
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-			       unsigned int out_mask, unsigned int in_mask,
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+			       unsigned long out_mask, unsigned long in_mask,
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 			       unsigned int fc)
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 {
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-	register unsigned long __fc asm ("0") = fc;
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-	register unsigned long __schid asm ("1") = schid;
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-	register unsigned long out asm ("2") = out_mask;
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-	register unsigned long in asm ("3") = in_mask;
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 	int cc;
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38
 
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 	asm volatile(
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+		"	lgr	0,%[fc]\n"
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+		"	lgr	1,%[schid]\n"
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+		"	lgr	2,%[out]\n"
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+		"	lgr	3,%[in]\n"
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 		"	siga	0\n"
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-		"	ipm	%0\n"
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-		"	srl	%0,28\n"
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-		: "=d" (cc)
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-		: "d" (__fc), "d" (__schid), "d" (out), "d" (in) : "cc");
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+		"	ipm	%[cc]\n"
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+		"	srl	%[cc],28\n"
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+		: [cc] "=&d" (cc)
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+		: [fc] "d" (fc), [schid] "d" (schid),
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+		  [out] "d" (out_mask), [in] "d" (in_mask)
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+		: "cc", "0", "1", "2", "3");
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 	return cc;
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 }
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-static inline int do_siga_input(unsigned long schid, unsigned int mask,
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-				unsigned int fc)
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+static inline int do_siga_input(unsigned long schid, unsigned long mask,
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+				unsigned long fc)
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 {
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-	register unsigned long __fc asm ("0") = fc;
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-	register unsigned long __schid asm ("1") = schid;
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-	register unsigned long __mask asm ("2") = mask;
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 	int cc;
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 	asm volatile(
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+		"	lgr	0,%[fc]\n"
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+		"	lgr	1,%[schid]\n"
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+		"	lgr	2,%[mask]\n"
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 		"	siga	0\n"
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-		"	ipm	%0\n"
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-		"	srl	%0,28\n"
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-		: "=d" (cc)
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-		: "d" (__fc), "d" (__schid), "d" (__mask) : "cc");
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+		"	ipm	%[cc]\n"
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+		"	srl	%[cc],28\n"
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+		: [cc] "=&d" (cc)
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+		: [fc] "d" (fc), [schid] "d" (schid), [mask] "d" (mask)
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+		: "cc", "0", "1", "2");
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 	return cc;
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 }
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..
..
@@ -78,23 +81,24 @@
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  * Note: For IQDC unicast queues only the highest priority queue is processed.
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  */
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 static inline int do_siga_output(unsigned long schid, unsigned long mask,
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-				 unsigned int *bb, unsigned int fc,
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+				 unsigned int *bb, unsigned long fc,
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 				 unsigned long aob)
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 {
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-	register unsigned long __fc asm("0") = fc;
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-	register unsigned long __schid asm("1") = schid;
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-	register unsigned long __mask asm("2") = mask;
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-	register unsigned long __aob asm("3") = aob;
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 	int cc;
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 	asm volatile(
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+		"	lgr	0,%[fc]\n"
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+		"	lgr	1,%[schid]\n"
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+		"	lgr	2,%[mask]\n"
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+		"	lgr	3,%[aob]\n"
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 		"	siga	0\n"
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-		"	ipm	%0\n"
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-		"	srl	%0,28\n"
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-		: "=d" (cc), "+d" (__fc), "+d" (__aob)
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-		: "d" (__schid), "d" (__mask)
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-		: "cc");
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-	*bb = __fc >> 31;
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+		"	lgr	%[fc],0\n"
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+		"	ipm	%[cc]\n"
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+		"	srl	%[cc],28\n"
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+		: [cc] "=&d" (cc), [fc] "+&d" (fc)
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+		: [schid] "d" (schid), [mask] "d" (mask), [aob] "d" (aob)
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+		: "cc", "0", "1", "2", "3");
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+	*bb = fc >> 31;
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 	return cc;
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 }
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