write in 30M

hc

2024-02-20 ea08eeccae9297f7aabd2ef7f0c2517ac4549acc

 kernel/drivers/rk_nand/rk_ftl_arm_v7_thumb.S
..
..
@@ -5,11 +5,10 @@
5
5
  * it under the terms of the GNU General Public License as published by
6
6
  * the Free Software Foundation; either version 2 of the License, or
7
7
  * (at your option) any later version.
8
- * date: 2020-09-23
8
+ * date: 2021-07-26
9
9
  */
10
10
 	.syntax unified
11
11
 	.arch armv7-a
12
-	.fpu softvfp
13
12
 	.eabi_attribute 20, 1
14
13
 	.eabi_attribute 21, 1
15
14
 	.eabi_attribute 23, 3
..
..
@@ -18,148 +17,250 @@
18
17
 	.eabi_attribute 26, 2
19
18
 	.eabi_attribute 30, 4
20
19
 	.eabi_attribute 34, 1
21
-	.eabi_attribute 18, 2
22
-	.thumb
23
-	.file	"rk_ftl_arm_v7.S"
24
-#APP
25
-	.syntax unified
20
+	.file	"rk_ftl_arm_v7.c"
26
21
 	.thumb
27
22
 	.text
28
23
 	.align	1
29
-	.global	FlashMemCmp8
30
24
 	.thumb
31
25
 	.thumb_func
26
+	.fpu softvfp
27
+	.type	ndelay, %function
28
+ndelay:
29
+	.fnstart
30
+	@ args = 0, pretend = 0, frame = 0
31
+	@ frame_needed = 0, uses_anonymous_args = 0
32
+	@ link register save eliminated.
33
+	ldr	r3, .L2
34
+	addw	r0, r0, #999
35
+	umull	r0, r1, r0, r3
36
+	ldr	r3, .L2+4
37
+	ldr	r3, [r3, #8]
38
+	lsrs	r0, r1, #6
39
+	bx	r3	@ indirect register sibling call
40
+.L3:
41
+	.align	2
42
+.L2:
43
+	.word	274877907
44
+	.word	arm_delay_ops
45
+	.fnend
46
+	.size	ndelay, .-ndelay
47
+	.align	1
48
+	.syntax unified
49
+	.thumb
50
+	.thumb_func
51
+	.fpu softvfp
52
+	.type	flash_read_ecc, %function
53
+flash_read_ecc:
54
+	.fnstart
55
+	@ args = 0, pretend = 0, frame = 0
56
+	@ frame_needed = 0, uses_anonymous_args = 0
57
+	ldr	r3, .L5
58
+	push	{r4, lr}
59
+	.save {r4, lr}
60
+	ldr	r4, [r3, r0, lsl #3]
61
+	add	r3, r3, r0, lsl #3
62
+	movs	r0, #80
63
+	ldrb	r3, [r3, #4]	@ zero_extendqisi2
64
+	add	r4, r4, r3, lsl #8
65
+	movs	r3, #122
66
+	str	r3, [r4, #2056]
67
+	bl	ndelay
68
+	ldr	r3, [r4, #2048]
69
+	ldr	r0, [r4, #2048]
70
+	and	r3, r3, #15
71
+	and	r0, r0, #15
72
+	cmp	r0, r3
73
+	it	cc
74
+	movcc	r0, r3
75
+	ldr	r3, [r4, #2048]
76
+	and	r3, r3, #15
77
+	cmp	r3, r0
78
+	it	cc
79
+	movcc	r3, r0
80
+	ldr	r0, [r4, #2048]
81
+	and	r0, r0, #15
82
+	cmp	r0, r3
83
+	it	cc
84
+	movcc	r0, r3
85
+	pop	{r4, pc}
86
+.L6:
87
+	.align	2
88
+.L5:
89
+	.word	.LANCHOR0
90
+	.fnend
91
+	.size	flash_read_ecc, .-flash_read_ecc
92
+	.align	1
93
+	.syntax unified
94
+	.thumb
95
+	.thumb_func
96
+	.fpu softvfp
97
+	.type	ftl_set_blk_mode.part.9, %function
98
+ftl_set_blk_mode.part.9:
99
+	.fnstart
100
+	@ args = 0, pretend = 0, frame = 0
101
+	@ frame_needed = 0, uses_anonymous_args = 0
102
+	@ link register save eliminated.
103
+	ldr	r3, .L8
104
+	lsrs	r1, r0, #5
105
+	and	r0, r0, #31
106
+	ldr	r2, [r3, #32]
107
+	movs	r3, #1
108
+	lsl	r0, r3, r0
109
+	ldr	r3, [r2, r1, lsl #2]
110
+	orrs	r3, r3, r0
111
+	str	r3, [r2, r1, lsl #2]
112
+	bx	lr
113
+.L9:
114
+	.align	2
115
+.L8:
116
+	.word	.LANCHOR0
117
+	.fnend
118
+	.size	ftl_set_blk_mode.part.9, .-ftl_set_blk_mode.part.9
119
+	.align	1
120
+	.global	FlashMemCmp8
121
+	.syntax unified
122
+	.thumb
123
+	.thumb_func
124
+	.fpu softvfp
32
125
 	.type	FlashMemCmp8, %function
33
126
 FlashMemCmp8:
34
127
 	.fnstart
35
128
 	@ args = 0, pretend = 0, frame = 0
36
129
 	@ frame_needed = 0, uses_anonymous_args = 0
37
-	ldr	r3, .L10
130
+	ldr	r3, .L18
38
131
 	push	{r4, r5, lr}
39
132
 	.save {r4, r5, lr}
40
-	ldrb	r3, [r3]	@ zero_extendqisi2
41
-	cbz	r3, .L4
133
+	ldrb	r3, [r3, #36]	@ zero_extendqisi2
134
+	cbz	r3, .L13
42
135
 	ldrb	r4, [r0, #1]	@ zero_extendqisi2
43
136
 	ldrb	r3, [r1, #1]	@ zero_extendqisi2
44
137
 	cmp	r4, r3
45
-	beq	.L8
138
+	beq	.L17
46
139
 	movs	r3, #0
47
-.L4:
140
+.L13:
48
141
 	cmp	r3, r2
49
-	beq	.L8
142
+	bne	.L15
143
+.L17:
144
+	movs	r0, #0
145
+	pop	{r4, r5, pc}
146
+.L15:
50
147
 	ldrb	r5, [r0, r3]	@ zero_extendqisi2
51
148
 	ldrb	r4, [r1, r3]	@ zero_extendqisi2
52
149
 	adds	r3, r3, #1
53
150
 	cmp	r5, r4
54
-	beq	.L4
151
+	beq	.L13
55
152
 	mov	r0, r3
56
153
 	pop	{r4, r5, pc}
57
-.L8:
58
-	movs	r0, #0
59
-	pop	{r4, r5, pc}
60
-.L11:
154
+.L19:
61
155
 	.align	2
62
-.L10:
156
+.L18:
63
157
 	.word	.LANCHOR0
64
158
 	.fnend
65
159
 	.size	FlashMemCmp8, .-FlashMemCmp8
66
160
 	.align	1
67
161
 	.global	FlashRsvdBlkChk
162
+	.syntax unified
68
163
 	.thumb
69
164
 	.thumb_func
165
+	.fpu softvfp
70
166
 	.type	FlashRsvdBlkChk, %function
71
167
 FlashRsvdBlkChk:
72
168
 	.fnstart
73
169
 	@ args = 0, pretend = 0, frame = 0
74
170
 	@ frame_needed = 0, uses_anonymous_args = 0
75
-	@ link register save eliminated.
76
-	ldr	r3, .L15
77
-	ldrb	r2, [r3, #1]	@ zero_extendqisi2
78
-	ldr	r3, [r3, #4]
79
-	muls	r3, r2, r3
80
-	cmp	r1, r3
81
-	bcs	.L14
171
+	ldr	r2, .L23
172
+	push	{r4, lr}
173
+	.save {r4, lr}
174
+	ldrb	r4, [r2, #37]	@ zero_extendqisi2
175
+	ldr	r3, [r2, #40]
176
+	muls	r3, r4, r3
177
+	cmp	r3, r1
178
+	bls	.L22
82
179
 	adds	r0, r0, #0
83
180
 	it	ne
84
181
 	movne	r0, #1
85
-	bx	lr
86
-.L14:
182
+	pop	{r4, pc}
183
+.L22:
87
184
 	movs	r0, #1
88
-	bx	lr
89
-.L16:
185
+	pop	{r4, pc}
186
+.L24:
90
187
 	.align	2
91
-.L15:
188
+.L23:
92
189
 	.word	.LANCHOR0
93
190
 	.fnend
94
191
 	.size	FlashRsvdBlkChk, .-FlashRsvdBlkChk
95
192
 	.align	1
96
193
 	.global	FlashGetRandomizer
194
+	.syntax unified
97
195
 	.thumb
98
196
 	.thumb_func
197
+	.fpu softvfp
99
198
 	.type	FlashGetRandomizer, %function
100
199
 FlashGetRandomizer:
101
200
 	.fnstart
102
201
 	@ args = 0, pretend = 0, frame = 0
103
202
 	@ frame_needed = 0, uses_anonymous_args = 0
104
-	ldr	r3, .L25
203
+	ldr	r3, .L33
105
204
 	and	r2, r1, #127
106
205
 	push	{r4, lr}
107
206
 	.save {r4, lr}
108
207
 	ldrh	r4, [r3, r2, lsl #1]
109
-	ldr	r3, .L25+4
110
-	ldrb	r3, [r3, #8]	@ zero_extendqisi2
111
-	cbz	r3, .L18
208
+	ldr	r3, .L33+4
209
+	ldrb	r3, [r3, #44]	@ zero_extendqisi2
210
+	cbz	r3, .L25
112
211
 	bl	FlashRsvdBlkChk
113
-	cbz	r0, .L18
212
+	cbz	r0, .L25
114
213
 	orr	r4, r4, #-1073741824
115
-.L18:
214
+.L25:
116
215
 	mov	r0, r4
117
216
 	pop	{r4, pc}
118
-.L26:
217
+.L34:
119
218
 	.align	2
120
-.L25:
219
+.L33:
121
220
 	.word	.LANCHOR1
122
221
 	.word	.LANCHOR0
123
222
 	.fnend
124
223
 	.size	FlashGetRandomizer, .-FlashGetRandomizer
125
224
 	.align	1
126
225
 	.global	FlashSetRandomizer
226
+	.syntax unified
127
227
 	.thumb
128
228
 	.thumb_func
229
+	.fpu softvfp
129
230
 	.type	FlashSetRandomizer, %function
130
231
 FlashSetRandomizer:
131
232
 	.fnstart
132
233
 	@ args = 0, pretend = 0, frame = 0
133
234
 	@ frame_needed = 0, uses_anonymous_args = 0
134
-	ldr	r3, .L35
135
-	and	r2, r1, #127
136
235
 	push	{r4, r5, r6, lr}
137
236
 	.save {r4, r5, r6, lr}
237
+	and	r2, r1, #127
238
+	ldr	r3, .L43
138
239
 	mov	r6, r0
240
+	ldr	r4, .L43+4
139
241
 	ldrh	r5, [r3, r2, lsl #1]
140
-	ldr	r3, .L35+4
141
-	ldrb	r2, [r3, #8]	@ zero_extendqisi2
142
-	mov	r4, r3
143
-	cbz	r2, .L28
242
+	ldrb	r2, [r4, #44]	@ zero_extendqisi2
243
+	cbz	r2, .L36
144
244
 	bl	FlashRsvdBlkChk
145
-	cbz	r0, .L28
245
+	cbz	r0, .L36
146
246
 	orr	r5, r5, #-1073741824
147
-.L28:
148
-	add	r4, r4, r6, lsl #3
149
-	ldr	r3, [r4, #12]
247
+.L36:
248
+	ldr	r3, [r4, r6, lsl #3]
150
249
 	str	r5, [r3, #336]
151
250
 	pop	{r4, r5, r6, pc}
152
-.L36:
251
+.L44:
153
252
 	.align	2
154
-.L35:
253
+.L43:
155
254
 	.word	.LANCHOR1
156
255
 	.word	.LANCHOR0
157
256
 	.fnend
158
257
 	.size	FlashSetRandomizer, .-FlashSetRandomizer
159
258
 	.align	1
160
259
 	.global	FlashBlockAlignInit
260
+	.syntax unified
161
261
 	.thumb
162
262
 	.thumb_func
263
+	.fpu softvfp
163
264
 	.type	FlashBlockAlignInit, %function
164
265
 FlashBlockAlignInit:
165
266
 	.fnstart
..
..
@@ -167,57 +268,60 @@
167
268
 	@ frame_needed = 0, uses_anonymous_args = 0
168
269
 	@ link register save eliminated.
169
270
 	cmp	r0, #512
170
-	ldr	r3, .L43
171
-	bls	.L38
271
+	ldr	r3, .L51
272
+	bls	.L46
172
273
 	mov	r2, #1024
173
-	b	.L42
174
-.L38:
274
+.L50:
275
+	str	r2, [r3, #40]
276
+	bx	lr
277
+.L46:
175
278
 	cmp	r0, #256
176
-	bls	.L40
279
+	bls	.L48
177
280
 	mov	r2, #512
178
-	b	.L42
179
-.L40:
281
+	b	.L50
282
+.L48:
180
283
 	cmp	r0, #128
181
-	bhi	.L41
182
-	str	r0, [r3, #4]
284
+	bhi	.L49
285
+	str	r0, [r3, #40]
183
286
 	bx	lr
184
-.L41:
287
+.L49:
185
288
 	mov	r2, #256
186
-.L42:
187
-	str	r2, [r3, #4]
188
-	bx	lr
189
-.L44:
289
+	b	.L50
290
+.L52:
190
291
 	.align	2
191
-.L43:
292
+.L51:
192
293
 	.word	.LANCHOR0
193
294
 	.fnend
194
295
 	.size	FlashBlockAlignInit, .-FlashBlockAlignInit
195
296
 	.align	1
196
297
 	.global	FlashReadCmd
298
+	.syntax unified
197
299
 	.thumb
198
300
 	.thumb_func
301
+	.fpu softvfp
199
302
 	.type	FlashReadCmd, %function
200
303
 FlashReadCmd:
201
304
 	.fnstart
202
305
 	@ args = 0, pretend = 0, frame = 0
203
306
 	@ frame_needed = 0, uses_anonymous_args = 0
204
-	ldr	r2, .L47
205
-	push	{r4, r5, lr}
206
-	.save {r4, r5, lr}
207
-	add	r3, r2, r0, lsl #3
208
-	ldr	r2, [r2, #44]
209
-	ldr	r4, [r3, #12]
210
-	ldrb	r3, [r3, #16]	@ zero_extendqisi2
211
-	ldrb	r2, [r2, #7]	@ zero_extendqisi2
212
-	lsls	r3, r3, #8
213
-	cmp	r2, #1
214
-	it	eq
215
-	addeq	r2, r4, r3
216
-	add	r3, r3, r4
307
+	@ link register save eliminated.
308
+	push	{r4, r5}
309
+	.save {r4, r5}
310
+	ldr	r4, .L55
311
+	ldr	r3, [r4, r0, lsl #3]
312
+	add	r2, r4, r0, lsl #3
313
+	ldr	r4, [r4, #48]
314
+	ldrb	r2, [r2, #4]	@ zero_extendqisi2
315
+	ldrb	r4, [r4, #7]	@ zero_extendqisi2
316
+	lsls	r2, r2, #8
317
+	cmp	r4, #1
217
318
 	itt	eq
218
319
 	moveq	r5, #38
219
-	streq	r5, [r2, #2056]
220
-	movs	r2, #0
320
+	addeq	r4, r3, r2
321
+	add	r3, r3, r2
322
+	mov	r2, #0
323
+	it	eq
324
+	streq	r5, [r4, #2056]
221
325
 	str	r2, [r3, #2056]
222
326
 	str	r2, [r3, #2052]
223
327
 	str	r2, [r3, #2052]
..
..
@@ -229,37 +333,40 @@
229
333
 	str	r2, [r3, #2052]
230
334
 	movs	r2, #48
231
335
 	str	r2, [r3, #2056]
232
-	pop	{r4, r5, lr}
336
+	pop	{r4, r5}
233
337
 	b	FlashSetRandomizer
234
-.L48:
338
+.L56:
235
339
 	.align	2
236
-.L47:
340
+.L55:
237
341
 	.word	.LANCHOR0
238
342
 	.fnend
239
343
 	.size	FlashReadCmd, .-FlashReadCmd
240
344
 	.align	1
241
345
 	.global	FlashReadDpDataOutCmd
346
+	.syntax unified
242
347
 	.thumb
243
348
 	.thumb_func
349
+	.fpu softvfp
244
350
 	.type	FlashReadDpDataOutCmd, %function
245
351
 FlashReadDpDataOutCmd:
246
352
 	.fnstart
247
353
 	@ args = 0, pretend = 0, frame = 0
248
354
 	@ frame_needed = 0, uses_anonymous_args = 0
249
-	push	{r4, r5, r6, lr}
250
-	.save {r4, r5, r6, lr}
355
+	@ link register save eliminated.
356
+	push	{r4, r5, r6}
357
+	.save {r4, r5, r6}
251
358
 	uxtb	r6, r1
252
-	ldr	r4, .L53
359
+	ldr	r4, .L61
253
360
 	lsrs	r5, r1, #8
254
-	add	r3, r4, r0, lsl #3
255
-	ldrb	r4, [r4, #64]	@ zero_extendqisi2
256
-	ldr	r2, [r3, #12]
257
-	ldrb	r3, [r3, #16]	@ zero_extendqisi2
361
+	ldr	r3, [r4, r0, lsl #3]
362
+	add	r2, r4, r0, lsl #3
363
+	ldrb	r4, [r4, #68]	@ zero_extendqisi2
364
+	ldrb	r2, [r2, #4]	@ zero_extendqisi2
258
365
 	cmp	r4, #1
259
366
 	lsr	r4, r1, #16
260
-	lsl	r3, r3, #8
367
+	lsl	r2, r2, #8
261
368
 	add	r3, r3, r2
262
-	bne	.L50
369
+	bne	.L58
263
370
 	movs	r2, #6
264
371
 	str	r2, [r3, #2056]
265
372
 	movs	r2, #0
..
..
@@ -268,8 +375,12 @@
268
375
 	str	r6, [r3, #2052]
269
376
 	str	r5, [r3, #2052]
270
377
 	str	r4, [r3, #2052]
271
-	b	.L52
272
-.L50:
378
+.L60:
379
+	movs	r2, #224
380
+	str	r2, [r3, #2056]
381
+	pop	{r4, r5, r6}
382
+	b	FlashSetRandomizer
383
+.L58:
273
384
 	movs	r2, #0
274
385
 	str	r2, [r3, #2056]
275
386
 	str	r2, [r3, #2052]
..
..
@@ -281,33 +392,32 @@
281
392
 	str	r4, [r3, #2056]
282
393
 	str	r2, [r3, #2052]
283
394
 	str	r2, [r3, #2052]
284
-.L52:
285
-	movs	r2, #224
286
-	str	r2, [r3, #2056]
287
-	pop	{r4, r5, r6, lr}
288
-	b	FlashSetRandomizer
289
-.L54:
395
+	b	.L60
396
+.L62:
290
397
 	.align	2
291
-.L53:
398
+.L61:
292
399
 	.word	.LANCHOR0
293
400
 	.fnend
294
401
 	.size	FlashReadDpDataOutCmd, .-FlashReadDpDataOutCmd
295
402
 	.align	1
296
403
 	.global	FlashProgFirstCmd
404
+	.syntax unified
297
405
 	.thumb
298
406
 	.thumb_func
407
+	.fpu softvfp
299
408
 	.type	FlashProgFirstCmd, %function
300
409
 FlashProgFirstCmd:
301
410
 	.fnstart
302
411
 	@ args = 0, pretend = 0, frame = 0
303
412
 	@ frame_needed = 0, uses_anonymous_args = 0
304
-	push	{r4, lr}
305
-	.save {r4, lr}
413
+	@ link register save eliminated.
414
+	push	{r4, r5}
415
+	.save {r4, r5}
306
416
 	lsrs	r2, r1, #16
307
-	ldr	r4, .L56
417
+	ldr	r4, .L64
418
+	ldr	r3, [r4, r0, lsl #3]
308
419
 	add	r4, r4, r0, lsl #3
309
-	ldr	r3, [r4, #12]
310
-	ldrb	r4, [r4, #16]	@ zero_extendqisi2
420
+	ldrb	r4, [r4, #4]	@ zero_extendqisi2
311
421
 	add	r3, r3, r4, lsl #8
312
422
 	movs	r4, #128
313
423
 	str	r4, [r3, #2056]
..
..
@@ -319,18 +429,20 @@
319
429
 	lsrs	r4, r1, #8
320
430
 	str	r4, [r3, #2052]
321
431
 	str	r2, [r3, #2052]
322
-	pop	{r4, lr}
432
+	pop	{r4, r5}
323
433
 	b	FlashSetRandomizer
324
-.L57:
434
+.L65:
325
435
 	.align	2
326
-.L56:
436
+.L64:
327
437
 	.word	.LANCHOR0
328
438
 	.fnend
329
439
 	.size	FlashProgFirstCmd, .-FlashProgFirstCmd
330
440
 	.align	1
331
441
 	.global	FlashEraseCmd
442
+	.syntax unified
332
443
 	.thumb
333
444
 	.thumb_func
445
+	.fpu softvfp
334
446
 	.type	FlashEraseCmd, %function
335
447
 FlashEraseCmd:
336
448
 	.fnstart
..
..
@@ -338,25 +450,25 @@
338
450
 	@ frame_needed = 0, uses_anonymous_args = 0
339
451
 	push	{r4, r5, lr}
340
452
 	.save {r4, r5, lr}
341
-	ldr	r5, .L63
342
-	add	r0, r5, r0, lsl #3
343
-	ldrb	r3, [r0, #16]	@ zero_extendqisi2
344
-	ldr	r4, [r0, #12]
345
-	lsls	r3, r3, #8
346
-	cbz	r2, .L59
347
-	adds	r2, r4, r3
348
-	movs	r0, #96
349
-	str	r0, [r2, #2056]
350
-	uxtb	r0, r1
351
-	str	r0, [r2, #2052]
352
-	lsrs	r0, r1, #8
353
-	str	r0, [r2, #2052]
354
-	lsrs	r0, r1, #16
355
-	str	r0, [r2, #2052]
356
-	ldr	r2, [r5, #4]
453
+	ldr	r4, .L71
454
+	ldr	r3, [r4, r0, lsl #3]
455
+	add	r0, r4, r0, lsl #3
456
+	ldrb	r0, [r0, #4]	@ zero_extendqisi2
457
+	lsls	r0, r0, #8
458
+	cbz	r2, .L67
459
+	adds	r2, r3, r0
460
+	movs	r5, #96
461
+	str	r5, [r2, #2056]
462
+	uxtb	r5, r1
463
+	str	r5, [r2, #2052]
464
+	lsrs	r5, r1, #8
465
+	str	r5, [r2, #2052]
466
+	lsrs	r5, r1, #16
467
+	str	r5, [r2, #2052]
468
+	ldr	r2, [r4, #40]
357
469
 	add	r1, r1, r2
358
-.L59:
359
-	add	r3, r3, r4
470
+.L67:
471
+	add	r3, r3, r0
360
472
 	movs	r2, #96
361
473
 	str	r2, [r3, #2056]
362
474
 	uxtb	r2, r1
..
..
@@ -364,34 +476,37 @@
364
476
 	lsrs	r2, r1, #8
365
477
 	lsrs	r1, r1, #16
366
478
 	str	r2, [r3, #2052]
367
-	str	r1, [r3, #2052]
368
479
 	movs	r2, #208
480
+	str	r1, [r3, #2052]
369
481
 	str	r2, [r3, #2056]
370
482
 	pop	{r4, r5, pc}
371
-.L64:
483
+.L72:
372
484
 	.align	2
373
-.L63:
485
+.L71:
374
486
 	.word	.LANCHOR0
375
487
 	.fnend
376
488
 	.size	FlashEraseCmd, .-FlashEraseCmd
377
489
 	.align	1
378
490
 	.global	FlashProgDpSecondCmd
491
+	.syntax unified
379
492
 	.thumb
380
493
 	.thumb_func
494
+	.fpu softvfp
381
495
 	.type	FlashProgDpSecondCmd, %function
382
496
 FlashProgDpSecondCmd:
383
497
 	.fnstart
384
498
 	@ args = 0, pretend = 0, frame = 0
385
499
 	@ frame_needed = 0, uses_anonymous_args = 0
386
-	push	{r4, r5, lr}
387
-	.save {r4, r5, lr}
500
+	@ link register save eliminated.
501
+	push	{r4, r5, r6}
502
+	.save {r4, r5, r6}
388
503
 	lsrs	r2, r1, #16
389
-	ldr	r4, .L66
390
-	add	r5, r4, r0, lsl #3
391
-	ldrb	r4, [r4, #59]	@ zero_extendqisi2
392
-	ldr	r3, [r5, #12]
393
-	ldrb	r5, [r5, #16]	@ zero_extendqisi2
394
-	add	r3, r3, r5, lsl #8
504
+	ldr	r5, .L74
505
+	ldr	r3, [r5, r0, lsl #3]
506
+	add	r4, r5, r0, lsl #3
507
+	ldrb	r6, [r4, #4]	@ zero_extendqisi2
508
+	ldrb	r4, [r5, #63]	@ zero_extendqisi2
509
+	add	r3, r3, r6, lsl #8
395
510
 	str	r4, [r3, #2056]
396
511
 	movs	r4, #0
397
512
 	str	r4, [r3, #2052]
..
..
@@ -401,18 +516,20 @@
401
516
 	lsrs	r4, r1, #8
402
517
 	str	r4, [r3, #2052]
403
518
 	str	r2, [r3, #2052]
404
-	pop	{r4, r5, lr}
519
+	pop	{r4, r5, r6}
405
520
 	b	FlashSetRandomizer
406
-.L67:
521
+.L75:
407
522
 	.align	2
408
-.L66:
523
+.L74:
409
524
 	.word	.LANCHOR0
410
525
 	.fnend
411
526
 	.size	FlashProgDpSecondCmd, .-FlashProgDpSecondCmd
412
527
 	.align	1
413
528
 	.global	FlashProgSecondCmd
529
+	.syntax unified
414
530
 	.thumb
415
531
 	.thumb_func
532
+	.fpu softvfp
416
533
 	.type	FlashProgSecondCmd, %function
417
534
 FlashProgSecondCmd:
418
535
 	.fnstart
..
..
@@ -420,85 +537,123 @@
420
537
 	@ frame_needed = 0, uses_anonymous_args = 0
421
538
 	push	{r3, r4, r5, lr}
422
539
 	.save {r3, r4, r5, lr}
423
-	ldr	r3, .L69
424
-	add	r0, r3, r0, lsl #3
425
-	ldr	r3, .L69+4
426
-	ldr	r4, [r0, #12]
427
-	ldrb	r5, [r0, #16]	@ zero_extendqisi2
428
-	ldr	r3, [r3, #4]
429
-	ldr	r0, .L69+8
430
-	blx	r3
540
+	ldr	r3, .L77
541
+	ldr	r4, [r3, r0, lsl #3]
542
+	add	r3, r3, r0, lsl #3
543
+	ldr	r0, .L77+4
544
+	ldrb	r5, [r3, #4]	@ zero_extendqisi2
545
+	ldr	r3, .L77+8
431
546
 	add	r4, r4, r5, lsl #8
547
+	ldr	r3, [r3, #4]
548
+	blx	r3
432
549
 	movs	r3, #16
433
550
 	str	r3, [r4, #2056]
434
551
 	pop	{r3, r4, r5, pc}
435
-.L70:
552
+.L78:
436
553
 	.align	2
437
-.L69:
554
+.L77:
438
555
 	.word	.LANCHOR0
556
+	.word	64424500
439
557
 	.word	arm_delay_ops
440
-	.word	214748300
441
558
 	.fnend
442
559
 	.size	FlashProgSecondCmd, .-FlashProgSecondCmd
443
560
 	.align	1
444
561
 	.global	FlashProgDpFirstCmd
562
+	.syntax unified
445
563
 	.thumb
446
564
 	.thumb_func
565
+	.fpu softvfp
447
566
 	.type	FlashProgDpFirstCmd, %function
448
567
 FlashProgDpFirstCmd:
449
568
 	.fnstart
450
569
 	@ args = 0, pretend = 0, frame = 0
451
570
 	@ frame_needed = 0, uses_anonymous_args = 0
452
571
 	@ link register save eliminated.
453
-	ldr	r2, .L72
572
+	ldr	r2, .L80
573
+	ldr	r3, [r2, r0, lsl #3]
454
574
 	add	r0, r2, r0, lsl #3
455
-	ldrb	r2, [r2, #58]	@ zero_extendqisi2
456
-	ldrb	r1, [r0, #16]	@ zero_extendqisi2
457
-	ldr	r3, [r0, #12]
575
+	ldrb	r2, [r2, #62]	@ zero_extendqisi2
576
+	ldrb	r1, [r0, #4]	@ zero_extendqisi2
458
577
 	add	r3, r3, r1, lsl #8
459
578
 	str	r2, [r3, #2056]
460
579
 	bx	lr
461
-.L73:
580
+.L81:
462
581
 	.align	2
463
-.L72:
582
+.L80:
464
583
 	.word	.LANCHOR0
465
584
 	.fnend
466
585
 	.size	FlashProgDpFirstCmd, .-FlashProgDpFirstCmd
467
586
 	.align	1
468
-	.global	js_hash
587
+	.global	FlashReadStatus
588
+	.syntax unified
469
589
 	.thumb
470
590
 	.thumb_func
591
+	.fpu softvfp
592
+	.type	FlashReadStatus, %function
593
+FlashReadStatus:
594
+	.fnstart
595
+	@ args = 0, pretend = 0, frame = 0
596
+	@ frame_needed = 0, uses_anonymous_args = 0
597
+	push	{r3, r4, r5, lr}
598
+	.save {r3, r4, r5, lr}
599
+	movs	r2, #112
600
+	ldr	r3, .L83
601
+	ldr	r5, [r3, r0, lsl #3]
602
+	add	r3, r3, r0, lsl #3
603
+	movs	r0, #80
604
+	ldrb	r4, [r3, #4]	@ zero_extendqisi2
605
+	add	r3, r5, r4, lsl #8
606
+	adds	r4, r4, #8
607
+	lsls	r4, r4, #8
608
+	str	r2, [r3, #2056]
609
+	bl	ndelay
610
+	ldr	r0, [r5, r4]
611
+	pop	{r3, r4, r5, pc}
612
+.L84:
613
+	.align	2
614
+.L83:
615
+	.word	.LANCHOR0
616
+	.fnend
617
+	.size	FlashReadStatus, .-FlashReadStatus
618
+	.align	1
619
+	.global	js_hash
620
+	.syntax unified
621
+	.thumb
622
+	.thumb_func
623
+	.fpu softvfp
471
624
 	.type	js_hash, %function
472
625
 js_hash:
473
626
 	.fnstart
474
627
 	@ args = 0, pretend = 0, frame = 0
475
628
 	@ frame_needed = 0, uses_anonymous_args = 0
476
-	ldr	r3, .L78
629
+	ldr	r3, .L88
477
630
 	add	r1, r1, r0
478
631
 	push	{r4, lr}
479
632
 	.save {r4, lr}
480
-.L75:
633
+.L86:
481
634
 	cmp	r0, r1
482
-	beq	.L77
483
-	lsls	r2, r3, #5
484
-	ldrb	r4, [r0], #1	@ zero_extendqisi2
485
-	add	r2, r2, r3, lsr #2
486
-	add	r2, r2, r4
487
-	eors	r3, r3, r2
488
-	b	.L75
489
-.L77:
635
+	bne	.L87
490
636
 	mov	r0, r3
491
637
 	pop	{r4, pc}
492
-.L79:
638
+.L87:
639
+	lsrs	r2, r3, #2
640
+	ldrb	r4, [r0], #1	@ zero_extendqisi2
641
+	add	r2, r2, r3, lsl #5
642
+	add	r2, r2, r4
643
+	eors	r3, r3, r2
644
+	b	.L86
645
+.L89:
493
646
 	.align	2
494
-.L78:
647
+.L88:
495
648
 	.word	1204201446
496
649
 	.fnend
497
650
 	.size	js_hash, .-js_hash
498
651
 	.align	1
499
652
 	.global	FlashLoadIdbInfo
653
+	.syntax unified
500
654
 	.thumb
501
655
 	.thumb_func
656
+	.fpu softvfp
502
657
 	.type	FlashLoadIdbInfo, %function
503
658
 FlashLoadIdbInfo:
504
659
 	.fnstart
..
..
@@ -511,8 +666,10 @@
511
666
 	.size	FlashLoadIdbInfo, .-FlashLoadIdbInfo
512
667
 	.align	1
513
668
 	.global	FlashPrintInfo
669
+	.syntax unified
514
670
 	.thumb
515
671
 	.thumb_func
672
+	.fpu softvfp
516
673
 	.type	FlashPrintInfo, %function
517
674
 FlashPrintInfo:
518
675
 	.fnstart
..
..
@@ -523,45 +680,156 @@
523
680
 	.fnend
524
681
 	.size	FlashPrintInfo, .-FlashPrintInfo
525
682
 	.align	1
526
-	.global	ftl_flash_suspend
683
+	.global	ToshibaSetRRPara
684
+	.syntax unified
527
685
 	.thumb
528
686
 	.thumb_func
687
+	.fpu softvfp
688
+	.type	ToshibaSetRRPara, %function
689
+ToshibaSetRRPara:
690
+	.fnstart
691
+	@ args = 0, pretend = 0, frame = 0
692
+	@ frame_needed = 0, uses_anonymous_args = 0
693
+	push	{r4, r5, r6, r7, r8, r9, r10, lr}
694
+	.save {r4, r5, r6, r7, r8, r9, r10, lr}
695
+	add	r8, r1, r1, lsl #2
696
+	ldr	r9, .L100+8
697
+	mov	r5, r0
698
+	mov	r6, r1
699
+	movs	r4, #0
700
+	ldr	r7, .L100
701
+	add	r10, r9, #256
702
+.L93:
703
+	ldrb	r3, [r7, #85]	@ zero_extendqisi2
704
+	cmp	r4, r3
705
+	bcc	.L97
706
+	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
707
+.L97:
708
+	movs	r3, #85
709
+	movs	r0, #200
710
+	str	r3, [r5, #8]
711
+	ldrsb	r3, [r4, r10]
712
+	str	r3, [r5, #4]
713
+	bl	ndelay
714
+	ldrb	r3, [r7, #84]	@ zero_extendqisi2
715
+	cmp	r3, #34
716
+	bne	.L94
717
+	add	r3, r4, r8
718
+	add	r3, r3, r10
719
+.L99:
720
+	ldrsb	r3, [r3, #5]
721
+.L98:
722
+	str	r3, [r5]
723
+	adds	r4, r4, #1
724
+	b	.L93
725
+.L94:
726
+	cmp	r3, #35
727
+	bne	.L96
728
+	ldr	r2, .L100+4
729
+	add	r3, r4, r8
730
+	add	r3, r3, r2
731
+	b	.L99
732
+.L96:
733
+	add	r3, r9, r6
734
+	ldrsb	r3, [r3, #396]
735
+	b	.L98
736
+.L101:
737
+	.align	2
738
+.L100:
739
+	.word	.LANCHOR0
740
+	.word	.LANCHOR1+301
741
+	.word	.LANCHOR1
742
+	.fnend
743
+	.size	ToshibaSetRRPara, .-ToshibaSetRRPara
744
+	.align	1
745
+	.global	SamsungSetRRPara
746
+	.syntax unified
747
+	.thumb
748
+	.thumb_func
749
+	.fpu softvfp
750
+	.type	SamsungSetRRPara, %function
751
+SamsungSetRRPara:
752
+	.fnstart
753
+	@ args = 0, pretend = 0, frame = 0
754
+	@ frame_needed = 0, uses_anonymous_args = 0
755
+	push	{r4, r5, r6, r7, r8, r9, r10, lr}
756
+	.save {r4, r5, r6, r7, r8, r9, r10, lr}
757
+	movs	r4, #0
758
+	ldr	r7, .L105
759
+	mov	r6, r0
760
+	mov	r9, #161
761
+	mov	r10, r4
762
+	ldr	r8, .L105+4
763
+	add	r1, r7, r1, lsl #2
764
+	adds	r5, r1, #3
765
+.L103:
766
+	ldrb	r3, [r8, #85]	@ zero_extendqisi2
767
+	cmp	r4, r3
768
+	bcc	.L104
769
+	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
770
+.L104:
771
+	str	r9, [r6, #8]
772
+	mov	r0, #300
773
+	str	r10, [r6]
774
+	ldrsb	r3, [r7, r4]
775
+	adds	r4, r4, #1
776
+	str	r3, [r6]
777
+	ldrsb	r3, [r5, #1]!
778
+	str	r3, [r6]
779
+	bl	ndelay
780
+	b	.L103
781
+.L106:
782
+	.align	2
783
+.L105:
784
+	.word	.LANCHOR1+404
785
+	.word	.LANCHOR0
786
+	.fnend
787
+	.size	SamsungSetRRPara, .-SamsungSetRRPara
788
+	.align	1
789
+	.global	ftl_flash_suspend
790
+	.syntax unified
791
+	.thumb
792
+	.thumb_func
793
+	.fpu softvfp
529
794
 	.type	ftl_flash_suspend, %function
530
795
 ftl_flash_suspend:
531
796
 	.fnstart
532
797
 	@ args = 0, pretend = 0, frame = 0
533
798
 	@ frame_needed = 0, uses_anonymous_args = 0
534
799
 	@ link register save eliminated.
535
-	ldr	r3, .L83
536
-	ldr	r2, [r3, #80]
800
+	ldr	r3, .L108
801
+	ldr	r2, [r3, #88]
537
802
 	ldr	r1, [r2]
538
-	str	r1, [r3, #84]
539
-	ldr	r1, [r2, #4]
540
-	str	r1, [r3, #88]
541
-	ldr	r1, [r2, #8]
542
803
 	str	r1, [r3, #92]
543
-	ldr	r1, [r2, #12]
804
+	ldr	r1, [r2, #4]
544
805
 	str	r1, [r3, #96]
545
-	ldr	r1, [r2, #304]
806
+	ldr	r1, [r2, #8]
546
807
 	str	r1, [r3, #100]
547
-	ldr	r1, [r2, #308]
808
+	ldr	r1, [r2, #12]
548
809
 	str	r1, [r3, #104]
810
+	ldr	r1, [r2, #304]
811
+	str	r1, [r3, #108]
812
+	ldr	r1, [r2, #308]
813
+	str	r1, [r3, #112]
549
814
 	ldr	r1, [r2, #336]
550
815
 	ldr	r2, [r2, #344]
551
-	str	r1, [r3, #108]
552
-	str	r2, [r3, #112]
816
+	str	r1, [r3, #116]
817
+	str	r2, [r3, #120]
553
818
 	bx	lr
554
-.L84:
819
+.L109:
555
820
 	.align	2
556
-.L83:
821
+.L108:
557
822
 	.word	.LANCHOR0
558
823
 	.fnend
559
824
 	.size	ftl_flash_suspend, .-ftl_flash_suspend
560
825
 	.global	__aeabi_uidiv
826
+	.global	__aeabi_uidivmod
561
827
 	.align	1
562
828
 	.global	LogAddr2PhyAddr
829
+	.syntax unified
563
830
 	.thumb
564
831
 	.thumb_func
832
+	.fpu softvfp
565
833
 	.type	LogAddr2PhyAddr, %function
566
834
 LogAddr2PhyAddr:
567
835
 	.fnstart
..
..
@@ -570,117 +838,221 @@
570
838
 	push	{r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr}
571
839
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
572
840
 	.pad #12
573
-	mov	r7, r0
574
-	ldr	r0, .L90
575
-	mov	r8, r3
576
-	ldr	r4, [r7, #4]
577
-	mov	r10, r1
578
841
 	mov	r9, r2
579
-	ldrh	r3, [r0, #130]
580
-	bic	r4, r4, #-2147483648
581
-	ldrh	r5, [r0, #128]
582
-	mov	r6, r0
583
-	ldrh	fp, [r0, #4]
584
-	smulbb	r5, r5, r3
585
-	ldrb	r3, [r0]	@ zero_extendqisi2
586
-	cmp	r3, #1
587
-	ubfx	r3, r4, #10, #16
588
-	it	eq
589
-	lsleq	fp, fp, #1
590
-	str	r3, [sp, #4]
591
-	mov	r0, r3
592
-	uxth	r5, r5
593
-	it	eq
594
-	uxtheq	fp, fp
595
-	mov	r1, r5
596
-	bl	__aeabi_uidiv
597
-	cmp	r10, #1
598
-	ubfx	r1, r4, #0, #10
599
-	uxth	r0, r0
600
-	ldr	r3, [sp, #4]
601
-	smulbb	r5, r0, r5
602
-	sub	r3, r3, r5
842
+	ldr	r4, .L115
843
+	mov	fp, r3
844
+	mov	r10, r1
845
+	mov	r7, r0
846
+	ldr	r5, [r0, #4]
847
+	ldrh	r2, [r4, #136]
848
+	ldrh	r3, [r4, #138]
849
+	ldrh	r6, [r4, #40]
850
+	smulbb	r3, r3, r2
851
+	ldrb	r2, [r4, #36]	@ zero_extendqisi2
603
852
 	uxth	r3, r3
604
-	bne	.L87
605
-	ldrb	r2, [r6, #144]	@ zero_extendqisi2
606
-	cbnz	r2, .L87
607
-	ldr	r2, .L90
608
-	add	r1, r2, r1, lsl #1
609
-	ldrh	r1, [r1, #148]
610
-.L87:
611
-	add	r6, r6, r0, lsl #2
612
-	ldr	r2, [r6, #1172]
613
-	mla	fp, fp, r3, r2
853
+	cmp	r2, #1
854
+	it	eq
855
+	lsleq	r6, r6, #1
856
+	ubfx	r2, r5, #10, #16
857
+	mov	r1, r3
858
+	str	r3, [sp, #4]
859
+	mov	r0, r2
860
+	it	eq
861
+	uxtheq	r6, r6
862
+	str	r2, [sp]
863
+	bl	__aeabi_uidiv
864
+	ldr	r3, [sp, #4]
865
+	uxth	r8, r0
866
+	ldr	r2, [sp]
867
+	mov	r1, r3
868
+	mov	r0, r2
869
+	bl	__aeabi_uidivmod
870
+	cmp	r10, #1
871
+	uxth	r1, r1
872
+	ubfx	r0, r5, #0, #10
873
+	bne	.L112
874
+	ldrb	r3, [r4, #152]	@ zero_extendqisi2
875
+	cbnz	r3, .L112
876
+	add	r0, r4, r0, lsl #1
877
+	ldrh	r0, [r0, #156]
878
+.L112:
879
+	add	r4, r4, r8, lsl #2
880
+	ldr	r3, [r4, #1180]
881
+	mla	r6, r6, r1, r3
614
882
 	ldrb	r3, [sp, #48]	@ zero_extendqisi2
615
883
 	cmp	r3, #1
616
-	add	r1, r1, fp
617
-	str	r1, [r9]
618
-	str	r0, [r8]
619
-	bls	.L89
884
+	add	r0, r0, r6
885
+	str	r0, [r9]
886
+	str	r8, [fp]
887
+	bls	.L114
620
888
 	ldr	r0, [r7, #4]
621
889
 	ldr	r3, [r7, #40]
622
890
 	add	r0, r0, #1024
623
891
 	subs	r3, r0, r3
624
892
 	rsbs	r0, r3, #0
625
893
 	adcs	r0, r0, r3
626
-	b	.L88
627
-.L89:
628
-	movs	r0, #0
629
-.L88:
894
+.L113:
630
895
 	add	sp, sp, #12
631
896
 	@ sp needed
632
897
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
633
-.L91:
898
+.L114:
899
+	movs	r0, #0
900
+	b	.L113
901
+.L116:
634
902
 	.align	2
635
-.L90:
903
+.L115:
636
904
 	.word	.LANCHOR0
637
905
 	.fnend
638
906
 	.size	LogAddr2PhyAddr, .-LogAddr2PhyAddr
639
907
 	.align	1
640
-	.global	FlashScheduleEnSet
908
+	.global	FlashReadStatusEN
909
+	.syntax unified
641
910
 	.thumb
642
911
 	.thumb_func
912
+	.fpu softvfp
913
+	.type	FlashReadStatusEN, %function
914
+FlashReadStatusEN:
915
+	.fnstart
916
+	@ args = 0, pretend = 0, frame = 0
917
+	@ frame_needed = 0, uses_anonymous_args = 0
918
+	ldr	r3, .L129
919
+	push	{r4, r5, r6, lr}
920
+	.save {r4, r5, r6, lr}
921
+	ldr	r5, [r3, r0, lsl #3]
922
+	add	r0, r3, r0, lsl #3
923
+	ldrb	r4, [r0, #4]	@ zero_extendqisi2
924
+	ldr	r0, [r3, #48]
925
+	ldrb	r0, [r0, #8]	@ zero_extendqisi2
926
+	cmp	r0, #2
927
+	mov	r0, r3
928
+	lsl	r3, r4, #8
929
+	add	r4, r4, #8
930
+	bne	.L118
931
+	cbnz	r2, .L119
932
+	ldrb	r2, [r0, #65]	@ zero_extendqisi2
933
+.L128:
934
+	add	r3, r3, r5
935
+	str	r2, [r3, #2056]
936
+	ldrb	r0, [r0, #67]	@ zero_extendqisi2
937
+	cbz	r0, .L123
938
+	add	r6, r5, r4, lsl #8
939
+	movs	r2, #0
940
+.L122:
941
+	cmp	r2, r0
942
+	bcc	.L124
943
+.L123:
944
+	lsls	r4, r4, #8
945
+	movs	r0, #80
946
+	bl	ndelay
947
+	ldr	r0, [r5, r4]
948
+	uxtb	r0, r0
949
+	pop	{r4, r5, r6, pc}
950
+.L119:
951
+	ldrb	r2, [r0, #66]	@ zero_extendqisi2
952
+	b	.L128
953
+.L124:
954
+	lsls	r3, r2, #3
955
+	adds	r2, r2, #1
956
+	lsr	r3, r1, r3
957
+	uxtb	r3, r3
958
+	str	r3, [r6, #4]
959
+	b	.L122
960
+.L118:
961
+	add	r3, r3, r5
962
+	movs	r2, #112
963
+	str	r2, [r3, #2056]
964
+	b	.L123
965
+.L130:
966
+	.align	2
967
+.L129:
968
+	.word	.LANCHOR0
969
+	.fnend
970
+	.size	FlashReadStatusEN, .-FlashReadStatusEN
971
+	.align	1
972
+	.global	FlashWaitReadyEN
973
+	.syntax unified
974
+	.thumb
975
+	.thumb_func
976
+	.fpu softvfp
977
+	.type	FlashWaitReadyEN, %function
978
+FlashWaitReadyEN:
979
+	.fnstart
980
+	@ args = 0, pretend = 0, frame = 0
981
+	@ frame_needed = 0, uses_anonymous_args = 0
982
+	push	{r4, r5, r6, lr}
983
+	.save {r4, r5, r6, lr}
984
+	mov	r4, r0
985
+	mov	r5, r1
986
+	mov	r6, r2
987
+.L132:
988
+	mov	r2, r6
989
+	mov	r1, r5
990
+	mov	r0, r4
991
+	bl	FlashReadStatusEN
992
+	cmp	r0, #255
993
+	mov	r3, r0
994
+	beq	.L132
995
+	lsls	r3, r3, #25
996
+	bmi	.L131
997
+	movs	r1, #3
998
+	movs	r0, #1
999
+	bl	usleep_range
1000
+	b	.L132
1001
+.L131:
1002
+	pop	{r4, r5, r6, pc}
1003
+	.fnend
1004
+	.size	FlashWaitReadyEN, .-FlashWaitReadyEN
1005
+	.align	1
1006
+	.global	FlashScheduleEnSet
1007
+	.syntax unified
1008
+	.thumb
1009
+	.thumb_func
1010
+	.fpu softvfp
643
1011
 	.type	FlashScheduleEnSet, %function
644
1012
 FlashScheduleEnSet:
645
1013
 	.fnstart
646
1014
 	@ args = 0, pretend = 0, frame = 0
647
1015
 	@ frame_needed = 0, uses_anonymous_args = 0
648
1016
 	@ link register save eliminated.
649
-	ldr	r3, .L93
650
-	ldr	r2, [r3, #1204]
651
-	str	r0, [r3, #1204]
1017
+	ldr	r3, .L138
1018
+	ldr	r2, [r3, #1212]
1019
+	str	r0, [r3, #1212]
652
1020
 	mov	r0, r2
653
1021
 	bx	lr
654
-.L94:
1022
+.L139:
655
1023
 	.align	2
656
-.L93:
1024
+.L138:
657
1025
 	.word	.LANCHOR0
658
1026
 	.fnend
659
1027
 	.size	FlashScheduleEnSet, .-FlashScheduleEnSet
660
1028
 	.align	1
661
1029
 	.global	FlashGetPageSize
1030
+	.syntax unified
662
1031
 	.thumb
663
1032
 	.thumb_func
1033
+	.fpu softvfp
664
1034
 	.type	FlashGetPageSize, %function
665
1035
 FlashGetPageSize:
666
1036
 	.fnstart
667
1037
 	@ args = 0, pretend = 0, frame = 0
668
1038
 	@ frame_needed = 0, uses_anonymous_args = 0
669
1039
 	@ link register save eliminated.
670
-	ldr	r3, .L96
671
-	ldr	r3, [r3, #44]
1040
+	ldr	r3, .L141
1041
+	ldr	r3, [r3, #48]
672
1042
 	ldrb	r0, [r3, #9]	@ zero_extendqisi2
673
1043
 	bx	lr
674
-.L97:
1044
+.L142:
675
1045
 	.align	2
676
-.L96:
1046
+.L141:
677
1047
 	.word	.LANCHOR0
678
1048
 	.fnend
679
1049
 	.size	FlashGetPageSize, .-FlashGetPageSize
680
1050
 	.align	1
681
1051
 	.global	NandcReadDontCaseBusyEn
1052
+	.syntax unified
682
1053
 	.thumb
683
1054
 	.thumb_func
1055
+	.fpu softvfp
684
1056
 	.type	NandcReadDontCaseBusyEn, %function
685
1057
 NandcReadDontCaseBusyEn:
686
1058
 	.fnstart
..
..
@@ -692,355 +1064,210 @@
692
1064
 	.size	NandcReadDontCaseBusyEn, .-NandcReadDontCaseBusyEn
693
1065
 	.align	1
694
1066
 	.global	NandcGetChipIf
1067
+	.syntax unified
695
1068
 	.thumb
696
1069
 	.thumb_func
1070
+	.fpu softvfp
697
1071
 	.type	NandcGetChipIf, %function
698
1072
 NandcGetChipIf:
699
1073
 	.fnstart
700
1074
 	@ args = 0, pretend = 0, frame = 0
701
1075
 	@ frame_needed = 0, uses_anonymous_args = 0
702
1076
 	@ link register save eliminated.
703
-	ldr	r3, .L100
704
-	add	r0, r3, r0, lsl #3
705
-	ldrb	r2, [r0, #16]	@ zero_extendqisi2
706
-	ldr	r0, [r0, #12]
707
-	adds	r2, r2, #8
708
-	add	r0, r0, r2, lsl #8
1077
+	ldr	r2, .L145
1078
+	add	r3, r2, r0, lsl #3
1079
+	ldr	r0, [r2, r0, lsl #3]
1080
+	ldrb	r3, [r3, #4]	@ zero_extendqisi2
1081
+	adds	r3, r3, #8
1082
+	add	r0, r0, r3, lsl #8
709
1083
 	bx	lr
710
-.L101:
1084
+.L146:
711
1085
 	.align	2
712
-.L100:
1086
+.L145:
713
1087
 	.word	.LANCHOR0
714
1088
 	.fnend
715
1089
 	.size	NandcGetChipIf, .-NandcGetChipIf
716
1090
 	.align	1
717
1091
 	.global	NandcSetDdrPara
1092
+	.syntax unified
718
1093
 	.thumb
719
1094
 	.thumb_func
1095
+	.fpu softvfp
720
1096
 	.type	NandcSetDdrPara, %function
721
1097
 NandcSetDdrPara:
722
1098
 	.fnstart
723
1099
 	@ args = 0, pretend = 0, frame = 0
724
1100
 	@ frame_needed = 0, uses_anonymous_args = 0
725
1101
 	@ link register save eliminated.
726
-	ldr	r3, .L103
727
-	ldr	r2, [r3, #80]
1102
+	ldr	r3, .L148
1103
+	ldr	r2, [r3, #88]
728
1104
 	lsls	r3, r0, #8
729
1105
 	orr	r0, r3, r0, lsl #16
730
-	orr	r3, r0, #1
731
-	str	r3, [r2, #304]
1106
+	orr	r0, r0, #1
1107
+	str	r0, [r2, #304]
732
1108
 	bx	lr
733
-.L104:
1109
+.L149:
734
1110
 	.align	2
735
-.L103:
1111
+.L148:
736
1112
 	.word	.LANCHOR0
737
1113
 	.fnend
738
1114
 	.size	NandcSetDdrPara, .-NandcSetDdrPara
739
1115
 	.align	1
740
1116
 	.global	NandcSetDdrDiv
1117
+	.syntax unified
741
1118
 	.thumb
742
1119
 	.thumb_func
1120
+	.fpu softvfp
743
1121
 	.type	NandcSetDdrDiv, %function
744
1122
 NandcSetDdrDiv:
745
1123
 	.fnstart
746
1124
 	@ args = 0, pretend = 0, frame = 0
747
1125
 	@ frame_needed = 0, uses_anonymous_args = 0
748
1126
 	@ link register save eliminated.
749
-	ldr	r3, .L106
1127
+	ldr	r3, .L151
750
1128
 	orr	r0, r0, #16640
751
-	ldr	r3, [r3, #80]
1129
+	ldr	r3, [r3, #88]
752
1130
 	str	r0, [r3, #344]
753
1131
 	bx	lr
754
-.L107:
1132
+.L152:
755
1133
 	.align	2
756
-.L106:
1134
+.L151:
757
1135
 	.word	.LANCHOR0
758
1136
 	.fnend
759
1137
 	.size	NandcSetDdrDiv, .-NandcSetDdrDiv
760
1138
 	.align	1
761
1139
 	.global	NandcSetDdrMode
1140
+	.syntax unified
762
1141
 	.thumb
763
1142
 	.thumb_func
1143
+	.fpu softvfp
764
1144
 	.type	NandcSetDdrMode, %function
765
1145
 NandcSetDdrMode:
766
1146
 	.fnstart
767
1147
 	@ args = 0, pretend = 0, frame = 0
768
1148
 	@ frame_needed = 0, uses_anonymous_args = 0
769
1149
 	@ link register save eliminated.
770
-	ldr	r3, .L111
771
-	ldr	r2, [r3, #80]
1150
+	ldr	r3, .L156
1151
+	ldr	r2, [r3, #88]
772
1152
 	ldr	r3, [r2]
773
-	cbnz	r0, .L109
1153
+	cbnz	r0, .L154
774
1154
 	bfi	r3, r0, #13, #1
775
-	b	.L110
776
-.L109:
777
-	orr	r3, r3, #253952
778
-.L110:
1155
+.L155:
779
1156
 	str	r3, [r2]
780
1157
 	bx	lr
781
-.L112:
1158
+.L154:
1159
+	orr	r3, r3, #253952
1160
+	b	.L155
1161
+.L157:
782
1162
 	.align	2
783
-.L111:
1163
+.L156:
784
1164
 	.word	.LANCHOR0
785
1165
 	.fnend
786
1166
 	.size	NandcSetDdrMode, .-NandcSetDdrMode
787
1167
 	.align	1
788
1168
 	.global	NandcSetMode
1169
+	.syntax unified
789
1170
 	.thumb
790
1171
 	.thumb_func
1172
+	.fpu softvfp
791
1173
 	.type	NandcSetMode, %function
792
1174
 NandcSetMode:
793
1175
 	.fnstart
794
1176
 	@ args = 0, pretend = 0, frame = 0
795
1177
 	@ frame_needed = 0, uses_anonymous_args = 0
796
1178
 	@ link register save eliminated.
797
-	ldr	r3, .L120
1179
+	ldr	r3, .L165
798
1180
 	ands	r1, r0, #6
799
-	ldr	r2, [r3, #80]
1181
+	ldr	r2, [r3, #88]
800
1182
 	ldr	r3, [r2]
801
-	beq	.L114
802
-	orr	r3, r3, #24576
1183
+	beq	.L159
803
1184
 	lsls	r1, r0, #29
804
-	bfc	r3, #15, #1
1185
+	orr	r3, r3, #24576
805
1186
 	movw	r1, #8322
806
-	orr	r3, r3, #196608
1187
+	bfc	r3, #15, #1
807
1188
 	str	r1, [r2, #344]
808
1189
 	add	r1, r1, #1040384
1190
+	addw	r1, r1, #3969
1191
+	orr	r3, r3, #196608
1192
+	str	r1, [r2, #304]
809
1193
 	it	mi
810
1194
 	orrmi	r3, r3, #32768
811
-	addw	r1, r1, #3969
812
-	str	r1, [r2, #304]
813
1195
 	movs	r1, #38
814
1196
 	str	r1, [r2, #308]
815
1197
 	movs	r1, #39
816
1198
 	str	r1, [r2, #308]
817
-	b	.L116
818
-.L114:
819
-	bfi	r3, r1, #13, #1
820
-.L116:
1199
+.L161:
821
1200
 	str	r3, [r2]
822
1201
 	movs	r0, #0
823
1202
 	bx	lr
824
-.L121:
1203
+.L159:
1204
+	bfi	r3, r1, #13, #1
1205
+	b	.L161
1206
+.L166:
825
1207
 	.align	2
826
-.L120:
1208
+.L165:
827
1209
 	.word	.LANCHOR0
828
1210
 	.fnend
829
1211
 	.size	NandcSetMode, .-NandcSetMode
830
1212
 	.align	1
831
1213
 	.global	NandcFlashCs
1214
+	.syntax unified
832
1215
 	.thumb
833
1216
 	.thumb_func
1217
+	.fpu softvfp
834
1218
 	.type	NandcFlashCs, %function
835
1219
 NandcFlashCs:
836
1220
 	.fnstart
837
1221
 	@ args = 0, pretend = 0, frame = 0
838
1222
 	@ frame_needed = 0, uses_anonymous_args = 0
839
1223
 	@ link register save eliminated.
840
-	ldr	r2, .L123
841
-	add	r0, r2, r0, lsl #3
1224
+	ldr	r3, .L168
842
1225
 	movs	r2, #1
843
-	ldr	r1, [r0, #12]
844
-	ldrb	r0, [r0, #16]	@ zero_extendqisi2
1226
+	ldr	r1, [r3, r0, lsl #3]
1227
+	add	r0, r3, r0, lsl #3
1228
+	ldrb	r0, [r0, #4]	@ zero_extendqisi2
845
1229
 	ldr	r3, [r1]
846
1230
 	lsls	r2, r2, r0
847
1231
 	bfi	r3, r2, #0, #8
848
1232
 	str	r3, [r1]
849
1233
 	bx	lr
850
-.L124:
1234
+.L169:
851
1235
 	.align	2
852
-.L123:
1236
+.L168:
853
1237
 	.word	.LANCHOR0
854
1238
 	.fnend
855
1239
 	.size	NandcFlashCs, .-NandcFlashCs
856
1240
 	.align	1
857
1241
 	.global	NandcFlashDeCs
1242
+	.syntax unified
858
1243
 	.thumb
859
1244
 	.thumb_func
1245
+	.fpu softvfp
860
1246
 	.type	NandcFlashDeCs, %function
861
1247
 NandcFlashDeCs:
862
1248
 	.fnstart
863
1249
 	@ args = 0, pretend = 0, frame = 0
864
1250
 	@ frame_needed = 0, uses_anonymous_args = 0
865
1251
 	@ link register save eliminated.
866
-	ldr	r3, .L126
867
-	add	r0, r3, r0, lsl #3
868
-	ldr	r2, [r0, #12]
1252
+	ldr	r3, .L171
1253
+	ldr	r2, [r3, r0, lsl #3]
869
1254
 	ldr	r3, [r2]
870
1255
 	bfc	r3, #0, #8
871
1256
 	bfc	r3, #17, #1
872
1257
 	str	r3, [r2]
873
1258
 	bx	lr
874
-.L127:
1259
+.L172:
875
1260
 	.align	2
876
-.L126:
1261
+.L171:
877
1262
 	.word	.LANCHOR0
878
1263
 	.fnend
879
1264
 	.size	NandcFlashDeCs, .-NandcFlashDeCs
880
1265
 	.align	1
881
-	.global	NandcDelayns
882
-	.thumb
883
-	.thumb_func
884
-	.type	NandcDelayns, %function
885
-NandcDelayns:
886
-	.fnstart
887
-	@ args = 0, pretend = 0, frame = 0
888
-	@ frame_needed = 0, uses_anonymous_args = 0
889
-	push	{r3, lr}
890
-	.save {r3, lr}
891
-	addw	r0, r0, #999
892
-	ldr	r3, .L129
893
-	umull	r0, r1, r0, r3
894
-	ldr	r3, .L129+4
895
-	ldr	r3, [r3, #8]
896
-	lsrs	r0, r1, #6
897
-	blx	r3
898
-	movs	r0, #0
899
-	pop	{r3, pc}
900
-.L130:
901
-	.align	2
902
-.L129:
903
-	.word	274877907
904
-	.word	arm_delay_ops
905
-	.fnend
906
-	.size	NandcDelayns, .-NandcDelayns
907
-	.align	1
908
-	.global	FlashReadStatus
909
-	.thumb
910
-	.thumb_func
911
-	.type	FlashReadStatus, %function
912
-FlashReadStatus:
913
-	.fnstart
914
-	@ args = 0, pretend = 0, frame = 0
915
-	@ frame_needed = 0, uses_anonymous_args = 0
916
-	push	{r3, r4, r5, lr}
917
-	.save {r3, r4, r5, lr}
918
-	movs	r2, #112
919
-	ldr	r3, .L132
920
-	add	r0, r3, r0, lsl #3
921
-	ldrb	r4, [r0, #16]	@ zero_extendqisi2
922
-	ldr	r5, [r0, #12]
923
-	movs	r0, #80
924
-	add	r3, r5, r4, lsl #8
925
-	adds	r4, r4, #8
926
-	str	r2, [r3, #2056]
927
-	lsls	r4, r4, #8
928
-	bl	NandcDelayns
929
-	ldr	r0, [r5, r4]
930
-	pop	{r3, r4, r5, pc}
931
-.L133:
932
-	.align	2
933
-.L132:
934
-	.word	.LANCHOR0
935
-	.fnend
936
-	.size	FlashReadStatus, .-FlashReadStatus
937
-	.align	1
938
-	.global	ToshibaSetRRPara
939
-	.thumb
940
-	.thumb_func
941
-	.type	ToshibaSetRRPara, %function
942
-ToshibaSetRRPara:
943
-	.fnstart
944
-	@ args = 0, pretend = 0, frame = 0
945
-	@ frame_needed = 0, uses_anonymous_args = 0
946
-	push	{r4, r5, r6, r7, r8, r9, r10, lr}
947
-	.save {r4, r5, r6, r7, r8, r9, r10, lr}
948
-	add	r8, r1, r1, lsl #2
949
-	ldr	r9, .L143+8
950
-	movs	r4, #0
951
-	ldr	r7, .L143
952
-	mov	r5, r0
953
-	add	r10, r9, #256
954
-	mov	r6, r1
955
-.L135:
956
-	ldrb	r3, [r7, #1209]	@ zero_extendqisi2
957
-	cmp	r4, r3
958
-	bcs	.L142
959
-	movs	r3, #85
960
-	str	r3, [r5, #8]
961
-	ldrsb	r3, [r4, r10]
962
-	movs	r0, #200
963
-	str	r3, [r5, #4]
964
-	bl	NandcDelayns
965
-	ldrb	r3, [r7, #1208]	@ zero_extendqisi2
966
-	cmp	r3, #34
967
-	bne	.L136
968
-	add	r3, r4, r8
969
-	add	r3, r3, r10
970
-	b	.L141
971
-.L136:
972
-	cmp	r3, #35
973
-	bne	.L138
974
-	ldr	r2, .L143+4
975
-	add	r3, r4, r8
976
-	add	r3, r3, r2
977
-.L141:
978
-	ldrsb	r3, [r3, #5]
979
-	b	.L140
980
-.L138:
981
-	add	r3, r9, r6
982
-	ldrsb	r3, [r3, #400]
983
-.L140:
984
-	str	r3, [r5]
985
-	adds	r4, r4, #1
986
-	b	.L135
987
-.L142:
988
-	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
989
-.L144:
990
-	.align	2
991
-.L143:
992
-	.word	.LANCHOR0
993
-	.word	.LANCHOR1+304
994
-	.word	.LANCHOR1
995
-	.fnend
996
-	.size	ToshibaSetRRPara, .-ToshibaSetRRPara
997
-	.align	1
998
-	.global	SamsungSetRRPara
999
-	.thumb
1000
-	.thumb_func
1001
-	.type	SamsungSetRRPara, %function
1002
-SamsungSetRRPara:
1003
-	.fnstart
1004
-	@ args = 0, pretend = 0, frame = 0
1005
-	@ frame_needed = 0, uses_anonymous_args = 0
1006
-	ldr	r3, .L149
1007
-	push	{r4, r5, r6, r7, r8, r9, r10, lr}
1008
-	.save {r4, r5, r6, r7, r8, r9, r10, lr}
1009
-	add	r1, r3, r1, lsl #2
1010
-	movs	r4, #0
1011
-	ldr	r8, .L149+4
1012
-	adds	r5, r1, #3
1013
-	mov	r9, #161
1014
-	mov	r6, r0
1015
-	mov	r7, r3
1016
-	mov	r10, r4
1017
-.L146:
1018
-	ldrb	r3, [r8, #1209]	@ zero_extendqisi2
1019
-	cmp	r4, r3
1020
-	bcs	.L148
1021
-	str	r9, [r6, #8]
1022
-	mov	r0, #300
1023
-	str	r10, [r6]
1024
-	ldrsb	r3, [r7, r4]
1025
-	adds	r4, r4, #1
1026
-	str	r3, [r6]
1027
-	ldrsb	r3, [r5, #1]!
1028
-	str	r3, [r6]
1029
-	bl	NandcDelayns
1030
-	b	.L146
1031
-.L148:
1032
-	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
1033
-.L150:
1034
-	.align	2
1035
-.L149:
1036
-	.word	.LANCHOR1+408
1037
-	.word	.LANCHOR0
1038
-	.fnend
1039
-	.size	SamsungSetRRPara, .-SamsungSetRRPara
1040
-	.align	1
1041
1266
 	.global	HynixSetRRPara
1267
+	.syntax unified
1042
1268
 	.thumb
1043
1269
 	.thumb_func
1270
+	.fpu softvfp
1044
1271
 	.type	HynixSetRRPara, %function
1045
1272
 HynixSetRRPara:
1046
1273
 	.fnstart
..
..
@@ -1050,407 +1277,303 @@
1050
1277
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
1051
1278
 	.pad #12
1052
1279
 	mov	r7, r3
1053
-	ldr	r5, .L159
1280
+	ldr	r5, .L181
1054
1281
 	mov	r6, r0
1055
-	mov	r9, r1
1056
-	mov	fp, r2
1057
-	ldr	r3, [r5, #44]
1058
-	ldrb	r4, [r3, #19]	@ zero_extendqisi2
1059
-	lsls	r3, r0, #3
1060
-	cmp	r4, #6
1061
-	bne	.L152
1062
-	add	r4, r5, r0, lsl #6
1063
-	addw	r4, r4, #1230
1064
-	add	r4, r4, r7, lsl #2
1065
-	b	.L153
1066
-.L152:
1067
-	cmp	r4, #7
1068
-	bne	.L154
1069
-	mov	r10, #160
1070
-	add	r4, r7, r7, lsl #2
1071
-	mla	r10, r10, r0, r5
1072
-	addw	r10, r10, #1238
1073
-	add	r4, r10, r4, lsl #1
1074
-	b	.L153
1075
-.L154:
1076
-	cmp	r4, #8
1077
-	iteet	ne
1078
-	addne	r4, r7, r3
1079
-	addweq	r4, r5, #1238
1080
-	addeq	r2, r7, r7, lsl #2
1081
-	addne	r4, r5, r4, lsl #3
1082
-	ite	eq
1083
-	addeq	r4, r4, r2
1084
-	addwne	r4, r4, #1230
1085
-.L153:
1086
-	add	r3, r3, r5
1282
+	mov	r8, r1
1283
+	mov	r9, r2
1284
+	ldr	r3, [r5, #48]
1285
+	ldrb	r3, [r3, #19]	@ zero_extendqisi2
1286
+	cmp	r3, #6
1287
+	bne	.L174
1288
+	movs	r3, #20
1289
+	add	r4, r5, #1216
1290
+	add	r3, r3, r0, lsl #6
1291
+	add	r3, r3, r7, lsl #2
1292
+.L180:
1293
+	add	r4, r4, r3
1294
+	b	.L175
1295
+.L174:
1296
+	cmp	r3, #7
1297
+	bne	.L176
1298
+	movs	r3, #160
1299
+	movs	r4, #28
1300
+	smlabb	r4, r3, r0, r4
1301
+	movs	r3, #10
1302
+	add	r2, r5, #1216
1303
+	smlabb	r3, r3, r7, r4
1304
+	adds	r4, r2, r3
1305
+.L175:
1306
+	add	r3, r5, r6, lsl #3
1307
+	ldr	r10, [r5, r6, lsl #3]
1087
1308
 	mov	r0, r6
1088
-	add	r9, r9, #-1
1089
-	subs	r4, r4, #1
1090
-	ldrb	r8, [r3, #16]	@ zero_extendqisi2
1091
-	add	r9, r9, fp
1092
-	ldr	r10, [r3, #12]
1309
+	ldrb	fp, [r3, #4]	@ zero_extendqisi2
1310
+	add	r8, r8, #-1
1093
1311
 	bl	NandcFlashCs
1094
-	add	r1, fp, #-1
1095
-	movs	r2, #54
1096
-	lsl	r8, r8, #8
1097
-	add	r3, r10, r8
1098
-	mov	fp, r3
1099
-	str	r2, [r3, #2056]
1100
-.L156:
1101
-	cmp	r1, r9
1102
-	beq	.L158
1103
-	ldrb	r3, [r1, #1]!	@ zero_extendqisi2
1104
-	movs	r0, #200
1105
-	str	r3, [fp, #2052]
1106
-	str	r1, [sp, #4]
1107
-	bl	NandcDelayns
1108
-	ldrsb	r3, [r4, #1]!
1109
-	str	r3, [fp, #2048]
1110
-	ldr	r1, [sp, #4]
1111
-	b	.L156
1112
-.L158:
1113
-	add	r8, r8, r10
1312
+	movs	r3, #54
1313
+	add	r8, r8, r9
1314
+	subs	r4, r4, #1
1315
+	lsl	fp, fp, #8
1316
+	add	r0, r10, fp
1317
+	str	r3, [r0, #2056]
1318
+	add	r3, r9, #-1
1319
+	mov	r9, r0
1320
+.L178:
1321
+	cmp	r3, r8
1322
+	bne	.L179
1114
1323
 	movs	r3, #22
1324
+	add	r10, r10, fp
1325
+	str	r3, [r10, #2056]
1115
1326
 	mov	r0, r6
1116
1327
 	add	r5, r5, r6
1117
-	str	r3, [r8, #2056]
1118
1328
 	bl	NandcFlashDeCs
1119
-	strb	r7, [r5, #2064]
1329
+	strb	r7, [r5, #2068]
1120
1330
 	add	sp, sp, #12
1121
1331
 	@ sp needed
1122
1332
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
1123
-.L160:
1333
+.L176:
1334
+	cmp	r3, #8
1335
+	bne	.L177
1336
+	addw	r4, r5, #1244
1337
+	add	r3, r7, r7, lsl #2
1338
+	b	.L180
1339
+.L177:
1340
+	adds	r4, r7, #2
1341
+	add	r4, r4, r0, lsl #3
1342
+	add	r4, r5, r4, lsl #3
1343
+	addw	r4, r4, #1220
1344
+	b	.L175
1345
+.L179:
1346
+	ldrb	r2, [r3, #1]!	@ zero_extendqisi2
1347
+	movs	r0, #200
1348
+	str	r2, [r9, #2052]
1349
+	str	r3, [sp, #4]
1350
+	bl	ndelay
1351
+	ldrsb	r2, [r4, #1]!
1352
+	ldr	r3, [sp, #4]
1353
+	str	r2, [r9, #2048]
1354
+	b	.L178
1355
+.L182:
1124
1356
 	.align	2
1125
-.L159:
1357
+.L181:
1126
1358
 	.word	.LANCHOR0
1127
1359
 	.fnend
1128
1360
 	.size	HynixSetRRPara, .-HynixSetRRPara
1129
1361
 	.align	1
1130
1362
 	.global	FlashSetReadRetryDefault
1363
+	.syntax unified
1131
1364
 	.thumb
1132
1365
 	.thumb_func
1366
+	.fpu softvfp
1133
1367
 	.type	FlashSetReadRetryDefault, %function
1134
1368
 FlashSetReadRetryDefault:
1135
1369
 	.fnstart
1136
1370
 	@ args = 0, pretend = 0, frame = 0
1137
1371
 	@ frame_needed = 0, uses_anonymous_args = 0
1138
-	push	{r3, r4, r5, lr}
1139
-	.save {r3, r4, r5, lr}
1140
-	ldr	r3, .L167
1141
-	ldr	r2, [r3, #44]
1142
-	ldrb	r2, [r2, #19]	@ zero_extendqisi2
1143
-	subs	r2, r2, #1
1144
-	cmp	r2, #7
1145
-	bhi	.L161
1372
+	push	{r4, r5, r6, lr}
1373
+	.save {r4, r5, r6, lr}
1374
+	ldr	r5, .L189
1375
+	ldr	r3, [r5, #48]
1376
+	ldrb	r3, [r3, #19]	@ zero_extendqisi2
1377
+	subs	r3, r3, #1
1378
+	cmp	r3, #7
1379
+	bhi	.L183
1146
1380
 	movs	r4, #0
1147
-	mov	r5, r3
1148
-.L162:
1149
-	ldr	r2, .L167+4
1381
+	addw	r6, r5, #2072
1382
+.L186:
1383
+	ldrb	r3, [r6, r4, lsl #3]	@ zero_extendqisi2
1150
1384
 	uxtb	r0, r4
1151
-	ldrb	r3, [r2, r4, lsl #3]	@ zero_extendqisi2
1152
1385
 	cmp	r3, #173
1153
-	bne	.L163
1154
-	ldrb	r1, [r5, #1211]	@ zero_extendqisi2
1155
-	subw	r2, r2, #854
1386
+	bne	.L185
1156
1387
 	movs	r3, #0
1388
+	ldr	r2, .L189+4
1389
+	ldrb	r1, [r5, #1217]	@ zero_extendqisi2
1157
1390
 	bl	HynixSetRRPara
1158
-.L163:
1391
+.L185:
1159
1392
 	adds	r4, r4, #1
1160
1393
 	cmp	r4, #4
1161
-	bne	.L162
1162
-.L161:
1163
-	pop	{r3, r4, r5, pc}
1164
-.L168:
1394
+	bne	.L186
1395
+.L183:
1396
+	pop	{r4, r5, r6, pc}
1397
+.L190:
1165
1398
 	.align	2
1166
-.L167:
1399
+.L189:
1167
1400
 	.word	.LANCHOR0
1168
-	.word	.LANCHOR0+2068
1401
+	.word	.LANCHOR0+1220
1169
1402
 	.fnend
1170
1403
 	.size	FlashSetReadRetryDefault, .-FlashSetReadRetryDefault
1171
1404
 	.align	1
1172
-	.global	FlashReadStatusEN
1173
-	.thumb
1174
-	.thumb_func
1175
-	.type	FlashReadStatusEN, %function
1176
-FlashReadStatusEN:
1177
-	.fnstart
1178
-	@ args = 0, pretend = 0, frame = 0
1179
-	@ frame_needed = 0, uses_anonymous_args = 0
1180
-	push	{r4, r5, r6, lr}
1181
-	.save {r4, r5, r6, lr}
1182
-	ldr	r5, .L179
1183
-	add	r0, r5, r0, lsl #3
1184
-	ldr	r3, [r5, #44]
1185
-	ldrb	r4, [r0, #16]	@ zero_extendqisi2
1186
-	ldr	r6, [r0, #12]
1187
-	ldrb	r3, [r3, #8]	@ zero_extendqisi2
1188
-	cmp	r3, #2
1189
-	lsl	r3, r4, #8
1190
-	add	r4, r4, #8
1191
-	bne	.L170
1192
-	cbnz	r2, .L171
1193
-	ldrb	r2, [r5, #61]	@ zero_extendqisi2
1194
-	b	.L178
1195
-.L171:
1196
-	ldrb	r2, [r5, #62]	@ zero_extendqisi2
1197
-.L178:
1198
-	add	r3, r3, r6
1199
-	str	r2, [r3, #2056]
1200
-	ldrb	r0, [r5, #63]	@ zero_extendqisi2
1201
-	cbz	r0, .L174
1202
-	movs	r3, #0
1203
-	add	r5, r6, r4, lsl #8
1204
-.L173:
1205
-	cmp	r3, r0
1206
-	bcs	.L174
1207
-	lsls	r2, r3, #3
1208
-	adds	r3, r3, #1
1209
-	lsr	r2, r1, r2
1210
-	uxtb	r2, r2
1211
-	str	r2, [r5, #4]
1212
-	b	.L173
1213
-.L170:
1214
-	add	r3, r3, r6
1215
-	movs	r2, #112
1216
-	str	r2, [r3, #2056]
1217
-.L174:
1218
-	movs	r0, #80
1219
-	lsls	r4, r4, #8
1220
-	bl	NandcDelayns
1221
-	ldr	r0, [r6, r4]
1222
-	uxtb	r0, r0
1223
-	pop	{r4, r5, r6, pc}
1224
-.L180:
1225
-	.align	2
1226
-.L179:
1227
-	.word	.LANCHOR0
1228
-	.fnend
1229
-	.size	FlashReadStatusEN, .-FlashReadStatusEN
1230
-	.align	1
1231
-	.global	FlashWaitReadyEN
1232
-	.thumb
1233
-	.thumb_func
1234
-	.type	FlashWaitReadyEN, %function
1235
-FlashWaitReadyEN:
1236
-	.fnstart
1237
-	@ args = 0, pretend = 0, frame = 0
1238
-	@ frame_needed = 0, uses_anonymous_args = 0
1239
-	push	{r4, r5, r6, lr}
1240
-	.save {r4, r5, r6, lr}
1241
-	mov	r4, r0
1242
-	mov	r5, r1
1243
-	mov	r6, r2
1244
-.L182:
1245
-	mov	r0, r4
1246
-	mov	r1, r5
1247
-	mov	r2, r6
1248
-	bl	FlashReadStatusEN
1249
-	cmp	r0, #255
1250
-	mov	r3, r0
1251
-	beq	.L182
1252
-	lsls	r3, r3, #25
1253
-	bmi	.L183
1254
-	movs	r0, #1
1255
-	movs	r1, #3
1256
-	bl	usleep_range
1257
-	b	.L182
1258
-.L183:
1259
-	pop	{r4, r5, r6, pc}
1260
-	.fnend
1261
-	.size	FlashWaitReadyEN, .-FlashWaitReadyEN
1262
-	.align	1
1263
1405
 	.global	FlashWaitCmdDone
1406
+	.syntax unified
1264
1407
 	.thumb
1265
1408
 	.thumb_func
1409
+	.fpu softvfp
1266
1410
 	.type	FlashWaitCmdDone, %function
1267
1411
 FlashWaitCmdDone:
1268
1412
 	.fnstart
1269
1413
 	@ args = 0, pretend = 0, frame = 0
1270
1414
 	@ frame_needed = 0, uses_anonymous_args = 0
1271
-	push	{r3, r4, r5, r6, r7, r8, r9, lr}
1272
-	.save {r3, r4, r5, r6, r7, r8, r9, lr}
1273
-	mov	r8, r0
1274
-	ldr	r5, .L194
1415
+	push	{r3, r4, r5, r6, r7, lr}
1416
+	.save {r3, r4, r5, r6, r7, lr}
1417
+	mov	r7, r0
1418
+	ldr	r5, .L198
1275
1419
 	add	r4, r5, r0, lsl #4
1276
-	ldr	r3, [r4, #2108]
1277
-	ldrb	r6, [r4, #2100]	@ zero_extendqisi2
1278
-	cbz	r3, .L189
1279
-	add	r5, r5, r8, lsl #2
1420
+	ldr	r3, [r4, #2112]
1421
+	cbz	r3, .L193
1422
+	ldrb	r6, [r4, #2104]	@ zero_extendqisi2
1423
+	add	r5, r5, r7, lsl #2
1280
1424
 	mov	r0, r6
1281
1425
 	bl	NandcFlashCs
1282
-	ldr	r1, [r4, #2104]
1283
-	ldr	r2, [r5, #1172]
1426
+	ldr	r2, [r5, #1180]
1284
1427
 	mov	r0, r6
1428
+	ldr	r1, [r4, #2108]
1285
1429
 	adds	r2, r2, #0
1286
1430
 	it	ne
1287
1431
 	movne	r2, #1
1288
1432
 	bl	FlashWaitReadyEN
1289
-	mov	r5, r0
1433
+	mov	r1, r0
1290
1434
 	mov	r0, r6
1291
1435
 	bl	NandcFlashDeCs
1292
-	ldr	r2, [r4, #2108]
1293
-	sbfx	r3, r5, #0, #1
1294
-	str	r3, [r2]
1295
-	movs	r2, #0
1296
-	ldr	r1, [r4, #2112]
1297
-	str	r2, [r4, #2108]
1298
-	cbz	r1, .L189
1299
-	str	r3, [r1]
1300
-	str	r2, [r4, #2112]
1301
-.L189:
1436
+	ldr	r3, [r4, #2112]
1437
+	sbfx	r1, r1, #0, #1
1438
+	str	r1, [r3]
1439
+	movs	r3, #0
1440
+	ldr	r2, [r4, #2116]
1441
+	str	r3, [r4, #2112]
1442
+	cbz	r2, .L193
1443
+	str	r1, [r2]
1444
+	str	r3, [r4, #2116]
1445
+.L193:
1302
1446
 	movs	r0, #0
1303
-	pop	{r3, r4, r5, r6, r7, r8, r9, pc}
1304
-.L195:
1447
+	pop	{r3, r4, r5, r6, r7, pc}
1448
+.L199:
1305
1449
 	.align	2
1306
-.L194:
1450
+.L198:
1307
1451
 	.word	.LANCHOR0
1308
1452
 	.fnend
1309
1453
 	.size	FlashWaitCmdDone, .-FlashWaitCmdDone
1310
1454
 	.align	1
1455
+	.global	NandcDelayns
1456
+	.syntax unified
1311
1457
 	.thumb
1312
1458
 	.thumb_func
1313
-	.type	flash_read_ecc, %function
1314
-flash_read_ecc:
1459
+	.fpu softvfp
1460
+	.type	NandcDelayns, %function
1461
+NandcDelayns:
1315
1462
 	.fnstart
1316
1463
 	@ args = 0, pretend = 0, frame = 0
1317
1464
 	@ frame_needed = 0, uses_anonymous_args = 0
1318
-	ldr	r2, .L197
1319
-	push	{r4, lr}
1320
-	.save {r4, lr}
1321
-	add	r0, r2, r0, lsl #3
1322
-	ldrb	r4, [r0, #16]	@ zero_extendqisi2
1323
-	ldr	r3, [r0, #12]
1324
-	movs	r0, #80
1325
-	add	r4, r3, r4, lsl #8
1326
-	movs	r3, #122
1327
-	str	r3, [r4, #2056]
1328
-	bl	NandcDelayns
1329
-	ldr	r3, [r4, #2048]
1330
-	ldr	r0, [r4, #2048]
1331
-	and	r3, r3, #15
1332
-	and	r0, r0, #15
1333
-	cmp	r0, r3
1334
-	it	cc
1335
-	movcc	r0, r3
1336
-	ldr	r3, [r4, #2048]
1337
-	and	r3, r3, #15
1338
-	cmp	r0, r3
1339
-	it	cc
1340
-	movcc	r0, r3
1341
-	ldr	r3, [r4, #2048]
1342
-	and	r3, r3, #15
1343
-	cmp	r0, r3
1344
-	it	cc
1345
-	movcc	r0, r3
1346
-	pop	{r4, pc}
1347
-.L198:
1348
-	.align	2
1349
-.L197:
1350
-	.word	.LANCHOR0
1465
+	push	{r3, lr}
1466
+	.save {r3, lr}
1467
+	bl	ndelay
1468
+	movs	r0, #0
1469
+	pop	{r3, pc}
1351
1470
 	.fnend
1352
-	.size	flash_read_ecc, .-flash_read_ecc
1471
+	.size	NandcDelayns, .-NandcDelayns
1353
1472
 	.align	1
1354
1473
 	.global	NandcWaitFlashReadyNoDelay
1474
+	.syntax unified
1355
1475
 	.thumb
1356
1476
 	.thumb_func
1477
+	.fpu softvfp
1357
1478
 	.type	NandcWaitFlashReadyNoDelay, %function
1358
1479
 NandcWaitFlashReadyNoDelay:
1359
1480
 	.fnstart
1360
1481
 	@ args = 0, pretend = 0, frame = 8
1361
1482
 	@ frame_needed = 0, uses_anonymous_args = 0
1362
-	ldr	r3, .L204
1483
+	ldr	r3, .L206
1363
1484
 	push	{r0, r1, r2, r4, r5, lr}
1364
1485
 	.save {r4, r5, lr}
1365
1486
 	.pad #12
1366
-	add	r0, r3, r0, lsl #3
1367
-	ldr	r4, .L204+4
1368
-	ldr	r5, [r0, #12]
1369
-.L201:
1487
+	ldr	r4, .L206+4
1488
+	ldr	r5, [r3, r0, lsl #3]
1489
+.L203:
1370
1490
 	ldr	r3, [r5]
1371
1491
 	str	r3, [sp, #4]
1372
1492
 	ldr	r3, [sp, #4]
1373
1493
 	lsls	r3, r3, #22
1374
-	bmi	.L202
1494
+	bmi	.L204
1375
1495
 	movs	r0, #10
1376
-	bl	NandcDelayns
1496
+	bl	ndelay
1377
1497
 	subs	r4, r4, #1
1378
-	bne	.L201
1498
+	bne	.L203
1379
1499
 	mov	r0, #-1
1380
-	b	.L200
1381
-.L202:
1382
-	movs	r0, #0
1383
-.L200:
1500
+.L201:
1384
1501
 	add	sp, sp, #12
1385
1502
 	@ sp needed
1386
1503
 	pop	{r4, r5, pc}
1387
-.L205:
1388
-	.align	2
1389
1504
 .L204:
1505
+	movs	r0, #0
1506
+	b	.L201
1507
+.L207:
1508
+	.align	2
1509
+.L206:
1390
1510
 	.word	.LANCHOR0
1391
1511
 	.word	100000
1392
1512
 	.fnend
1393
1513
 	.size	NandcWaitFlashReadyNoDelay, .-NandcWaitFlashReadyNoDelay
1394
1514
 	.align	1
1395
1515
 	.global	NandcWaitFlashReady
1516
+	.syntax unified
1396
1517
 	.thumb
1397
1518
 	.thumb_func
1519
+	.fpu softvfp
1398
1520
 	.type	NandcWaitFlashReady, %function
1399
1521
 NandcWaitFlashReady:
1400
1522
 	.fnstart
1401
1523
 	@ args = 0, pretend = 0, frame = 8
1402
1524
 	@ frame_needed = 0, uses_anonymous_args = 0
1403
-	ldr	r3, .L211
1404
1525
 	push	{r0, r1, r2, r4, r5, lr}
1405
1526
 	.save {r4, r5, lr}
1406
1527
 	.pad #12
1407
-	add	r0, r3, r0, lsl #3
1408
-	ldr	r4, .L211+4
1409
-	ldr	r5, [r0, #12]
1528
+	ldr	r3, .L213
1529
+	ldr	r4, .L213+4
1530
+	ldr	r5, [r3, r0, lsl #3]
1410
1531
 	movs	r0, #130
1411
-	bl	NandcDelayns
1412
-.L208:
1532
+	bl	ndelay
1533
+.L210:
1413
1534
 	ldr	r3, [r5]
1414
1535
 	str	r3, [sp, #4]
1415
1536
 	ldr	r3, [sp, #4]
1416
1537
 	lsls	r3, r3, #22
1417
-	bmi	.L209
1418
-	movs	r0, #1
1538
+	bmi	.L211
1419
1539
 	movs	r1, #2
1540
+	movs	r0, #1
1420
1541
 	bl	usleep_range
1421
1542
 	subs	r4, r4, #1
1422
-	bne	.L208
1543
+	bne	.L210
1423
1544
 	mov	r0, #-1
1424
-	b	.L207
1425
-.L209:
1426
-	movs	r0, #0
1427
-.L207:
1545
+.L208:
1428
1546
 	add	sp, sp, #12
1429
1547
 	@ sp needed
1430
1548
 	pop	{r4, r5, pc}
1431
-.L212:
1432
-	.align	2
1433
1549
 .L211:
1550
+	movs	r0, #0
1551
+	b	.L208
1552
+.L214:
1553
+	.align	2
1554
+.L213:
1434
1555
 	.word	.LANCHOR0
1435
1556
 	.word	100000
1436
1557
 	.fnend
1437
1558
 	.size	NandcWaitFlashReady, .-NandcWaitFlashReady
1438
1559
 	.align	1
1439
1560
 	.global	FlashReset
1561
+	.syntax unified
1440
1562
 	.thumb
1441
1563
 	.thumb_func
1564
+	.fpu softvfp
1442
1565
 	.type	FlashReset, %function
1443
1566
 FlashReset:
1444
1567
 	.fnstart
1445
1568
 	@ args = 0, pretend = 0, frame = 0
1446
1569
 	@ frame_needed = 0, uses_anonymous_args = 0
1447
-	ldr	r3, .L214
1570
+	ldr	r3, .L216
1448
1571
 	push	{r4, r5, r6, lr}
1449
1572
 	.save {r4, r5, r6, lr}
1450
-	add	r3, r3, r0, lsl #3
1451
1573
 	mov	r4, r0
1452
-	ldrb	r6, [r3, #16]	@ zero_extendqisi2
1453
-	ldr	r5, [r3, #12]
1574
+	ldr	r5, [r3, r0, lsl #3]
1575
+	add	r3, r3, r0, lsl #3
1576
+	ldrb	r6, [r3, #4]	@ zero_extendqisi2
1454
1577
 	bl	NandcFlashCs
1455
1578
 	movs	r3, #255
1456
1579
 	mov	r0, r4
..
..
@@ -1460,16 +1583,18 @@
1460
1583
 	mov	r0, r4
1461
1584
 	pop	{r4, r5, r6, lr}
1462
1585
 	b	NandcFlashDeCs
1463
-.L215:
1586
+.L217:
1464
1587
 	.align	2
1465
-.L214:
1588
+.L216:
1466
1589
 	.word	.LANCHOR0
1467
1590
 	.fnend
1468
1591
 	.size	FlashReset, .-FlashReset
1469
1592
 	.align	1
1470
1593
 	.global	flash_enter_slc_mode
1594
+	.syntax unified
1471
1595
 	.thumb
1472
1596
 	.thumb_func
1597
+	.fpu softvfp
1473
1598
 	.type	flash_enter_slc_mode, %function
1474
1599
 flash_enter_slc_mode:
1475
1600
 	.fnstart
..
..
@@ -1477,25 +1602,25 @@
1477
1602
 	@ frame_needed = 0, uses_anonymous_args = 0
1478
1603
 	push	{r4, r5, r6, r7, r8, lr}
1479
1604
 	.save {r4, r5, r6, r7, r8, lr}
1480
-	mov	r7, r0
1481
-	ldr	r6, .L222
1482
-	ldrb	r3, [r6, #144]	@ zero_extendqisi2
1483
-	cbz	r3, .L216
1484
-	add	r4, r6, r7, lsl #3
1605
+	mov	r6, r0
1606
+	ldr	r5, .L224
1607
+	ldrb	r3, [r5, #152]	@ zero_extendqisi2
1608
+	cbz	r3, .L218
1485
1609
 	bl	NandcFlashCs
1486
-	ldrb	r3, [r4, #2068]	@ zero_extendqisi2
1487
-	ldrb	r5, [r4, #16]	@ zero_extendqisi2
1610
+	add	r3, r5, r6, lsl #3
1611
+	ldr	r7, [r5, r6, lsl #3]
1612
+	ldrb	r8, [r3, #4]	@ zero_extendqisi2
1613
+	ldrb	r3, [r3, #2072]	@ zero_extendqisi2
1488
1614
 	cmp	r3, #44
1489
-	ldr	r8, [r4, #12]
1490
-	lsl	r5, r5, #8
1491
-	bne	.L218
1492
-	add	r4, r8, r5
1615
+	lsl	r8, r8, #8
1616
+	bne	.L220
1617
+	add	r4, r7, r8
1493
1618
 	movs	r3, #239
1494
-	movs	r0, #50
1495
1619
 	str	r3, [r4, #2056]
1496
1620
 	movs	r3, #145
1497
1621
 	str	r3, [r4, #2052]
1498
-	bl	NandcDelayns
1622
+	movs	r0, #50
1623
+	bl	ndelay
1499
1624
 	movs	r3, #0
1500
1625
 	movs	r2, #1
1501
1626
 	str	r3, [r4, #2048]
..
..
@@ -1503,29 +1628,31 @@
1503
1628
 	str	r2, [r4, #2048]
1504
1629
 	str	r3, [r4, #2048]
1505
1630
 	str	r3, [r4, #2048]
1506
-	bl	NandcDelayns
1507
-.L218:
1508
-	add	r5, r5, r8
1509
-	mov	r0, r7
1631
+	bl	ndelay
1632
+.L220:
1633
+	mov	r0, r6
1634
+	add	r7, r7, r8
1510
1635
 	bl	NandcWaitFlashReadyNoDelay
1511
1636
 	movs	r3, #218
1512
-	mov	r0, r7
1513
-	str	r3, [r5, #2056]
1637
+	mov	r0, r6
1638
+	str	r3, [r7, #2056]
1514
1639
 	bl	NandcWaitFlashReady
1515
1640
 	movs	r3, #2
1516
-	strb	r3, [r6, #2228]
1517
-.L216:
1641
+	strb	r3, [r5, #2232]
1642
+.L218:
1518
1643
 	pop	{r4, r5, r6, r7, r8, pc}
1519
-.L223:
1644
+.L225:
1520
1645
 	.align	2
1521
-.L222:
1646
+.L224:
1522
1647
 	.word	.LANCHOR0
1523
1648
 	.fnend
1524
1649
 	.size	flash_enter_slc_mode, .-flash_enter_slc_mode
1525
1650
 	.align	1
1526
1651
 	.global	flash_exit_slc_mode
1652
+	.syntax unified
1527
1653
 	.thumb
1528
1654
 	.thumb_func
1655
+	.fpu softvfp
1529
1656
 	.type	flash_exit_slc_mode, %function
1530
1657
 flash_exit_slc_mode:
1531
1658
 	.fnstart
..
..
@@ -1533,25 +1660,25 @@
1533
1660
 	@ frame_needed = 0, uses_anonymous_args = 0
1534
1661
 	push	{r4, r5, r6, r7, r8, lr}
1535
1662
 	.save {r4, r5, r6, r7, r8, lr}
1536
-	mov	r7, r0
1537
-	ldr	r6, .L230
1538
-	ldrb	r3, [r6, #144]	@ zero_extendqisi2
1539
-	cbz	r3, .L224
1540
-	add	r4, r6, r7, lsl #3
1663
+	mov	r6, r0
1664
+	ldr	r5, .L232
1665
+	ldrb	r3, [r5, #152]	@ zero_extendqisi2
1666
+	cbz	r3, .L226
1541
1667
 	bl	NandcFlashCs
1542
-	ldrb	r3, [r4, #2068]	@ zero_extendqisi2
1543
-	ldrb	r5, [r4, #16]	@ zero_extendqisi2
1668
+	add	r3, r5, r6, lsl #3
1669
+	ldr	r7, [r5, r6, lsl #3]
1670
+	ldrb	r8, [r3, #4]	@ zero_extendqisi2
1671
+	ldrb	r3, [r3, #2072]	@ zero_extendqisi2
1544
1672
 	cmp	r3, #44
1545
-	ldr	r8, [r4, #12]
1546
-	lsl	r5, r5, #8
1547
-	bne	.L226
1548
-	add	r4, r8, r5
1673
+	lsl	r8, r8, #8
1674
+	bne	.L228
1675
+	add	r4, r7, r8
1549
1676
 	movs	r3, #239
1550
-	movs	r0, #50
1551
1677
 	str	r3, [r4, #2056]
1552
1678
 	movs	r3, #145
1553
1679
 	str	r3, [r4, #2052]
1554
-	bl	NandcDelayns
1680
+	movs	r0, #50
1681
+	bl	ndelay
1555
1682
 	movs	r3, #2
1556
1683
 	movs	r0, #100
1557
1684
 	str	r3, [r4, #2048]
..
..
@@ -1560,29 +1687,31 @@
1560
1687
 	movs	r3, #0
1561
1688
 	str	r3, [r4, #2048]
1562
1689
 	str	r3, [r4, #2048]
1563
-	bl	NandcDelayns
1564
-.L226:
1565
-	add	r5, r5, r8
1566
-	mov	r0, r7
1690
+	bl	ndelay
1691
+.L228:
1692
+	mov	r0, r6
1693
+	add	r7, r7, r8
1567
1694
 	bl	NandcWaitFlashReadyNoDelay
1568
1695
 	movs	r3, #223
1569
-	mov	r0, r7
1570
-	str	r3, [r5, #2056]
1696
+	mov	r0, r6
1697
+	str	r3, [r7, #2056]
1571
1698
 	bl	NandcWaitFlashReady
1572
1699
 	movs	r3, #0
1573
-	strb	r3, [r6, #2228]
1574
-.L224:
1700
+	strb	r3, [r5, #2232]
1701
+.L226:
1575
1702
 	pop	{r4, r5, r6, r7, r8, pc}
1576
-.L231:
1703
+.L233:
1577
1704
 	.align	2
1578
-.L230:
1705
+.L232:
1579
1706
 	.word	.LANCHOR0
1580
1707
 	.fnend
1581
1708
 	.size	flash_exit_slc_mode, .-flash_exit_slc_mode
1582
1709
 	.align	1
1583
1710
 	.global	FlashEraseBlock
1711
+	.syntax unified
1584
1712
 	.thumb
1585
1713
 	.thumb_func
1714
+	.fpu softvfp
1586
1715
 	.type	FlashEraseBlock, %function
1587
1716
 FlashEraseBlock:
1588
1717
 	.fnstart
..
..
@@ -1605,140 +1734,139 @@
1605
1734
 	mov	r1, r5
1606
1735
 	mov	r0, r4
1607
1736
 	bl	FlashReadStatus
1608
-	mov	r5, r0
1737
+	mov	r1, r0
1609
1738
 	mov	r0, r4
1610
1739
 	bl	NandcFlashDeCs
1611
-	and	r0, r5, #1
1740
+	and	r0, r1, #1
1612
1741
 	pop	{r4, r5, r6, pc}
1613
1742
 	.fnend
1614
1743
 	.size	FlashEraseBlock, .-FlashEraseBlock
1615
1744
 	.align	1
1616
1745
 	.global	FlashSetInterfaceMode
1746
+	.syntax unified
1617
1747
 	.thumb
1618
1748
 	.thumb_func
1749
+	.fpu softvfp
1619
1750
 	.type	FlashSetInterfaceMode, %function
1620
1751
 FlashSetInterfaceMode:
1621
1752
 	.fnstart
1622
-	@ args = 0, pretend = 0, frame = 16
1753
+	@ args = 0, pretend = 0, frame = 8
1623
1754
 	@ frame_needed = 0, uses_anonymous_args = 0
1624
-	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
1755
+	push	{r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr}
1625
1756
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
1626
-	.pad #20
1627
-	sub	sp, sp, #20
1628
-	ldr	r5, .L261
1629
-	movs	r4, #0
1630
-	movs	r7, #239
1631
-	mov	lr, #128
1632
-	mov	ip, #1
1633
-	mov	r8, #35
1634
-	ldrb	r3, [r5, #2229]	@ zero_extendqisi2
1757
+	.pad #12
1758
+	movs	r5, #0
1759
+	ldr	r6, .L263
1760
+	mov	ip, #128
1761
+	mov	lr, #1
1635
1762
 	mov	r9, #32
1636
1763
 	mov	r10, #5
1637
-	and	r2, r3, #1
1638
-	str	r2, [sp, #12]
1764
+	ldrb	r3, [r6, #2233]	@ zero_extendqisi2
1765
+	addw	r8, r6, #2072
1639
1766
 	and	r2, r3, #4
1640
-	uxtb	r3, r2
1641
-	mov	r2, r4
1642
-	str	r3, [sp, #8]
1643
-	add	r3, r5, #12
1644
-	str	r3, [sp, #4]
1645
-.L243:
1646
-	ldr	r1, .L261+4
1647
-	ldr	r3, [sp, #4]
1648
-	ldrb	r1, [r4, r1]	@ zero_extendqisi2
1649
-	ldr	r6, [r4, r3]
1650
-	add	r3, r3, r4
1651
-	cmp	r1, #152
1652
-	ldr	r3, [r3, #4]
1653
-	beq	.L234
1654
-	cmp	r1, #69
1655
-	beq	.L234
1656
-	cmp	r1, #173
1657
-	beq	.L234
1658
-	cmp	r1, #44
1659
-	bne	.L235
1660
-.L234:
1661
-	cmp	r0, #1
1662
-	uxtb	r3, r3
1663
-	bne	.L236
1664
-	ldr	r5, [sp, #12]
1665
-	cbz	r5, .L235
1666
-	lsls	r3, r3, #8
1667
-	cmp	r1, #173
1668
-	add	fp, r6, r3
1669
-	str	r7, [fp, #2056]
1767
+	and	r3, r3, #1
1768
+	str	r2, [sp, #4]
1769
+	mov	r2, r5
1770
+	str	r3, [sp]
1771
+.L245:
1772
+	ldrb	r4, [r5, r8]	@ zero_extendqisi2
1773
+	cmp	r4, #152
1774
+	beq	.L236
1775
+	cmp	r4, #69
1776
+	beq	.L236
1777
+	cmp	r4, #173
1778
+	beq	.L236
1779
+	cmp	r4, #44
1670
1780
 	bne	.L237
1781
+.L236:
1782
+	cmp	r0, #1
1783
+	add	r3, r6, r5
1784
+	ldr	r1, [r6, r5]
1785
+	ldrb	r3, [r3, #4]	@ zero_extendqisi2
1786
+	bne	.L238
1787
+	ldr	r7, [sp]
1788
+	cbz	r7, .L237
1789
+	lsls	r3, r3, #8
1790
+	cmp	r4, #173
1791
+	mov	r7, #239
1792
+	add	fp, r1, r3
1793
+	str	r7, [fp, #2056]
1794
+	bne	.L239
1671
1795
 	str	r0, [fp, #2052]
1672
-	b	.L260
1673
-.L237:
1674
-	cmp	r1, #44
1796
+.L262:
1797
+	str	r2, [fp, #2048]
1798
+	b	.L243
1799
+.L239:
1800
+	cmp	r4, #44
1675
1801
 	itete	eq
1676
1802
 	streq	r0, [fp, #2052]
1677
-	strne	lr, [fp, #2052]
1803
+	strne	ip, [fp, #2052]
1678
1804
 	streq	r10, [fp, #2048]
1679
1805
 	strne	r0, [fp, #2048]
1680
-	b	.L241
1681
-.L236:
1682
-	ldr	r5, [sp, #8]
1683
-	cbz	r5, .L235
1684
-	lsls	r3, r3, #8
1685
-	cmp	r1, #173
1686
-	add	fp, r6, r3
1687
-	str	r7, [fp, #2056]
1688
-	bne	.L240
1689
-	str	ip, [fp, #2052]
1690
-	str	r9, [fp, #2048]
1691
-	b	.L241
1692
-.L240:
1693
-	cmp	r1, #44
1694
-	bne	.L242
1695
-	str	ip, [fp, #2052]
1696
-	str	r8, [fp, #2048]
1697
-	b	.L241
1698
-.L242:
1699
-	str	lr, [fp, #2052]
1700
-.L260:
1701
-	str	r2, [fp, #2048]
1702
-.L241:
1703
-	add	r3, r3, r6
1806
+.L243:
1807
+	add	r3, r3, r1
1704
1808
 	str	r2, [r3, #2048]
1705
1809
 	str	r2, [r3, #2048]
1706
1810
 	str	r2, [r3, #2048]
1707
-.L235:
1708
-	adds	r4, r4, #8
1709
-	cmp	r4, #32
1710
-	bne	.L243
1811
+.L237:
1812
+	adds	r5, r5, #8
1813
+	cmp	r5, #32
1814
+	bne	.L245
1711
1815
 	movs	r0, #0
1712
1816
 	bl	NandcWaitFlashReady
1713
1817
 	movs	r0, #0
1714
-	add	sp, sp, #20
1818
+	add	sp, sp, #12
1715
1819
 	@ sp needed
1716
1820
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
1717
-.L262:
1821
+.L238:
1822
+	ldr	r7, [sp, #4]
1823
+	cmp	r7, #0
1824
+	beq	.L237
1825
+	lsls	r3, r3, #8
1826
+	cmp	r4, #173
1827
+	mov	r7, #239
1828
+	add	fp, r1, r3
1829
+	str	r7, [fp, #2056]
1830
+	bne	.L242
1831
+	str	lr, [fp, #2052]
1832
+	str	r9, [fp, #2048]
1833
+	b	.L243
1834
+.L242:
1835
+	cmp	r4, #44
1836
+	bne	.L244
1837
+	movs	r4, #35
1838
+	str	lr, [fp, #2052]
1839
+	str	r4, [fp, #2048]
1840
+	b	.L243
1841
+.L244:
1842
+	str	ip, [fp, #2052]
1843
+	b	.L262
1844
+.L264:
1718
1845
 	.align	2
1719
-.L261:
1846
+.L263:
1720
1847
 	.word	.LANCHOR0
1721
-	.word	.LANCHOR0+2068
1722
1848
 	.fnend
1723
1849
 	.size	FlashSetInterfaceMode, .-FlashSetInterfaceMode
1724
1850
 	.align	1
1725
1851
 	.global	FlashReadSpare
1852
+	.syntax unified
1726
1853
 	.thumb
1727
1854
 	.thumb_func
1855
+	.fpu softvfp
1728
1856
 	.type	FlashReadSpare, %function
1729
1857
 FlashReadSpare:
1730
1858
 	.fnstart
1731
1859
 	@ args = 0, pretend = 0, frame = 0
1732
1860
 	@ frame_needed = 0, uses_anonymous_args = 0
1733
-	push	{r4, r5, r6, lr}
1734
-	.save {r4, r5, r6, lr}
1735
-	mov	r6, r2
1736
-	ldr	r5, .L264
1737
-	ldr	r3, .L264+4
1861
+	push	{r3, r4, r5, r6, r7, lr}
1862
+	.save {r3, r4, r5, r6, r7, lr}
1863
+	mov	r7, r2
1864
+	ldr	r5, .L266
1865
+	ldr	r3, .L266+4
1866
+	ldr	r4, [r5, r0, lsl #3]
1738
1867
 	add	r5, r5, r0, lsl #3
1739
-	ldrb	r3, [r3, #481]	@ zero_extendqisi2
1740
-	ldrb	r2, [r5, #16]	@ zero_extendqisi2
1741
-	ldr	r4, [r5, #12]
1868
+	ldrb	r3, [r3, #477]	@ zero_extendqisi2
1869
+	ldrb	r2, [r5, #4]	@ zero_extendqisi2
1742
1870
 	lsls	r3, r3, #9
1743
1871
 	add	r4, r4, r2, lsl #8
1744
1872
 	movs	r2, #0
..
..
@@ -1756,31 +1884,33 @@
1756
1884
 	str	r3, [r4, #2056]
1757
1885
 	bl	NandcWaitFlashReady
1758
1886
 	ldr	r3, [r4, #2048]
1759
-	strb	r3, [r6]
1760
-	pop	{r4, r5, r6, pc}
1761
-.L265:
1887
+	strb	r3, [r7]
1888
+	pop	{r3, r4, r5, r6, r7, pc}
1889
+.L267:
1762
1890
 	.align	2
1763
-.L264:
1891
+.L266:
1764
1892
 	.word	.LANCHOR0
1765
1893
 	.word	.LANCHOR1
1766
1894
 	.fnend
1767
1895
 	.size	FlashReadSpare, .-FlashReadSpare
1768
1896
 	.align	1
1769
1897
 	.global	SandiskProgTestBadBlock
1898
+	.syntax unified
1770
1899
 	.thumb
1771
1900
 	.thumb_func
1901
+	.fpu softvfp
1772
1902
 	.type	SandiskProgTestBadBlock, %function
1773
1903
 SandiskProgTestBadBlock:
1774
1904
 	.fnstart
1775
1905
 	@ args = 0, pretend = 0, frame = 0
1776
1906
 	@ frame_needed = 0, uses_anonymous_args = 0
1777
-	ldr	r2, .L267
1907
+	ldr	r3, .L269
1778
1908
 	push	{r4, lr}
1779
1909
 	.save {r4, lr}
1780
-	add	r2, r2, r0, lsl #3
1781
-	ldrb	r4, [r2, #16]	@ zero_extendqisi2
1782
-	ldr	r3, [r2, #12]
1783
-	add	r4, r3, r4, lsl #8
1910
+	ldr	r4, [r3, r0, lsl #3]
1911
+	add	r3, r3, r0, lsl #3
1912
+	ldrb	r3, [r3, #4]	@ zero_extendqisi2
1913
+	add	r4, r4, r3, lsl #8
1784
1914
 	movs	r3, #162
1785
1915
 	str	r3, [r4, #2056]
1786
1916
 	movs	r3, #128
..
..
@@ -1793,169 +1923,183 @@
1793
1923
 	lsrs	r3, r1, #8
1794
1924
 	lsrs	r1, r1, #16
1795
1925
 	str	r3, [r4, #2052]
1796
-	str	r1, [r4, #2052]
1797
1926
 	movs	r3, #16
1927
+	str	r1, [r4, #2052]
1798
1928
 	str	r3, [r4, #2056]
1799
1929
 	bl	NandcWaitFlashReady
1800
1930
 	movs	r3, #112
1801
1931
 	movs	r0, #80
1802
1932
 	str	r3, [r4, #2056]
1803
-	bl	NandcDelayns
1933
+	bl	ndelay
1804
1934
 	ldr	r0, [r4, #2048]
1805
1935
 	and	r0, r0, #1
1806
1936
 	pop	{r4, pc}
1807
-.L268:
1937
+.L270:
1808
1938
 	.align	2
1809
-.L267:
1939
+.L269:
1810
1940
 	.word	.LANCHOR0
1811
1941
 	.fnend
1812
1942
 	.size	SandiskProgTestBadBlock, .-SandiskProgTestBadBlock
1813
1943
 	.align	1
1814
1944
 	.global	SandiskSetRRPara
1945
+	.syntax unified
1815
1946
 	.thumb
1816
1947
 	.thumb_func
1948
+	.fpu softvfp
1817
1949
 	.type	SandiskSetRRPara, %function
1818
1950
 SandiskSetRRPara:
1819
1951
 	.fnstart
1820
1952
 	@ args = 0, pretend = 0, frame = 0
1821
1953
 	@ frame_needed = 0, uses_anonymous_args = 0
1954
+	movs	r3, #239
1822
1955
 	push	{r4, r5, r6, lr}
1823
1956
 	.save {r4, r5, r6, lr}
1824
-	movs	r3, #239
1825
-	mov	r5, r0
1826
1957
 	str	r3, [r0, #8]
1827
1958
 	movs	r3, #17
1959
+	mov	r5, r0
1960
+	mov	r4, r1
1828
1961
 	str	r3, [r0, #4]
1829
1962
 	movs	r0, #200
1830
-	mov	r4, r1
1831
-	bl	NandcDelayns
1832
-	ldr	r0, .L276
1833
-	ldr	r1, .L276+4
1963
+	bl	ndelay
1964
+	ldr	r0, .L277
1834
1965
 	add	r4, r4, r4, lsl #2
1966
+	ldr	r1, .L277+4
1835
1967
 	movs	r2, #0
1836
-	sub	r6, r0, #48
1837
-.L270:
1838
-	ldrb	r3, [r1, #1209]	@ zero_extendqisi2
1968
+	sub	r6, r0, #45
1969
+.L272:
1970
+	ldrb	r3, [r1, #85]	@ zero_extendqisi2
1839
1971
 	cmp	r2, r3
1840
-	bcs	.L275
1841
-	ldrb	r3, [r1, #1208]	@ zero_extendqisi2
1972
+	bcc	.L275
1973
+	movs	r0, #0
1974
+	pop	{r4, r5, r6, lr}
1975
+	b	NandcWaitFlashReady
1976
+.L275:
1977
+	ldrb	r3, [r1, #84]	@ zero_extendqisi2
1842
1978
 	cmp	r3, #67
1843
1979
 	add	r3, r2, r4
1844
1980
 	ite	eq
1845
1981
 	addeq	r3, r3, r6
1846
1982
 	addne	r3, r3, r0
1847
-	adds	r2, r2, #1
1848
1983
 	ldrsb	r3, [r3, #5]
1984
+	adds	r2, r2, #1
1849
1985
 	str	r3, [r5]
1850
-	b	.L270
1851
-.L275:
1852
-	movs	r0, #0
1853
-	pop	{r4, r5, r6, lr}
1854
-	b	NandcWaitFlashReady
1855
-.L277:
1986
+	b	.L272
1987
+.L278:
1856
1988
 	.align	2
1857
-.L276:
1858
-	.word	.LANCHOR1+304
1989
+.L277:
1990
+	.word	.LANCHOR1+301
1859
1991
 	.word	.LANCHOR0
1860
1992
 	.fnend
1861
1993
 	.size	SandiskSetRRPara, .-SandiskSetRRPara
1862
1994
 	.align	1
1863
1995
 	.global	micron_auto_read_calibration_config
1996
+	.syntax unified
1864
1997
 	.thumb
1865
1998
 	.thumb_func
1999
+	.fpu softvfp
1866
2000
 	.type	micron_auto_read_calibration_config, %function
1867
2001
 micron_auto_read_calibration_config:
1868
2002
 	.fnstart
1869
2003
 	@ args = 0, pretend = 0, frame = 0
1870
2004
 	@ frame_needed = 0, uses_anonymous_args = 0
1871
-	push	{r3, r4, r5, lr}
1872
-	.save {r3, r4, r5, lr}
1873
-	mov	r4, r0
1874
-	mov	r5, r1
2005
+	push	{r4, r5, r6, lr}
2006
+	.save {r4, r5, r6, lr}
2007
+	mov	r5, r0
2008
+	mov	r6, r1
1875
2009
 	bl	NandcWaitFlashReady
1876
-	ldr	r3, .L279
2010
+	ldr	r0, .L280
2011
+	ldr	r4, [r0, r5, lsl #3]
2012
+	add	r0, r0, r5, lsl #3
2013
+	ldrb	r3, [r0, #4]	@ zero_extendqisi2
1877
2014
 	movs	r0, #200
1878
-	add	r2, r3, r4, lsl #3
1879
-	ldrb	r4, [r2, #16]	@ zero_extendqisi2
1880
-	ldr	r3, [r2, #12]
1881
-	add	r4, r3, r4, lsl #8
2015
+	add	r4, r4, r3, lsl #8
1882
2016
 	movs	r3, #239
1883
2017
 	str	r3, [r4, #2056]
1884
2018
 	movs	r3, #150
1885
2019
 	str	r3, [r4, #2052]
1886
-	bl	NandcDelayns
1887
-	str	r5, [r4, #2048]
2020
+	bl	ndelay
1888
2021
 	movs	r3, #0
2022
+	str	r6, [r4, #2048]
1889
2023
 	str	r3, [r4, #2048]
1890
2024
 	str	r3, [r4, #2048]
1891
2025
 	str	r3, [r4, #2048]
1892
-	pop	{r3, r4, r5, pc}
1893
-.L280:
2026
+	pop	{r4, r5, r6, pc}
2027
+.L281:
1894
2028
 	.align	2
1895
-.L279:
2029
+.L280:
1896
2030
 	.word	.LANCHOR0
1897
2031
 	.fnend
1898
2032
 	.size	micron_auto_read_calibration_config, .-micron_auto_read_calibration_config
1899
2033
 	.align	1
1900
2034
 	.global	FlashEraseSLc2KBlocks
2035
+	.syntax unified
1901
2036
 	.thumb
1902
2037
 	.thumb_func
2038
+	.fpu softvfp
1903
2039
 	.type	FlashEraseSLc2KBlocks, %function
1904
2040
 FlashEraseSLc2KBlocks:
1905
2041
 	.fnstart
1906
2042
 	@ args = 0, pretend = 0, frame = 8
1907
2043
 	@ frame_needed = 0, uses_anonymous_args = 0
1908
-	push	{r4, r5, r6, r7, r8, r9, lr}
1909
-	.save {r4, r5, r6, r7, r8, r9, lr}
2044
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, lr}
2045
+	.save {r4, r5, r6, r7, r8, r9, r10, lr}
2046
+	.pad #16
1910
2047
 	movs	r5, #0
1911
-	ldr	r8, .L292+4
1912
-	.pad #20
1913
-	sub	sp, sp, #20
2048
+	ldr	r8, .L292
1914
2049
 	mov	r6, r0
1915
2050
 	mov	r9, r1
1916
2051
 	mov	r7, r5
1917
-.L282:
2052
+	ldr	r10, .L292+4
2053
+.L283:
1918
2054
 	cmp	r7, r9
1919
-	beq	.L291
1920
-	rsb	r3, r7, r9
2055
+	bne	.L288
2056
+	movs	r0, #0
2057
+	add	sp, sp, #16
2058
+	@ sp needed
2059
+	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
2060
+.L288:
2061
+	sub	r3, r9, r7
1921
2062
 	add	r2, sp, #8
1922
-	adds	r0, r6, r5
1923
-	movs	r1, #0
1924
2063
 	uxtb	r3, r3
2064
+	movs	r1, #0
2065
+	adds	r0, r6, r5
1925
2066
 	str	r3, [sp]
1926
2067
 	add	r3, sp, #12
1927
2068
 	bl	LogAddr2PhyAddr
1928
-	ldrb	r2, [r8, #2230]	@ zero_extendqisi2
2069
+	ldrb	r2, [r8, #2234]	@ zero_extendqisi2
1929
2070
 	ldr	r3, [sp, #12]
1930
-	cmp	r3, r2
1931
-	bcc	.L283
2071
+	cmp	r2, r3
2072
+	bhi	.L284
1932
2073
 	mov	r3, #-1
1933
2074
 	str	r3, [r6, r5]
1934
-	b	.L284
1935
-.L283:
2075
+.L285:
2076
+	adds	r7, r7, #1
2077
+	adds	r5, r5, #36
2078
+	b	.L283
2079
+.L284:
1936
2080
 	add	r2, r8, r3
1937
2081
 	add	r3, r8, r3, lsl #4
1938
-	ldrb	r4, [r2, #2232]	@ zero_extendqisi2
1939
-	strb	r4, [r3, #2100]
2082
+	ldrb	r4, [r2, #2236]	@ zero_extendqisi2
2083
+	strb	r4, [r3, #2104]
1940
2084
 	mov	r0, r4
1941
2085
 	bl	NandcWaitFlashReady
1942
2086
 	mov	r0, r4
1943
2087
 	bl	NandcFlashCs
1944
2088
 	movs	r2, #0
1945
-	mov	r0, r4
1946
2089
 	ldr	r1, [sp, #8]
2090
+	mov	r0, r4
1947
2091
 	bl	FlashEraseCmd
1948
2092
 	mov	r0, r4
1949
2093
 	bl	NandcWaitFlashReady
1950
2094
 	mov	r0, r4
1951
2095
 	ldr	r1, [sp, #8]
1952
2096
 	bl	FlashReadStatus
1953
-	movs	r2, #0
1954
-	ldr	r3, [sp, #8]
1955
2097
 	sbfx	r0, r0, #0, #1
2098
+	ldr	r1, [sp, #8]
1956
2099
 	str	r0, [r6, r5]
2100
+	movs	r2, #0
2101
+	ldr	r3, [r8, #40]
1957
2102
 	mov	r0, r4
1958
-	ldr	r1, [r8, #4]
1959
2103
 	add	r1, r1, r3
1960
2104
 	bl	FlashEraseCmd
1961
2105
 	mov	r0, r4
..
..
@@ -1969,191 +2113,181 @@
1969
2113
 	strmi	r3, [r6, r5]
1970
2114
 	ldr	r3, [r6, r5]
1971
2115
 	adds	r3, r3, #1
1972
-	bne	.L286
1973
-	ldr	r0, .L292
2116
+	bne	.L287
1974
2117
 	ldr	r1, [sp, #8]
2118
+	mov	r0, r10
1975
2119
 	bl	printk
1976
-.L286:
2120
+.L287:
1977
2121
 	mov	r0, r4
1978
2122
 	bl	NandcFlashDeCs
1979
-.L284:
1980
-	adds	r7, r7, #1
1981
-	adds	r5, r5, #36
1982
-	b	.L282
1983
-.L291:
1984
-	movs	r0, #0
1985
-	add	sp, sp, #20
1986
-	@ sp needed
1987
-	pop	{r4, r5, r6, r7, r8, r9, pc}
2123
+	b	.L285
1988
2124
 .L293:
1989
2125
 	.align	2
1990
2126
 .L292:
1991
-	.word	.LC1
1992
2127
 	.word	.LANCHOR0
2128
+	.word	.LC1
1993
2129
 	.fnend
1994
2130
 	.size	FlashEraseSLc2KBlocks, .-FlashEraseSLc2KBlocks
1995
2131
 	.align	1
1996
2132
 	.global	FlashEraseBlocks
2133
+	.syntax unified
1997
2134
 	.thumb
1998
2135
 	.thumb_func
2136
+	.fpu softvfp
1999
2137
 	.type	FlashEraseBlocks, %function
2000
2138
 FlashEraseBlocks:
2001
2139
 	.fnstart
2002
-	@ args = 0, pretend = 0, frame = 16
2140
+	@ args = 0, pretend = 0, frame = 8
2003
2141
 	@ frame_needed = 0, uses_anonymous_args = 0
2004
2142
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
2005
2143
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
2006
2144
 	mov	r9, r0
2007
-	ldr	r4, .L328
2008
-	.pad #28
2009
-	sub	sp, sp, #28
2145
+	ldr	r4, .L325
2146
+	.pad #20
2147
+	sub	sp, sp, #20
2010
2148
 	mov	r10, r1
2011
2149
 	mov	r8, r2
2012
-	ldrb	r5, [r4]	@ zero_extendqisi2
2013
-	cbz	r5, .L312
2150
+	ldrb	r5, [r4, #36]	@ zero_extendqisi2
2151
+	cbz	r5, .L296
2014
2152
 	mov	r1, r2
2015
2153
 	bl	FlashEraseSLc2KBlocks
2016
-	b	.L296
2017
-.L312:
2018
-	mov	fp, r4
2019
-.L295:
2020
-	cmp	r5, r8
2021
-	bcs	.L326
2154
+.L294:
2155
+	add	sp, sp, #20
2156
+	@ sp needed
2157
+	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
2158
+.L305:
2022
2159
 	movs	r3, #36
2023
-	movs	r1, #0
2024
-	add	r2, sp, #16
2160
+	add	r2, sp, #8
2025
2161
 	mul	r6, r3, r5
2026
-	add	r3, r9, r6
2027
-	str	r3, [sp, #12]
2028
-	rsb	r3, r5, r8
2029
-	ldr	r0, [sp, #12]
2162
+	sub	r3, r8, r5
2030
2163
 	uxtb	r3, r3
2164
+	movs	r1, #0
2031
2165
 	str	r3, [sp]
2032
-	add	r3, sp, #20
2166
+	add	r3, sp, #12
2167
+	add	fp, r9, r6
2168
+	mov	r0, fp
2033
2169
 	bl	LogAddr2PhyAddr
2034
-	ldrb	r3, [r4, #2230]	@ zero_extendqisi2
2170
+	ldrb	r3, [r4, #2234]	@ zero_extendqisi2
2035
2171
 	mov	r7, r0
2036
-	ldr	r0, [sp, #20]
2037
-	cmp	r0, r3
2038
-	bcc	.L297
2172
+	ldr	r0, [sp, #12]
2173
+	cmp	r3, r0
2174
+	bhi	.L298
2039
2175
 	mov	r3, #-1
2040
2176
 	str	r3, [r9, r6]
2041
-	b	.L298
2042
-.L297:
2043
-	ldrb	r3, [fp, #2240]	@ zero_extendqisi2
2177
+.L299:
2178
+	adds	r5, r5, #1
2179
+.L296:
2180
+	cmp	r5, r8
2181
+	bcc	.L305
2182
+	ldr	r6, .L325+4
2183
+	movs	r5, #0
2184
+.L306:
2185
+	ldrb	r3, [r4, #2234]	@ zero_extendqisi2
2186
+	cmp	r5, r3
2187
+	bcc	.L308
2188
+	ldr	r3, [r4, #2248]
2189
+	cmp	r3, #0
2190
+	bne	.L309
2191
+.L310:
2192
+	movs	r0, #0
2193
+	b	.L294
2194
+.L298:
2195
+	ldrb	r3, [r4, #2244]	@ zero_extendqisi2
2044
2196
 	cmp	r3, #0
2045
2197
 	add	r3, r4, r0, lsl #4
2046
2198
 	it	eq
2047
2199
 	moveq	r7, #0
2048
-	ldr	r3, [r3, #2108]
2049
-	cbz	r3, .L300
2200
+	ldr	r3, [r3, #2112]
2201
+	cbz	r3, .L301
2050
2202
 	uxtb	r0, r0
2051
2203
 	bl	FlashWaitCmdDone
2052
-.L300:
2053
-	ldr	r1, [sp, #20]
2054
-	ldr	r3, [sp, #12]
2055
-	lsls	r2, r1, #4
2056
-	add	lr, r4, r2
2057
-	str	r3, [lr, #2108]
2058
-	movs	r3, #0
2059
-	str	r3, [lr, #2112]
2060
-	ldr	r3, [sp, #16]
2061
-	str	r3, [lr, #2104]
2062
-	cbz	r7, .L301
2063
-	add	r3, r6, #36
2064
-	add	r3, r3, r9
2065
-	str	r3, [lr, #2112]
2066
2204
 .L301:
2067
-	add	r1, r1, r4
2205
+	ldr	r2, [sp, #12]
2206
+	movs	r0, #0
2207
+	lsls	r3, r2, #4
2208
+	adds	r1, r4, r3
2209
+	str	r0, [r1, #2116]
2210
+	ldr	r0, [sp, #8]
2211
+	str	fp, [r1, #2112]
2212
+	str	r0, [r1, #2108]
2213
+	cbz	r7, .L302
2214
+	adds	r6, r6, #36
2215
+	add	r6, r6, r9
2216
+	str	r6, [r1, #2116]
2217
+.L302:
2068
2218
 	add	r2, r2, r4
2069
-	ldrb	r6, [r1, #2232]	@ zero_extendqisi2
2219
+	add	r3, r3, r4
2220
+	ldrb	r6, [r2, #2236]	@ zero_extendqisi2
2070
2221
 	mov	r0, r6
2071
-	strb	r6, [r2, #2100]
2222
+	strb	r6, [r3, #2104]
2072
2223
 	bl	NandcFlashCs
2073
2224
 	cmp	r10, #1
2074
2225
 	mov	r0, r6
2075
-	bne	.L302
2076
-	ldrb	r3, [fp, #144]	@ zero_extendqisi2
2077
-	cbz	r3, .L302
2226
+	bne	.L303
2227
+	ldrb	r3, [r4, #152]	@ zero_extendqisi2
2228
+	cbz	r3, .L303
2078
2229
 	bl	flash_enter_slc_mode
2079
-	b	.L303
2080
-.L302:
2081
-	bl	flash_exit_slc_mode
2082
-.L303:
2083
-	ldr	r3, [sp, #20]
2230
+.L304:
2231
+	ldr	r3, [sp, #12]
2084
2232
 	mov	r0, r6
2085
-	ldr	r1, [sp, #16]
2233
+	ldr	r1, [sp, #8]
2086
2234
 	add	r5, r5, r7
2087
2235
 	add	r3, r4, r3, lsl #2
2088
-	ldr	r2, [r3, #1172]
2236
+	ldr	r2, [r3, #1180]
2089
2237
 	adds	r2, r2, #0
2090
2238
 	it	ne
2091
2239
 	movne	r2, #1
2092
2240
 	bl	FlashWaitReadyEN
2093
-	mov	r0, r6
2094
2241
 	mov	r2, r7
2095
-	ldr	r1, [sp, #16]
2242
+	ldr	r1, [sp, #8]
2243
+	mov	r0, r6
2096
2244
 	bl	FlashEraseCmd
2097
2245
 	mov	r0, r6
2098
2246
 	bl	NandcFlashDeCs
2099
-.L298:
2100
-	adds	r5, r5, #1
2101
-	b	.L295
2102
-.L326:
2103
-	ldr	r6, .L328
2104
-	movs	r5, #0
2105
-	addw	r7, r6, #2100
2106
-.L305:
2107
-	ldrb	r2, [r4, #2230]	@ zero_extendqisi2
2108
-	ldr	r3, .L328
2109
-	cmp	r5, r2
2110
-	bcs	.L327
2247
+	b	.L299
2248
+.L303:
2249
+	bl	flash_exit_slc_mode
2250
+	b	.L304
2251
+.L308:
2111
2252
 	uxtb	r0, r5
2112
2253
 	bl	FlashWaitCmdDone
2113
2254
 	cmp	r10, #1
2114
-	bne	.L306
2115
-	ldrb	r3, [r6, #144]	@ zero_extendqisi2
2116
-	cbz	r3, .L306
2255
+	bne	.L307
2256
+	ldrb	r3, [r4, #152]	@ zero_extendqisi2
2257
+	cbz	r3, .L307
2117
2258
 	lsls	r3, r5, #4
2118
-	ldrb	r0, [r7, r3]	@ zero_extendqisi2
2259
+	ldrb	r0, [r6, r3]	@ zero_extendqisi2
2119
2260
 	bl	flash_exit_slc_mode
2120
-.L306:
2261
+.L307:
2121
2262
 	adds	r5, r5, #1
2122
-	b	.L305
2123
-.L327:
2124
-	ldr	r2, [r3, #2244]
2125
-	cbnz	r2, .L308
2126
-.L310:
2127
-	movs	r0, #0
2128
-	b	.L296
2129
-.L308:
2130
-	ldrb	r3, [r3, #2068]	@ zero_extendqisi2
2263
+	b	.L306
2264
+.L309:
2265
+	ldrb	r3, [r4, #2072]	@ zero_extendqisi2
2131
2266
 	cmp	r3, #69
2132
2267
 	bne	.L310
2133
2268
 	movs	r3, #0
2134
2269
 	movs	r2, #36
2135
2270
 	mov	r1, r3
2136
-.L309:
2271
+.L311:
2137
2272
 	cmp	r3, r8
2138
2273
 	beq	.L310
2139
2274
 	mul	r0, r2, r3
2140
2275
 	adds	r3, r3, #1
2141
2276
 	str	r1, [r9, r0]
2142
-	b	.L309
2143
-.L296:
2144
-	add	sp, sp, #28
2145
-	@ sp needed
2146
-	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
2147
-.L329:
2277
+	b	.L311
2278
+.L326:
2148
2279
 	.align	2
2149
-.L328:
2280
+.L325:
2150
2281
 	.word	.LANCHOR0
2282
+	.word	.LANCHOR0+2104
2151
2283
 	.fnend
2152
2284
 	.size	FlashEraseBlocks, .-FlashEraseBlocks
2153
2285
 	.align	1
2154
2286
 	.global	FlashReadDpCmd
2287
+	.syntax unified
2155
2288
 	.thumb
2156
2289
 	.thumb_func
2290
+	.fpu softvfp
2157
2291
 	.type	FlashReadDpCmd, %function
2158
2292
 FlashReadDpCmd:
2159
2293
 	.fnstart
..
..
@@ -2161,65 +2295,68 @@
2161
2295
 	@ frame_needed = 0, uses_anonymous_args = 0
2162
2296
 	push	{r4, r5, r6, r7, r8, r9, r10, lr}
2163
2297
 	.save {r4, r5, r6, r7, r8, r9, r10, lr}
2164
-	mov	r7, r0
2165
-	ldr	r0, .L335
2166
-	mov	r6, r1
2298
+	mov	r6, r0
2299
+	ldr	r0, .L332
2300
+	mov	r7, r1
2167
2301
 	uxtb	r9, r2
2168
2302
 	lsr	r8, r2, #8
2169
-	add	r3, r0, r7, lsl #3
2170
2303
 	lsrs	r5, r2, #16
2171
-	ldrb	r1, [r0, #64]	@ zero_extendqisi2
2172
-	uxtb	ip, r6
2173
-	ldr	r4, [r3, #12]
2174
-	lsr	lr, r6, #8
2175
-	ldrb	r3, [r3, #16]	@ zero_extendqisi2
2176
-	cmp	r1, #1
2177
-	ldr	r2, [r0, #44]
2178
-	lsr	r1, r6, #16
2179
-	lsl	r3, r3, #8
2304
+	uxtb	lr, r7
2305
+	ldr	r2, [r0, #48]
2306
+	lsr	ip, r7, #8
2307
+	add	r1, r0, r6, lsl #3
2308
+	ldr	r3, [r0, r6, lsl #3]
2309
+	ldrb	r4, [r1, #4]	@ zero_extendqisi2
2310
+	ldrb	r1, [r0, #68]	@ zero_extendqisi2
2180
2311
 	ldrb	r2, [r2, #7]	@ zero_extendqisi2
2181
-	bne	.L331
2312
+	cmp	r1, #1
2313
+	lsl	r4, r4, #8
2314
+	lsr	r1, r7, #16
2315
+	bne	.L328
2182
2316
 	cmp	r2, #1
2183
2317
 	itt	eq
2184
-	addeq	r2, r4, r3
2318
+	addeq	r2, r3, r4
2185
2319
 	moveq	r10, #38
2186
2320
 	add	r4, r4, r3
2187
2321
 	it	eq
2188
2322
 	streq	r10, [r2, #2056]
2323
+	ldrb	r3, [r0, #61]	@ zero_extendqisi2
2189
2324
 	mov	r10, #0
2190
-	ldrb	r3, [r0, #57]	@ zero_extendqisi2
2191
-	ldrb	r2, [r0, #56]	@ zero_extendqisi2
2192
-	mov	r0, r7
2325
+	ldrb	r2, [r0, #60]	@ zero_extendqisi2
2326
+	mov	r0, r6
2193
2327
 	str	r2, [r4, #2056]
2194
2328
 	str	r10, [r4, #2052]
2195
2329
 	str	r10, [r4, #2052]
2196
-	str	ip, [r4, #2052]
2197
2330
 	str	lr, [r4, #2052]
2331
+	str	ip, [r4, #2052]
2198
2332
 	str	r1, [r4, #2052]
2199
2333
 	str	r3, [r4, #2056]
2200
2334
 	bl	NandcWaitFlashReady
2201
-	str	r10, [r4, #2056]
2202
2335
 	movs	r3, #48
2336
+	str	r10, [r4, #2056]
2203
2337
 	str	r10, [r4, #2052]
2204
2338
 	str	r10, [r4, #2052]
2205
2339
 	str	r9, [r4, #2052]
2206
2340
 	str	r8, [r4, #2052]
2207
2341
 	str	r5, [r4, #2052]
2208
2342
 	str	r3, [r4, #2056]
2209
-	b	.L333
2210
-.L331:
2343
+.L330:
2344
+	mov	r1, r7
2345
+	mov	r0, r6
2346
+	pop	{r4, r5, r6, r7, r8, r9, r10, lr}
2347
+	b	FlashSetRandomizer
2348
+.L328:
2211
2349
 	cmp	r2, #1
2212
-	itt	eq
2213
-	addeq	r2, r4, r3
2350
+	ittt	eq
2351
+	addeq	r2, r3, r4
2214
2352
 	moveq	r10, #38
2215
-	add	r3, r3, r4
2216
-	it	eq
2217
2353
 	streq	r10, [r2, #2056]
2218
-	ldrb	r2, [r0, #56]	@ zero_extendqisi2
2354
+	add	r3, r3, r4
2355
+	ldrb	r2, [r0, #60]	@ zero_extendqisi2
2219
2356
 	str	r2, [r3, #2056]
2220
-	ldrb	r2, [r0, #57]	@ zero_extendqisi2
2221
-	str	ip, [r3, #2052]
2357
+	ldrb	r2, [r0, #61]	@ zero_extendqisi2
2222
2358
 	str	lr, [r3, #2052]
2359
+	str	ip, [r3, #2052]
2223
2360
 	str	r1, [r3, #2052]
2224
2361
 	str	r2, [r3, #2056]
2225
2362
 	movs	r2, #48
..
..
@@ -2227,89 +2364,89 @@
2227
2364
 	str	r8, [r3, #2052]
2228
2365
 	str	r5, [r3, #2052]
2229
2366
 	str	r2, [r3, #2056]
2367
+	b	.L330
2230
2368
 .L333:
2231
-	mov	r0, r7
2232
-	mov	r1, r6
2233
-	pop	{r4, r5, r6, r7, r8, r9, r10, lr}
2234
-	b	FlashSetRandomizer
2235
-.L336:
2236
2369
 	.align	2
2237
-.L335:
2370
+.L332:
2238
2371
 	.word	.LANCHOR0
2239
2372
 	.fnend
2240
2373
 	.size	FlashReadDpCmd, .-FlashReadDpCmd
2241
2374
 	.align	1
2242
2375
 	.global	ftl_flash_de_init
2376
+	.syntax unified
2243
2377
 	.thumb
2244
2378
 	.thumb_func
2379
+	.fpu softvfp
2245
2380
 	.type	ftl_flash_de_init, %function
2246
2381
 ftl_flash_de_init:
2247
2382
 	.fnstart
2248
2383
 	@ args = 0, pretend = 0, frame = 0
2249
2384
 	@ frame_needed = 0, uses_anonymous_args = 0
2250
-	push	{r3, r4, r5, lr}
2251
-	.save {r3, r4, r5, lr}
2385
+	push	{r4, lr}
2386
+	.save {r4, lr}
2252
2387
 	movs	r0, #0
2253
-	ldr	r4, .L347
2388
+	ldr	r4, .L344
2254
2389
 	bl	NandcWaitFlashReady
2255
2390
 	bl	FlashSetReadRetryDefault
2256
-	ldr	r0, [r4, #2248]
2257
-	cbz	r0, .L338
2391
+	ldr	r0, [r4, #2252]
2392
+	cbz	r0, .L335
2258
2393
 	movs	r0, #0
2259
2394
 	bl	flash_enter_slc_mode
2260
-	b	.L339
2261
-.L338:
2262
-	bl	flash_exit_slc_mode
2263
-.L339:
2264
-	ldrb	r3, [r4, #2252]	@ zero_extendqisi2
2265
-	ldr	r5, .L347
2266
-	cbz	r3, .L340
2267
-	ldrb	r3, [r5, #2229]	@ zero_extendqisi2
2395
+.L336:
2396
+	ldrb	r3, [r4, #2256]	@ zero_extendqisi2
2397
+	cbz	r3, .L337
2398
+	ldrb	r3, [r4, #2233]	@ zero_extendqisi2
2268
2399
 	lsls	r3, r3, #31
2269
-	bpl	.L340
2400
+	bpl	.L337
2270
2401
 	movs	r0, #1
2271
2402
 	bl	FlashSetInterfaceMode
2272
2403
 	movs	r0, #1
2273
2404
 	bl	NandcSetMode
2274
2405
 	movs	r3, #0
2275
-	strb	r3, [r5, #2252]
2276
-.L340:
2277
-	ldr	r3, [r4, #12]
2406
+	strb	r3, [r4, #2256]
2407
+.L337:
2408
+	ldr	r3, [r4]
2278
2409
 	movs	r0, #0
2279
2410
 	str	r0, [r3, #336]
2280
-	pop	{r3, r4, r5, pc}
2281
-.L348:
2411
+	pop	{r4, pc}
2412
+.L335:
2413
+	bl	flash_exit_slc_mode
2414
+	b	.L336
2415
+.L345:
2282
2416
 	.align	2
2283
-.L347:
2417
+.L344:
2284
2418
 	.word	.LANCHOR0
2285
2419
 	.fnend
2286
2420
 	.size	ftl_flash_de_init, .-ftl_flash_de_init
2287
2421
 	.align	1
2288
2422
 	.global	NandcRandmzSel
2423
+	.syntax unified
2289
2424
 	.thumb
2290
2425
 	.thumb_func
2426
+	.fpu softvfp
2291
2427
 	.type	NandcRandmzSel, %function
2292
2428
 NandcRandmzSel:
2293
2429
 	.fnstart
2294
2430
 	@ args = 0, pretend = 0, frame = 0
2295
2431
 	@ frame_needed = 0, uses_anonymous_args = 0
2296
2432
 	@ link register save eliminated.
2297
-	ldr	r3, .L350
2298
-	add	r0, r3, r0, lsl #3
2299
-	ldr	r3, [r0, #12]
2433
+	ldr	r3, .L347
2434
+	ldr	r3, [r3, r0, lsl #3]
2300
2435
 	str	r1, [r3, #336]
2301
2436
 	bx	lr
2302
-.L351:
2437
+.L348:
2303
2438
 	.align	2
2304
-.L350:
2439
+.L347:
2305
2440
 	.word	.LANCHOR0
2306
2441
 	.fnend
2307
2442
 	.size	NandcRandmzSel, .-NandcRandmzSel
2308
2443
 	.global	__aeabi_idiv
2309
2444
 	.align	1
2310
2445
 	.global	NandcTimeCfg
2446
+	.syntax unified
2311
2447
 	.thumb
2312
2448
 	.thumb_func
2449
+	.fpu softvfp
2313
2450
 	.type	NandcTimeCfg, %function
2314
2451
 NandcTimeCfg:
2315
2452
 	.fnstart
..
..
@@ -2320,53 +2457,55 @@
2320
2457
 	mov	r4, r0
2321
2458
 	movs	r0, #0
2322
2459
 	bl	rknand_get_clk_rate
2323
-	ldr	r1, .L362
2460
+	ldr	r1, .L359
2324
2461
 	bl	__aeabi_idiv
2325
-	ldr	r3, .L362+4
2326
-	ldr	r3, [r3, #80]
2462
+	ldr	r3, .L359+4
2327
2463
 	cmp	r0, #250
2328
-	ble	.L353
2464
+	ldr	r3, [r3, #88]
2465
+	ble	.L350
2329
2466
 	movw	r2, #8354
2330
-	b	.L360
2331
-.L353:
2332
-	cmp	r0, #220
2333
-	bgt	.L361
2334
-	cmp	r0, #185
2335
-	ble	.L356
2336
-	movw	r2, #4226
2337
-	b	.L360
2338
-.L356:
2339
-	cmp	r0, #160
2340
-	ble	.L357
2341
-	movw	r2, #4194
2342
-	b	.L360
2343
2467
 .L357:
2344
-	cmp	r4, #35
2345
-	bhi	.L358
2346
-	movw	r2, #4193
2347
-	b	.L360
2348
-.L358:
2349
-	cmp	r4, #99
2350
-	bls	.L359
2351
-.L361:
2352
-	movw	r2, #8322
2353
-	b	.L360
2354
-.L359:
2355
-	movw	r2, #4225
2356
-.L360:
2357
2468
 	str	r2, [r3, #4]
2358
2469
 	pop	{r4, pc}
2359
-.L363:
2470
+.L350:
2471
+	cmp	r0, #220
2472
+	ble	.L352
2473
+.L358:
2474
+	movw	r2, #8322
2475
+	b	.L357
2476
+.L352:
2477
+	cmp	r0, #185
2478
+	ble	.L353
2479
+	movw	r2, #4226
2480
+	b	.L357
2481
+.L353:
2482
+	cmp	r0, #160
2483
+	ble	.L354
2484
+	movw	r2, #4194
2485
+	b	.L357
2486
+.L354:
2487
+	cmp	r4, #35
2488
+	bhi	.L355
2489
+	movw	r2, #4193
2490
+	b	.L357
2491
+.L355:
2492
+	cmp	r4, #99
2493
+	bhi	.L358
2494
+	movw	r2, #4225
2495
+	b	.L357
2496
+.L360:
2360
2497
 	.align	2
2361
-.L362:
2498
+.L359:
2362
2499
 	.word	1000000
2363
2500
 	.word	.LANCHOR0
2364
2501
 	.fnend
2365
2502
 	.size	NandcTimeCfg, .-NandcTimeCfg
2366
2503
 	.align	1
2367
2504
 	.global	FlashTimingCfg
2505
+	.syntax unified
2368
2506
 	.thumb
2369
2507
 	.thumb_func
2508
+	.fpu softvfp
2370
2509
 	.type	FlashTimingCfg, %function
2371
2510
 FlashTimingCfg:
2372
2511
 	.fnstart
..
..
@@ -2376,33 +2515,35 @@
2376
2515
 	sub	r3, r0, #4192
2377
2516
 	subs	r3, r3, #1
2378
2517
 	cmp	r3, #1
2379
-	bls	.L365
2518
+	bls	.L362
2380
2519
 	sub	r3, r0, #4224
2381
2520
 	subs	r3, r3, #1
2382
2521
 	cmp	r3, #1
2383
-	bls	.L365
2522
+	bls	.L362
2384
2523
 	movw	r3, #8322
2385
2524
 	cmp	r0, r3
2386
-	bne	.L366
2387
-.L365:
2388
-	ldr	r3, .L367
2389
-	ldr	r3, [r3, #80]
2525
+	bne	.L363
2526
+.L362:
2527
+	ldr	r3, .L364
2528
+	ldr	r3, [r3, #88]
2390
2529
 	str	r0, [r3, #4]
2391
-.L366:
2392
-	ldr	r3, .L367+4
2393
-	ldrb	r0, [r3, #493]	@ zero_extendqisi2
2530
+.L363:
2531
+	ldr	r3, .L364+4
2532
+	ldrb	r0, [r3, #489]	@ zero_extendqisi2
2394
2533
 	b	NandcTimeCfg
2395
-.L368:
2534
+.L365:
2396
2535
 	.align	2
2397
-.L367:
2536
+.L364:
2398
2537
 	.word	.LANCHOR0
2399
2538
 	.word	.LANCHOR1
2400
2539
 	.fnend
2401
2540
 	.size	FlashTimingCfg, .-FlashTimingCfg
2402
2541
 	.align	1
2403
2542
 	.global	NandcInit
2543
+	.syntax unified
2404
2544
 	.thumb
2405
2545
 	.thumb_func
2546
+	.fpu softvfp
2406
2547
 	.type	NandcInit, %function
2407
2548
 NandcInit:
2408
2549
 	.fnstart
..
..
@@ -2410,68 +2551,69 @@
2410
2551
 	@ frame_needed = 0, uses_anonymous_args = 0
2411
2552
 	push	{r3, r4, r5, lr}
2412
2553
 	.save {r3, r4, r5, lr}
2413
-	movs	r1, #0
2414
-	ldr	r3, .L371
2415
2554
 	movs	r2, #1
2555
+	ldr	r3, .L368
2556
+	movs	r1, #0
2416
2557
 	movs	r5, #0
2417
-	str	r1, [r3, #16]
2418
-	str	r0, [r3, #12]
2419
-	str	r2, [r3, #24]
2558
+	str	r2, [r3, #12]
2420
2559
 	movs	r2, #2
2421
-	str	r0, [r3, #20]
2422
-	str	r2, [r3, #32]
2560
+	str	r2, [r3, #20]
2423
2561
 	movs	r2, #3
2424
-	str	r0, [r3, #28]
2425
-	str	r0, [r3, #36]
2426
-	str	r0, [r3, #80]
2427
-	str	r2, [r3, #40]
2562
+	stm	r3, {r0, r1}
2563
+	str	r0, [r3, #8]
2564
+	str	r0, [r3, #16]
2565
+	str	r0, [r3, #24]
2566
+	str	r0, [r3, #88]
2567
+	str	r2, [r3, #28]
2428
2568
 	ldr	r2, [r0]
2429
2569
 	and	r2, r2, #253952
2430
2570
 	ubfx	r4, r2, #13, #1
2431
2571
 	bfi	r2, r1, #13, #1
2432
2572
 	ldr	r1, [r0, #352]
2433
2573
 	orr	r2, r2, #256
2434
-	str	r4, [r3, #2256]
2574
+	str	r4, [r3, #2260]
2435
2575
 	movw	r4, #2049
2436
2576
 	ubfx	r1, r1, #16, #4
2437
-	str	r1, [r3, #2260]
2577
+	str	r1, [r3, #2264]
2438
2578
 	ldr	r1, [r0, #352]
2439
2579
 	cmp	r1, r4
2580
+	str	r1, [r3, #2268]
2440
2581
 	mov	r4, r3
2441
-	str	r1, [r3, #2264]
2442
2582
 	itt	eq
2443
2583
 	moveq	r3, #8
2444
-	streq	r3, [r4, #2260]
2584
+	streq	r3, [r4, #2264]
2445
2585
 	str	r2, [r0]
2446
2586
 	movs	r0, #40
2447
-	ldr	r3, [r4, #80]
2587
+	ldr	r3, [r4, #88]
2448
2588
 	str	r5, [r3, #336]
2449
2589
 	bl	NandcTimeCfg
2450
-	ldr	r3, [r4, #80]
2590
+	ldr	r3, [r4, #88]
2451
2591
 	movw	r2, #8322
2452
2592
 	mov	r0, #36864
2453
2593
 	str	r2, [r3, #344]
2454
-	ldr	r2, .L371+4
2594
+	ldr	r2, .L368+4
2455
2595
 	str	r2, [r3, #304]
2456
2596
 	bl	ftl_malloc
2457
-	str	r5, [r4, #2296]
2458
-	str	r5, [r4, #2304]
2459
-	str	r0, [r4, #2268]
2460
2597
 	str	r0, [r4, #2272]
2461
-	add	r0, r0, #32768
2462
2598
 	str	r0, [r4, #2276]
2599
+	add	r0, r0, #32768
2600
+	str	r0, [r4, #2280]
2601
+	str	r5, [r4, #2300]
2602
+	str	r5, [r4, #2308]
2463
2603
 	pop	{r3, r4, r5, pc}
2464
-.L372:
2604
+.L369:
2465
2605
 	.align	2
2466
-.L371:
2606
+.L368:
2467
2607
 	.word	.LANCHOR0
2468
2608
 	.word	1579009
2469
2609
 	.fnend
2470
2610
 	.size	NandcInit, .-NandcInit
2471
2611
 	.align	1
2472
2612
 	.global	NandcGetTimeCfg
2613
+	.syntax unified
2473
2614
 	.thumb
2474
2615
 	.thumb_func
2616
+	.fpu softvfp
2475
2617
 	.type	NandcGetTimeCfg, %function
2476
2618
 NandcGetTimeCfg:
2477
2619
 	.fnstart
..
..
@@ -2479,163 +2621,171 @@
2479
2621
 	@ frame_needed = 0, uses_anonymous_args = 0
2480
2622
 	push	{r4, r5, lr}
2481
2623
 	.save {r4, r5, lr}
2482
-	ldr	r4, .L374
2483
-	ldr	r5, [r4, #80]
2624
+	ldr	r4, .L371
2625
+	ldr	r5, [r4, #88]
2484
2626
 	ldr	r5, [r5, #4]
2485
2627
 	str	r5, [r0]
2486
-	ldr	r0, [r4, #80]
2628
+	ldr	r0, [r4, #88]
2487
2629
 	ldr	r0, [r0]
2488
2630
 	str	r0, [r1]
2489
-	ldr	r1, [r4, #80]
2631
+	ldr	r1, [r4, #88]
2490
2632
 	ldr	r1, [r1, #304]
2491
2633
 	str	r1, [r2]
2492
-	ldr	r1, [r4, #80]
2634
+	ldr	r1, [r4, #88]
2493
2635
 	ldr	r2, [r1, #308]
2494
2636
 	ldr	r1, [r1, #344]
2495
2637
 	uxtb	r2, r2
2496
2638
 	orr	r2, r2, r1, lsl #16
2497
2639
 	str	r2, [r3]
2498
2640
 	pop	{r4, r5, pc}
2499
-.L375:
2641
+.L372:
2500
2642
 	.align	2
2501
-.L374:
2643
+.L371:
2502
2644
 	.word	.LANCHOR0
2503
2645
 	.fnend
2504
2646
 	.size	NandcGetTimeCfg, .-NandcGetTimeCfg
2505
2647
 	.align	1
2506
2648
 	.global	NandcBchSel
2649
+	.syntax unified
2507
2650
 	.thumb
2508
2651
 	.thumb_func
2652
+	.fpu softvfp
2509
2653
 	.type	NandcBchSel, %function
2510
2654
 NandcBchSel:
2511
2655
 	.fnstart
2512
2656
 	@ args = 0, pretend = 0, frame = 0
2513
2657
 	@ frame_needed = 0, uses_anonymous_args = 0
2514
-	@ link register save eliminated.
2515
-	ldr	r3, .L384
2516
-	movs	r1, #1
2517
-	ldr	r2, [r3, #80]
2518
-	str	r0, [r3, #2308]
2519
-	movs	r3, #0
2520
-	str	r1, [r2, #8]
2521
-	movs	r1, #16
2522
-	cmp	r0, r1
2523
-	bfi	r3, r1, #8, #8
2524
-	bfc	r3, #18, #1
2525
-	bne	.L377
2526
-.L380:
2527
-	bfc	r3, #4, #1
2528
-	b	.L378
2658
+	ldr	r3, .L381
2659
+	movs	r1, #0
2660
+	push	{r4, lr}
2661
+	.save {r4, lr}
2662
+	movs	r4, #1
2663
+	ldr	r2, [r3, #88]
2664
+	str	r0, [r3, #2312]
2665
+	mov	r3, r1
2666
+	str	r4, [r2, #8]
2667
+	movs	r4, #16
2668
+	cmp	r0, r4
2669
+	bfi	r3, r4, #8, #8
2670
+	bfi	r3, r1, #18, #1
2671
+	bne	.L374
2529
2672
 .L377:
2673
+	bfc	r3, #4, #1
2674
+.L375:
2675
+	orr	r3, r3, #1
2676
+	str	r3, [r2, #12]
2677
+	pop	{r4, pc}
2678
+.L374:
2530
2679
 	cmp	r0, #24
2531
-	bne	.L379
2680
+	bne	.L376
2532
2681
 	orr	r3, r3, #16
2533
-	b	.L378
2534
-.L379:
2682
+	b	.L375
2683
+.L376:
2535
2684
 	cmp	r0, #40
2536
2685
 	orr	r3, r3, #262144
2537
2686
 	orr	r3, r3, #16
2538
-	beq	.L380
2539
-.L378:
2540
-	orr	r3, r3, #1
2541
-	str	r3, [r2, #12]
2542
-	bx	lr
2543
-.L385:
2687
+	bne	.L375
2688
+	b	.L377
2689
+.L382:
2544
2690
 	.align	2
2545
-.L384:
2691
+.L381:
2546
2692
 	.word	.LANCHOR0
2547
2693
 	.fnend
2548
2694
 	.size	NandcBchSel, .-NandcBchSel
2549
2695
 	.align	1
2550
2696
 	.global	FlashBchSel
2697
+	.syntax unified
2551
2698
 	.thumb
2552
2699
 	.thumb_func
2700
+	.fpu softvfp
2553
2701
 	.type	FlashBchSel, %function
2554
2702
 FlashBchSel:
2555
2703
 	.fnstart
2556
2704
 	@ args = 0, pretend = 0, frame = 0
2557
2705
 	@ frame_needed = 0, uses_anonymous_args = 0
2558
2706
 	@ link register save eliminated.
2559
-	ldr	r3, .L387
2560
-	strb	r0, [r3, #2312]
2707
+	ldr	r3, .L384
2708
+	strb	r0, [r3, #2316]
2561
2709
 	b	NandcBchSel
2562
-.L388:
2710
+.L385:
2563
2711
 	.align	2
2564
-.L387:
2712
+.L384:
2565
2713
 	.word	.LANCHOR0
2566
2714
 	.fnend
2567
2715
 	.size	FlashBchSel, .-FlashBchSel
2568
2716
 	.align	1
2569
2717
 	.global	ftl_flash_resume
2718
+	.syntax unified
2570
2719
 	.thumb
2571
2720
 	.thumb_func
2721
+	.fpu softvfp
2572
2722
 	.type	ftl_flash_resume, %function
2573
2723
 ftl_flash_resume:
2574
2724
 	.fnstart
2575
2725
 	@ args = 0, pretend = 0, frame = 0
2576
2726
 	@ frame_needed = 0, uses_anonymous_args = 0
2577
-	ldr	r3, .L397
2578
2727
 	push	{r4, r5, r6, lr}
2579
2728
 	.save {r4, r5, r6, lr}
2580
2729
 	movs	r5, #0
2581
-	ldr	r2, [r3, #80]
2582
-	addw	r6, r3, #2068
2583
-	ldr	r1, [r3, #84]
2584
-	mov	r4, r3
2730
+	ldr	r4, .L394
2731
+	ldr	r2, [r4, #88]
2732
+	addw	r6, r4, #2072
2733
+	ldr	r1, [r4, #92]
2585
2734
 	str	r1, [r2]
2586
-	ldr	r1, [r3, #88]
2587
-	ldr	r2, [r3, #80]
2735
+	ldr	r1, [r4, #96]
2736
+	ldr	r2, [r4, #88]
2588
2737
 	str	r1, [r2, #4]
2589
-	ldr	r1, [r3, #92]
2738
+	ldr	r1, [r4, #100]
2590
2739
 	str	r1, [r2, #8]
2591
-	ldr	r1, [r3, #96]
2740
+	ldr	r1, [r4, #104]
2592
2741
 	str	r1, [r2, #12]
2593
-	ldr	r1, [r3, #100]
2742
+	ldr	r1, [r4, #108]
2594
2743
 	str	r1, [r2, #304]
2595
-	ldr	r1, [r3, #104]
2744
+	ldr	r1, [r4, #112]
2596
2745
 	str	r1, [r2, #308]
2597
-	ldr	r1, [r3, #108]
2746
+	ldr	r1, [r4, #116]
2598
2747
 	str	r1, [r2, #336]
2599
-	ldr	r1, [r3, #112]
2748
+	ldr	r1, [r4, #120]
2600
2749
 	str	r1, [r2, #344]
2601
-.L391:
2750
+.L388:
2602
2751
 	ldrb	r3, [r6, r5, lsl #3]	@ zero_extendqisi2
2603
2752
 	subs	r3, r3, #1
2604
2753
 	uxtb	r3, r3
2605
2754
 	cmp	r3, #253
2606
-	bhi	.L390
2755
+	bhi	.L387
2607
2756
 	uxtb	r0, r5
2608
2757
 	bl	FlashReset
2609
-.L390:
2758
+.L387:
2610
2759
 	adds	r5, r5, #1
2611
2760
 	cmp	r5, #4
2612
-	bne	.L391
2613
-	ldrb	r3, [r4, #2252]	@ zero_extendqisi2
2614
-	ldr	r5, .L397
2615
-	cbz	r3, .L392
2761
+	bne	.L388
2762
+	ldrb	r3, [r4, #2256]	@ zero_extendqisi2
2763
+	cbz	r3, .L389
2616
2764
 	movs	r0, #1
2617
2765
 	bl	NandcSetMode
2618
-	ldrb	r0, [r5, #2229]	@ zero_extendqisi2
2766
+	ldrb	r0, [r4, #2233]	@ zero_extendqisi2
2619
2767
 	bl	FlashSetInterfaceMode
2620
-	ldrb	r0, [r5, #2229]	@ zero_extendqisi2
2768
+	ldrb	r0, [r4, #2233]	@ zero_extendqisi2
2621
2769
 	bl	NandcSetMode
2622
-	ldrb	r0, [r5, #101]	@ zero_extendqisi2
2770
+	ldrb	r0, [r4, #109]	@ zero_extendqisi2
2623
2771
 	bl	NandcSetDdrPara
2624
-.L392:
2625
-	ldr	r3, [r4, #44]
2772
+.L389:
2773
+	ldr	r3, [r4, #48]
2626
2774
 	pop	{r4, r5, r6, lr}
2627
2775
 	ldrb	r0, [r3, #20]	@ zero_extendqisi2
2628
2776
 	b	FlashBchSel
2629
-.L398:
2777
+.L395:
2630
2778
 	.align	2
2631
-.L397:
2779
+.L394:
2632
2780
 	.word	.LANCHOR0
2633
2781
 	.fnend
2634
2782
 	.size	ftl_flash_resume, .-ftl_flash_resume
2635
2783
 	.align	1
2636
2784
 	.global	ftl_nandc_get_irq_status
2785
+	.syntax unified
2637
2786
 	.thumb
2638
2787
 	.thumb_func
2788
+	.fpu softvfp
2639
2789
 	.type	ftl_nandc_get_irq_status, %function
2640
2790
 ftl_nandc_get_irq_status:
2641
2791
 	.fnstart
..
..
@@ -2648,8 +2798,10 @@
2648
2798
 	.size	ftl_nandc_get_irq_status, .-ftl_nandc_get_irq_status
2649
2799
 	.align	1
2650
2800
 	.global	rk_nandc_flash_ready
2801
+	.syntax unified
2651
2802
 	.thumb
2652
2803
 	.thumb_func
2804
+	.fpu softvfp
2653
2805
 	.type	rk_nandc_flash_ready, %function
2654
2806
 rk_nandc_flash_ready:
2655
2807
 	.fnstart
..
..
@@ -2667,8 +2819,10 @@
2667
2819
 	.size	rk_nandc_flash_ready, .-rk_nandc_flash_ready
2668
2820
 	.align	1
2669
2821
 	.global	NandcIqrWaitFlashReady
2822
+	.syntax unified
2670
2823
 	.thumb
2671
2824
 	.thumb_func
2825
+	.fpu softvfp
2672
2826
 	.type	NandcIqrWaitFlashReady, %function
2673
2827
 NandcIqrWaitFlashReady:
2674
2828
 	.fnstart
..
..
@@ -2680,8 +2834,10 @@
2680
2834
 	.size	NandcIqrWaitFlashReady, .-NandcIqrWaitFlashReady
2681
2835
 	.align	1
2682
2836
 	.global	rk_nandc_flash_xfer_completed
2837
+	.syntax unified
2683
2838
 	.thumb
2684
2839
 	.thumb_func
2840
+	.fpu softvfp
2685
2841
 	.type	rk_nandc_flash_xfer_completed, %function
2686
2842
 rk_nandc_flash_xfer_completed:
2687
2843
 	.fnstart
..
..
@@ -2699,8 +2855,10 @@
2699
2855
 	.size	rk_nandc_flash_xfer_completed, .-rk_nandc_flash_xfer_completed
2700
2856
 	.align	1
2701
2857
 	.global	NandcSendDumpDataStart
2858
+	.syntax unified
2702
2859
 	.thumb
2703
2860
 	.thumb_func
2861
+	.fpu softvfp
2704
2862
 	.type	NandcSendDumpDataStart, %function
2705
2863
 NandcSendDumpDataStart:
2706
2864
 	.fnstart
..
..
@@ -2710,10 +2868,10 @@
2710
2868
 	ldr	r2, [r0, #16]
2711
2869
 	.pad #8
2712
2870
 	sub	sp, sp, #8
2713
-	ldr	r3, .L404
2871
+	ldr	r3, .L401
2714
2872
 	str	r2, [sp, #4]
2715
2873
 	ldr	r2, [sp, #4]
2716
-	bic	r2, r2, #4
2874
+	bfc	r2, #2, #1
2717
2875
 	str	r2, [sp, #4]
2718
2876
 	ldr	r2, [sp, #4]
2719
2877
 	str	r2, [r0, #16]
..
..
@@ -2723,16 +2881,18 @@
2723
2881
 	add	sp, sp, #8
2724
2882
 	@ sp needed
2725
2883
 	bx	lr
2726
-.L405:
2884
+.L402:
2727
2885
 	.align	2
2728
-.L404:
2886
+.L401:
2729
2887
 	.word	538969130
2730
2888
 	.fnend
2731
2889
 	.size	NandcSendDumpDataStart, .-NandcSendDumpDataStart
2732
2890
 	.align	1
2733
2891
 	.global	NandcSendDumpDataDone
2892
+	.syntax unified
2734
2893
 	.thumb
2735
2894
 	.thumb_func
2895
+	.fpu softvfp
2736
2896
 	.type	NandcSendDumpDataDone, %function
2737
2897
 NandcSendDumpDataDone:
2738
2898
 	.fnstart
..
..
@@ -2741,12 +2901,12 @@
2741
2901
 	@ link register save eliminated.
2742
2902
 	.pad #8
2743
2903
 	sub	sp, sp, #8
2744
-.L407:
2904
+.L404:
2745
2905
 	ldr	r3, [r0, #8]
2746
2906
 	str	r3, [sp, #4]
2747
2907
 	ldr	r3, [sp, #4]
2748
2908
 	lsls	r3, r3, #11
2749
-	bpl	.L407
2909
+	bpl	.L404
2750
2910
 	add	sp, sp, #8
2751
2911
 	@ sp needed
2752
2912
 	bx	lr
..
..
@@ -2754,8 +2914,10 @@
2754
2914
 	.size	NandcSendDumpDataDone, .-NandcSendDumpDataDone
2755
2915
 	.align	1
2756
2916
 	.global	NandcXferStart
2917
+	.syntax unified
2757
2918
 	.thumb
2758
2919
 	.thumb_func
2920
+	.fpu softvfp
2759
2921
 	.type	NandcXferStart, %function
2760
2922
 NandcXferStart:
2761
2923
 	.fnstart
..
..
@@ -2767,158 +2929,162 @@
2767
2929
 	sub	sp, sp, #20
2768
2930
 	mov	r6, r1
2769
2931
 	ldr	r1, [sp, #60]
2932
+	str	r2, [sp, #4]
2770
2933
 	ldr	fp, [sp, #56]
2771
-	cbnz	r1, .L424
2934
+	cmp	r1, #0
2935
+	bne	.L421
2772
2936
 	adds	r1, fp, #0
2773
2937
 	it	ne
2774
2938
 	movne	r1, #1
2775
-	b	.L411
2776
-.L424:
2777
-	movs	r1, #1
2778
-.L411:
2779
-	ldr	r5, .L429
2780
-	mov	lr, #16
2781
-	movs	r4, #0
2782
-	add	r0, r5, r0, lsl #3
2783
-	ldr	r7, [r0, #12]
2784
-	ldrb	r0, [r0, #16]	@ zero_extendqisi2
2939
+.L408:
2940
+	ldr	r4, .L426
2941
+	mov	ip, #16
2942
+	movs	r5, #0
2943
+	ldr	r7, [r4, r0, lsl #3]
2944
+	add	r0, r4, r0, lsl #3
2785
2945
 	ldr	r8, [r7, #12]
2786
-	bfi	r8, lr, #8, #8
2787
-	bfi	r8, r4, #3, #1
2788
-	bfi	r4, r6, #1, #1
2946
+	ldrb	r0, [r0, #4]	@ zero_extendqisi2
2947
+	bfi	r8, ip, #8, #8
2948
+	bfi	r8, r5, #3, #1
2949
+	bfi	r5, r6, #1, #1
2789
2950
 	bfi	r8, r0, #5, #3
2790
-	orr	r4, r4, #8
2951
+	orr	r5, r5, #8
2791
2952
 	movs	r0, #1
2792
-	bfi	r4, r0, #5, #2
2953
+	bfi	r5, r0, #5, #2
2793
2954
 	lsrs	r3, r3, r0
2794
-	orr	r4, r4, #536870912
2795
-	orr	r4, r4, #1024
2796
-	bfi	r4, r3, #4, #1
2797
-	ldr	r3, [r5, #2260]
2955
+	orr	r5, r5, #536870912
2956
+	orr	r5, r5, #1024
2957
+	bfi	r5, r3, #4, #1
2958
+	ldr	r3, [r4, #2264]
2798
2959
 	cmp	r3, #3
2799
-	bls	.L412
2960
+	bls	.L409
2800
2961
 	ldr	r3, [r7, #16]
2801
2962
 	str	r3, [sp, #12]
2802
2963
 	ldr	r3, [sp, #12]
2803
-	bic	r3, r3, #4
2964
+	bfc	r3, #2, #1
2804
2965
 	str	r3, [sp, #12]
2805
2966
 	cmp	r1, #0
2806
-	beq	.L413
2807
-	cbnz	r6, .L414
2808
-.L422:
2967
+	beq	.L410
2968
+	cmp	r6, #0
2969
+	bne	.L411
2970
+.L419:
2971
+	ldr	r2, [sp, #4]
2809
2972
 	adds	r2, r2, #1
2810
2973
 	asrs	r2, r2, #1
2811
-	bfi	r4, r2, #22, #6
2974
+	bfi	r5, r2, #22, #6
2812
2975
 	cmp	fp, #0
2813
-	beq	.L415
2976
+	beq	.L412
2814
2977
 	mov	r0, fp
2815
-	b	.L416
2816
-.L414:
2817
-	ldr	r3, [r5, #2308]
2818
-	mov	r9, r5
2819
-	ldr	lr, [sp, #60]
2820
-	cmp	r3, #25
2821
-	ite	cc
2822
-	movcc	r3, #64
2823
-	movcs	r3, #128
2824
-	str	r3, [sp]
2825
-	lsrs	r3, r2, #1
2826
-	str	r3, [sp, #4]
2827
-	movs	r3, #0
2828
-	mov	r0, r3
2829
-.L418:
2830
-	ldr	r1, [sp, #4]
2831
-	cmp	r0, r1
2832
-	bcs	.L422
2833
-	ldr	r1, [sp, #60]
2834
-	lsr	r10, r3, #2
2835
-	cbz	r1, .L419
2836
-	ldrh	r1, [lr, #2]
2837
-	ldrh	ip, [lr], #4
2838
-	orr	ip, ip, r1, lsl #16
2839
-	ldr	r1, [r9, #2276]
2840
-	str	ip, [r1, r10, lsl #2]
2841
-	b	.L420
2842
-.L419:
2843
-	ldr	r1, [r9, #2276]
2844
-	mov	ip, r1
2845
-	mov	r1, #-1
2846
-	str	r1, [ip, r10, lsl #2]
2847
-.L420:
2848
-	ldr	r1, [sp]
2849
-	adds	r0, r0, #1
2850
-	add	r3, r3, r1
2851
-	b	.L418
2852
-.L415:
2853
-	ldr	r0, [r5, #2272]
2854
-.L416:
2855
-	ldr	r3, [r5, #2276]
2856
-	ubfx	r9, r4, #22, #5
2978
+.L413:
2979
+	ldr	r3, [r4, #2280]
2980
+	ubfx	r9, r5, #22, #5
2857
2981
 	mov	r2, r6
2858
-	str	r0, [r5, #2280]
2859
2982
 	lsl	r1, r9, #10
2860
-	str	r3, [r5, #2284]
2983
+	str	r0, [r4, #2284]
2984
+	str	r3, [r4, #2288]
2861
2985
 	bl	rknand_dma_map_single
2862
2986
 	mov	r2, r6
2987
+	str	r0, [r4, #2292]
2863
2988
 	lsl	r1, r9, #7
2989
+	ldr	r0, [r4, #2288]
2864
2990
 	clz	r6, r6
2865
-	lsrs	r6, r6, #5
2866
-	str	r0, [r5, #2288]
2867
-	ldr	r0, [r5, #2284]
2868
2991
 	bl	rknand_dma_map_single
2869
2992
 	movs	r3, #1
2870
-	str	r3, [r5, #2296]
2993
+	str	r0, [r4, #2296]
2994
+	str	r3, [r4, #2300]
2995
+	movs	r2, #16
2996
+	ldr	r3, [r4, #2292]
2871
2997
 	tst	fp, #3
2872
-	ldr	r3, [r5, #2288]
2873
-	str	r0, [r5, #2292]
2998
+	lsr	r6, r6, #5
2874
2999
 	str	r3, [r7, #20]
2875
-	ldr	r3, [r5, #2292]
3000
+	ldr	r3, [r4, #2296]
2876
3001
 	str	r3, [r7, #24]
2877
3002
 	mov	r3, #0
2878
3003
 	str	r3, [sp, #12]
2879
3004
 	ldr	r3, [sp, #12]
2880
-	bic	r3, r3, #15872
2881
-	orr	r3, r3, #8192
3005
+	bfi	r3, r2, #9, #5
3006
+	it	eq
3007
+	moveq	r2, #2
2882
3008
 	str	r3, [sp, #12]
2883
3009
 	ldr	r3, [sp, #12]
2884
3010
 	orr	r3, r3, #448
2885
3011
 	str	r3, [sp, #12]
2886
-	itttt	eq
3012
+	ittt	eq
2887
3013
 	ldreq	r3, [sp, #12]
2888
-	biceq	r3, r3, #56
2889
-	orreq	r3, r3, #16
3014
+	bfieq	r3, r2, #3, #3
2890
3015
 	streq	r3, [sp, #12]
2891
3016
 	ldr	r3, [sp, #12]
2892
3017
 	orr	r3, r3, #4
2893
3018
 	str	r3, [sp, #12]
2894
3019
 	ldr	r3, [sp, #12]
2895
-	bic	r3, r3, #2
2896
-	orr	r6, r3, r6, lsl #1
2897
-	str	r6, [sp, #12]
3020
+	bfi	r3, r6, #1, #1
3021
+	str	r3, [sp, #12]
2898
3022
 	ldr	r3, [sp, #12]
2899
3023
 	orr	r3, r3, #1
2900
3024
 	str	r3, [sp, #12]
2901
-.L413:
3025
+.L410:
2902
3026
 	ldr	r3, [sp, #12]
2903
3027
 	str	r3, [r7, #16]
2904
-.L412:
3028
+.L409:
2905
3029
 	str	r8, [r7, #12]
2906
-	str	r4, [r7, #8]
2907
-	orr	r4, r4, #4
2908
-	str	r4, [r7, #8]
3030
+	str	r5, [r7, #8]
3031
+	orr	r5, r5, #4
3032
+	str	r5, [r7, #8]
2909
3033
 	add	sp, sp, #20
2910
3034
 	@ sp needed
2911
3035
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
2912
-.L430:
3036
+.L421:
3037
+	movs	r1, #1
3038
+	b	.L408
3039
+.L411:
3040
+	ldr	r3, [r4, #2312]
3041
+	cmp	r3, #25
3042
+	ldr	r3, [sp, #4]
3043
+	ite	cc
3044
+	movcc	r10, #64
3045
+	movcs	r10, #128
3046
+	lsr	r9, r3, #1
3047
+	ldr	r3, [sp, #60]
3048
+	str	r3, [sp]
3049
+	movs	r3, #0
3050
+	mov	r0, r3
3051
+.L415:
3052
+	cmp	r0, r9
3053
+	bcs	.L419
3054
+	ldr	r1, [sp, #60]
3055
+	bic	lr, r3, #3
3056
+	cbz	r1, .L416
3057
+	ldr	r2, [sp]
3058
+	ldr	r1, [r2], #4	@ unaligned
3059
+	str	r2, [sp]
3060
+	mov	r2, r1
3061
+	ldr	r1, [r4, #2280]
3062
+	mov	ip, r1
3063
+	str	r2, [ip, lr]
3064
+.L417:
3065
+	adds	r0, r0, #1
3066
+	add	r3, r3, r10
3067
+	b	.L415
3068
+.L416:
3069
+	ldr	r1, [r4, #2280]
3070
+	mov	r2, #-1
3071
+	str	r2, [r1, lr]
3072
+	b	.L417
3073
+.L412:
3074
+	ldr	r0, [r4, #2276]
3075
+	b	.L413
3076
+.L427:
2913
3077
 	.align	2
2914
-.L429:
3078
+.L426:
2915
3079
 	.word	.LANCHOR0
2916
3080
 	.fnend
2917
3081
 	.size	NandcXferStart, .-NandcXferStart
2918
3082
 	.align	1
2919
3083
 	.global	Ftl_log2
3084
+	.syntax unified
2920
3085
 	.thumb
2921
3086
 	.thumb_func
3087
+	.fpu softvfp
2922
3088
 	.type	Ftl_log2, %function
2923
3089
 Ftl_log2:
2924
3090
 	.fnstart
..
..
@@ -2927,23 +3093,25 @@
2927
3093
 	@ link register save eliminated.
2928
3094
 	movs	r1, #0
2929
3095
 	movs	r2, #1
2930
-.L432:
3096
+.L429:
2931
3097
 	cmp	r2, r0
2932
3098
 	uxth	r3, r1
2933
3099
 	add	r1, r1, #1
2934
-	bhi	.L434
2935
-	lsls	r2, r2, #1
2936
-	b	.L432
2937
-.L434:
3100
+	bls	.L430
2938
3101
 	subs	r0, r3, #1
2939
3102
 	uxth	r0, r0
2940
3103
 	bx	lr
3104
+.L430:
3105
+	lsls	r2, r2, #1
3106
+	b	.L429
2941
3107
 	.fnend
2942
3108
 	.size	Ftl_log2, .-Ftl_log2
2943
3109
 	.align	1
2944
3110
 	.global	FtlPrintInfo
3111
+	.syntax unified
2945
3112
 	.thumb
2946
3113
 	.thumb_func
3114
+	.fpu softvfp
2947
3115
 	.type	FtlPrintInfo, %function
2948
3116
 FtlPrintInfo:
2949
3117
 	.fnstart
..
..
@@ -2955,40 +3123,44 @@
2955
3123
 	.size	FtlPrintInfo, .-FtlPrintInfo
2956
3124
 	.align	1
2957
3125
 	.global	FtlSysBlkNumInit
3126
+	.syntax unified
2958
3127
 	.thumb
2959
3128
 	.thumb_func
3129
+	.fpu softvfp
2960
3130
 	.type	FtlSysBlkNumInit, %function
2961
3131
 FtlSysBlkNumInit:
2962
3132
 	.fnstart
2963
3133
 	@ args = 0, pretend = 0, frame = 0
2964
3134
 	@ frame_needed = 0, uses_anonymous_args = 0
2965
3135
 	@ link register save eliminated.
2966
-	ldr	r3, .L438
2967
-	cmp	r0, #23
2968
-	it	ls
2969
-	movls	r0, #24
2970
-	ldrh	r2, [r3, #2320]
2971
-	ldrh	r1, [r3, #2330]
2972
-	str	r0, [r3, #2316]
3136
+	ldr	r3, .L433
3137
+	cmp	r0, #24
3138
+	it	cc
3139
+	movcc	r0, #24
3140
+	ldrh	r2, [r3, #2324]
3141
+	ldrh	r1, [r3, #2334]
3142
+	str	r0, [r3, #2320]
2973
3143
 	muls	r2, r0, r2
2974
3144
 	subs	r0, r1, r0
2975
-	ldr	r1, [r3, #2336]
2976
-	strh	r0, [r3, #2328]	@ movhi
3145
+	ldr	r1, [r3, #2340]
3146
+	strh	r0, [r3, #2332]	@ movhi
2977
3147
 	movs	r0, #0
2978
-	str	r2, [r3, #2324]
3148
+	str	r2, [r3, #2328]
2979
3149
 	subs	r2, r1, r2
2980
-	str	r2, [r3, #2332]
3150
+	str	r2, [r3, #2336]
2981
3151
 	bx	lr
2982
-.L439:
3152
+.L434:
2983
3153
 	.align	2
2984
-.L438:
3154
+.L433:
2985
3155
 	.word	.LANCHOR0
2986
3156
 	.fnend
2987
3157
 	.size	FtlSysBlkNumInit, .-FtlSysBlkNumInit
2988
3158
 	.align	1
2989
3159
 	.global	FtlConstantsInit
3160
+	.syntax unified
2990
3161
 	.thumb
2991
3162
 	.thumb_func
3163
+	.fpu softvfp
2992
3164
 	.type	FtlConstantsInit, %function
2993
3165
 FtlConstantsInit:
2994
3166
 	.fnstart
..
..
@@ -3000,388 +3172,392 @@
3000
3172
 	sub	sp, sp, #20
3001
3173
 	ldrh	r1, [r0, #14]
3002
3174
 	mov	r5, r0
3003
-	ldr	r4, .L468
3004
-	ldrh	lr, [r0, #8]
3175
+	ldr	r4, .L462
3005
3176
 	str	r1, [sp]
3006
3177
 	ldrh	r1, [sp]
3178
+	ldrh	ip, [r0, #8]
3007
3179
 	ldrh	r2, [r0, #10]
3008
3180
 	ldrh	r3, [r0, #12]
3009
-	addw	r0, r4, #2348
3010
-	strh	r1, [r4, #2330]	@ movhi
3181
+	addw	r0, r4, #2350
3182
+	strh	r1, [r4, #2334]	@ movhi
3011
3183
 	movs	r1, #0
3012
-	strh	lr, [r4, #2340]	@ movhi
3013
-	strh	r2, [r4, #2342]	@ movhi
3014
-	strh	r3, [r4, #2344]	@ movhi
3015
-.L441:
3184
+	strh	ip, [r4, #2344]	@ movhi
3185
+	strh	r2, [r4, #2346]	@ movhi
3186
+	strh	r3, [r4, #2348]	@ movhi
3187
+.L436:
3016
3188
 	strb	r1, [r1, r0]
3017
3189
 	adds	r1, r1, #1
3018
3190
 	cmp	r1, #32
3019
-	bne	.L441
3191
+	bne	.L436
3020
3192
 	ldrh	r0, [r5, #14]
3021
3193
 	ldrh	r1, [r5, #20]
3022
3194
 	cmp	r1, r0, lsr #8
3023
-	bcs	.L442
3195
+	bcs	.L437
3024
3196
 	uxtb	r10, r3
3025
-	ldr	r9, .L468+4
3197
+	ldr	r9, .L462+4
3026
3198
 	lsl	r1, r10, #1
3027
3199
 	uxtb	r1, r1
3028
-	str	r1, [sp, #8]
3200
+	str	r1, [sp, #4]
3029
3201
 	subs	r1, r2, #1
3030
3202
 	muls	r1, r3, r1
3031
-	str	r1, [sp, #4]
3203
+	str	r1, [sp, #12]
3032
3204
 	movs	r1, #0
3033
-.L443:
3205
+.L438:
3034
3206
 	cmp	r1, r3
3035
-	bcs	.L445
3036
-	ldr	r6, [sp, #4]
3037
-	rsb	ip, r3, r1
3207
+	bcs	.L440
3208
+	ldr	r6, [sp, #12]
3209
+	sub	lr, r1, r3
3038
3210
 	uxtb	r0, r1
3039
-	add	ip, ip, r9
3211
+	add	lr, lr, r9
3040
3212
 	adds	r6, r1, r6
3041
3213
 	add	r6, r9, r6
3042
-	str	r6, [sp, #12]
3214
+	str	r6, [sp, #8]
3043
3215
 	movs	r6, #0
3044
3216
 	mov	r8, r6
3045
-.L446:
3046
-	cmp	r8, r2
3047
-	add	r6, r6, r3
3048
-	bcs	.L467
3049
-	ldr	r7, [sp, #12]
3050
-	add	fp, r0, r10
3051
-	strb	r0, [ip, r6]
3217
+	b	.L441
3218
+.L439:
3219
+	ldr	r7, [sp, #8]
3220
+	add	fp, r10, r0
3221
+	strb	r0, [lr, r6]
3052
3222
 	add	r8, r8, #1
3053
3223
 	strb	fp, [r7, r6]
3054
-	ldr	r7, [sp, #8]
3224
+	ldr	r7, [sp, #4]
3055
3225
 	add	r0, r0, r7
3056
3226
 	uxtb	r0, r0
3057
-	b	.L446
3058
-.L467:
3227
+.L441:
3228
+	cmp	r8, r2
3229
+	add	r6, r6, r3
3230
+	bcc	.L439
3059
3231
 	adds	r1, r1, #1
3060
-	b	.L443
3061
-.L445:
3232
+	b	.L438
3233
+.L440:
3062
3234
 	lsls	r2, r2, #1
3063
-	strh	r2, [r4, #2342]	@ movhi
3235
+	strh	r2, [r4, #2346]	@ movhi
3064
3236
 	ldr	r2, [sp]
3065
3237
 	lsrs	r7, r2, #1
3066
-	strh	r7, [r4, #2330]	@ movhi
3067
-.L442:
3068
-	cmp	lr, #1
3069
-	mov	r2, #5
3070
-	strh	r2, [r4, #2380]	@ movhi
3071
-	mov	r2, #0
3238
+	strh	r7, [r4, #2334]	@ movhi
3239
+.L437:
3240
+	movs	r2, #5
3241
+	ldrb	r9, [r4, #36]	@ zero_extendqisi2
3072
3242
 	strh	r2, [r4, #2382]	@ movhi
3073
-	it	eq
3074
-	ldreq	r2, .L468
3075
-	ldrb	r9, [r4]	@ zero_extendqisi2
3076
-	it	eq
3077
-	strheq	lr, [r2, #2380]	@ movhi
3078
-	mov	r2, #4352
3243
+	movs	r2, #0
3079
3244
 	strh	r2, [r4, #2384]	@ movhi
3245
+	cmp	ip, #1
3246
+	mov	r2, #4352
3247
+	it	eq
3248
+	strheq	ip, [r4, #2382]	@ movhi
3249
+	strh	r2, [r4, #2386]	@ movhi
3080
3250
 	cmp	r9, #0
3081
-	beq	.L448
3082
-	ldr	r2, .L468
3083
-	mov	r1, #384
3084
-	strh	r1, [r2, #2384]	@ movhi
3085
-.L448:
3086
-	ldrh	r7, [r4, #2342]
3087
-	ldrh	r6, [r4, #2330]
3251
+	beq	.L443
3252
+	mov	r2, #384
3253
+	strh	r2, [r4, #2386]	@ movhi
3254
+.L443:
3255
+	ldrh	r7, [r4, #2346]
3256
+	ldrh	r6, [r4, #2334]
3088
3257
 	ldrh	r8, [r5, #16]
3089
-	smulbb	r7, r7, r3
3090
3258
 	ldrh	fp, [r5, #20]
3091
-	smulbb	r3, r6, r3
3259
+	smulbb	r7, r7, r3
3092
3260
 	ldrh	r1, [r5, #18]
3261
+	smulbb	r3, r3, r6
3262
+	strh	r8, [r4, #2390]	@ movhi
3093
3263
 	mov	r0, fp
3094
-	strh	r8, [r4, #2388]	@ movhi
3095
-	strh	fp, [r4, #2394]	@ movhi
3264
+	strh	fp, [r4, #2396]	@ movhi
3096
3265
 	uxth	r7, r7
3097
-	strh	r1, [r4, #2390]	@ movhi
3098
-	str	r1, [sp]
3099
-	strh	r3, [r4, #2386]	@ movhi
3266
+	strh	r1, [r4, #2392]	@ movhi
3267
+	strh	r3, [r4, #2388]	@ movhi
3100
3268
 	smulbb	r3, r7, r8
3101
-	strh	r7, [r4, #2320]	@ movhi
3102
-	strh	r3, [r4, #2392]	@ movhi
3269
+	str	r1, [sp]
3270
+	strh	r7, [r4, #2324]	@ movhi
3271
+	strh	r3, [r4, #2394]	@ movhi
3103
3272
 	bl	Ftl_log2
3104
3273
 	lsl	r3, fp, #9
3105
3274
 	cmp	r6, #1024
3275
+	strh	r0, [r4, #2398]	@ movhi
3276
+	mov	r10, r0
3106
3277
 	uxth	r3, r3
3107
-	strh	r3, [r4, #2398]	@ movhi
3108
-	it	hi
3109
-	ldrhi	r2, .L468
3110
-	lsr	r3, r3, #8
3278
+	ldr	r1, [sp]
3279
+	ldrh	r0, [r4, #2386]
3111
3280
 	strh	r3, [r4, #2400]	@ movhi
3112
-	ldrh	r3, [r5, #26]
3281
+	lsr	r3, r3, #8
3113
3282
 	strh	r3, [r4, #2402]	@ movhi
3283
+	mul	r1, fp, r1
3284
+	ldrh	r3, [r5, #26]
3285
+	lsl	r0, r0, #3
3286
+	strh	r3, [r4, #2404]	@ movhi
3114
3287
 	mul	r3, r6, r7
3115
-	str	r3, [r4, #2336]
3288
+	str	r3, [r4, #2340]
3116
3289
 	itt	hi
3117
3290
 	uxtbhi	r3, r6
3118
-	strhhi	r3, [r2, #2382]	@ movhi
3119
-	mov	r10, r0
3120
-	ldrh	r5, [r4, #2382]
3121
-	ldr	r1, [sp]
3122
-	subs	r5, r6, r5
3123
-	strh	r0, [r4, #2396]	@ movhi
3124
-	ldrh	r0, [r4, #2384]
3125
-	muls	r5, r7, r5
3126
-	ldr	r3, .L468
3127
-	lsls	r0, r0, #3
3128
-	mul	r1, r1, fp
3129
-	str	r3, [sp]
3130
-	mul	r5, fp, r5
3131
-	mul	r5, r8, r5
3132
-	asrs	r5, r5, #11
3133
-	str	r5, [r4, #2404]
3291
+	strhhi	r3, [r4, #2384]	@ movhi
3292
+	ldrh	r3, [r4, #2384]
3293
+	subs	r3, r6, r3
3294
+	muls	r3, r7, r3
3295
+	mul	r3, fp, r3
3296
+	mul	r8, r8, r3
3297
+	asr	r3, r8, #11
3298
+	str	r3, [r4, #2408]
3134
3299
 	bl	__aeabi_idiv
3135
-	ldr	r3, [sp]
3136
3300
 	uxth	r0, r0
3137
3301
 	cmp	r0, #4
3138
3302
 	itet	ls
3139
-	movls	r2, #4
3140
-	strhhi	r0, [r3, #2408]	@ movhi
3141
-	strhls	r2, [r3, #2408]	@ movhi
3303
+	movls	r3, #4
3304
+	strhhi	r0, [r4, #2412]	@ movhi
3305
+	strhls	r3, [r4, #2412]	@ movhi
3142
3306
 	cmp	r9, #0
3143
-	beq	.L452
3307
+	beq	.L447
3144
3308
 	mov	r3, #640
3145
-	strh	r3, [r4, #2384]	@ movhi
3146
-.L452:
3147
-	ldrh	r3, [r4, #2384]
3309
+	strh	r3, [r4, #2386]	@ movhi
3310
+.L447:
3311
+	ldrh	r3, [r4, #2386]
3148
3312
 	lsls	r6, r6, #6
3149
3313
 	mov	r1, r7
3150
-	ldr	r5, .L468
3314
+	ldrh	r0, [r4, #2412]
3151
3315
 	asr	r3, r3, r10
3152
3316
 	add	r10, r10, #9
3153
3317
 	asr	r6, r6, r10
3154
3318
 	adds	r3, r3, #2
3155
-	strh	r3, [r4, #2410]	@ movhi
3156
-	uxth	r0, r6
3157
-	strh	r6, [r4, #2412]	@ movhi
3158
-	add	r6, r0, #8
3159
-	mul	r3, r7, r0
3160
-	ldrh	r0, [r4, #2408]
3161
-	str	r3, [r4, #2416]
3319
+	strh	r6, [r4, #2416]	@ movhi
3320
+	uxth	r6, r6
3321
+	strh	r3, [r4, #2414]	@ movhi
3322
+	mul	r3, r6, r7
3323
+	adds	r6, r6, #8
3324
+	str	r3, [r4, #2420]
3162
3325
 	bl	__aeabi_uidiv
3163
-	cmp	r7, #1
3164
3326
 	uxtah	r0, r6, r0
3165
-	ldr	r6, .L468
3327
+	cmp	r7, #1
3166
3328
 	it	eq
3167
3329
 	addeq	r0, r0, #4
3168
-	str	r0, [r5, #2316]
3169
-	ldrh	r0, [r4, #2316]
3330
+	str	r0, [r4, #2320]
3331
+	ldrh	r0, [r4, #2320]
3170
3332
 	bl	FtlSysBlkNumInit
3171
-	ldr	r3, [r4, #2316]
3172
-	ldr	r5, [r4, #2332]
3333
+	ldr	r5, [r4, #2336]
3173
3334
 	mov	r0, #2048
3174
-	ldrh	r7, [r4, #2394]
3175
-	str	r3, [r4, #2420]
3176
-	ldrh	r3, [r4, #2388]
3177
-	lsls	r5, r5, #2
3178
-	mov	r1, r7
3335
+	ldr	r3, [r4, #2320]
3336
+	ldrh	r6, [r4, #2396]
3337
+	str	r3, [r4, #2424]
3338
+	lsls	r3, r5, #2
3339
+	ldrh	r5, [r4, #2390]
3340
+	mov	r1, r6
3179
3341
 	muls	r5, r3, r5
3180
-	ldrh	r3, [r4, #2396]
3342
+	ldrh	r3, [r4, #2398]
3181
3343
 	adds	r3, r3, #9
3182
3344
 	lsrs	r5, r5, r3
3183
3345
 	adds	r5, r5, #2
3184
3346
 	uxth	r5, r5
3185
-	strh	r5, [r4, #2424]	@ movhi
3347
+	strh	r5, [r4, #2428]	@ movhi
3186
3348
 	bl	__aeabi_idiv
3187
-	ldrh	r2, [r4, #2408]
3349
+	ldrh	r2, [r4, #2412]
3188
3350
 	movs	r3, #0
3189
-	str	r3, [r4, #2428]
3351
+	str	r3, [r4, #2432]
3352
+	strh	r0, [r4, #2430]	@ movhi
3190
3353
 	adds	r3, r2, #3
3191
-	strh	r3, [r4, #2408]	@ movhi
3192
-	ldr	r3, [r4, #2416]
3354
+	ldrb	r0, [r4, #152]	@ zero_extendqisi2
3355
+	strh	r3, [r4, #2412]	@ movhi
3356
+	ldr	r3, [r4, #2420]
3193
3357
 	adds	r1, r3, #3
3194
-	str	r1, [r4, #2416]
3195
-	strh	r0, [r4, #2426]	@ movhi
3196
-	ldrb	r0, [r4, #144]	@ zero_extendqisi2
3197
-	cbz	r0, .L455
3198
-	adds	r2, r2, #4
3358
+	str	r1, [r4, #2420]
3359
+	cbz	r0, .L450
3199
3360
 	adds	r3, r3, #5
3200
-	strh	r2, [r6, #2408]	@ movhi
3201
-	b	.L466
3202
-.L455:
3203
-	cmp	r1, #7
3204
-	bhi	.L456
3205
-	movs	r3, #8
3206
-.L466:
3207
-	str	r3, [r6, #2416]
3208
-.L456:
3209
-	ldrh	r2, [r4, #2328]
3361
+	adds	r2, r2, #4
3362
+	strh	r2, [r4, #2412]	@ movhi
3363
+.L461:
3364
+	str	r3, [r4, #2420]
3365
+.L451:
3366
+	ldrh	r2, [r4, #2332]
3210
3367
 	movs	r3, #0
3211
-	strh	r3, [r4, #2432]	@ movhi
3368
+	strh	r3, [r4, #2436]	@ movhi
3212
3369
 	movs	r0, #0
3213
3370
 	lsrs	r3, r2, #3
3214
3371
 	add	r3, r3, r2, lsl #1
3215
3372
 	adds	r3, r3, #52
3216
3373
 	add	r5, r3, r5, lsl #2
3217
-	cmp	r5, r7, lsl #9
3218
-	ittt	cc
3219
-	movcc	r2, #1
3220
-	ldrcc	r3, .L468
3221
-	strhcc	r2, [r3, #2432]	@ movhi
3374
+	cmp	r5, r6, lsl #9
3375
+	itt	cc
3376
+	movcc	r3, #1
3377
+	strhcc	r3, [r4, #2436]	@ movhi
3222
3378
 	add	sp, sp, #20
3223
3379
 	@ sp needed
3224
3380
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
3225
-.L469:
3381
+.L450:
3382
+	cmp	r1, #7
3383
+	bhi	.L451
3384
+	movs	r3, #8
3385
+	b	.L461
3386
+.L463:
3226
3387
 	.align	2
3227
-.L468:
3388
+.L462:
3228
3389
 	.word	.LANCHOR0
3229
-	.word	.LANCHOR0+2348
3390
+	.word	.LANCHOR0+2350
3230
3391
 	.fnend
3231
3392
 	.size	FtlConstantsInit, .-FtlConstantsInit
3232
3393
 	.align	1
3233
3394
 	.global	IsBlkInVendorPart
3395
+	.syntax unified
3234
3396
 	.thumb
3235
3397
 	.thumb_func
3398
+	.fpu softvfp
3236
3399
 	.type	IsBlkInVendorPart, %function
3237
3400
 IsBlkInVendorPart:
3238
3401
 	.fnstart
3239
3402
 	@ args = 0, pretend = 0, frame = 0
3240
3403
 	@ frame_needed = 0, uses_anonymous_args = 0
3241
3404
 	@ link register save eliminated.
3242
-	ldr	r2, .L477
3243
-	ldrh	r3, [r2, #2434]
3244
-	cbz	r3, .L476
3245
-	ldr	r3, [r2, #2436]
3246
-	ldrh	r2, [r2, #2408]
3405
+	ldr	r2, .L471
3406
+	ldrh	r3, [r2, #2438]
3407
+	cbz	r3, .L470
3408
+	ldr	r3, [r2, #2440]
3409
+	ldrh	r2, [r2, #2412]
3247
3410
 	add	r2, r3, r2, lsl #1
3248
-.L472:
3411
+.L466:
3249
3412
 	cmp	r3, r2
3250
-	beq	.L476
3251
-	ldrh	r1, [r3], #2
3252
-	cmp	r1, r0
3253
-	bne	.L472
3254
-	movs	r0, #1
3255
-	bx	lr
3256
-.L476:
3413
+	bne	.L467
3414
+.L470:
3257
3415
 	movs	r0, #0
3258
3416
 	bx	lr
3259
-.L478:
3417
+.L467:
3418
+	ldrh	r1, [r3], #2
3419
+	cmp	r0, r1
3420
+	bne	.L466
3421
+	movs	r0, #1
3422
+	bx	lr
3423
+.L472:
3260
3424
 	.align	2
3261
-.L477:
3425
+.L471:
3262
3426
 	.word	.LANCHOR0
3263
3427
 	.fnend
3264
3428
 	.size	IsBlkInVendorPart, .-IsBlkInVendorPart
3265
3429
 	.align	1
3266
3430
 	.global	FtlCacheMetchLpa
3431
+	.syntax unified
3267
3432
 	.thumb
3268
3433
 	.thumb_func
3434
+	.fpu softvfp
3269
3435
 	.type	FtlCacheMetchLpa, %function
3270
3436
 FtlCacheMetchLpa:
3271
3437
 	.fnstart
3272
3438
 	@ args = 0, pretend = 0, frame = 0
3273
3439
 	@ frame_needed = 0, uses_anonymous_args = 0
3274
-	ldr	r2, .L487
3440
+	ldr	r2, .L481
3275
3441
 	push	{r4, r5, r6, lr}
3276
3442
 	.save {r4, r5, r6, lr}
3277
-	ldr	r3, [r2, #2440]
3278
-	cbz	r3, .L486
3279
-	ldr	r5, [r2, #2444]
3443
+	ldr	r3, [r2, #2444]
3444
+	cbz	r3, .L480
3445
+	ldr	r5, [r2, #2448]
3280
3446
 	movs	r6, #36
3281
3447
 	movs	r2, #0
3282
-.L482:
3448
+.L476:
3283
3449
 	mla	r4, r6, r2, r5
3284
3450
 	ldr	r4, [r4, #16]
3285
3451
 	cmp	r4, r0
3286
-	bcc	.L481
3452
+	bcc	.L475
3287
3453
 	cmp	r4, r1
3288
-	bls	.L484
3289
-.L481:
3454
+	bls	.L478
3455
+.L475:
3290
3456
 	adds	r2, r2, #1
3291
-	cmp	r2, r3
3292
-	bne	.L482
3293
-.L486:
3457
+	cmp	r3, r2
3458
+	bne	.L476
3459
+.L480:
3294
3460
 	movs	r0, #0
3295
3461
 	pop	{r4, r5, r6, pc}
3296
-.L484:
3462
+.L478:
3297
3463
 	movs	r0, #1
3298
3464
 	pop	{r4, r5, r6, pc}
3299
-.L488:
3465
+.L482:
3300
3466
 	.align	2
3301
-.L487:
3467
+.L481:
3302
3468
 	.word	.LANCHOR0
3303
3469
 	.fnend
3304
3470
 	.size	FtlCacheMetchLpa, .-FtlCacheMetchLpa
3305
3471
 	.align	1
3306
3472
 	.global	FtlGetCap
3473
+	.syntax unified
3307
3474
 	.thumb
3308
3475
 	.thumb_func
3476
+	.fpu softvfp
3309
3477
 	.type	FtlGetCap, %function
3310
3478
 FtlGetCap:
3311
3479
 	.fnstart
3312
3480
 	@ args = 0, pretend = 0, frame = 0
3313
3481
 	@ frame_needed = 0, uses_anonymous_args = 0
3314
3482
 	@ link register save eliminated.
3315
-	ldr	r3, .L490
3316
-	ldr	r0, [r3, #2428]
3483
+	ldr	r3, .L484
3484
+	ldr	r0, [r3, #2432]
3317
3485
 	bx	lr
3318
-.L491:
3486
+.L485:
3319
3487
 	.align	2
3320
-.L490:
3488
+.L484:
3321
3489
 	.word	.LANCHOR0
3322
3490
 	.fnend
3323
3491
 	.size	FtlGetCap, .-FtlGetCap
3324
3492
 	.align	1
3325
3493
 	.global	FtlGetCapacity
3494
+	.syntax unified
3326
3495
 	.thumb
3327
3496
 	.thumb_func
3497
+	.fpu softvfp
3328
3498
 	.type	FtlGetCapacity, %function
3329
3499
 FtlGetCapacity:
3330
3500
 	.fnstart
3331
3501
 	@ args = 0, pretend = 0, frame = 0
3332
3502
 	@ frame_needed = 0, uses_anonymous_args = 0
3333
3503
 	@ link register save eliminated.
3334
-	ldr	r3, .L493
3335
-	ldr	r0, [r3, #2428]
3504
+	ldr	r3, .L487
3505
+	ldr	r0, [r3, #2432]
3336
3506
 	bx	lr
3337
-.L494:
3507
+.L488:
3338
3508
 	.align	2
3339
-.L493:
3509
+.L487:
3340
3510
 	.word	.LANCHOR0
3341
3511
 	.fnend
3342
3512
 	.size	FtlGetCapacity, .-FtlGetCapacity
3343
3513
 	.align	1
3344
3514
 	.global	ftl_get_density
3515
+	.syntax unified
3345
3516
 	.thumb
3346
3517
 	.thumb_func
3518
+	.fpu softvfp
3347
3519
 	.type	ftl_get_density, %function
3348
3520
 ftl_get_density:
3349
3521
 	.fnstart
3350
3522
 	@ args = 0, pretend = 0, frame = 0
3351
3523
 	@ frame_needed = 0, uses_anonymous_args = 0
3352
3524
 	@ link register save eliminated.
3353
-	ldr	r3, .L496
3354
-	ldr	r0, [r3, #2428]
3525
+	ldr	r3, .L490
3526
+	ldr	r0, [r3, #2432]
3355
3527
 	bx	lr
3356
-.L497:
3528
+.L491:
3357
3529
 	.align	2
3358
-.L496:
3530
+.L490:
3359
3531
 	.word	.LANCHOR0
3360
3532
 	.fnend
3361
3533
 	.size	ftl_get_density, .-ftl_get_density
3362
3534
 	.align	1
3363
3535
 	.global	FtlGetLpn
3536
+	.syntax unified
3364
3537
 	.thumb
3365
3538
 	.thumb_func
3539
+	.fpu softvfp
3366
3540
 	.type	FtlGetLpn, %function
3367
3541
 FtlGetLpn:
3368
3542
 	.fnstart
3369
3543
 	@ args = 0, pretend = 0, frame = 0
3370
3544
 	@ frame_needed = 0, uses_anonymous_args = 0
3371
3545
 	@ link register save eliminated.
3372
-	ldr	r3, .L499
3373
-	ldr	r0, [r3, #2448]
3546
+	ldr	r3, .L493
3547
+	ldr	r0, [r3, #2452]
3374
3548
 	bx	lr
3375
-.L500:
3549
+.L494:
3376
3550
 	.align	2
3377
-.L499:
3551
+.L493:
3378
3552
 	.word	.LANCHOR0
3379
3553
 	.fnend
3380
3554
 	.size	FtlGetLpn, .-FtlGetLpn
3381
3555
 	.align	1
3382
3556
 	.global	FtlBbmMapBadBlock
3557
+	.syntax unified
3383
3558
 	.thumb
3384
3559
 	.thumb_func
3560
+	.fpu softvfp
3385
3561
 	.type	FtlBbmMapBadBlock, %function
3386
3562
 FtlBbmMapBadBlock:
3387
3563
 	.fnstart
..
..
@@ -3390,47 +3566,50 @@
3390
3566
 	push	{r0, r1, r2, r4, r5, r6, r7, lr}
3391
3567
 	.save {r4, r5, r6, r7, lr}
3392
3568
 	.pad #12
3393
-	mov	r6, r0
3394
-	ldr	r5, .L502
3395
-	ldrh	r4, [r5, #2386]
3396
-	mov	r1, r4
3569
+	mov	r5, r0
3570
+	ldr	r4, .L496
3571
+	ldrh	r7, [r4, #2388]
3572
+	mov	r1, r7
3397
3573
 	bl	__aeabi_uidiv
3398
-	uxth	r2, r0
3399
-	smulbb	r3, r2, r4
3400
-	add	r1, r5, r2, lsl #2
3401
-	ldr	r4, [r1, #2480]
3402
-	movs	r1, #1
3403
-	subs	r3, r6, r3
3404
-	uxth	r3, r3
3405
-	and	r0, r3, #31
3406
-	lsrs	r7, r3, #5
3407
-	lsls	r1, r1, r0
3408
-	ldr	r0, [r4, r7, lsl #2]
3409
-	orrs	r1, r1, r0
3410
-	ldr	r0, .L502+4
3411
-	str	r1, [r4, r7, lsl #2]
3412
-	str	r1, [sp]
3413
-	mov	r1, r6
3574
+	uxth	r6, r0
3575
+	mov	r1, r7
3576
+	mov	r0, r5
3577
+	bl	__aeabi_uidivmod
3578
+	add	r2, r4, r6, lsl #2
3579
+	uxth	r3, r1
3580
+	ldr	r2, [r2, #2484]
3581
+	lsrs	r1, r3, #5
3582
+	and	r7, r3, #31
3583
+	movs	r0, #1
3584
+	lsls	r0, r0, r7
3585
+	ldr	r7, [r2, r1, lsl #2]
3586
+	orrs	r0, r0, r7
3587
+	str	r0, [r2, r1, lsl #2]
3588
+	mov	r2, r6
3589
+	str	r0, [sp]
3590
+	mov	r1, r5
3591
+	ldr	r0, .L496+4
3414
3592
 	bl	printk
3415
-	ldrh	r3, [r5, #2458]
3593
+	ldrh	r3, [r4, #2462]
3416
3594
 	movs	r0, #0
3417
3595
 	adds	r3, r3, #1
3418
-	strh	r3, [r5, #2458]	@ movhi
3596
+	strh	r3, [r4, #2462]	@ movhi
3419
3597
 	add	sp, sp, #12
3420
3598
 	@ sp needed
3421
3599
 	pop	{r4, r5, r6, r7, pc}
3422
-.L503:
3600
+.L497:
3423
3601
 	.align	2
3424
-.L502:
3602
+.L496:
3425
3603
 	.word	.LANCHOR0
3426
3604
 	.word	.LC2
3427
3605
 	.fnend
3428
3606
 	.size	FtlBbmMapBadBlock, .-FtlBbmMapBadBlock
3429
-	.global	__aeabi_uidivmod
3430
3607
 	.align	1
3431
3608
 	.global	FtlBbmIsBadBlock
3609
+	.syntax unified
3432
3610
 	.thumb
3433
3611
 	.thumb_func
3612
+	.fpu softvfp
3434
3613
 	.type	FtlBbmIsBadBlock, %function
3435
3614
 FtlBbmIsBadBlock:
3436
3615
 	.fnstart
..
..
@@ -3439,33 +3618,35 @@
3439
3618
 	push	{r3, r4, r5, r6, r7, lr}
3440
3619
 	.save {r3, r4, r5, r6, r7, lr}
3441
3620
 	mov	r7, r0
3442
-	ldr	r5, .L505
3443
-	ldrh	r6, [r5, #2386]
3621
+	ldr	r5, .L499
3622
+	ldrh	r6, [r5, #2388]
3444
3623
 	mov	r1, r6
3445
3624
 	bl	__aeabi_uidivmod
3446
3625
 	mov	r0, r7
3447
3626
 	uxth	r4, r1
3448
3627
 	mov	r1, r6
3449
3628
 	bl	__aeabi_uidiv
3450
-	lsrs	r2, r4, #5
3451
-	and	r4, r4, #31
3452
3629
 	uxth	r0, r0
3630
+	lsrs	r2, r4, #5
3453
3631
 	add	r5, r5, r0, lsl #2
3454
-	ldr	r3, [r5, #2480]
3632
+	and	r4, r4, #31
3633
+	ldr	r3, [r5, #2484]
3455
3634
 	ldr	r0, [r3, r2, lsl #2]
3456
3635
 	lsrs	r0, r0, r4
3457
3636
 	and	r0, r0, #1
3458
3637
 	pop	{r3, r4, r5, r6, r7, pc}
3459
-.L506:
3638
+.L500:
3460
3639
 	.align	2
3461
-.L505:
3640
+.L499:
3462
3641
 	.word	.LANCHOR0
3463
3642
 	.fnend
3464
3643
 	.size	FtlBbmIsBadBlock, .-FtlBbmIsBadBlock
3465
3644
 	.align	1
3466
3645
 	.global	FtlBbtInfoPrint
3646
+	.syntax unified
3467
3647
 	.thumb
3468
3648
 	.thumb_func
3649
+	.fpu softvfp
3469
3650
 	.type	FtlBbtInfoPrint, %function
3470
3651
 FtlBbtInfoPrint:
3471
3652
 	.fnstart
..
..
@@ -3477,45 +3658,49 @@
3477
3658
 	.size	FtlBbtInfoPrint, .-FtlBbtInfoPrint
3478
3659
 	.align	1
3479
3660
 	.global	FtlBbtCalcTotleCnt
3661
+	.syntax unified
3480
3662
 	.thumb
3481
3663
 	.thumb_func
3664
+	.fpu softvfp
3482
3665
 	.type	FtlBbtCalcTotleCnt, %function
3483
3666
 FtlBbtCalcTotleCnt:
3484
3667
 	.fnstart
3485
3668
 	@ args = 0, pretend = 0, frame = 0
3486
3669
 	@ frame_needed = 0, uses_anonymous_args = 0
3670
+	ldr	r3, .L509
3487
3671
 	push	{r4, r5, r6, lr}
3488
3672
 	.save {r4, r5, r6, lr}
3489
3673
 	movs	r5, #0
3490
-	ldr	r4, .L516
3491
-	ldrh	r6, [r4, #2386]
3492
-	ldrh	r3, [r4, #2342]
3493
3674
 	mov	r4, r5
3494
-	muls	r6, r3, r6
3495
-.L509:
3675
+	ldrh	r2, [r3, #2388]
3676
+	ldrh	r6, [r3, #2346]
3677
+	muls	r6, r2, r6
3678
+.L503:
3496
3679
 	uxth	r0, r5
3497
3680
 	cmp	r0, r6
3498
-	bge	.L515
3499
-	bl	FtlBbmIsBadBlock
3500
-	cbz	r0, .L510
3501
-	adds	r4, r4, #1
3502
-	uxth	r4, r4
3503
-.L510:
3504
-	adds	r5, r5, #1
3505
-	b	.L509
3506
-.L515:
3681
+	blt	.L505
3507
3682
 	mov	r0, r4
3508
3683
 	pop	{r4, r5, r6, pc}
3509
-.L517:
3684
+.L505:
3685
+	bl	FtlBbmIsBadBlock
3686
+	cbz	r0, .L504
3687
+	adds	r4, r4, #1
3688
+	uxth	r4, r4
3689
+.L504:
3690
+	adds	r5, r5, #1
3691
+	b	.L503
3692
+.L510:
3510
3693
 	.align	2
3511
-.L516:
3694
+.L509:
3512
3695
 	.word	.LANCHOR0
3513
3696
 	.fnend
3514
3697
 	.size	FtlBbtCalcTotleCnt, .-FtlBbtCalcTotleCnt
3515
3698
 	.align	1
3516
3699
 	.global	V2P_block
3700
+	.syntax unified
3517
3701
 	.thumb
3518
3702
 	.thumb_func
3703
+	.fpu softvfp
3519
3704
 	.type	V2P_block, %function
3520
3705
 V2P_block:
3521
3706
 	.fnstart
..
..
@@ -3523,41 +3708,45 @@
3523
3708
 	@ frame_needed = 0, uses_anonymous_args = 0
3524
3709
 	push	{r3, r4, r5, r6, r7, lr}
3525
3710
 	.save {r3, r4, r5, r6, r7, lr}
3526
-	mov	r4, r1
3527
-	ldr	r6, .L519
3711
+	mov	r5, r1
3712
+	ldr	r4, .L512
3528
3713
 	mov	r7, r0
3529
-	ldrh	r5, [r6, #2344]
3530
-	mov	r1, r5
3531
-	bl	__aeabi_uidivmod
3532
-	mov	r0, r7
3533
-	smlabb	r4, r4, r5, r1
3534
-	mov	r1, r5
3714
+	ldrh	r6, [r4, #2348]
3715
+	mov	r1, r6
3535
3716
 	bl	__aeabi_uidiv
3536
-	ldrh	r3, [r6, #2386]
3537
-	smlabb	r0, r3, r0, r4
3717
+	ldrh	r4, [r4, #2388]
3718
+	smulbb	r5, r6, r5
3719
+	mov	r1, r6
3720
+	smulbb	r4, r4, r0
3721
+	mov	r0, r7
3722
+	bl	__aeabi_uidivmod
3723
+	adds	r0, r5, r1
3724
+	add	r0, r0, r4
3538
3725
 	uxth	r0, r0
3539
3726
 	pop	{r3, r4, r5, r6, r7, pc}
3540
-.L520:
3727
+.L513:
3541
3728
 	.align	2
3542
-.L519:
3729
+.L512:
3543
3730
 	.word	.LANCHOR0
3544
3731
 	.fnend
3545
3732
 	.size	V2P_block, .-V2P_block
3546
3733
 	.align	1
3547
3734
 	.global	P2V_plane
3735
+	.syntax unified
3548
3736
 	.thumb
3549
3737
 	.thumb_func
3738
+	.fpu softvfp
3550
3739
 	.type	P2V_plane, %function
3551
3740
 P2V_plane:
3552
3741
 	.fnstart
3553
3742
 	@ args = 0, pretend = 0, frame = 0
3554
3743
 	@ frame_needed = 0, uses_anonymous_args = 0
3555
-	ldr	r3, .L522
3744
+	ldr	r3, .L515
3556
3745
 	push	{r4, r5, r6, lr}
3557
3746
 	.save {r4, r5, r6, lr}
3558
3747
 	mov	r6, r0
3559
-	ldrh	r1, [r3, #2386]
3560
-	ldrh	r5, [r3, #2344]
3748
+	ldrh	r5, [r3, #2348]
3749
+	ldrh	r1, [r3, #2388]
3561
3750
 	bl	__aeabi_uidiv
3562
3751
 	mov	r1, r5
3563
3752
 	smulbb	r4, r0, r5
..
..
@@ -3566,16 +3755,18 @@
3566
3755
 	add	r1, r1, r4
3567
3756
 	uxth	r0, r1
3568
3757
 	pop	{r4, r5, r6, pc}
3569
-.L523:
3758
+.L516:
3570
3759
 	.align	2
3571
-.L522:
3760
+.L515:
3572
3761
 	.word	.LANCHOR0
3573
3762
 	.fnend
3574
3763
 	.size	P2V_plane, .-P2V_plane
3575
3764
 	.align	1
3576
3765
 	.global	P2V_block_in_plane
3766
+	.syntax unified
3577
3767
 	.thumb
3578
3768
 	.thumb_func
3769
+	.fpu softvfp
3579
3770
 	.type	P2V_block_in_plane, %function
3580
3771
 P2V_block_in_plane:
3581
3772
 	.fnstart
..
..
@@ -3583,24 +3774,26 @@
3583
3774
 	@ frame_needed = 0, uses_anonymous_args = 0
3584
3775
 	push	{r4, lr}
3585
3776
 	.save {r4, lr}
3586
-	ldr	r4, .L525
3587
-	ldrh	r1, [r4, #2386]
3777
+	ldr	r4, .L518
3778
+	ldrh	r1, [r4, #2388]
3588
3779
 	bl	__aeabi_uidivmod
3589
3780
 	uxth	r0, r1
3590
-	ldrh	r1, [r4, #2344]
3781
+	ldrh	r1, [r4, #2348]
3591
3782
 	bl	__aeabi_uidiv
3592
3783
 	uxth	r0, r0
3593
3784
 	pop	{r4, pc}
3594
-.L526:
3785
+.L519:
3595
3786
 	.align	2
3596
-.L525:
3787
+.L518:
3597
3788
 	.word	.LANCHOR0
3598
3789
 	.fnend
3599
3790
 	.size	P2V_block_in_plane, .-P2V_block_in_plane
3600
3791
 	.align	1
3601
3792
 	.global	ftl_cmp_data_ver
3793
+	.syntax unified
3602
3794
 	.thumb
3603
3795
 	.thumb_func
3796
+	.fpu softvfp
3604
3797
 	.type	ftl_cmp_data_ver, %function
3605
3798
 ftl_cmp_data_ver:
3606
3799
 	.fnstart
..
..
@@ -3608,14 +3801,14 @@
3608
3801
 	@ frame_needed = 0, uses_anonymous_args = 0
3609
3802
 	@ link register save eliminated.
3610
3803
 	cmp	r0, r1
3611
-	bls	.L528
3804
+	bls	.L521
3612
3805
 	subs	r0, r0, r1
3613
3806
 	cmp	r0, #-2147483648
3614
3807
 	ite	hi
3615
3808
 	movhi	r0, #0
3616
3809
 	movls	r0, #1
3617
3810
 	bx	lr
3618
-.L528:
3811
+.L521:
3619
3812
 	subs	r0, r1, r0
3620
3813
 	cmp	r0, #-2147483648
3621
3814
 	ite	ls
..
..
@@ -3626,51 +3819,57 @@
3626
3819
 	.size	ftl_cmp_data_ver, .-ftl_cmp_data_ver
3627
3820
 	.align	1
3628
3821
 	.global	FtlFreeSysBlkQueueEmpty
3822
+	.syntax unified
3629
3823
 	.thumb
3630
3824
 	.thumb_func
3825
+	.fpu softvfp
3631
3826
 	.type	FtlFreeSysBlkQueueEmpty, %function
3632
3827
 FtlFreeSysBlkQueueEmpty:
3633
3828
 	.fnstart
3634
3829
 	@ args = 0, pretend = 0, frame = 0
3635
3830
 	@ frame_needed = 0, uses_anonymous_args = 0
3636
3831
 	@ link register save eliminated.
3637
-	ldr	r3, .L531
3638
-	ldrh	r0, [r3, #2518]
3832
+	ldr	r3, .L524
3833
+	ldrh	r0, [r3, #2522]
3639
3834
 	clz	r0, r0
3640
3835
 	lsrs	r0, r0, #5
3641
3836
 	bx	lr
3642
-.L532:
3837
+.L525:
3643
3838
 	.align	2
3644
-.L531:
3839
+.L524:
3645
3840
 	.word	.LANCHOR0
3646
3841
 	.fnend
3647
3842
 	.size	FtlFreeSysBlkQueueEmpty, .-FtlFreeSysBlkQueueEmpty
3648
3843
 	.align	1
3649
3844
 	.global	FtlFreeSysBlkQueueFull
3845
+	.syntax unified
3650
3846
 	.thumb
3651
3847
 	.thumb_func
3848
+	.fpu softvfp
3652
3849
 	.type	FtlFreeSysBlkQueueFull, %function
3653
3850
 FtlFreeSysBlkQueueFull:
3654
3851
 	.fnstart
3655
3852
 	@ args = 0, pretend = 0, frame = 0
3656
3853
 	@ frame_needed = 0, uses_anonymous_args = 0
3657
3854
 	@ link register save eliminated.
3658
-	ldr	r3, .L534
3659
-	ldrh	r0, [r3, #2518]
3855
+	ldr	r3, .L527
3856
+	ldrh	r0, [r3, #2522]
3660
3857
 	sub	r3, r0, #1024
3661
3858
 	rsbs	r0, r3, #0
3662
3859
 	adcs	r0, r0, r3
3663
3860
 	bx	lr
3664
-.L535:
3861
+.L528:
3665
3862
 	.align	2
3666
-.L534:
3863
+.L527:
3667
3864
 	.word	.LANCHOR0
3668
3865
 	.fnend
3669
3866
 	.size	FtlFreeSysBlkQueueFull, .-FtlFreeSysBlkQueueFull
3670
3867
 	.align	1
3671
3868
 	.global	FtlFreeSysBlkQueueIn
3869
+	.syntax unified
3672
3870
 	.thumb
3673
3871
 	.thumb_func
3872
+	.fpu softvfp
3674
3873
 	.type	FtlFreeSysBlkQueueIn, %function
3675
3874
 FtlFreeSysBlkQueueIn:
3676
3875
 	.fnstart
..
..
@@ -3679,229 +3878,236 @@
3679
3878
 	push	{r3, r4, r5, r6, r7, lr}
3680
3879
 	.save {r3, r4, r5, r6, r7, lr}
3681
3880
 	subs	r3, r0, #1
3881
+	uxth	r3, r3
3682
3882
 	movw	r2, #65533
3683
3883
 	mov	r6, r0
3684
-	uxth	r3, r3
3685
3884
 	cmp	r3, r2
3686
-	bhi	.L536
3687
-	ldr	r4, .L545
3688
-	ldrh	r3, [r4, #2518]
3885
+	bhi	.L529
3886
+	ldr	r4, .L538
3887
+	ldrh	r3, [r4, #2522]
3689
3888
 	cmp	r3, #1024
3690
-	beq	.L536
3691
-	cbz	r1, .L538
3692
-	ldr	r5, .L545+4
3693
-	ldr	r3, [r5, #224]
3694
-	cbnz	r3, .L538
3889
+	beq	.L529
3890
+	cbz	r1, .L531
3891
+	ldr	r5, .L538+4
3892
+	ldr	r3, [r5, #228]
3893
+	cbnz	r3, .L531
3695
3894
 	bl	P2V_block_in_plane
3696
-	movs	r1, #1
3697
-	lsls	r3, r6, #10
3698
-	mov	r2, r1
3699
3895
 	mov	r7, r0
3700
-	ldr	r0, [r5, #228]
3896
+	ldr	r0, [r5, #232]
3897
+	lsls	r3, r6, #10
3898
+	movs	r2, #1
3899
+	mov	r1, r2
3701
3900
 	str	r3, [r0, #4]
3702
3901
 	bl	FlashEraseBlocks
3703
-	ldr	r2, [r5, #232]
3902
+	ldr	r2, [r5, #236]
3704
3903
 	ldrh	r3, [r2, r7, lsl #1]
3705
3904
 	adds	r3, r3, #1
3706
3905
 	strh	r3, [r2, r7, lsl #1]	@ movhi
3707
-	ldr	r3, [r5, #236]
3906
+	ldr	r3, [r5, #240]
3708
3907
 	adds	r3, r3, #1
3709
-	str	r3, [r5, #236]
3710
-.L538:
3711
-	ldrh	r3, [r4, #2518]
3908
+	str	r3, [r5, #240]
3909
+.L531:
3910
+	ldrh	r3, [r4, #2522]
3712
3911
 	adds	r3, r3, #1
3713
-	strh	r3, [r4, #2518]	@ movhi
3714
-	ldrh	r3, [r4, #2516]
3912
+	strh	r3, [r4, #2522]	@ movhi
3913
+	ldrh	r3, [r4, #2520]
3715
3914
 	add	r2, r4, r3, lsl #1
3716
3915
 	adds	r3, r3, #1
3717
3916
 	ubfx	r3, r3, #0, #10
3718
-	strh	r3, [r4, #2516]	@ movhi
3719
-	strh	r6, [r2, #2520]	@ movhi
3720
-.L536:
3917
+	strh	r6, [r2, #2524]	@ movhi
3918
+	strh	r3, [r4, #2520]	@ movhi
3919
+.L529:
3721
3920
 	pop	{r3, r4, r5, r6, r7, pc}
3722
-.L546:
3921
+.L539:
3723
3922
 	.align	2
3724
-.L545:
3923
+.L538:
3725
3924
 	.word	.LANCHOR0
3726
3925
 	.word	.LANCHOR2
3727
3926
 	.fnend
3728
3927
 	.size	FtlFreeSysBlkQueueIn, .-FtlFreeSysBlkQueueIn
3729
3928
 	.align	1
3730
3929
 	.global	FtlFreeSysBLkSort
3930
+	.syntax unified
3731
3931
 	.thumb
3732
3932
 	.thumb_func
3933
+	.fpu softvfp
3733
3934
 	.type	FtlFreeSysBLkSort, %function
3734
3935
 FtlFreeSysBLkSort:
3735
3936
 	.fnstart
3736
3937
 	@ args = 0, pretend = 0, frame = 0
3737
3938
 	@ frame_needed = 0, uses_anonymous_args = 0
3738
-	ldr	r3, .L558
3939
+	ldr	r3, .L549
3739
3940
 	push	{r4, r5, r6, lr}
3740
3941
 	.save {r4, r5, r6, lr}
3741
-	ldrh	r4, [r3, #268]
3742
-	ldr	r3, .L558+4
3743
-	ldrh	r2, [r3, #2518]
3744
-	cbz	r2, .L547
3942
+	ldrh	r2, [r3, #2522]
3943
+	cbz	r2, .L540
3944
+	ldr	r2, .L549+4
3745
3945
 	movs	r0, #0
3746
-	ldrh	r1, [r3, #2514]
3747
-	ldrh	r2, [r3, #2516]
3748
-	and	r4, r4, #31
3946
+	ldrh	r1, [r3, #2518]
3749
3947
 	mov	r6, r0
3750
-.L549:
3751
-	uxth	r5, r0
3948
+	ldrh	r5, [r2, #272]
3949
+	ldrh	r2, [r3, #2520]
3950
+	and	r5, r5, #31
3951
+.L542:
3952
+	uxth	r4, r0
3752
3953
 	adds	r0, r0, #1
3753
3954
 	cmp	r5, r4
3754
-	bge	.L557
3755
-	add	r5, r3, r1, lsl #1
3955
+	bgt	.L543
3956
+	cbz	r6, .L540
3957
+	strh	r1, [r3, #2518]	@ movhi
3958
+	strh	r2, [r3, #2520]	@ movhi
3959
+.L540:
3960
+	pop	{r4, r5, r6, pc}
3961
+.L543:
3962
+	add	r4, r3, r1, lsl #1
3756
3963
 	adds	r1, r1, #1
3757
3964
 	ubfx	r1, r1, #0, #10
3758
-	ldrh	r6, [r5, #2520]
3759
-	add	r5, r3, r2, lsl #1
3760
-	strh	r6, [r5, #2520]	@ movhi
3965
+	ldrh	r6, [r4, #2524]
3966
+	add	r4, r3, r2, lsl #1
3967
+	strh	r6, [r4, #2524]	@ movhi
3761
3968
 	movs	r6, #1
3762
3969
 	add	r2, r2, r6
3763
3970
 	ubfx	r2, r2, #0, #10
3764
-	b	.L549
3765
-.L557:
3766
-	cbz	r6, .L547
3767
-	strh	r1, [r3, #2514]	@ movhi
3768
-	strh	r2, [r3, #2516]	@ movhi
3769
-.L547:
3770
-	pop	{r4, r5, r6, pc}
3771
-.L559:
3971
+	b	.L542
3972
+.L550:
3772
3973
 	.align	2
3773
-.L558:
3774
-	.word	.LANCHOR2
3974
+.L549:
3775
3975
 	.word	.LANCHOR0
3976
+	.word	.LANCHOR2
3776
3977
 	.fnend
3777
3978
 	.size	FtlFreeSysBLkSort, .-FtlFreeSysBLkSort
3778
3979
 	.align	1
3779
3980
 	.global	FtlFreeSysBlkQueueOut
3981
+	.syntax unified
3780
3982
 	.thumb
3781
3983
 	.thumb_func
3984
+	.fpu softvfp
3782
3985
 	.type	FtlFreeSysBlkQueueOut, %function
3783
3986
 FtlFreeSysBlkQueueOut:
3784
3987
 	.fnstart
3785
3988
 	@ args = 0, pretend = 0, frame = 0
3786
3989
 	@ frame_needed = 0, uses_anonymous_args = 0
3787
-	push	{r4, r5, r6, r7, r8, r9, r10, lr}
3788
-	.save {r4, r5, r6, r7, r8, r9, r10, lr}
3789
-	ldr	r4, .L570
3790
-	ldr	r6, .L570+4
3990
+	push	{r3, r4, r5, r6, r7, r8, r9, lr}
3991
+	.save {r3, r4, r5, r6, r7, r8, r9, lr}
3992
+	ldr	r4, .L561
3993
+	ldr	r5, .L561+4
3791
3994
 	mov	r7, r4
3792
-.L561:
3793
-	ldrh	r1, [r4, #2518]
3794
-	cbz	r1, .L562
3795
-	ldrh	r3, [r4, #2514]
3995
+.L552:
3996
+	ldrh	r1, [r4, #2522]
3997
+	cmp	r1, #0
3998
+	beq	.L553
3999
+	ldrh	r3, [r4, #2518]
3796
4000
 	subs	r1, r1, #1
3797
-	ldr	r10, [r6, #224]
3798
-	strh	r1, [r4, #2518]	@ movhi
4001
+	ldr	r9, [r5, #228]
4002
+	strh	r1, [r4, #2522]	@ movhi
3799
4003
 	add	r2, r4, r3, lsl #1
3800
4004
 	adds	r3, r3, #1
3801
4005
 	ubfx	r3, r3, #0, #10
3802
-	ldr	r8, .L570+4
3803
-	ldrh	r5, [r2, #2520]
3804
-	strh	r3, [r4, #2514]	@ movhi
3805
-	cmp	r10, #0
3806
-	bne	.L563
3807
-	mov	r0, r5
4006
+	ldrh	r6, [r2, #2524]
4007
+	strh	r3, [r4, #2518]	@ movhi
4008
+	cmp	r9, #0
4009
+	bne	.L554
4010
+	mov	r0, r6
3808
4011
 	bl	P2V_block_in_plane
3809
-	lsls	r3, r5, #10
3810
-	mov	r9, r0
3811
-	ldr	r0, [r6, #228]
4012
+	mov	r8, r0
4013
+	ldr	r0, [r5, #232]
4014
+	lsls	r3, r6, #10
3812
4015
 	str	r3, [r0, #4]
3813
-	ldrb	r3, [r4, #144]	@ zero_extendqisi2
3814
-	cbz	r3, .L564
3815
-	mov	r1, r10
4016
+	ldrb	r3, [r4, #152]	@ zero_extendqisi2
4017
+	cbz	r3, .L555
3816
4018
 	movs	r2, #1
4019
+	mov	r1, r9
3817
4020
 	bl	FlashEraseBlocks
3818
-.L564:
3819
-	movs	r1, #1
3820
-	ldr	r0, [r8, #228]
3821
-	mov	r2, r1
4021
+.L555:
4022
+	movs	r2, #1
4023
+	ldr	r0, [r5, #232]
4024
+	mov	r1, r2
3822
4025
 	bl	FlashEraseBlocks
3823
-	ldr	r2, [r8, #232]
3824
-	ldrh	r3, [r2, r9, lsl #1]
4026
+	ldr	r2, [r5, #236]
4027
+	ldrh	r3, [r2, r8, lsl #1]
3825
4028
 	adds	r3, r3, #1
3826
-	strh	r3, [r2, r9, lsl #1]	@ movhi
3827
-	ldr	r3, [r8, #236]
4029
+	strh	r3, [r2, r8, lsl #1]	@ movhi
4030
+	ldr	r3, [r5, #240]
3828
4031
 	adds	r3, r3, #1
3829
-	str	r3, [r8, #236]
3830
-	b	.L563
3831
-.L562:
3832
-	ldr	r0, .L570+8
3833
-	bl	printk
3834
-.L565:
3835
-	b	.L565
3836
-.L563:
3837
-	subs	r3, r5, #1
4032
+	str	r3, [r5, #240]
4033
+.L554:
4034
+	subs	r3, r6, #1
3838
4035
 	movw	r2, #65533
3839
4036
 	uxth	r3, r3
3840
4037
 	cmp	r3, r2
3841
-	bls	.L566
3842
-	mov	r1, r5
3843
-	ldrh	r2, [r7, #2518]
3844
-	ldr	r0, .L570+12
4038
+	bls	.L557
4039
+	ldrh	r2, [r7, #2522]
4040
+	mov	r1, r6
4041
+	ldr	r0, .L561+8
3845
4042
 	bl	printk
3846
-	b	.L561
3847
-.L566:
3848
-	mov	r0, r5
3849
-	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
3850
-.L571:
4043
+	b	.L552
4044
+.L553:
4045
+	ldr	r0, .L561+12
4046
+	bl	printk
4047
+.L556:
4048
+	b	.L556
4049
+.L557:
4050
+	mov	r0, r6
4051
+	pop	{r3, r4, r5, r6, r7, r8, r9, pc}
4052
+.L562:
3851
4053
 	.align	2
3852
-.L570:
4054
+.L561:
3853
4055
 	.word	.LANCHOR0
3854
4056
 	.word	.LANCHOR2
3855
-	.word	.LC3
3856
4057
 	.word	.LC4
4058
+	.word	.LC3
3857
4059
 	.fnend
3858
4060
 	.size	FtlFreeSysBlkQueueOut, .-FtlFreeSysBlkQueueOut
3859
4061
 	.align	1
3860
4062
 	.global	test_node_in_list
4063
+	.syntax unified
3861
4064
 	.thumb
3862
4065
 	.thumb_func
4066
+	.fpu softvfp
3863
4067
 	.type	test_node_in_list, %function
3864
4068
 test_node_in_list:
3865
4069
 	.fnstart
3866
4070
 	@ args = 0, pretend = 0, frame = 0
3867
4071
 	@ frame_needed = 0, uses_anonymous_args = 0
3868
-	ldr	r3, .L577
4072
+	ldr	r3, .L568
3869
4073
 	push	{r4, r5, lr}
3870
4074
 	.save {r4, r5, lr}
3871
4075
 	movw	r5, #65535
3872
-	ldr	r4, [r3, #288]
3873
4076
 	ldr	r2, [r0]
3874
-	ldr	r3, .L577+4
3875
-	subs	r0, r2, r4
3876
-	asrs	r0, r0, #1
4077
+	ldr	r4, [r3, #292]
4078
+	subs	r3, r2, r4
4079
+	asrs	r0, r3, #1
4080
+	ldr	r3, .L568+4
3877
4081
 	muls	r3, r0, r3
3878
4082
 	movs	r0, #6
3879
4083
 	uxth	r3, r3
3880
-.L574:
3881
-	cmp	r1, r3
3882
-	beq	.L575
4084
+.L565:
4085
+	cmp	r3, r1
4086
+	beq	.L566
3883
4087
 	ldrh	r3, [r2]
3884
4088
 	cmp	r3, r5
3885
-	beq	.L576
4089
+	beq	.L567
3886
4090
 	mla	r2, r0, r3, r4
3887
-	b	.L574
3888
-.L575:
4091
+	b	.L565
4092
+.L566:
3889
4093
 	movs	r0, #1
3890
4094
 	pop	{r4, r5, pc}
3891
-.L576:
4095
+.L567:
3892
4096
 	movs	r0, #0
3893
4097
 	pop	{r4, r5, pc}
3894
-.L578:
4098
+.L569:
3895
4099
 	.align	2
3896
-.L577:
4100
+.L568:
3897
4101
 	.word	.LANCHOR2
3898
4102
 	.word	-1431655765
3899
4103
 	.fnend
3900
4104
 	.size	test_node_in_list, .-test_node_in_list
3901
4105
 	.align	1
3902
4106
 	.global	insert_data_list
4107
+	.syntax unified
3903
4108
 	.thumb
3904
4109
 	.thumb_func
4110
+	.fpu softvfp
3905
4111
 	.type	insert_data_list, %function
3906
4112
 insert_data_list:
3907
4113
 	.fnstart
..
..
@@ -3910,113 +4116,113 @@
3910
4116
 	push	{r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr}
3911
4117
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
3912
4118
 	.pad #12
3913
-	ldr	r5, .L595
3914
-	ldrh	r3, [r5, #2328]
4119
+	ldr	r5, .L585
4120
+	ldrh	r3, [r5, #2332]
3915
4121
 	cmp	r3, r0
3916
-	bls	.L581
4122
+	bls	.L572
4123
+	ldr	r2, .L585+4
3917
4124
 	movs	r4, #6
3918
-	ldr	r2, .L595+4
3919
-	movw	r3, #65535
3920
4125
 	muls	r4, r0, r4
3921
-	ldr	lr, [r2, #288]
4126
+	movw	r3, #65535
4127
+	ldr	ip, [r2, #292]
3922
4128
 	mov	r7, r2
3923
-	add	r1, lr, r4
4129
+	add	r1, ip, r4
3924
4130
 	strh	r3, [r1, #2]	@ movhi
3925
-	strh	r3, [lr, r4]	@ movhi
3926
-	ldr	r3, [r2, #292]
3927
-	cmp	r3, #0
3928
-	beq	.L594
3929
-	ldr	r8, [r2, #296]
3930
-	lsl	fp, r0, #1
3931
-	ldrh	r2, [r1, #4]
3932
-	ldrh	r6, [r8, r0, lsl #1]
3933
-	cbz	r2, .L592
3934
-	muls	r6, r2, r6
3935
-	b	.L583
3936
-.L592:
3937
-	mov	r6, #-1
3938
-.L583:
3939
-	ldr	ip, [r7, #288]
3940
-	ldr	r2, .L595+8
3941
-	rsb	r9, ip, r3
3942
-	ldrh	r5, [r5, #2328]
3943
-	asr	r9, r9, #1
3944
-	str	r5, [sp]
3945
-	mul	r2, r2, r9
3946
-	ldr	r9, [r7, #232]
3947
-	add	r5, r9, fp
3948
-	str	r5, [sp, #4]
3949
-	movs	r5, #0
3950
-	uxth	r2, r2
3951
-.L590:
3952
-	adds	r5, r5, #1
3953
-	ldr	r7, [sp]
3954
-	uxth	r5, r5
3955
-	cmp	r5, r7
3956
-	bhi	.L581
3957
-	cmp	r0, r2
3958
-	beq	.L581
3959
-	ldrh	r7, [r3, #4]
3960
-	lsl	r10, r2, #1
3961
-	ldrh	fp, [r8, r2, lsl #1]
3962
-	cbz	r7, .L593
3963
-	mul	r7, r7, fp
3964
-	b	.L585
3965
-.L593:
3966
-	mov	r7, #-1
3967
-.L585:
3968
-	cmp	r7, r6
3969
-	bne	.L586
3970
-	ldr	r7, [sp, #4]
3971
-	ldrh	r10, [r9, r10]
3972
-	ldrh	r7, [r7]
3973
-	cmp	r10, r7
3974
-	bcc	.L588
3975
-	b	.L587
3976
-.L586:
3977
-	bhi	.L587
3978
-.L588:
3979
-	ldrh	r7, [r3]
3980
-	movw	r10, #65535
3981
-	cmp	r7, r10
3982
-	bne	.L589
3983
-	strh	r2, [r1, #2]	@ movhi
3984
-	strh	r0, [r3]	@ movhi
3985
-	ldr	r3, .L595+4
3986
-	str	r1, [r3, #300]
3987
-	b	.L581
3988
-.L589:
3989
-	movs	r3, #6
3990
-	mov	r2, r7
3991
-	mla	r3, r3, r7, ip
3992
-	b	.L590
3993
-.L587:
3994
-	strh	r2, [lr, r4]	@ movhi
3995
-	ldrh	r2, [r3, #2]
3996
-	strh	r2, [r1, #2]	@ movhi
3997
-	ldr	r2, .L595+4
3998
-	ldr	r4, [r2, #292]
3999
-	cmp	r3, r4
4000
-	bne	.L591
4001
-	strh	r0, [r3, #2]	@ movhi
4002
-.L594:
4003
-	str	r1, [r2, #292]
4004
-	b	.L581
4005
-.L591:
4006
-	ldrh	r4, [r3, #2]
4007
-	ldr	r1, [r2, #288]
4008
-	movs	r2, #6
4009
-	muls	r2, r4, r2
4010
-	strh	r0, [r1, r2]	@ movhi
4011
-	strh	r0, [r3, #2]	@ movhi
4012
-.L581:
4131
+	strh	r3, [ip, r4]	@ movhi
4132
+	ldr	r3, [r2, #296]
4133
+	cbnz	r3, .L573
4134
+	str	r1, [r2, #296]
4135
+.L572:
4013
4136
 	movs	r0, #0
4014
4137
 	add	sp, sp, #12
4015
4138
 	@ sp needed
4016
4139
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
4017
-.L596:
4140
+.L573:
4141
+	ldrh	r6, [r1, #4]
4142
+	lsl	r10, r0, #1
4143
+	ldr	r8, [r2, #300]
4144
+	ldrh	r2, [r8, r0, lsl #1]
4145
+	cmp	r6, #0
4146
+	beq	.L583
4147
+	muls	r6, r2, r6
4148
+.L574:
4149
+	ldr	lr, [r7, #292]
4150
+	ldrh	r5, [r5, #2332]
4151
+	sub	r2, r3, lr
4152
+	asr	r9, r2, #1
4153
+	ldr	r2, .L585+8
4154
+	str	r5, [sp]
4155
+	mul	r2, r2, r9
4156
+	ldr	r9, [r7, #236]
4157
+	add	r5, r9, r10
4158
+	uxth	r2, r2
4159
+	str	r5, [sp, #4]
4160
+	movs	r5, #0
4161
+.L581:
4162
+	adds	r5, r5, #1
4163
+	ldr	r7, [sp]
4164
+	uxth	r5, r5
4165
+	cmp	r5, r7
4166
+	bhi	.L572
4167
+	cmp	r0, r2
4168
+	beq	.L572
4169
+	ldrh	r7, [r3, #4]
4170
+	lsl	r10, r2, #1
4171
+	ldrh	fp, [r8, r2, lsl #1]
4172
+	cbz	r7, .L584
4173
+	mul	r7, r7, fp
4174
+.L576:
4175
+	cmp	r6, r7
4176
+	bne	.L577
4177
+	ldr	r7, [sp, #4]
4178
+	ldrh	r10, [r9, r10]
4179
+	ldrh	r7, [r7]
4180
+	cmp	r10, r7
4181
+	bcc	.L579
4182
+.L578:
4183
+	strh	r2, [ip, r4]	@ movhi
4184
+	ldr	r4, .L585+4
4185
+	ldrh	r2, [r3, #2]
4186
+	strh	r2, [r1, #2]	@ movhi
4187
+	ldr	r2, [r4, #296]
4188
+	cmp	r3, r2
4189
+	ittte	ne
4190
+	ldrhne	r5, [r3, #2]
4191
+	movne	r2, #6
4192
+	ldrne	r1, [r4, #292]
4193
+	strheq	r0, [r3, #2]	@ movhi
4194
+	iteee	eq
4195
+	streq	r1, [r4, #296]
4196
+	mulne	r2, r2, r5
4197
+	strhne	r0, [r1, r2]	@ movhi
4198
+	strhne	r0, [r3, #2]	@ movhi
4199
+	b	.L572
4200
+.L583:
4201
+	mov	r6, #-1
4202
+	b	.L574
4203
+.L584:
4204
+	mov	r7, #-1
4205
+	b	.L576
4206
+.L577:
4207
+	bcc	.L578
4208
+.L579:
4209
+	ldrh	r7, [r3]
4210
+	movw	r10, #65535
4211
+	cmp	r7, r10
4212
+	bne	.L580
4213
+	strh	r2, [r1, #2]	@ movhi
4214
+	strh	r0, [r3]	@ movhi
4215
+	ldr	r3, .L585+4
4216
+	str	r1, [r3, #304]
4217
+	b	.L572
4218
+.L580:
4219
+	movs	r3, #6
4220
+	mov	r2, r7
4221
+	mla	r3, r3, r7, lr
4222
+	b	.L581
4223
+.L586:
4018
4224
 	.align	2
4019
-.L595:
4225
+.L585:
4020
4226
 	.word	.LANCHOR0
4021
4227
 	.word	.LANCHOR2
4022
4228
 	.word	-1431655765
..
..
@@ -4024,8 +4230,10 @@
4024
4230
 	.size	insert_data_list, .-insert_data_list
4025
4231
 	.align	1
4026
4232
 	.global	INSERT_DATA_LIST
4233
+	.syntax unified
4027
4234
 	.thumb
4028
4235
 	.thumb_func
4236
+	.fpu softvfp
4029
4237
 	.type	INSERT_DATA_LIST, %function
4030
4238
 INSERT_DATA_LIST:
4031
4239
 	.fnstart
..
..
@@ -4034,21 +4242,23 @@
4034
4242
 	push	{r3, lr}
4035
4243
 	.save {r3, lr}
4036
4244
 	bl	insert_data_list
4037
-	ldr	r2, .L598
4038
-	ldrh	r3, [r2, #304]
4245
+	ldr	r2, .L588
4246
+	ldrh	r3, [r2, #308]
4039
4247
 	adds	r3, r3, #1
4040
-	strh	r3, [r2, #304]	@ movhi
4248
+	strh	r3, [r2, #308]	@ movhi
4041
4249
 	pop	{r3, pc}
4042
-.L599:
4250
+.L589:
4043
4251
 	.align	2
4044
-.L598:
4252
+.L588:
4045
4253
 	.word	.LANCHOR2
4046
4254
 	.fnend
4047
4255
 	.size	INSERT_DATA_LIST, .-INSERT_DATA_LIST
4048
4256
 	.align	1
4049
4257
 	.global	insert_free_list
4258
+	.syntax unified
4050
4259
 	.thumb
4051
4260
 	.thumb_func
4261
+	.fpu softvfp
4052
4262
 	.type	insert_free_list, %function
4053
4263
 insert_free_list:
4054
4264
 	.fnstart
..
..
@@ -4056,74 +4266,77 @@
4056
4266
 	@ frame_needed = 0, uses_anonymous_args = 0
4057
4267
 	push	{r4, r5, r6, r7, r8, r9, r10, lr}
4058
4268
 	.save {r4, r5, r6, r7, r8, r9, r10, lr}
4059
-	movw	r5, #65535
4060
-	cmp	r0, r5
4061
-	beq	.L601
4269
+	movw	r4, #65535
4270
+	cmp	r0, r4
4271
+	beq	.L591
4272
+	ldr	r2, .L597
4062
4273
 	movs	r1, #6
4063
-	ldr	r2, .L608
4064
-	mul	lr, r1, r0
4065
-	ldr	ip, [r2, #288]
4066
-	mov	r7, r2
4067
-	add	r6, ip, lr
4068
-	strh	r5, [r6, #2]	@ movhi
4069
-	strh	r5, [ip, lr]	@ movhi
4070
-	ldr	r3, [r2, #308]
4071
-	cbz	r3, .L607
4072
-	ldr	r8, [r2, #288]
4073
-	ldr	r9, [r2, #232]
4074
-	rsb	r4, r8, r3
4075
-	ldr	r2, .L608+4
4076
-	asrs	r4, r4, #1
4077
-	ldrh	r10, [r9, r0, lsl #1]
4078
-	muls	r4, r2, r4
4079
-	uxth	r2, r4
4080
-.L605:
4081
-	ldrh	r4, [r9, r2, lsl #1]
4082
-	cmp	r4, r10
4083
-	bcs	.L603
4084
-	ldrh	r4, [r3]
4085
-	cmp	r4, r5
4086
-	bne	.L604
4087
-	strh	r2, [r6, #2]	@ movhi
4088
-	strh	r0, [r3]	@ movhi
4089
-	b	.L601
4090
-.L604:
4091
-	mla	r3, r1, r4, r8
4092
-	mov	r2, r4
4093
-	b	.L605
4094
-.L603:
4095
-	ldrh	r1, [r3, #2]
4096
-	strh	r1, [r6, #2]	@ movhi
4097
-	strh	r2, [ip, lr]	@ movhi
4098
-	ldr	r1, [r7, #308]
4099
-	ldr	r2, .L608
4100
-	cmp	r3, r1
4101
-	bne	.L606
4102
-	strh	r0, [r3, #2]	@ movhi
4103
-.L607:
4104
-	str	r6, [r2, #308]
4105
-	b	.L601
4106
-.L606:
4107
-	ldrh	r4, [r3, #2]
4108
-	ldr	r1, [r2, #288]
4109
-	movs	r2, #6
4110
-	muls	r2, r4, r2
4111
-	strh	r0, [r1, r2]	@ movhi
4112
-	strh	r0, [r3, #2]	@ movhi
4113
-.L601:
4274
+	mul	r7, r1, r0
4275
+	ldr	ip, [r2, #292]
4276
+	mov	r5, r2
4277
+	add	r6, ip, r7
4278
+	strh	r4, [r6, #2]	@ movhi
4279
+	strh	r4, [ip, r7]	@ movhi
4280
+	ldr	r3, [r2, #312]
4281
+	cbnz	r3, .L592
4282
+	str	r6, [r2, #312]
4283
+.L591:
4114
4284
 	movs	r0, #0
4115
4285
 	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
4116
-.L609:
4286
+.L592:
4287
+	ldr	lr, [r2, #292]
4288
+	ldr	r8, [r2, #236]
4289
+	sub	r2, r3, lr
4290
+	asr	r10, r2, #1
4291
+	ldr	r2, .L597+4
4292
+	ldrh	r9, [r8, r0, lsl #1]
4293
+	mul	r2, r2, r10
4294
+	mov	r10, r4
4295
+	uxth	r2, r2
4296
+.L595:
4297
+	ldrh	r4, [r8, r2, lsl #1]
4298
+	cmp	r4, r9
4299
+	bcs	.L593
4300
+	ldrh	r4, [r3]
4301
+	cmp	r4, r10
4302
+	bne	.L594
4303
+	strh	r2, [r6, #2]	@ movhi
4304
+	strh	r0, [r3]	@ movhi
4305
+	b	.L591
4306
+.L594:
4307
+	mla	r3, r1, r4, lr
4308
+	mov	r2, r4
4309
+	b	.L595
4310
+.L593:
4311
+	ldrh	r1, [r3, #2]
4312
+	strh	r1, [r6, #2]	@ movhi
4313
+	strh	r2, [ip, r7]	@ movhi
4314
+	ldr	r2, [r5, #312]
4315
+	cmp	r3, r2
4316
+	ittte	ne
4317
+	ldrhne	r4, [r3, #2]
4318
+	movne	r2, #6
4319
+	ldrne	r1, [r5, #292]
4320
+	strheq	r0, [r3, #2]	@ movhi
4321
+	iteee	eq
4322
+	streq	r6, [r5, #312]
4323
+	mulne	r2, r2, r4
4324
+	strhne	r0, [r1, r2]	@ movhi
4325
+	strhne	r0, [r3, #2]	@ movhi
4326
+	b	.L591
4327
+.L598:
4117
4328
 	.align	2
4118
-.L608:
4329
+.L597:
4119
4330
 	.word	.LANCHOR2
4120
4331
 	.word	-1431655765
4121
4332
 	.fnend
4122
4333
 	.size	insert_free_list, .-insert_free_list
4123
4334
 	.align	1
4124
4335
 	.global	INSERT_FREE_LIST
4336
+	.syntax unified
4125
4337
 	.thumb
4126
4338
 	.thumb_func
4339
+	.fpu softvfp
4127
4340
 	.type	INSERT_FREE_LIST, %function
4128
4341
 INSERT_FREE_LIST:
4129
4342
 	.fnstart
..
..
@@ -4132,21 +4345,23 @@
4132
4345
 	push	{r3, lr}
4133
4346
 	.save {r3, lr}
4134
4347
 	bl	insert_free_list
4135
-	ldr	r2, .L611
4136
-	ldrh	r3, [r2, #312]
4348
+	ldr	r2, .L600
4349
+	ldrh	r3, [r2, #316]
4137
4350
 	adds	r3, r3, #1
4138
-	strh	r3, [r2, #312]	@ movhi
4351
+	strh	r3, [r2, #316]	@ movhi
4139
4352
 	pop	{r3, pc}
4140
-.L612:
4353
+.L601:
4141
4354
 	.align	2
4142
-.L611:
4355
+.L600:
4143
4356
 	.word	.LANCHOR2
4144
4357
 	.fnend
4145
4358
 	.size	INSERT_FREE_LIST, .-INSERT_FREE_LIST
4146
4359
 	.align	1
4147
4360
 	.global	List_remove_node
4361
+	.syntax unified
4148
4362
 	.thumb
4149
4363
 	.thumb_func
4364
+	.fpu softvfp
4150
4365
 	.type	List_remove_node, %function
4151
4366
 List_remove_node:
4152
4367
 	.fnstart
..
..
@@ -4155,57 +4370,59 @@
4155
4370
 	push	{r4, r5, r6, r7, lr}
4156
4371
 	.save {r4, r5, r6, r7, lr}
4157
4372
 	movs	r4, #6
4158
-	ldr	r7, .L618
4159
-	movw	r6, #65535
4373
+	ldr	r7, .L607
4160
4374
 	muls	r1, r4, r1
4375
+	movw	r6, #65535
4161
4376
 	ldr	r3, [r0]
4162
-	ldr	r2, [r7, #288]
4377
+	ldr	r2, [r7, #292]
4163
4378
 	adds	r5, r2, r1
4164
4379
 	cmp	r5, r3
4165
4380
 	ldrh	r3, [r2, r1]
4166
-	bne	.L614
4381
+	bne	.L603
4167
4382
 	cmp	r3, r6
4168
-	ittee	eq
4383
+	iteet	ne
4384
+	mlane	r3, r4, r3, r2
4169
4385
 	moveq	r3, #0
4170
4386
 	streq	r3, [r0]
4171
-	mlane	r3, r4, r3, r2
4172
4387
 	strne	r3, [r0]
4173
4388
 	it	ne
4174
4389
 	strhne	r6, [r3, #2]	@ movhi
4175
-	b	.L616
4176
-.L614:
4177
-	cmp	r3, r6
4178
-	ldrh	r0, [r5, #2]
4179
-	bne	.L617
4180
-	cmp	r0, r3
4181
-	beq	.L616
4182
-	muls	r0, r4, r0
4183
-	strh	r3, [r2, r0]	@ movhi
4184
-	b	.L616
4185
-.L617:
4186
-	mla	r3, r4, r3, r2
4187
-	strh	r0, [r3, #2]	@ movhi
4188
-	ldrh	r6, [r5, #2]
4189
-	ldrh	r0, [r2, r1]
4190
-	ldr	r3, [r7, #288]
4191
-	muls	r4, r6, r4
4192
-	strh	r0, [r3, r4]	@ movhi
4193
-.L616:
4390
+.L605:
4194
4391
 	movw	r3, #65535
4195
4392
 	movs	r0, #0
4196
4393
 	strh	r3, [r2, r1]	@ movhi
4197
4394
 	strh	r3, [r5, #2]	@ movhi
4198
4395
 	pop	{r4, r5, r6, r7, pc}
4199
-.L619:
4396
+.L603:
4397
+	cmp	r3, r6
4398
+	ldrh	r0, [r5, #2]
4399
+	bne	.L606
4400
+	cmp	r0, r3
4401
+	beq	.L605
4402
+	muls	r4, r0, r4
4403
+	strh	r3, [r2, r4]	@ movhi
4404
+	b	.L605
4405
+.L606:
4406
+	mla	r3, r4, r3, r2
4407
+	strh	r0, [r3, #2]	@ movhi
4408
+	ldrh	r3, [r5, #2]
4409
+	ldrh	r6, [r2, r1]
4410
+	ldr	r0, [r7, #292]
4411
+	muls	r3, r4, r3
4412
+	strh	r6, [r0, r3]	@ movhi
4413
+	b	.L605
4414
+.L608:
4200
4415
 	.align	2
4201
-.L618:
4416
+.L607:
4202
4417
 	.word	.LANCHOR2
4203
4418
 	.fnend
4204
4419
 	.size	List_remove_node, .-List_remove_node
4205
4420
 	.align	1
4206
4421
 	.global	List_pop_index_node
4422
+	.syntax unified
4207
4423
 	.thumb
4208
4424
 	.thumb_func
4425
+	.fpu softvfp
4209
4426
 	.type	List_pop_index_node, %function
4210
4427
 List_pop_index_node:
4211
4428
 	.fnstart
..
..
@@ -4214,88 +4431,92 @@
4214
4431
 	push	{r4, r5, r6, lr}
4215
4432
 	.save {r4, r5, r6, lr}
4216
4433
 	ldr	r3, [r0]
4217
-	cbz	r3, .L626
4218
-	ldr	r2, .L627
4219
-	movs	r6, #6
4434
+	cbz	r3, .L615
4435
+	ldr	r2, .L616
4220
4436
 	movw	r5, #65535
4221
-	ldr	r4, [r2, #288]
4222
-.L622:
4223
-	cbnz	r1, .L623
4224
-.L625:
4225
-	subs	r4, r3, r4
4226
-	ldr	r3, .L627+4
4227
-	asrs	r4, r4, #1
4437
+	movs	r6, #6
4438
+	ldr	r2, [r2, #292]
4439
+.L611:
4440
+	cbnz	r1, .L612
4441
+.L614:
4442
+	ldr	r4, .L616+4
4443
+	subs	r3, r3, r2
4444
+	asrs	r3, r3, #1
4228
4445
 	muls	r4, r3, r4
4229
-	uxth	r4, r4
4230
-	mov	r1, r4
4446
+	uxth	r1, r4
4231
4447
 	bl	List_remove_node
4232
-	mov	r0, r4
4448
+	uxth	r0, r4
4233
4449
 	pop	{r4, r5, r6, pc}
4234
-.L623:
4235
-	ldrh	r2, [r3]
4236
-	cmp	r2, r5
4237
-	beq	.L625
4450
+.L612:
4451
+	ldrh	r4, [r3]
4452
+	cmp	r4, r5
4453
+	beq	.L614
4238
4454
 	subs	r1, r1, #1
4239
-	mla	r3, r6, r2, r4
4455
+	mla	r3, r6, r4, r2
4240
4456
 	uxth	r1, r1
4241
-	b	.L622
4242
-.L626:
4457
+	b	.L611
4458
+.L615:
4243
4459
 	movw	r0, #65535
4244
4460
 	pop	{r4, r5, r6, pc}
4245
-.L628:
4461
+.L617:
4246
4462
 	.align	2
4247
-.L627:
4463
+.L616:
4248
4464
 	.word	.LANCHOR2
4249
4465
 	.word	-1431655765
4250
4466
 	.fnend
4251
4467
 	.size	List_pop_index_node, .-List_pop_index_node
4252
4468
 	.align	1
4253
4469
 	.global	List_get_gc_head_node
4470
+	.syntax unified
4254
4471
 	.thumb
4255
4472
 	.thumb_func
4473
+	.fpu softvfp
4256
4474
 	.type	List_get_gc_head_node, %function
4257
4475
 List_get_gc_head_node:
4258
4476
 	.fnstart
4259
4477
 	@ args = 0, pretend = 0, frame = 0
4260
4478
 	@ frame_needed = 0, uses_anonymous_args = 0
4261
-	ldr	r2, .L636
4479
+	ldr	r2, .L624
4262
4480
 	push	{r4, lr}
4263
4481
 	.save {r4, lr}
4264
-	ldr	r3, [r2, #292]
4265
-	cbz	r3, .L634
4482
+	ldr	r3, [r2, #296]
4483
+	cbz	r3, .L623
4484
+	ldr	r1, [r2, #292]
4266
4485
 	movs	r4, #6
4267
-	ldr	r1, [r2, #288]
4268
4486
 	movw	r2, #65535
4269
-.L631:
4270
-	cbz	r0, .L632
4487
+.L620:
4488
+	cbz	r0, .L621
4271
4489
 	ldrh	r3, [r3]
4272
4490
 	cmp	r3, r2
4273
-	beq	.L634
4491
+	bne	.L622
4492
+.L623:
4493
+	movw	r0, #65535
4494
+	pop	{r4, pc}
4495
+.L622:
4274
4496
 	subs	r0, r0, #1
4275
4497
 	mla	r3, r4, r3, r1
4276
4498
 	uxth	r0, r0
4277
-	b	.L631
4278
-.L634:
4279
-	movw	r0, #65535
4280
-	pop	{r4, pc}
4281
-.L632:
4499
+	b	.L620
4500
+.L621:
4501
+	ldr	r0, .L624+4
4282
4502
 	subs	r3, r3, r1
4283
-	ldr	r0, .L636+4
4284
4503
 	asrs	r3, r3, #1
4285
-	muls	r0, r3, r0
4286
-	uxth	r0, r0
4504
+	muls	r3, r0, r3
4505
+	uxth	r0, r3
4287
4506
 	pop	{r4, pc}
4288
-.L637:
4507
+.L625:
4289
4508
 	.align	2
4290
-.L636:
4509
+.L624:
4291
4510
 	.word	.LANCHOR2
4292
4511
 	.word	-1431655765
4293
4512
 	.fnend
4294
4513
 	.size	List_get_gc_head_node, .-List_get_gc_head_node
4295
4514
 	.align	1
4296
4515
 	.global	List_update_data_list
4516
+	.syntax unified
4297
4517
 	.thumb
4298
4518
 	.thumb_func
4519
+	.fpu softvfp
4299
4520
 	.type	List_update_data_list, %function
4300
4521
 List_update_data_list:
4301
4522
 	.fnstart
..
..
@@ -4304,79 +4525,81 @@
4304
4525
 	push	{r3, r4, r5, r6, r7, lr}
4305
4526
 	.save {r3, r4, r5, r6, r7, lr}
4306
4527
 	mov	r5, r0
4307
-	ldr	r4, .L645
4308
-	ldrh	r3, [r4, #316]
4528
+	ldr	r4, .L633
4529
+	ldrh	r3, [r4, #320]
4309
4530
 	cmp	r3, r0
4310
-	beq	.L639
4311
-	ldrh	r3, [r4, #364]
4531
+	beq	.L627
4532
+	ldrh	r3, [r4, #368]
4312
4533
 	cmp	r3, r0
4313
-	beq	.L639
4314
-	ldrh	r3, [r4, #412]
4534
+	beq	.L627
4535
+	ldrh	r3, [r4, #416]
4315
4536
 	cmp	r3, r0
4316
-	beq	.L639
4537
+	beq	.L627
4317
4538
 	movs	r3, #6
4318
-	ldr	r1, [r4, #288]
4319
-	ldr	r2, [r4, #292]
4539
+	ldr	r1, [r4, #292]
4320
4540
 	muls	r3, r0, r3
4541
+	ldr	r2, [r4, #296]
4321
4542
 	adds	r0, r1, r3
4322
4543
 	cmp	r0, r2
4323
-	beq	.L639
4324
-	ldr	r6, [r4, #296]
4544
+	beq	.L627
4325
4545
 	ldrh	r2, [r0, #4]
4326
-	ldrh	r7, [r6, r5, lsl #1]
4327
-	cbz	r2, .L643
4328
-	muls	r2, r7, r2
4329
-	b	.L640
4330
-.L643:
4331
-	mov	r2, #-1
4332
-.L640:
4333
-	ldrh	r0, [r0, #2]
4334
-	movw	r7, #65535
4335
-	cmp	r0, r7
4336
-	bne	.L641
4546
+	ldr	r7, [r4, #300]
4547
+	ldrh	r6, [r7, r5, lsl #1]
4548
+	cbz	r2, .L631
4549
+	muls	r2, r6, r2
4550
+.L628:
4551
+	ldrh	r6, [r0, #2]
4552
+	movw	r0, #65535
4553
+	cmp	r6, r0
4554
+	bne	.L629
4337
4555
 	ldrh	r3, [r1, r3]
4338
-	cmp	r3, r0
4339
-	beq	.L639
4340
-.L641:
4341
-	movs	r3, #6
4342
-	muls	r3, r0, r3
4343
-	ldr	r0, .L645+4
4344
-	asrs	r7, r3, #1
4345
-	add	r3, r3, r1
4346
-	muls	r0, r7, r0
4347
-	ldrh	r3, [r3, #4]
4348
-	ldrh	r0, [r6, r0, lsl #1]
4349
-	cbz	r3, .L644
4350
-	muls	r3, r0, r3
4351
-	b	.L642
4352
-.L644:
4353
-	mov	r3, #-1
4354
-.L642:
4556
+	cmp	r3, r6
4557
+	beq	.L627
4558
+.L629:
4559
+	movs	r0, #6
4560
+	ldr	r3, .L633+4
4561
+	muls	r0, r6, r0
4562
+	asrs	r6, r0, #1
4563
+	add	r1, r1, r0
4564
+	muls	r3, r6, r3
4565
+	ldrh	r6, [r7, r3, lsl #1]
4566
+	ldrh	r3, [r1, #4]
4567
+	cbz	r3, .L632
4568
+	muls	r3, r6, r3
4569
+.L630:
4355
4570
 	cmp	r2, r3
4356
-	bcs	.L639
4357
-	ldr	r0, .L645+8
4571
+	bcs	.L627
4358
4572
 	mov	r1, r5
4573
+	ldr	r0, .L633+8
4359
4574
 	bl	List_remove_node
4360
-	ldrh	r3, [r4, #304]
4575
+	ldrh	r3, [r4, #308]
4361
4576
 	mov	r0, r5
4362
4577
 	subs	r3, r3, #1
4363
-	strh	r3, [r4, #304]	@ movhi
4578
+	strh	r3, [r4, #308]	@ movhi
4364
4579
 	bl	INSERT_DATA_LIST
4365
-.L639:
4580
+.L627:
4366
4581
 	movs	r0, #0
4367
4582
 	pop	{r3, r4, r5, r6, r7, pc}
4368
-.L646:
4583
+.L631:
4584
+	mov	r2, #-1
4585
+	b	.L628
4586
+.L632:
4587
+	mov	r3, #-1
4588
+	b	.L630
4589
+.L634:
4369
4590
 	.align	2
4370
-.L645:
4591
+.L633:
4371
4592
 	.word	.LANCHOR2
4372
4593
 	.word	-1431655765
4373
-	.word	.LANCHOR2+292
4594
+	.word	.LANCHOR2+296
4374
4595
 	.fnend
4375
4596
 	.size	List_update_data_list, .-List_update_data_list
4376
4597
 	.align	1
4377
4598
 	.global	ftl_map_blk_alloc_new_blk
4599
+	.syntax unified
4378
4600
 	.thumb
4379
4601
 	.thumb_func
4602
+	.fpu softvfp
4380
4603
 	.type	ftl_map_blk_alloc_new_blk, %function
4381
4604
 ftl_map_blk_alloc_new_blk:
4382
4605
 	.fnstart
..
..
@@ -4384,57 +4607,59 @@
4384
4607
 	@ frame_needed = 0, uses_anonymous_args = 0
4385
4608
 	push	{r3, r4, r5, r6, r7, lr}
4386
4609
 	.save {r3, r4, r5, r6, r7, lr}
4387
-	movs	r3, #0
4388
-	ldrh	r1, [r0, #10]
4389
4610
 	mov	r4, r0
4611
+	ldrh	r1, [r0, #10]
4612
+	movs	r3, #0
4390
4613
 	ldr	r2, [r0, #12]
4391
-.L648:
4614
+.L636:
4392
4615
 	uxth	r5, r3
4393
4616
 	cmp	r5, r1
4394
-	bcs	.L651
4617
+	bcs	.L639
4395
4618
 	mov	r7, r2
4396
4619
 	adds	r3, r3, #1
4397
4620
 	ldrh	r6, [r7]
4398
4621
 	adds	r2, r2, #2
4399
4622
 	cmp	r6, #0
4400
-	bne	.L648
4623
+	bne	.L636
4401
4624
 	bl	FtlFreeSysBlkQueueOut
4402
-	movw	r2, #65533
4403
4625
 	subs	r3, r0, #1
4626
+	movw	r2, #65533
4627
+	uxth	r3, r3
4404
4628
 	mov	r1, r0
4405
4629
 	strh	r0, [r7]	@ movhi
4406
-	uxth	r3, r3
4407
4630
 	cmp	r3, r2
4408
-	bls	.L649
4409
-	ldr	r3, .L654
4410
-	ldr	r0, .L654+4
4411
-	ldrh	r2, [r3, #2518]
4631
+	bls	.L637
4632
+	ldr	r3, .L642
4633
+	ldr	r0, .L642+4
4634
+	ldrh	r2, [r3, #2522]
4412
4635
 	bl	printk
4413
-.L650:
4414
-	b	.L650
4415
-.L649:
4636
+.L638:
4637
+	b	.L638
4638
+.L637:
4416
4639
 	ldr	r3, [r4, #28]
4417
4640
 	strh	r6, [r4, #2]	@ movhi
4641
+	strh	r5, [r4]	@ movhi
4418
4642
 	adds	r3, r3, #1
4419
4643
 	str	r3, [r4, #28]
4420
4644
 	ldrh	r3, [r4, #8]
4421
-	strh	r5, [r4]	@ movhi
4422
4645
 	adds	r3, r3, #1
4423
4646
 	strh	r3, [r4, #8]	@ movhi
4424
-.L651:
4647
+.L639:
4425
4648
 	movs	r0, #0
4426
4649
 	pop	{r3, r4, r5, r6, r7, pc}
4427
-.L655:
4650
+.L643:
4428
4651
 	.align	2
4429
-.L654:
4652
+.L642:
4430
4653
 	.word	.LANCHOR0
4431
4654
 	.word	.LC5
4432
4655
 	.fnend
4433
4656
 	.size	ftl_map_blk_alloc_new_blk, .-ftl_map_blk_alloc_new_blk
4434
4657
 	.align	1
4435
4658
 	.global	select_l2p_ram_region
4659
+	.syntax unified
4436
4660
 	.thumb
4437
4661
 	.thumb_func
4662
+	.fpu softvfp
4438
4663
 	.type	select_l2p_ram_region, %function
4439
4664
 select_l2p_ram_region:
4440
4665
 	.fnstart
..
..
@@ -4443,244 +4668,247 @@
4443
4668
 	push	{r4, r5, r6, r7, lr}
4444
4669
 	.save {r4, r5, r6, r7, lr}
4445
4670
 	movs	r1, #0
4446
-	ldr	r3, .L670
4671
+	ldr	r3, .L654
4447
4672
 	movs	r4, #12
4448
-	ldr	r7, .L670+4
4449
4673
 	movw	r5, #65535
4450
-	ldrh	r2, [r3, #2426]
4451
-	ldr	r3, [r7, #460]
4452
-.L657:
4674
+	ldr	r7, .L654+4
4675
+	ldrh	r2, [r3, #2430]
4676
+	ldr	r3, [r7, #464]
4677
+.L645:
4453
4678
 	uxth	r0, r1
4454
4679
 	cmp	r0, r2
4455
-	bcs	.L668
4680
+	bcc	.L647
4681
+	mov	r0, r2
4682
+	movs	r1, #0
4683
+	mov	r6, #-2147483648
4684
+	mov	ip, #12
4685
+.L648:
4686
+	uxth	r5, r1
4687
+	cmp	r5, r2
4688
+	bcc	.L650
4689
+	cmp	r0, r2
4690
+	bcc	.L646
4691
+	ldrh	r7, [r7, #468]
4692
+	mov	r0, r2
4693
+	movs	r1, #0
4694
+	mov	r4, #-1
4695
+.L651:
4696
+	uxth	r5, r1
4697
+	cmp	r5, r2
4698
+	bcs	.L646
4699
+	ldr	r6, [r3, #4]
4700
+	cmp	r4, r6
4701
+	bls	.L652
4702
+	ldrh	ip, [r3]
4703
+	cmp	ip, r7
4704
+	itt	ne
4705
+	movne	r4, r6
4706
+	movne	r0, r5
4707
+.L652:
4708
+	adds	r1, r1, #1
4709
+	adds	r3, r3, #12
4710
+	b	.L651
4711
+.L647:
4456
4712
 	adds	r1, r1, #1
4457
4713
 	mla	r6, r4, r1, r3
4458
4714
 	ldrh	r6, [r6, #-12]
4459
4715
 	cmp	r6, r5
4460
-	bne	.L657
4461
-	b	.L658
4462
-.L668:
4463
-	movs	r1, #0
4464
-	mov	r6, #-2147483648
4465
-	mov	lr, #12
4466
-	mov	r0, r2
4467
-.L660:
4468
-	uxth	r5, r1
4469
-	cmp	r5, r2
4470
-	bcs	.L669
4471
-	mla	r4, lr, r1, r3
4716
+	bne	.L645
4717
+.L646:
4718
+	pop	{r4, r5, r6, r7, pc}
4719
+.L650:
4720
+	mla	r4, ip, r1, r3
4472
4721
 	ldr	r4, [r4, #4]
4473
4722
 	cmp	r4, #0
4474
-	blt	.L661
4475
-	cmp	r4, r6
4476
-	itt	cc
4477
-	movcc	r6, r4
4478
-	movcc	r0, r5
4479
-.L661:
4480
-	adds	r1, r1, #1
4481
-	b	.L660
4482
-.L669:
4483
-	cmp	r0, r2
4484
-	bcc	.L658
4485
-	ldrh	r7, [r7, #464]
4486
-	movs	r1, #0
4487
-	mov	r4, #-1
4488
-	mov	r0, r2
4489
-.L663:
4490
-	uxth	r5, r1
4491
-	cmp	r5, r2
4492
-	bcs	.L658
4493
-	ldr	r6, [r3, #4]
4723
+	blt	.L649
4494
4724
 	cmp	r6, r4
4495
-	bcs	.L664
4496
-	ldrh	lr, [r3]
4497
-	cmp	lr, r7
4498
-	itt	ne
4499
-	movne	r4, r6
4500
-	movne	r0, r5
4501
-.L664:
4725
+	itt	hi
4726
+	movhi	r6, r4
4727
+	movhi	r0, r5
4728
+.L649:
4502
4729
 	adds	r1, r1, #1
4503
-	adds	r3, r3, #12
4504
-	b	.L663
4505
-.L658:
4506
-	pop	{r4, r5, r6, r7, pc}
4507
-.L671:
4730
+	b	.L648
4731
+.L655:
4508
4732
 	.align	2
4509
-.L670:
4733
+.L654:
4510
4734
 	.word	.LANCHOR0
4511
4735
 	.word	.LANCHOR2
4512
4736
 	.fnend
4513
4737
 	.size	select_l2p_ram_region, .-select_l2p_ram_region
4514
4738
 	.align	1
4515
4739
 	.global	FtlUpdateVaildLpn
4740
+	.syntax unified
4516
4741
 	.thumb
4517
4742
 	.thumb_func
4743
+	.fpu softvfp
4518
4744
 	.type	FtlUpdateVaildLpn, %function
4519
4745
 FtlUpdateVaildLpn:
4520
4746
 	.fnstart
4521
4747
 	@ args = 0, pretend = 0, frame = 0
4522
4748
 	@ frame_needed = 0, uses_anonymous_args = 0
4523
-	ldr	r1, .L679
4749
+	ldr	r1, .L662
4524
4750
 	push	{r4, r5, lr}
4525
4751
 	.save {r4, r5, lr}
4526
-	ldrh	r2, [r1, #466]
4527
4752
 	mov	r3, r1
4753
+	ldrh	r2, [r1, #470]
4528
4754
 	cmp	r2, #4
4529
-	bhi	.L673
4530
-	cbnz	r0, .L673
4755
+	bhi	.L657
4756
+	cbnz	r0, .L657
4531
4757
 	adds	r2, r2, #1
4532
-	strh	r2, [r1, #466]	@ movhi
4758
+	strh	r2, [r1, #470]	@ movhi
4533
4759
 	pop	{r4, r5, pc}
4534
-.L673:
4535
-	ldr	r1, .L679+4
4760
+.L657:
4761
+	ldr	r1, .L662+4
4536
4762
 	movs	r2, #0
4537
-	strh	r2, [r3, #466]	@ movhi
4763
+	strh	r2, [r3, #470]	@ movhi
4538
4764
 	movw	r5, #65535
4539
-	str	r2, [r3, #468]
4540
-	ldrh	r1, [r1, #2328]
4541
-	ldr	r2, [r3, #296]
4765
+	str	r2, [r3, #472]
4766
+	ldrh	r1, [r1, #2332]
4767
+	ldr	r2, [r3, #300]
4542
4768
 	add	r1, r2, r1, lsl #1
4543
-.L674:
4769
+.L658:
4544
4770
 	cmp	r2, r1
4545
-	beq	.L678
4771
+	bne	.L660
4772
+	pop	{r4, r5, pc}
4773
+.L660:
4546
4774
 	ldrh	r4, [r2], #2
4547
4775
 	cmp	r4, r5
4548
4776
 	ittt	ne
4549
-	ldrne	r0, [r3, #468]
4777
+	ldrne	r0, [r3, #472]
4550
4778
 	addne	r0, r0, r4
4551
-	strne	r0, [r3, #468]
4552
-	b	.L674
4553
-.L678:
4554
-	pop	{r4, r5, pc}
4555
-.L680:
4779
+	strne	r0, [r3, #472]
4780
+	b	.L658
4781
+.L663:
4556
4782
 	.align	2
4557
-.L679:
4783
+.L662:
4558
4784
 	.word	.LANCHOR2
4559
4785
 	.word	.LANCHOR0
4560
4786
 	.fnend
4561
4787
 	.size	FtlUpdateVaildLpn, .-FtlUpdateVaildLpn
4562
4788
 	.align	1
4563
4789
 	.global	ftl_set_blk_mode
4790
+	.syntax unified
4564
4791
 	.thumb
4565
4792
 	.thumb_func
4793
+	.fpu softvfp
4566
4794
 	.type	ftl_set_blk_mode, %function
4567
4795
 ftl_set_blk_mode:
4568
4796
 	.fnstart
4569
4797
 	@ args = 0, pretend = 0, frame = 0
4570
4798
 	@ frame_needed = 0, uses_anonymous_args = 0
4571
4799
 	@ link register save eliminated.
4572
-	lsrs	r3, r0, #5
4573
-	ldr	r2, .L684
4574
-	and	r0, r0, #31
4575
-	uxth	r3, r3
4576
-	cbz	r1, .L682
4577
-	ldr	r1, [r2, #472]
4800
+	mov	r3, r0
4801
+	cbz	r1, .L665
4802
+	b	ftl_set_blk_mode.part.9
4803
+.L665:
4804
+	ldr	r2, .L666
4805
+	lsrs	r0, r0, #5
4806
+	and	r3, r3, #31
4807
+	ldr	r1, [r2, #32]
4578
4808
 	movs	r2, #1
4579
-	lsls	r2, r2, r0
4580
-	ldr	r0, [r1, r3, lsl #2]
4581
-	orrs	r2, r2, r0
4582
-	str	r2, [r1, r3, lsl #2]
4809
+	lsl	r3, r2, r3
4810
+	ldr	r2, [r1, r0, lsl #2]
4811
+	bic	r2, r2, r3
4812
+	str	r2, [r1, r0, lsl #2]
4583
4813
 	bx	lr
4584
-.L682:
4585
-	ldr	r1, [r2, #472]
4586
-	movs	r2, #1
4587
-	lsls	r2, r2, r0
4588
-	ldr	r0, [r1, r3, lsl #2]
4589
-	bic	r0, r0, r2
4590
-	str	r0, [r1, r3, lsl #2]
4591
-	bx	lr
4592
-.L685:
4814
+.L667:
4593
4815
 	.align	2
4594
-.L684:
4595
-	.word	.LANCHOR2
4816
+.L666:
4817
+	.word	.LANCHOR0
4596
4818
 	.fnend
4597
4819
 	.size	ftl_set_blk_mode, .-ftl_set_blk_mode
4598
4820
 	.align	1
4599
4821
 	.global	ftl_get_blk_mode
4822
+	.syntax unified
4600
4823
 	.thumb
4601
4824
 	.thumb_func
4825
+	.fpu softvfp
4602
4826
 	.type	ftl_get_blk_mode, %function
4603
4827
 ftl_get_blk_mode:
4604
4828
 	.fnstart
4605
4829
 	@ args = 0, pretend = 0, frame = 0
4606
4830
 	@ frame_needed = 0, uses_anonymous_args = 0
4607
4831
 	@ link register save eliminated.
4608
-	ldr	r3, .L687
4609
-	lsrs	r1, r0, #5
4610
-	ldr	r2, [r3, #472]
4611
-	and	r3, r0, #31
4612
-	ldr	r0, [r2, r1, lsl #2]
4613
-	lsrs	r0, r0, r3
4832
+	ldr	r3, .L669
4833
+	lsrs	r2, r0, #5
4834
+	and	r0, r0, #31
4835
+	ldr	r3, [r3, #32]
4836
+	ldr	r3, [r3, r2, lsl #2]
4837
+	lsr	r0, r3, r0
4614
4838
 	and	r0, r0, #1
4615
4839
 	bx	lr
4616
-.L688:
4840
+.L670:
4617
4841
 	.align	2
4618
-.L687:
4619
-	.word	.LANCHOR2
4842
+.L669:
4843
+	.word	.LANCHOR0
4620
4844
 	.fnend
4621
4845
 	.size	ftl_get_blk_mode, .-ftl_get_blk_mode
4622
4846
 	.align	1
4623
4847
 	.global	ftl_sb_update_avl_pages
4848
+	.syntax unified
4624
4849
 	.thumb
4625
4850
 	.thumb_func
4851
+	.fpu softvfp
4626
4852
 	.type	ftl_sb_update_avl_pages, %function
4627
4853
 ftl_sb_update_avl_pages:
4628
4854
 	.fnstart
4629
4855
 	@ args = 0, pretend = 0, frame = 0
4630
4856
 	@ frame_needed = 0, uses_anonymous_args = 0
4631
4857
 	movs	r3, #0
4632
-	strh	r3, [r0, #4]	@ movhi
4633
-	ldr	r3, .L698
4634
4858
 	push	{r4, r5, r6, r7, lr}
4635
4859
 	.save {r4, r5, r6, r7, lr}
4636
-	adds	r4, r2, #7
4637
-	ldrh	r5, [r3, #2320]
4860
+	strh	r3, [r0, #4]	@ movhi
4861
+	add	r4, r0, r2, lsl #1
4638
4862
 	movw	r7, #65535
4639
-	add	r4, r0, r4, lsl #1
4640
-.L690:
4863
+	ldr	r3, .L678
4864
+	adds	r4, r4, #14
4865
+	ldrh	r5, [r3, #2324]
4866
+.L672:
4641
4867
 	cmp	r2, r5
4642
-	bcs	.L696
4868
+	bcc	.L674
4869
+	ldrh	r3, [r3, #2390]
4870
+	add	r4, r0, #16
4871
+	movw	r6, #65535
4872
+	subs	r3, r3, #1
4873
+	subs	r1, r3, r1
4874
+	movs	r3, #0
4875
+	uxth	r1, r1
4876
+.L675:
4877
+	uxth	r2, r3
4878
+	cmp	r5, r2
4879
+	bhi	.L677
4880
+	pop	{r4, r5, r6, r7, pc}
4881
+.L674:
4643
4882
 	ldrh	r6, [r4, #2]!
4644
4883
 	adds	r2, r2, #1
4645
-	cmp	r6, r7
4646
4884
 	uxth	r2, r2
4885
+	cmp	r6, r7
4647
4886
 	ittt	ne
4648
4887
 	ldrhne	r6, [r0, #4]
4649
4888
 	addne	r6, r6, #1
4650
4889
 	strhne	r6, [r0, #4]	@ movhi
4651
-	b	.L690
4652
-.L696:
4653
-	ldrh	r6, [r3, #2388]
4654
-	add	r4, r0, #14
4655
-	movs	r2, #0
4656
-	movw	r7, #65535
4657
-.L693:
4658
-	uxth	r3, r2
4659
-	cmp	r3, r5
4660
-	bcs	.L697
4661
-	ldrh	r3, [r4, #2]!
4662
-	adds	r2, r2, #1
4663
-	cmp	r3, r7
4664
-	itttt	ne
4665
-	ldrhne	r3, [r0, #4]
4666
-	addne	r3, r3, r6
4667
-	addne	r3, r3, #-1
4668
-	subne	r3, r3, r1
4669
-	it	ne
4670
-	strhne	r3, [r0, #4]	@ movhi
4671
-	b	.L693
4672
-.L697:
4673
-	pop	{r4, r5, r6, r7, pc}
4674
-.L699:
4890
+	b	.L672
4891
+.L677:
4892
+	ldrh	r2, [r4], #2
4893
+	adds	r3, r3, #1
4894
+	cmp	r2, r6
4895
+	ittt	ne
4896
+	ldrhne	r2, [r0, #4]
4897
+	addne	r2, r2, r1
4898
+	strhne	r2, [r0, #4]	@ movhi
4899
+	b	.L675
4900
+.L679:
4675
4901
 	.align	2
4676
-.L698:
4902
+.L678:
4677
4903
 	.word	.LANCHOR0
4678
4904
 	.fnend
4679
4905
 	.size	ftl_sb_update_avl_pages, .-ftl_sb_update_avl_pages
4680
4906
 	.align	1
4681
4907
 	.global	make_superblock
4908
+	.syntax unified
4682
4909
 	.thumb
4683
4910
 	.thumb_func
4911
+	.fpu softvfp
4684
4912
 	.type	make_superblock, %function
4685
4913
 make_superblock:
4686
4914
 	.fnstart
..
..
@@ -4688,71 +4916,72 @@
4688
4916
 	@ frame_needed = 0, uses_anonymous_args = 0
4689
4917
 	push	{r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
4690
4918
 	.save {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
4691
-	movs	r3, #0
4692
-	ldr	r6, .L713
4693
-	add	r7, r0, #16
4694
4919
 	mov	r4, r0
4695
-	mov	r5, r3
4696
-	addw	r10, r6, #2348
4920
+	ldr	r6, .L692
4921
+	add	r7, r0, #16
4697
4922
 	movw	r9, #65535
4698
-	ldrh	r8, [r6, #2320]
4699
-	strh	r3, [r0, #4]	@ movhi
4700
-	strb	r3, [r0, #7]
4701
-.L701:
4923
+	movs	r5, #0
4924
+	strh	r5, [r0, #4]	@ movhi
4925
+	ldrh	r8, [r6, #2324]
4926
+	addw	r10, r6, #2350
4927
+	strb	r5, [r0, #7]
4928
+.L681:
4702
4929
 	uxth	r3, r5
4703
-	cmp	r3, r8
4704
-	bcs	.L712
4705
-	ldrb	r0, [r10, r5]	@ zero_extendqisi2
4706
-	ldrh	r1, [r4]
4707
-	bl	V2P_block
4708
-	strh	r9, [r7]	@ movhi
4709
-	mov	fp, r0
4710
-	bl	FtlBbmIsBadBlock
4711
-	cbnz	r0, .L702
4712
-	strh	fp, [r7]	@ movhi
4930
+	cmp	r8, r3
4931
+	bhi	.L683
4713
4932
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
4714
-	adds	r3, r3, #1
4715
-	strb	r3, [r4, #7]
4716
-.L702:
4717
-	adds	r5, r5, #1
4718
-	adds	r7, r7, #2
4719
-	b	.L701
4720
-.L712:
4721
-	ldrb	r2, [r4, #7]	@ zero_extendqisi2
4722
-	ldrh	r3, [r6, #2388]
4723
-	smulbb	r3, r2, r3
4933
+	ldrh	r2, [r6, #2390]
4934
+	smulbb	r3, r3, r2
4724
4935
 	strh	r3, [r4, #4]	@ movhi
4725
4936
 	movs	r3, #0
4726
4937
 	strb	r3, [r4, #9]
4727
-	ldr	r3, [r6, #2244]
4728
-	cbz	r3, .L704
4729
-	ldr	r3, .L713+4
4938
+	ldr	r3, [r6, #2248]
4939
+	cbz	r3, .L684
4940
+	ldr	r3, .L692+4
4730
4941
 	ldrh	r2, [r4]
4731
-	ldr	r3, [r3, #232]
4942
+	ldr	r3, [r3, #236]
4732
4943
 	ldrh	r3, [r3, r2, lsl #1]
4733
4944
 	cmp	r3, #79
4734
4945
 	itt	ls
4735
4946
 	movls	r3, #1
4736
4947
 	strbls	r3, [r4, #9]
4737
-.L704:
4738
-	ldrb	r3, [r6]	@ zero_extendqisi2
4739
-	cbz	r3, .L705
4948
+.L684:
4949
+	ldrb	r3, [r6, #36]	@ zero_extendqisi2
4950
+	cbz	r3, .L685
4740
4951
 	movs	r3, #1
4741
4952
 	strb	r3, [r4, #9]
4742
-.L705:
4953
+.L685:
4743
4954
 	movs	r0, #0
4744
4955
 	pop	{r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
4745
-.L714:
4956
+.L683:
4957
+	ldrh	r1, [r4]
4958
+	ldrb	r0, [r10, r5]	@ zero_extendqisi2
4959
+	bl	V2P_block
4960
+	strh	r9, [r7]	@ movhi
4961
+	mov	fp, r0
4962
+	bl	FtlBbmIsBadBlock
4963
+	cbnz	r0, .L682
4964
+	strh	fp, [r7]	@ movhi
4965
+	ldrb	r3, [r4, #7]	@ zero_extendqisi2
4966
+	adds	r3, r3, #1
4967
+	strb	r3, [r4, #7]
4968
+.L682:
4969
+	adds	r5, r5, #1
4970
+	adds	r7, r7, #2
4971
+	b	.L681
4972
+.L693:
4746
4973
 	.align	2
4747
-.L713:
4974
+.L692:
4748
4975
 	.word	.LANCHOR0
4749
4976
 	.word	.LANCHOR2
4750
4977
 	.fnend
4751
4978
 	.size	make_superblock, .-make_superblock
4752
4979
 	.align	1
4753
4980
 	.global	update_multiplier_value
4981
+	.syntax unified
4754
4982
 	.thumb
4755
4983
 	.thumb_func
4984
+	.fpu softvfp
4756
4985
 	.type	update_multiplier_value, %function
4757
4986
 update_multiplier_value:
4758
4987
 	.fnstart
..
..
@@ -4761,470 +4990,514 @@
4761
4990
 	push	{r3, r4, r5, r6, r7, r8, r9, lr}
4762
4991
 	.save {r3, r4, r5, r6, r7, r8, r9, lr}
4763
4992
 	movs	r5, #0
4764
-	ldr	r3, .L724
4993
+	ldr	r6, .L700
4765
4994
 	mov	r7, r0
4766
4995
 	mov	r4, r5
4767
-	addw	r6, r3, #2348
4768
-	ldrh	r8, [r3, #2320]
4769
-	ldrh	r9, [r3, #2388]
4770
-.L716:
4996
+	ldrh	r8, [r6, #2324]
4997
+	addw	r6, r6, #2350
4998
+	ldrh	r9, [r6, #40]
4999
+.L695:
4771
5000
 	uxth	r3, r5
4772
-	cmp	r3, r8
4773
-	bcs	.L723
5001
+	cmp	r8, r3
5002
+	bhi	.L697
5003
+	cbz	r4, .L699
5004
+	mov	r1, r4
5005
+	mov	r0, #32768
5006
+	bl	__aeabi_idiv
5007
+.L698:
5008
+	ldr	r3, .L700+4
5009
+	movs	r2, #6
5010
+	ldr	r3, [r3, #292]
5011
+	mla	r7, r2, r7, r3
5012
+	strh	r0, [r7, #4]	@ movhi
5013
+	movs	r0, #0
5014
+	pop	{r3, r4, r5, r6, r7, r8, r9, pc}
5015
+.L697:
4774
5016
 	mov	r1, r7
4775
5017
 	ldrb	r0, [r6, r5]	@ zero_extendqisi2
4776
5018
 	bl	V2P_block
4777
5019
 	bl	FtlBbmIsBadBlock
4778
-	cbnz	r0, .L717
5020
+	cbnz	r0, .L696
4779
5021
 	add	r4, r4, r9
4780
5022
 	uxth	r4, r4
4781
-.L717:
5023
+.L696:
4782
5024
 	adds	r5, r5, #1
4783
-	b	.L716
4784
-.L723:
4785
-	cbz	r4, .L719
4786
-	mov	r1, r4
4787
-	mov	r0, #32768
4788
-	bl	__aeabi_idiv
4789
-	uxth	r4, r0
4790
-.L719:
4791
-	ldr	r3, .L724+4
4792
-	movs	r2, #6
4793
-	movs	r0, #0
4794
-	ldr	r3, [r3, #288]
4795
-	mla	r7, r2, r7, r3
4796
-	strh	r4, [r7, #4]	@ movhi
4797
-	pop	{r3, r4, r5, r6, r7, r8, r9, pc}
4798
-.L725:
5025
+	b	.L695
5026
+.L699:
5027
+	mov	r0, r4
5028
+	b	.L698
5029
+.L701:
4799
5030
 	.align	2
4800
-.L724:
5031
+.L700:
4801
5032
 	.word	.LANCHOR0
4802
5033
 	.word	.LANCHOR2
4803
5034
 	.fnend
4804
5035
 	.size	update_multiplier_value, .-update_multiplier_value
4805
5036
 	.align	1
4806
5037
 	.global	GetFreeBlockMinEraseCount
5038
+	.syntax unified
4807
5039
 	.thumb
4808
5040
 	.thumb_func
5041
+	.fpu softvfp
4809
5042
 	.type	GetFreeBlockMinEraseCount, %function
4810
5043
 GetFreeBlockMinEraseCount:
4811
5044
 	.fnstart
4812
5045
 	@ args = 0, pretend = 0, frame = 0
4813
5046
 	@ frame_needed = 0, uses_anonymous_args = 0
4814
5047
 	@ link register save eliminated.
4815
-	ldr	r2, .L729
4816
-	ldr	r0, [r2, #308]
4817
-	cbz	r0, .L727
4818
-	ldr	r3, [r2, #288]
5048
+	ldr	r2, .L705
5049
+	ldr	r0, [r2, #312]
5050
+	cbz	r0, .L703
5051
+	ldr	r3, [r2, #292]
4819
5052
 	subs	r0, r0, r3
4820
-	ldr	r3, .L729+4
5053
+	ldr	r3, .L705+4
4821
5054
 	asrs	r0, r0, #1
4822
5055
 	muls	r0, r3, r0
4823
-	ldr	r3, [r2, #232]
5056
+	ldr	r3, [r2, #236]
4824
5057
 	uxth	r0, r0
4825
5058
 	ldrh	r0, [r3, r0, lsl #1]
4826
-.L727:
5059
+.L703:
4827
5060
 	bx	lr
4828
-.L730:
5061
+.L706:
4829
5062
 	.align	2
4830
-.L729:
5063
+.L705:
4831
5064
 	.word	.LANCHOR2
4832
5065
 	.word	-1431655765
4833
5066
 	.fnend
4834
5067
 	.size	GetFreeBlockMinEraseCount, .-GetFreeBlockMinEraseCount
4835
5068
 	.align	1
4836
5069
 	.global	GetFreeBlockMaxEraseCount
5070
+	.syntax unified
4837
5071
 	.thumb
4838
5072
 	.thumb_func
5073
+	.fpu softvfp
4839
5074
 	.type	GetFreeBlockMaxEraseCount, %function
4840
5075
 GetFreeBlockMaxEraseCount:
4841
5076
 	.fnstart
4842
5077
 	@ args = 0, pretend = 0, frame = 0
4843
5078
 	@ frame_needed = 0, uses_anonymous_args = 0
4844
-	ldr	r1, .L739
5079
+	ldr	r1, .L715
4845
5080
 	push	{r4, r5, r6, r7, lr}
4846
5081
 	.save {r4, r5, r6, r7, lr}
4847
-	ldr	r3, [r1, #308]
4848
-	cbz	r3, .L737
4849
-	ldrh	r2, [r1, #312]
5082
+	ldr	r3, [r1, #312]
5083
+	cbz	r3, .L713
5084
+	ldrh	r2, [r1, #316]
4850
5085
 	movs	r6, #6
4851
-	ldr	r4, [r1, #288]
5086
+	ldr	r4, [r1, #292]
4852
5087
 	movw	r7, #65535
4853
5088
 	rsb	r2, r2, r2, lsl #3
4854
5089
 	subs	r3, r3, r4
4855
-	asrs	r2, r2, #3
4856
5090
 	asrs	r3, r3, #1
5091
+	asrs	r2, r2, #3
4857
5092
 	cmp	r0, r2
4858
5093
 	it	gt
4859
5094
 	uxthgt	r0, r2
4860
-	ldr	r2, .L739+4
5095
+	ldr	r2, .L715+4
4861
5096
 	muls	r3, r2, r3
4862
5097
 	movs	r2, #0
4863
5098
 	uxth	r3, r3
4864
-.L734:
5099
+.L710:
4865
5100
 	uxth	r5, r2
4866
-	cmp	r5, r0
4867
-	bcs	.L736
5101
+	cmp	r0, r5
5102
+	bls	.L712
4868
5103
 	mul	r5, r6, r3
4869
5104
 	adds	r2, r2, #1
4870
5105
 	ldrh	r5, [r4, r5]
4871
5106
 	cmp	r5, r7
4872
-	bne	.L738
4873
-.L736:
4874
-	ldr	r2, [r1, #232]
5107
+	bne	.L714
5108
+.L712:
5109
+	ldr	r2, [r1, #236]
4875
5110
 	ldrh	r0, [r2, r3, lsl #1]
4876
5111
 	pop	{r4, r5, r6, r7, pc}
4877
-.L738:
5112
+.L714:
4878
5113
 	mov	r3, r5
4879
-	b	.L734
4880
-.L737:
5114
+	b	.L710
5115
+.L713:
4881
5116
 	mov	r0, r3
4882
5117
 	pop	{r4, r5, r6, r7, pc}
4883
-.L740:
5118
+.L716:
4884
5119
 	.align	2
4885
-.L739:
5120
+.L715:
4886
5121
 	.word	.LANCHOR2
4887
5122
 	.word	-1431655765
4888
5123
 	.fnend
4889
5124
 	.size	GetFreeBlockMaxEraseCount, .-GetFreeBlockMaxEraseCount
4890
5125
 	.align	1
4891
5126
 	.global	FtlPrintInfo2buf
5127
+	.syntax unified
4892
5128
 	.thumb
4893
5129
 	.thumb_func
5130
+	.fpu softvfp
4894
5131
 	.type	FtlPrintInfo2buf, %function
4895
5132
 FtlPrintInfo2buf:
4896
5133
 	.fnstart
4897
5134
 	@ args = 0, pretend = 0, frame = 16
4898
5135
 	@ frame_needed = 0, uses_anonymous_args = 0
4899
-	push	{r4, r5, r6, r7, r8, r9, r10, lr}
4900
-	.save {r4, r5, r6, r7, r8, r9, r10, lr}
4901
-	mov	r6, r0
4902
-	ldr	r8, .L751+240
4903
-	add	r4, r6, #12
4904
-	ldr	r1, .L751
4905
-	.pad #32
4906
-	sub	sp, sp, #32
5136
+	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
5137
+	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
5138
+	mov	r7, r0
5139
+	ldr	r4, .L729
5140
+	add	r5, r7, #12
5141
+	.pad #36
5142
+	sub	sp, sp, #36
5143
+	ldr	r1, .L729+4
4907
5144
 	bl	strcpy
4908
-	mov	r0, r4
4909
-	ldr	r1, .L751+4
4910
-	ldr	r2, [r8, #116]
5145
+	ldr	r2, [r4, #124]
5146
+	mov	r0, r5
5147
+	ldr	r1, .L729+8
4911
5148
 	bl	sprintf
4912
-	ldr	r1, .L751+8
4913
-	ldr	r2, [r8, #2404]
4914
-	add	r4, r4, r0
4915
-	mov	r0, r4
5149
+	add	r5, r5, r0
5150
+	ldr	r2, [r4, #2408]
5151
+	mov	r0, r5
5152
+	ldr	r1, .L729+12
4916
5153
 	bl	sprintf
4917
-	ldr	r3, .L751+12
4918
-	ldr	r3, [r3, #504]
5154
+	ldr	r3, .L729+16
5155
+	add	r5, r5, r0
5156
+	ldr	r3, [r3, #500]
4919
5157
 	cmp	r3, #1
4920
-	add	r4, r4, r0
4921
-	bne	.L747
4922
-	add	r0, sp, #16
4923
-	add	r1, sp, #20
4924
-	add	r2, sp, #24
4925
-	add	r3, sp, #28
4926
-	bl	NandcGetTimeCfg
4927
-	mov	r0, r4
4928
-	ldr	r1, .L751+16
4929
-	ldr	r7, .L751+20
4930
-	ldr	r3, [sp, #24]
4931
-	ldr	r2, [sp, #16]
4932
-	str	r3, [sp]
4933
-	ldr	r3, [sp, #28]
4934
-	str	r3, [sp, #4]
4935
-	ldr	r3, [sp, #20]
4936
-	bl	sprintf
4937
-	ldr	r1, .L751+24
4938
-	add	r4, r4, r0
4939
-	add	r5, r4, #10
4940
-	mov	r0, r4
4941
-	bl	strcpy
4942
-	mov	r0, r5
4943
-	ldr	r1, .L751+28
4944
-	ldr	r2, [r8, #2448]
4945
-	bl	sprintf
4946
-	ldr	r1, .L751+32
4947
-	ldr	r2, [r7, #468]
4948
-	add	r5, r5, r0
4949
-	mov	r0, r5
4950
-	bl	sprintf
4951
-	ldr	r1, .L751+36
4952
-	ldr	r2, [r7, #476]
4953
-	add	r5, r5, r0
4954
-	mov	r0, r5
4955
-	bl	sprintf
4956
-	ldr	r1, .L751+40
4957
-	ldr	r2, [r7, #480]
4958
-	add	r5, r5, r0
4959
-	mov	r0, r5
4960
-	bl	sprintf
4961
-	ldr	r1, .L751+44
4962
-	ldr	r2, [r7, #484]
4963
-	add	r5, r5, r0
4964
-	mov	r0, r5
4965
-	bl	sprintf
4966
-	ldr	r1, .L751+48
4967
-	ldr	r2, [r7, #488]
4968
-	add	r5, r5, r0
4969
-	mov	r0, r5
4970
-	bl	sprintf
4971
-	ldr	r1, .L751+52
4972
-	ldr	r2, [r7, #492]
4973
-	add	r5, r5, r0
4974
-	mov	r0, r5
4975
-	bl	sprintf
4976
-	ldr	r1, .L751+56
4977
-	ldr	r2, [r7, #496]
4978
-	add	r5, r5, r0
4979
-	mov	r0, r5
4980
-	bl	sprintf
4981
-	ldr	r2, [r7, #500]
4982
-	ldr	r1, .L751+60
4983
-	lsrs	r2, r2, #11
4984
-	add	r5, r5, r0
4985
-	mov	r0, r5
4986
-	bl	sprintf
4987
-	ldr	r2, [r7, #504]
4988
-	ldr	r1, .L751+64
4989
-	lsrs	r2, r2, #11
4990
-	add	r5, r5, r0
4991
-	mov	r0, r5
4992
-	bl	sprintf
4993
-	ldr	r1, .L751+68
4994
-	ldr	r2, [r7, #508]
4995
-	add	r5, r5, r0
4996
-	mov	r0, r5
4997
-	bl	sprintf
4998
-	ldr	r1, .L751+72
4999
-	ldr	r2, [r7, #512]
5000
-	add	r5, r5, r0
5001
-	mov	r0, r5
5002
-	bl	sprintf
5003
-	add	r5, r5, r0
5004
-	bl	FtlBbtCalcTotleCnt
5005
-	ldr	r1, .L751+76
5006
-	ldrh	r2, [r8, #2458]
5007
-	mov	r3, r0
5008
-	mov	r0, r5
5009
-	bl	sprintf
5010
-	ldr	r1, .L751+80
5011
-	ldrh	r2, [r7, #312]
5012
-	add	r5, r5, r0
5013
-	mov	r0, r5
5014
-	bl	sprintf
5015
-	ldr	r1, .L751+84
5016
-	ldr	r2, [r7, #516]
5017
-	add	r5, r5, r0
5018
-	mov	r0, r5
5019
-	bl	sprintf
5020
-	ldr	r1, .L751+88
5021
-	ldr	r2, [r7, #520]
5022
-	add	r5, r5, r0
5023
-	mov	r0, r5
5024
-	bl	sprintf
5025
-	ldr	r1, .L751+92
5026
-	ldr	r2, [r7, #524]
5027
-	add	r5, r5, r0
5028
-	mov	r0, r5
5029
-	bl	sprintf
5030
-	ldr	r1, .L751+96
5031
-	ldr	r2, [r7, #236]
5032
-	add	r5, r5, r0
5033
-	mov	r0, r5
5034
-	bl	sprintf
5035
-	ldr	r1, .L751+100
5036
-	ldr	r2, [r7, #528]
5037
-	add	r5, r5, r0
5038
-	mov	r0, r5
5039
-	bl	sprintf
5040
-	ldr	r1, .L751+104
5041
-	ldr	r2, [r7, #532]
5042
-	add	r5, r5, r0
5043
-	mov	r0, r5
5044
-	bl	sprintf
5045
-	ldr	r1, .L751+108
5046
-	ldrh	r2, [r7, #270]
5047
-	add	r5, r5, r0
5048
-	mov	r0, r5
5049
-	bl	sprintf
5050
-	ldr	r1, .L751+112
5051
-	ldrh	r2, [r7, #268]
5052
-	add	r5, r5, r0
5053
-	mov	r0, r5
5054
-	bl	sprintf
5055
-	ldr	r1, .L751+116
5056
-	ldr	r2, [r8, #2428]
5057
-	add	r5, r5, r0
5058
-	mov	r0, r5
5059
-	bl	sprintf
5060
-	ldr	r1, .L751+120
5061
-	ldr	r2, [r8, #2420]
5062
-	add	r5, r5, r0
5063
-	mov	r0, r5
5064
-	bl	sprintf
5065
-	ldr	r1, .L751+124
5066
-	ldr	r2, [r8, #2316]
5067
-	add	r5, r5, r0
5068
-	mov	r0, r5
5069
-	bl	sprintf
5070
-	ldr	r1, .L751+128
5071
-	ldrh	r2, [r8, #2518]
5072
-	add	r5, r5, r0
5073
-	mov	r0, r5
5074
-	bl	sprintf
5075
-	ldr	r1, .L751+132
5076
-	ldrh	r2, [r8, #2328]
5077
-	add	r5, r5, r0
5078
-	mov	r0, r5
5079
-	bl	sprintf
5080
-	ldr	r1, .L751+136
5081
-	ldrh	r2, [r7, #536]
5082
-	add	r5, r5, r0
5083
-	mov	r0, r5
5084
-	bl	sprintf
5085
-	ldr	r1, .L751+140
5086
-	ldr	r2, [r8, #2332]
5087
-	add	r5, r5, r0
5088
-	mov	r0, r5
5089
-	bl	sprintf
5090
-	ldr	r1, .L751+144
5091
-	ldrh	r2, [r7, #540]
5092
-	add	r5, r5, r0
5093
-	mov	r0, r5
5094
-	bl	sprintf
5095
-	ldr	r1, .L751+148
5096
-	ldrh	r2, [r8, #2452]
5097
-	add	r5, r5, r0
5098
-	mov	r0, r5
5099
-	bl	sprintf
5100
-	ldr	r1, .L751+152
5101
-	ldrh	r2, [r7, #318]
5102
-	add	r5, r5, r0
5103
-	mov	r0, r5
5104
-	bl	sprintf
5105
-	ldr	r1, .L751+156
5106
-	ldrb	r2, [r7, #322]	@ zero_extendqisi2
5107
-	add	r5, r5, r0
5108
-	mov	r0, r5
5109
-	bl	sprintf
5110
-	ldr	r1, .L751+160
5111
-	ldrh	r2, [r7, #316]
5112
-	add	r5, r5, r0
5113
-	mov	r0, r5
5114
-	bl	sprintf
5115
-	ldr	r1, .L751+164
5116
-	ldrb	r2, [r7, #324]	@ zero_extendqisi2
5117
-	add	r5, r5, r0
5118
-	mov	r0, r5
5119
-	bl	sprintf
5120
-	ldr	r1, .L751+168
5121
-	ldrh	r2, [r7, #320]
5122
-	add	r5, r5, r0
5123
-	mov	r0, r5
5124
-	bl	sprintf
5125
-	ldr	r3, [r7, #296]
5126
-	ldrh	r2, [r7, #316]
5127
-	ldr	r1, .L751+172
5128
-	ldrh	r2, [r3, r2, lsl #1]
5129
-	add	r5, r5, r0
5130
-	mov	r0, r5
5131
-	bl	sprintf
5132
-	ldr	r1, .L751+176
5133
-	ldrh	r2, [r7, #366]
5134
-	add	r5, r5, r0
5135
-	mov	r0, r5
5136
-	bl	sprintf
5137
-	ldr	r1, .L751+180
5138
-	ldrb	r2, [r7, #370]	@ zero_extendqisi2
5139
-	add	r5, r5, r0
5140
-	mov	r0, r5
5141
-	bl	sprintf
5142
-	ldr	r1, .L751+184
5143
-	ldrh	r2, [r7, #364]
5144
-	add	r5, r5, r0
5145
-	mov	r0, r5
5146
-	bl	sprintf
5147
-	ldr	r1, .L751+188
5148
-	ldrb	r2, [r7, #372]	@ zero_extendqisi2
5149
-	add	r5, r5, r0
5150
-	mov	r0, r5
5151
-	bl	sprintf
5152
-	ldr	r1, .L751+192
5153
-	ldrh	r2, [r7, #368]
5154
-	add	r5, r5, r0
5155
-	mov	r0, r5
5156
-	bl	sprintf
5157
-	ldr	r3, [r7, #296]
5158
-	ldrh	r2, [r7, #364]
5159
-	ldr	r1, .L751+196
5160
-	ldrh	r2, [r3, r2, lsl #1]
5161
-	add	r5, r5, r0
5162
-	mov	r0, r5
5163
-	bl	sprintf
5164
-	ldr	r1, .L751+200
5165
-	ldrh	r2, [r7, #414]
5166
-	add	r5, r5, r0
5167
-	mov	r0, r5
5168
-	bl	sprintf
5169
-	ldr	r1, .L751+204
5170
-	ldrb	r2, [r7, #418]	@ zero_extendqisi2
5171
-	add	r5, r5, r0
5172
-	mov	r0, r5
5173
-	bl	sprintf
5174
-	ldr	r1, .L751+208
5175
-	ldrh	r2, [r7, #412]
5176
-	add	r5, r5, r0
5177
-	mov	r0, r5
5178
-	bl	sprintf
5179
-	ldr	r1, .L751+212
5180
-	ldrb	r2, [r7, #420]	@ zero_extendqisi2
5181
-	add	r5, r5, r0
5182
-	mov	r0, r5
5183
-	bl	sprintf
5184
-	ldr	r1, .L751+216
5185
-	ldrh	r2, [r7, #416]
5186
-	add	r5, r5, r0
5187
-	mov	r0, r5
5188
-	bl	sprintf
5189
-	ldr	r1, .L751+220
5190
-	ldrh	r2, [r7, #558]
5191
-	add	r5, r5, r0
5192
-	mov	r0, r5
5193
-	bl	sprintf
5194
-	ldr	r1, .L751+224
5195
-	ldrb	r2, [r7, #562]	@ zero_extendqisi2
5196
-	add	r5, r5, r0
5197
-	mov	r0, r5
5198
-	bl	sprintf
5199
-	ldr	r1, .L751+228
5200
-	ldrh	r2, [r7, #556]
5201
-	add	r5, r5, r0
5202
-	mov	r0, r5
5203
-	bl	sprintf
5204
-	ldr	r1, .L751+232
5205
-	ldrb	r2, [r7, #564]	@ zero_extendqisi2
5206
-	add	r5, r5, r0
5207
-	mov	r0, r5
5208
-	bl	sprintf
5209
-	ldr	r1, .L751+236
5210
-	ldrh	r2, [r7, #560]
5211
-	add	r5, r5, r0
5212
-	mov	r0, r5
5213
-	bl	sprintf
5214
-	ldr	r1, [r7, #692]
5215
-	ldr	r3, [r8, #2244]
5216
-	ldr	r2, [r7, #604]
5217
-	b	.L752
5218
-.L753:
5158
+	beq	.L718
5159
+	subs	r0, r5, r7
5160
+.L717:
5161
+	add	sp, sp, #36
5162
+	@ sp needed
5163
+	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
5164
+.L730:
5219
5165
 	.align	2
5220
-.L751:
5166
+.L729:
5167
+	.word	.LANCHOR0
5221
5168
 	.word	.LC6
5222
5169
 	.word	.LC7
5223
5170
 	.word	.LC8
5224
5171
 	.word	.LANCHOR1
5172
+.L718:
5173
+	add	r3, sp, #28
5174
+	add	r2, sp, #24
5175
+	add	r1, sp, #20
5176
+	add	r0, sp, #16
5177
+	bl	NandcGetTimeCfg
5178
+	ldr	r3, [sp, #28]
5179
+	mov	r0, r5
5180
+	ldr	r2, [sp, #16]
5181
+	ldr	r1, .L731
5182
+	str	r3, [sp, #4]
5183
+	ldr	r3, [sp, #24]
5184
+	str	r3, [sp]
5185
+	ldr	r3, [sp, #20]
5186
+	bl	sprintf
5187
+	adds	r6, r5, r0
5188
+	ldr	r1, .L731+4
5189
+	ldr	r5, .L731+8
5190
+	mov	r0, r6
5191
+	adds	r6, r6, #10
5192
+	bl	strcpy
5193
+	ldr	r2, [r4, #2452]
5194
+	mov	r0, r6
5195
+	ldr	r1, .L731+12
5196
+	bl	sprintf
5197
+	add	r6, r6, r0
5198
+	ldr	r2, [r5, #472]
5199
+	ldr	r1, .L731+16
5200
+	mov	r0, r6
5201
+	bl	sprintf
5202
+	add	r6, r6, r0
5203
+	ldr	r2, [r5, #476]
5204
+	ldr	r1, .L731+20
5205
+	mov	r0, r6
5206
+	bl	sprintf
5207
+	add	r6, r6, r0
5208
+	ldr	r2, [r5, #480]
5209
+	ldr	r1, .L731+24
5210
+	mov	r0, r6
5211
+	bl	sprintf
5212
+	add	r6, r6, r0
5213
+	ldr	r2, [r5, #484]
5214
+	ldr	r1, .L731+28
5215
+	mov	r0, r6
5216
+	bl	sprintf
5217
+	add	r6, r6, r0
5218
+	ldr	r2, [r5, #488]
5219
+	ldr	r1, .L731+32
5220
+	mov	r0, r6
5221
+	bl	sprintf
5222
+	add	r6, r6, r0
5223
+	ldr	r2, [r5, #492]
5224
+	ldr	r1, .L731+36
5225
+	mov	r0, r6
5226
+	bl	sprintf
5227
+	add	r6, r6, r0
5228
+	ldr	r2, [r5, #496]
5229
+	ldr	r1, .L731+40
5230
+	mov	r0, r6
5231
+	bl	sprintf
5232
+	ldr	r2, [r5, #500]
5233
+	add	r6, r6, r0
5234
+	ldr	r1, .L731+44
5235
+	mov	r0, r6
5236
+	lsrs	r2, r2, #11
5237
+	bl	sprintf
5238
+	ldr	r2, [r5, #504]
5239
+	add	r6, r6, r0
5240
+	ldr	r1, .L731+48
5241
+	mov	r0, r6
5242
+	lsrs	r2, r2, #11
5243
+	bl	sprintf
5244
+	add	r6, r6, r0
5245
+	ldr	r2, [r5, #508]
5246
+	ldr	r1, .L731+52
5247
+	mov	r0, r6
5248
+	bl	sprintf
5249
+	add	r6, r6, r0
5250
+	ldr	r2, [r5, #512]
5251
+	ldr	r1, .L731+56
5252
+	mov	r0, r6
5253
+	bl	sprintf
5254
+	add	r6, r6, r0
5255
+	bl	FtlBbtCalcTotleCnt
5256
+	ldrh	r2, [r4, #2462]
5257
+	mov	r3, r0
5258
+	ldr	r1, .L731+60
5259
+	mov	r0, r6
5260
+	bl	sprintf
5261
+	add	r6, r6, r0
5262
+	ldrh	r2, [r5, #316]
5263
+	ldr	r1, .L731+64
5264
+	mov	r0, r6
5265
+	bl	sprintf
5266
+	add	r6, r6, r0
5267
+	ldr	r2, [r5, #516]
5268
+	ldr	r1, .L731+68
5269
+	mov	r0, r6
5270
+	bl	sprintf
5271
+	add	r6, r6, r0
5272
+	ldr	r2, [r5, #520]
5273
+	ldr	r1, .L731+72
5274
+	mov	r0, r6
5275
+	bl	sprintf
5276
+	add	r6, r6, r0
5277
+	ldr	r2, [r5, #524]
5278
+	ldr	r1, .L731+76
5279
+	mov	r0, r6
5280
+	bl	sprintf
5281
+	add	r6, r6, r0
5282
+	ldr	r2, [r5, #240]
5283
+	ldr	r1, .L731+80
5284
+	mov	r0, r6
5285
+	bl	sprintf
5286
+	add	r6, r6, r0
5287
+	ldr	r2, [r5, #528]
5288
+	ldr	r1, .L731+84
5289
+	mov	r0, r6
5290
+	bl	sprintf
5291
+	add	r6, r6, r0
5292
+	ldr	r2, [r5, #532]
5293
+	ldr	r1, .L731+88
5294
+	mov	r0, r6
5295
+	bl	sprintf
5296
+	add	r6, r6, r0
5297
+	ldrh	r2, [r5, #274]
5298
+	ldr	r1, .L731+92
5299
+	mov	r0, r6
5300
+	bl	sprintf
5301
+	add	r6, r6, r0
5302
+	ldrh	r2, [r5, #272]
5303
+	ldr	r1, .L731+96
5304
+	mov	r0, r6
5305
+	bl	sprintf
5306
+	add	r6, r6, r0
5307
+	ldr	r2, [r4, #2432]
5308
+	ldr	r1, .L731+100
5309
+	mov	r0, r6
5310
+	bl	sprintf
5311
+	add	r6, r6, r0
5312
+	ldr	r2, [r4, #2424]
5313
+	ldr	r1, .L731+104
5314
+	mov	r0, r6
5315
+	bl	sprintf
5316
+	add	r6, r6, r0
5317
+	ldr	r2, [r4, #2320]
5318
+	ldr	r1, .L731+108
5319
+	mov	r0, r6
5320
+	bl	sprintf
5321
+	add	r6, r6, r0
5322
+	ldrh	r2, [r4, #2522]
5323
+	ldr	r1, .L731+112
5324
+	mov	r0, r6
5325
+	bl	sprintf
5326
+	add	r6, r6, r0
5327
+	ldrh	r2, [r4, #2332]
5328
+	ldr	r1, .L731+116
5329
+	mov	r0, r6
5330
+	bl	sprintf
5331
+	add	r6, r6, r0
5332
+	ldrh	r2, [r5, #536]
5333
+	ldr	r1, .L731+120
5334
+	mov	r0, r6
5335
+	bl	sprintf
5336
+	add	r6, r6, r0
5337
+	ldr	r2, [r4, #2336]
5338
+	ldr	r1, .L731+124
5339
+	mov	r0, r6
5340
+	bl	sprintf
5341
+	add	r6, r6, r0
5342
+	ldrh	r2, [r5, #540]
5343
+	ldr	r1, .L731+128
5344
+	mov	r0, r6
5345
+	bl	sprintf
5346
+	add	r6, r6, r0
5347
+	ldrh	r2, [r4, #2456]
5348
+	ldr	r1, .L731+132
5349
+	mov	r0, r6
5350
+	bl	sprintf
5351
+	add	r6, r6, r0
5352
+	ldrh	r2, [r5, #322]
5353
+	ldr	r1, .L731+136
5354
+	mov	r0, r6
5355
+	bl	sprintf
5356
+	add	r6, r6, r0
5357
+	ldrb	r2, [r5, #326]	@ zero_extendqisi2
5358
+	ldr	r1, .L731+140
5359
+	mov	r0, r6
5360
+	bl	sprintf
5361
+	add	r6, r6, r0
5362
+	ldrh	r2, [r5, #320]
5363
+	ldr	r1, .L731+144
5364
+	mov	r0, r6
5365
+	bl	sprintf
5366
+	add	r6, r6, r0
5367
+	ldrb	r2, [r5, #328]	@ zero_extendqisi2
5368
+	ldr	r1, .L731+148
5369
+	mov	r0, r6
5370
+	bl	sprintf
5371
+	add	r6, r6, r0
5372
+	ldrh	r2, [r5, #324]
5373
+	ldr	r1, .L731+152
5374
+	mov	r0, r6
5375
+	bl	sprintf
5376
+	ldr	r3, [r5, #300]
5377
+	add	r6, r6, r0
5378
+	ldrh	r2, [r5, #320]
5379
+	mov	r0, r6
5380
+	ldr	r1, .L731+156
5381
+	ldrh	r2, [r3, r2, lsl #1]
5382
+	bl	sprintf
5383
+	add	r6, r6, r0
5384
+	ldrh	r2, [r5, #370]
5385
+	ldr	r1, .L731+160
5386
+	mov	r0, r6
5387
+	bl	sprintf
5388
+	add	r6, r6, r0
5389
+	ldrb	r2, [r5, #374]	@ zero_extendqisi2
5390
+	ldr	r1, .L731+164
5391
+	mov	r0, r6
5392
+	bl	sprintf
5393
+	add	r6, r6, r0
5394
+	ldrh	r2, [r5, #368]
5395
+	ldr	r1, .L731+168
5396
+	mov	r0, r6
5397
+	bl	sprintf
5398
+	add	r6, r6, r0
5399
+	ldrb	r2, [r5, #376]	@ zero_extendqisi2
5400
+	ldr	r1, .L731+172
5401
+	mov	r0, r6
5402
+	bl	sprintf
5403
+	add	r6, r6, r0
5404
+	ldrh	r2, [r5, #372]
5405
+	ldr	r1, .L731+176
5406
+	mov	r0, r6
5407
+	bl	sprintf
5408
+	ldr	r3, [r5, #300]
5409
+	add	r6, r6, r0
5410
+	ldrh	r2, [r5, #368]
5411
+	mov	r0, r6
5412
+	ldr	r1, .L731+180
5413
+	ldrh	r2, [r3, r2, lsl #1]
5414
+	bl	sprintf
5415
+	add	r6, r6, r0
5416
+	ldrh	r2, [r5, #418]
5417
+	ldr	r1, .L731+184
5418
+	mov	r0, r6
5419
+	bl	sprintf
5420
+	add	r6, r6, r0
5421
+	ldrb	r2, [r5, #422]	@ zero_extendqisi2
5422
+	ldr	r1, .L731+188
5423
+	mov	r0, r6
5424
+	bl	sprintf
5425
+	add	r6, r6, r0
5426
+	ldrh	r2, [r5, #416]
5427
+	ldr	r1, .L731+192
5428
+	mov	r0, r6
5429
+	bl	sprintf
5430
+	add	r6, r6, r0
5431
+	ldrb	r2, [r5, #424]	@ zero_extendqisi2
5432
+	ldr	r1, .L731+196
5433
+	mov	r0, r6
5434
+	bl	sprintf
5435
+	add	r6, r6, r0
5436
+	ldrh	r2, [r5, #420]
5437
+	ldr	r1, .L731+200
5438
+	mov	r0, r6
5439
+	bl	sprintf
5440
+	add	r6, r6, r0
5441
+	ldrh	r2, [r5, #558]
5442
+	ldr	r1, .L731+204
5443
+	mov	r0, r6
5444
+	bl	sprintf
5445
+	add	r6, r6, r0
5446
+	ldrb	r2, [r5, #562]	@ zero_extendqisi2
5447
+	ldr	r1, .L731+208
5448
+	mov	r0, r6
5449
+	bl	sprintf
5450
+	add	r6, r6, r0
5451
+	ldrh	r2, [r5, #556]
5452
+	ldr	r1, .L731+212
5453
+	mov	r0, r6
5454
+	bl	sprintf
5455
+	add	r6, r6, r0
5456
+	ldrb	r2, [r5, #564]	@ zero_extendqisi2
5457
+	ldr	r1, .L731+216
5458
+	mov	r0, r6
5459
+	bl	sprintf
5460
+	add	r6, r6, r0
5461
+	ldrh	r2, [r5, #560]
5462
+	ldr	r1, .L731+220
5463
+	mov	r0, r6
5464
+	bl	sprintf
5465
+	ldr	r3, [r5, #680]
5466
+	add	r6, r6, r0
5467
+	ldr	r1, [r5, #1116]
5468
+	mov	r0, r6
5469
+	ldr	r2, [r4, #2248]
5470
+	str	r3, [sp, #4]
5471
+	ldr	r3, [r5, #688]
5472
+	orr	r2, r2, r1, lsl #8
5473
+	ldr	r1, .L731+224
5474
+	str	r3, [sp]
5475
+	ldr	r3, [r5, #684]
5476
+	bl	sprintf
5477
+	adds	r4, r6, r0
5478
+	ldr	r2, [r5, #676]
5479
+	ldr	r1, .L731+228
5480
+	mov	r0, r4
5481
+	bl	sprintf
5482
+	add	r4, r4, r0
5483
+	ldr	r2, [r5, #700]
5484
+	ldr	r1, .L731+232
5485
+	mov	r0, r4
5486
+	bl	sprintf
5487
+	add	r4, r4, r0
5488
+	ldrh	r2, [r5, #1120]
5489
+	ldr	r1, .L731+236
5490
+	mov	r0, r4
5491
+	bl	sprintf
5492
+	add	r4, r4, r0
5493
+	ldrh	r2, [r5, #1122]
5494
+	b	.L732
5495
+.L733:
5496
+	.align	2
5497
+.L731:
5225
5498
 	.word	.LC9
5226
-	.word	.LANCHOR2
5227
5499
 	.word	.LC10
5500
+	.word	.LANCHOR2
5228
5501
 	.word	.LC11
5229
5502
 	.word	.LC12
5230
5503
 	.word	.LC13
..
..
@@ -5278,161 +5551,137 @@
5278
5551
 	.word	.LC61
5279
5552
 	.word	.LC62
5280
5553
 	.word	.LC63
5281
-	.word	.LANCHOR0
5282
-.L752:
5283
-	orr	r2, r3, r2, lsl #8
5284
-	str	r1, [sp]
5285
-	add	r5, r5, r0
5286
-	ldr	r1, [r7, #684]
5287
-	mov	r0, r5
5288
-	str	r1, [sp, #4]
5289
-	ldr	r3, [r7, #688]
5290
-	ldr	r1, .L754
5291
-	bl	sprintf
5292
-	ldr	r1, .L754+4
5293
-	ldr	r2, [r7, #680]
5294
-	add	r5, r5, r0
5295
-	mov	r0, r5
5296
-	bl	sprintf
5297
-	ldr	r1, .L754+8
5298
-	ldr	r2, [r7, #704]
5299
-	adds	r4, r5, r0
5300
-	mov	r0, r4
5301
-	bl	sprintf
5302
-	ldr	r1, .L754+12
5303
-	ldrh	r2, [r7, #1120]
5304
-	add	r4, r4, r0
5305
-	mov	r0, r4
5306
-	bl	sprintf
5307
-	ldr	r1, .L754+16
5308
-	ldrh	r2, [r7, #1122]
5309
-	add	r4, r4, r0
5310
-	mov	r0, r4
5311
-	bl	sprintf
5312
-	ldr	r1, .L754+20
5313
-	ldr	r2, [r7, #1124]
5314
-	add	r4, r4, r0
5315
-	mov	r0, r4
5316
-	bl	sprintf
5317
-	ldr	r1, .L754+24
5318
-	ldrh	r2, [r7, #1128]
5319
-	add	r4, r4, r0
5320
-	mov	r0, r4
5321
-	bl	sprintf
5322
-	add	r4, r4, r0
5323
-	bl	GetFreeBlockMinEraseCount
5324
-	ldr	r1, .L754+28
5325
-	mov	r2, r0
5326
-	mov	r0, r4
5327
-	bl	sprintf
5328
-	add	r4, r4, r0
5329
-	ldrh	r0, [r7, #312]
5330
-	bl	GetFreeBlockMaxEraseCount
5331
-	ldr	r1, .L754+32
5332
-	mov	r2, r0
5333
-	mov	r0, r4
5334
-	bl	sprintf
5335
-	ldrh	r3, [r7, #556]
5336
-	movw	r2, #65535
5337
-	cmp	r3, r2
5338
-	add	r4, r4, r0
5339
-	beq	.L744
5340
-	ldr	r2, [r7, #296]
5341
-	mov	r0, r4
5342
-	ldr	r1, .L754+36
5343
-	ldrh	r2, [r2, r3, lsl #1]
5344
-	bl	sprintf
5345
-	add	r4, r4, r0
5346
-.L744:
5347
-	movs	r0, #0
5348
-	movs	r5, #0
5349
-	bl	List_get_gc_head_node
5350
-	mov	r9, #6
5351
-	movw	r10, #65535
5352
-	uxth	r3, r0
5353
-.L746:
5354
-	cmp	r3, r10
5355
-	beq	.L745
5356
-	ldr	r2, [r7, #296]
5357
-	mov	r0, r4
5358
-	mul	r8, r9, r3
5359
-	ldr	r1, .L754+40
5360
-	ldrh	r2, [r2, r3, lsl #1]
5361
-	str	r2, [sp]
5362
-	ldr	r2, [r7, #288]
5363
-	add	r2, r2, r8
5364
-	ldrh	r2, [r2, #4]
5365
-	str	r2, [sp, #4]
5366
-	ldr	r2, [r7, #232]
5367
-	ldrh	r2, [r2, r3, lsl #1]
5368
-	str	r2, [sp, #8]
5369
-	mov	r2, r5
5370
-	bl	sprintf
5371
-	adds	r5, r5, #1
5372
-	ldr	r3, [r7, #288]
5373
-	cmp	r5, #16
5374
-	ldrh	r3, [r3, r8]
5375
-	add	r4, r4, r0
5376
-	bne	.L746
5377
-.L745:
5378
-	ldr	r2, [r7, #288]
5379
-	movs	r5, #0
5380
-	ldr	r3, [r7, #308]
5381
-	mov	r9, #6
5382
-	movw	r10, #65535
5383
-	subs	r3, r3, r2
5384
-	ldr	r2, .L754+44
5385
-	asrs	r3, r3, #1
5386
-	muls	r3, r2, r3
5387
-	uxth	r3, r3
5388
-.L748:
5389
-	cmp	r3, r10
5390
-	beq	.L747
5391
-	mul	r8, r9, r3
5392
-	ldr	r2, [r7, #288]
5393
-	mov	r0, r4
5394
-	ldr	r1, .L754+48
5395
-	add	r2, r2, r8
5396
-	ldrh	r2, [r2, #4]
5397
-	str	r2, [sp]
5398
-	ldr	r2, [r7, #232]
5399
-	ldrh	r2, [r2, r3, lsl #1]
5400
-	str	r2, [sp, #4]
5401
-	mov	r2, r5
5402
-	bl	sprintf
5403
-	adds	r5, r5, #1
5404
-	ldr	r3, [r7, #288]
5405
-	cmp	r5, #4
5406
-	ldrh	r3, [r3, r8]
5407
-	add	r4, r4, r0
5408
-	bne	.L748
5409
-.L747:
5410
-	subs	r0, r4, r6
5411
-	add	sp, sp, #32
5412
-	@ sp needed
5413
-	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
5414
-.L755:
5415
-	.align	2
5416
-.L754:
5417
5554
 	.word	.LC64
5418
5555
 	.word	.LC65
5419
5556
 	.word	.LC66
5420
5557
 	.word	.LC67
5558
+.L732:
5559
+	ldr	r1, .L734
5560
+	mov	r0, r4
5561
+	bl	sprintf
5562
+	add	r4, r4, r0
5563
+	ldr	r2, [r5, #1124]
5564
+	ldr	r1, .L734+4
5565
+	mov	r0, r4
5566
+	bl	sprintf
5567
+	add	r4, r4, r0
5568
+	ldrh	r2, [r5, #1128]
5569
+	ldr	r1, .L734+8
5570
+	mov	r0, r4
5571
+	bl	sprintf
5572
+	add	r4, r4, r0
5573
+	bl	GetFreeBlockMinEraseCount
5574
+	ldr	r1, .L734+12
5575
+	mov	r2, r0
5576
+	mov	r0, r4
5577
+	bl	sprintf
5578
+	add	r4, r4, r0
5579
+	ldrh	r0, [r5, #316]
5580
+	bl	GetFreeBlockMaxEraseCount
5581
+	ldr	r1, .L734+16
5582
+	mov	r2, r0
5583
+	mov	r0, r4
5584
+	bl	sprintf
5585
+	ldrh	r3, [r5, #556]
5586
+	movw	r2, #65535
5587
+	add	r4, r4, r0
5588
+	cmp	r3, r2
5589
+	beq	.L720
5590
+	ldr	r2, [r5, #300]
5591
+	mov	r0, r4
5592
+	ldr	r1, .L734+20
5593
+	ldrh	r2, [r2, r3, lsl #1]
5594
+	bl	sprintf
5595
+	add	r4, r4, r0
5596
+.L720:
5597
+	movs	r0, #0
5598
+	ldr	r9, .L734+28
5599
+	bl	List_get_gc_head_node
5600
+	uxth	r3, r0
5601
+	movs	r6, #0
5602
+	movw	fp, #65535
5603
+	mov	r10, #6
5604
+.L722:
5605
+	cmp	r3, fp
5606
+	beq	.L721
5607
+	ldr	r2, [r5, #236]
5608
+	mul	r8, r10, r3
5609
+	mov	r0, r4
5610
+	mov	r1, r9
5611
+	ldrh	r2, [r2, r3, lsl #1]
5612
+	str	r2, [sp, #8]
5613
+	ldr	r2, [r5, #292]
5614
+	add	r2, r2, r8
5615
+	ldrh	r2, [r2, #4]
5616
+	str	r2, [sp, #4]
5617
+	ldr	r2, [r5, #300]
5618
+	ldrh	r2, [r2, r3, lsl #1]
5619
+	str	r2, [sp]
5620
+	mov	r2, r6
5621
+	bl	sprintf
5622
+	adds	r6, r6, #1
5623
+	ldr	r3, [r5, #292]
5624
+	cmp	r6, #16
5625
+	add	r4, r4, r0
5626
+	ldrh	r3, [r3, r8]
5627
+	bne	.L722
5628
+.L721:
5629
+	ldr	r2, [r5, #292]
5630
+	movs	r6, #0
5631
+	ldr	r3, [r5, #312]
5632
+	movw	r9, #65535
5633
+	ldr	fp, .L734+32
5634
+	mov	r10, #6
5635
+	subs	r3, r3, r2
5636
+	asrs	r2, r3, #1
5637
+	ldr	r3, .L734+24
5638
+	muls	r3, r2, r3
5639
+	uxth	r3, r3
5640
+.L724:
5641
+	cmp	r3, r9
5642
+	beq	.L723
5643
+	ldr	r2, [r5, #236]
5644
+	mul	r8, r10, r3
5645
+	mov	r0, r4
5646
+	mov	r1, fp
5647
+	ldrh	r2, [r2, r3, lsl #1]
5648
+	str	r2, [sp, #4]
5649
+	ldr	r2, [r5, #292]
5650
+	add	r2, r2, r8
5651
+	ldrh	r2, [r2, #4]
5652
+	str	r2, [sp]
5653
+	mov	r2, r6
5654
+	adds	r6, r6, #1
5655
+	bl	sprintf
5656
+	cmp	r6, #4
5657
+	add	r4, r4, r0
5658
+	beq	.L723
5659
+	ldr	r3, [r5, #292]
5660
+	ldrh	r3, [r3, r8]
5661
+	b	.L724
5662
+.L723:
5663
+	subs	r0, r4, r7
5664
+	b	.L717
5665
+.L735:
5666
+	.align	2
5667
+.L734:
5421
5668
 	.word	.LC68
5422
5669
 	.word	.LC69
5423
5670
 	.word	.LC70
5424
5671
 	.word	.LC71
5425
5672
 	.word	.LC72
5426
5673
 	.word	.LC73
5427
-	.word	.LC74
5428
5674
 	.word	-1431655765
5675
+	.word	.LC74
5429
5676
 	.word	.LC75
5430
5677
 	.fnend
5431
5678
 	.size	FtlPrintInfo2buf, .-FtlPrintInfo2buf
5432
5679
 	.align	1
5433
5680
 	.global	ftl_proc_ftl_read
5681
+	.syntax unified
5434
5682
 	.thumb
5435
5683
 	.thumb_func
5684
+	.fpu softvfp
5436
5685
 	.type	ftl_proc_ftl_read, %function
5437
5686
 ftl_proc_ftl_read:
5438
5687
 	.fnstart
..
..
@@ -5441,8 +5690,8 @@
5441
5690
 	push	{r3, r4, r5, lr}
5442
5691
 	.save {r3, r4, r5, lr}
5443
5692
 	mov	r5, r0
5444
-	ldr	r1, .L757
5445
-	ldr	r2, .L757+4
5693
+	ldr	r2, .L737
5694
+	ldr	r1, .L737+4
5446
5695
 	bl	sprintf
5447
5696
 	adds	r4, r5, r0
5448
5697
 	mov	r0, r4
..
..
@@ -5450,17 +5699,19 @@
5450
5699
 	add	r0, r0, r4
5451
5700
 	subs	r0, r0, r5
5452
5701
 	pop	{r3, r4, r5, pc}
5453
-.L758:
5702
+.L738:
5454
5703
 	.align	2
5455
-.L757:
5704
+.L737:
5456
5705
 	.word	.LC76
5457
5706
 	.word	.LC77
5458
5707
 	.fnend
5459
5708
 	.size	ftl_proc_ftl_read, .-ftl_proc_ftl_read
5460
5709
 	.align	1
5461
5710
 	.global	GetSwlReplaceBlock
5711
+	.syntax unified
5462
5712
 	.thumb
5463
5713
 	.thumb_func
5714
+	.fpu softvfp
5464
5715
 	.type	GetSwlReplaceBlock, %function
5465
5716
 GetSwlReplaceBlock:
5466
5717
 	.fnstart
..
..
@@ -5470,500 +5721,505 @@
5470
5721
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
5471
5722
 	.pad #28
5472
5723
 	sub	sp, sp, #28
5473
-	ldr	r4, .L787
5724
+	ldr	r4, .L765
5474
5725
 	ldr	r2, [r4, #524]
5475
5726
 	ldr	r3, [r4, #532]
5476
5727
 	cmp	r2, r3
5477
-	bcs	.L760
5478
-	ldr	r2, .L787+4
5728
+	bcs	.L740
5729
+	ldr	r5, .L765+4
5479
5730
 	movs	r3, #0
5480
-	ldr	r0, [r4, #232]
5731
+	ldr	r0, [r4, #236]
5481
5732
 	str	r3, [r4, #516]
5482
-	ldrh	r1, [r2, #2328]
5483
-	mov	r5, r2
5484
-.L761:
5733
+	ldrh	r1, [r5, #2332]
5734
+.L741:
5485
5735
 	cmp	r3, r1
5486
-	bcs	.L786
5487
-	ldrh	r6, [r0, r3, lsl #1]
5488
-	adds	r3, r3, #1
5489
-	ldr	r2, [r4, #516]
5490
-	add	r2, r2, r6
5491
-	str	r2, [r4, #516]
5492
-	b	.L761
5493
-.L786:
5736
+	bcc	.L742
5494
5737
 	ldr	r6, [r4, #516]
5495
5738
 	mov	r0, r6
5496
5739
 	bl	__aeabi_uidiv
5497
-	ldrh	r1, [r5, #2380]
5498
5740
 	str	r0, [r4, #524]
5499
5741
 	ldr	r0, [r4, #520]
5742
+	ldrh	r1, [r5, #2382]
5500
5743
 	subs	r0, r6, r0
5501
5744
 	bl	__aeabi_uidiv
5502
5745
 	str	r0, [r4, #516]
5503
-	b	.L763
5504
-.L760:
5746
+.L743:
5747
+	ldr	r6, [r4, #532]
5748
+	ldr	r7, [r4, #524]
5749
+	add	r3, r6, #256
5750
+	cmp	r3, r7
5751
+	bls	.L748
5752
+	ldr	r2, [r4, #528]
5753
+	add	r3, r6, #768
5754
+	cmp	r3, r2
5755
+	bls	.L748
5756
+	ldr	r3, .L765+4
5757
+	ldr	r3, [r3, #2248]
5758
+	cbnz	r3, .L749
5759
+.L751:
5760
+	movw	r5, #65535
5761
+.L750:
5762
+	mov	r0, r5
5763
+	add	sp, sp, #28
5764
+	@ sp needed
5765
+	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
5766
+.L742:
5767
+	ldrh	r2, [r0, r3, lsl #1]
5768
+	adds	r3, r3, #1
5769
+	ldr	r6, [r4, #516]
5770
+	add	r2, r2, r6
5771
+	str	r2, [r4, #516]
5772
+	b	.L741
5773
+.L740:
5505
5774
 	ldr	r3, [r4, #528]
5506
5775
 	cmp	r2, r3
5507
-	bls	.L763
5508
-	ldr	r0, .L787+4
5776
+	bls	.L743
5777
+	ldr	r0, .L765+4
5509
5778
 	adds	r3, r3, #1
5510
5779
 	str	r3, [r4, #528]
5511
5780
 	movs	r3, #0
5512
-.L765:
5513
-	ldrh	r2, [r0, #2328]
5781
+.L745:
5782
+	ldrh	r2, [r0, #2332]
5514
5783
 	cmp	r3, r2
5515
-	bcs	.L763
5516
-	ldr	r1, [r4, #232]
5784
+	bcs	.L743
5785
+	ldr	r1, [r4, #236]
5517
5786
 	ldrh	r2, [r1, r3, lsl #1]
5518
5787
 	adds	r2, r2, #1
5519
5788
 	strh	r2, [r1, r3, lsl #1]	@ movhi
5520
5789
 	adds	r3, r3, #1
5521
-	b	.L765
5522
-.L763:
5523
-	ldr	r6, [r4, #532]
5524
-	ldr	r8, [r4, #524]
5525
-	add	r3, r6, #256
5526
-	cmp	r3, r8
5527
-	bls	.L768
5528
-	ldr	r2, .L787
5529
-	add	r3, r6, #768
5530
-	ldr	r2, [r2, #528]
5531
-	cmp	r3, r2
5532
-	bls	.L768
5533
-	ldr	r3, .L787+4
5534
-	ldr	r3, [r3, #2244]
5535
-	cbnz	r3, .L769
5536
-.L771:
5537
-	movw	r0, #65535
5538
-	b	.L770
5539
-.L769:
5790
+	b	.L745
5791
+.L749:
5540
5792
 	cmp	r6, #40
5541
-	bhi	.L771
5542
-.L768:
5543
-	ldrh	r0, [r4, #312]
5793
+	bhi	.L751
5794
+.L748:
5795
+	ldrh	r0, [r4, #316]
5544
5796
 	add	r0, r0, r0, lsl #1
5545
5797
 	ubfx	r0, r0, #2, #16
5546
5798
 	bl	GetFreeBlockMaxEraseCount
5547
5799
 	add	r3, r6, #64
5548
-	cmp	r0, r3
5549
5800
 	mov	r9, r0
5550
-	bcs	.L772
5801
+	cmp	r0, r3
5802
+	bcs	.L752
5551
5803
 	cmp	r6, #40
5552
-	bhi	.L771
5553
-.L772:
5554
-	ldr	r3, [r4, #292]
5555
-	ldr	r2, .L787
5804
+	bhi	.L751
5805
+.L752:
5806
+	ldr	r3, [r4, #296]
5556
5807
 	cmp	r3, #0
5557
-	beq	.L771
5558
-	ldr	r1, .L787+4
5559
-	movw	r7, #65535
5560
-	ldr	r0, [r2, #288]
5561
-	mov	ip, #6
5562
-	ldr	r10, [r2, #232]
5563
-	mov	r5, r7
5564
-	ldrh	r1, [r1, #2328]
5565
-	mov	lr, r7
5566
-	str	r1, [sp, #20]
5567
-	movs	r1, #0
5568
-.L773:
5569
-	ldrh	r2, [r3]
5570
-	cmp	r2, lr
5571
-	str	r2, [sp, #16]
5572
-	beq	.L775
5573
-	adds	r1, r1, #1
5574
-	ldr	r2, [sp, #20]
5575
-	uxth	r1, r1
5576
-	cmp	r1, r2
5577
-	bhi	.L771
5578
-	ldrh	fp, [r3, #4]
5579
-	cmp	fp, #0
5580
-	beq	.L774
5581
-	subs	r3, r3, r0
5582
-	ldr	r2, .L787+8
5583
-	asrs	r3, r3, #1
5584
-	muls	r3, r2, r3
5585
-	uxth	r3, r3
5586
-	ldrh	fp, [r10, r3, lsl #1]
5587
-	cmp	fp, r6
5588
-	bls	.L779
5589
-	cmp	fp, r7
5590
-	itt	cc
5591
-	movcc	r7, fp
5592
-	movcc	r5, r3
5593
-.L774:
5594
-	ldr	r3, [sp, #16]
5595
-	mla	r3, ip, r3, r0
5596
-	b	.L773
5597
-.L779:
5598
-	mov	r5, r3
5599
-.L775:
5808
+	beq	.L751
5809
+	ldr	r2, .L765+4
5810
+	movw	r1, #65535
5811
+	ldr	lr, [r4, #292]
5812
+	movs	r0, #0
5813
+	ldr	r8, [r4, #236]
5814
+	mov	r10, r1
5815
+	ldrh	r2, [r2, #2332]
5816
+	mov	fp, #6
5817
+	str	r2, [sp, #20]
5818
+	mov	r2, r1
5819
+.L753:
5820
+	ldrh	ip, [r3]
5821
+	cmp	ip, r10
5822
+	bne	.L756
5823
+	mov	r5, r2
5824
+.L755:
5600
5825
 	movw	r3, #65535
5601
5826
 	cmp	r5, r3
5602
-	beq	.L771
5603
-	ldrh	fp, [r10, r5, lsl #1]
5604
-	lsls	r3, r5, #1
5605
-	cmp	fp, r6
5606
-	bls	.L777
5607
-	str	r3, [sp, #16]
5827
+	beq	.L751
5828
+	ldrh	r10, [r8, r5, lsl #1]
5829
+	lsl	fp, r5, #1
5830
+	cmp	r6, r10
5831
+	bcs	.L757
5608
5832
 	bl	GetFreeBlockMinEraseCount
5609
-	ldr	r3, [sp, #16]
5610
-	cmp	r0, r6
5611
-	it	hi
5612
-	strhi	r7, [r4, #532]
5613
-.L777:
5614
-	cmp	fp, r8
5615
-	bcs	.L771
5616
-	add	r2, fp, #128
5617
-	cmp	r9, r2
5618
-	ble	.L771
5619
-	add	r2, fp, #256
5620
-	cmp	r2, r8
5621
-	bcc	.L778
5622
-	ldr	r2, [r4, #528]
5623
-	add	fp, fp, #768
5624
-	cmp	fp, r2
5625
-	bcs	.L771
5626
-.L778:
5627
-	ldr	r2, [r4, #296]
5628
-	mov	r1, r5
5629
-	ldr	r0, .L787+12
5630
-	ldrh	r2, [r2, r3]
5631
-	str	r2, [sp]
5632
-	mov	r2, r8
5633
-	ldrh	r3, [r10, r3]
5833
+	cmp	r6, r0
5834
+	it	cc
5835
+	strcc	r1, [r4, #532]
5836
+.L757:
5837
+	cmp	r7, r10
5838
+	bls	.L751
5839
+	add	r3, r10, #128
5840
+	cmp	r9, r3
5841
+	ble	.L751
5842
+	add	r3, r10, #256
5843
+	cmp	r7, r3
5844
+	bhi	.L758
5845
+	ldr	r3, [r4, #528]
5846
+	add	r10, r10, #768
5847
+	cmp	r10, r3
5848
+	bcs	.L751
5849
+.L758:
5634
5850
 	str	r9, [sp, #8]
5851
+	mov	r2, r7
5852
+	ldrh	r3, [r8, fp]
5853
+	mov	r1, r5
5854
+	ldr	r0, .L765+8
5635
5855
 	str	r3, [sp, #4]
5856
+	ldr	r3, [r4, #300]
5857
+	ldrh	r3, [r3, fp]
5858
+	str	r3, [sp]
5636
5859
 	ldr	r3, [r4, #528]
5637
5860
 	bl	printk
5638
-	mov	r0, r5
5639
5861
 	movs	r3, #1
5640
5862
 	str	r3, [r4, #1132]
5641
-.L770:
5642
-	add	sp, sp, #28
5643
-	@ sp needed
5644
-	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
5645
-.L788:
5863
+	b	.L750
5864
+.L756:
5865
+	adds	r0, r0, #1
5866
+	ldr	r5, [sp, #20]
5867
+	uxth	r0, r0
5868
+	cmp	r0, r5
5869
+	bhi	.L751
5870
+	ldrh	r5, [r3, #4]
5871
+	cbz	r5, .L754
5872
+	ldr	r5, .L765+12
5873
+	sub	r3, r3, lr
5874
+	asrs	r3, r3, #1
5875
+	muls	r3, r5, r3
5876
+	uxth	r5, r3
5877
+	ldrh	r3, [r8, r5, lsl #1]
5878
+	cmp	r6, r3
5879
+	bcs	.L755
5880
+	cmp	r1, r3
5881
+	itt	hi
5882
+	movhi	r1, r3
5883
+	movhi	r2, r5
5884
+.L754:
5885
+	mla	r3, fp, ip, lr
5886
+	b	.L753
5887
+.L766:
5646
5888
 	.align	2
5647
-.L787:
5889
+.L765:
5648
5890
 	.word	.LANCHOR2
5649
5891
 	.word	.LANCHOR0
5650
-	.word	-1431655765
5651
5892
 	.word	.LC78
5893
+	.word	-1431655765
5652
5894
 	.fnend
5653
5895
 	.size	GetSwlReplaceBlock, .-GetSwlReplaceBlock
5654
5896
 	.align	1
5655
5897
 	.global	free_data_superblock
5898
+	.syntax unified
5656
5899
 	.thumb
5657
5900
 	.thumb_func
5901
+	.fpu softvfp
5658
5902
 	.type	free_data_superblock, %function
5659
5903
 free_data_superblock:
5660
5904
 	.fnstart
5661
5905
 	@ args = 0, pretend = 0, frame = 0
5662
5906
 	@ frame_needed = 0, uses_anonymous_args = 0
5663
5907
 	movw	r2, #65535
5664
-	cmp	r0, r2
5665
5908
 	push	{r3, lr}
5666
5909
 	.save {r3, lr}
5667
-	beq	.L790
5668
-	ldr	r2, .L791
5910
+	cmp	r0, r2
5911
+	beq	.L768
5912
+	ldr	r2, .L769
5669
5913
 	movs	r1, #0
5670
-	ldr	r2, [r2, #296]
5914
+	ldr	r2, [r2, #300]
5671
5915
 	strh	r1, [r2, r0, lsl #1]	@ movhi
5672
5916
 	bl	INSERT_FREE_LIST
5673
-.L790:
5917
+.L768:
5674
5918
 	movs	r0, #0
5675
5919
 	pop	{r3, pc}
5676
-.L792:
5920
+.L770:
5677
5921
 	.align	2
5678
-.L791:
5922
+.L769:
5679
5923
 	.word	.LANCHOR2
5680
5924
 	.fnend
5681
5925
 	.size	free_data_superblock, .-free_data_superblock
5682
5926
 	.align	1
5683
5927
 	.global	FtlGcBufInit
5928
+	.syntax unified
5684
5929
 	.thumb
5685
5930
 	.thumb_func
5931
+	.fpu softvfp
5686
5932
 	.type	FtlGcBufInit, %function
5687
5933
 FtlGcBufInit:
5688
5934
 	.fnstart
5689
5935
 	@ args = 0, pretend = 0, frame = 0
5690
5936
 	@ frame_needed = 0, uses_anonymous_args = 0
5691
-	ldr	r2, .L804
5692
-	mov	ip, #36
5693
-	ldr	r0, .L804+4
5937
+	ldr	r2, .L780
5938
+	mov	ip, #1
5939
+	ldr	r0, .L780+4
5694
5940
 	movs	r3, #0
5695
5941
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
5696
5942
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
5697
5943
 	movs	r7, #12
5698
-	mov	lr, #1
5699
-	mov	r6, r0
5700
-	mov	r4, r2
5944
+	mov	r5, r2
5945
+	mov	lr, #36
5946
+	mov	r1, r0
5701
5947
 	str	r3, [r2, #1136]
5702
-.L794:
5703
-	ldrh	r1, [r0, #2320]
5704
-	adds	r5, r3, #1
5705
-	uxth	r3, r3
5706
-	ldr	r8, .L804+4
5707
-	cmp	r3, r1
5708
-	bcs	.L802
5709
-	mul	r8, r7, r3
5710
-	ldr	r9, [r2, #1140]
5711
-	add	r1, r9, r8
5712
-	str	lr, [r1, #8]
5713
-	ldrh	r1, [r0, #2398]
5714
-	muls	r1, r3, r1
5715
-	it	mi
5716
-	addmi	r1, r1, #3
5717
-	bic	r10, r1, #3
5718
-	ldr	r1, [r4, #1144]
5719
-	add	r1, r1, r10
5720
-	str	r1, [r9, r8]
5721
-	ldr	r10, [r2, #1140]
5722
-	ldrh	r1, [r6, #2400]
5723
-	muls	r1, r3, r1
5724
-	it	mi
5725
-	addmi	r1, r1, #3
5726
-	add	r9, r10, r8
5727
-	bic	fp, r1, #3
5728
-	ldr	r1, [r4, #1148]
5729
-	add	r1, r1, fp
5730
-	str	r1, [r9, #4]
5731
-	ldr	r1, [r2, #1152]
5732
-	mla	r3, ip, r3, r1
5733
-	ldr	r1, [r10, r8]
5734
-	str	r1, [r3, #8]
5735
-	ldr	r1, [r9, #4]
5736
-	str	r1, [r3, #12]
5737
-	mov	r3, r5
5738
-	b	.L794
5739
-.L802:
5740
-	ldr	r0, .L804
5948
+.L772:
5949
+	ldrh	r4, [r0, #2324]
5950
+	uxth	r8, r3
5951
+	adds	r6, r3, #1
5952
+	cmp	r8, r4
5953
+	bcc	.L775
5954
+	ldr	r7, .L780
5741
5955
 	mov	lr, #12
5742
-	movs	r5, #0
5743
-.L798:
5956
+	movs	r6, #0
5957
+.L776:
5744
5958
 	ldr	r3, [r2, #1156]
5745
-	cmp	r1, r3
5746
-	bcs	.L803
5747
-	mul	r7, lr, r1
5748
-	ldr	r6, [r0, #1140]
5749
-	ldr	r4, [r0, #1144]
5750
-	adds	r3, r6, r7
5751
-	str	r5, [r3, #8]
5752
-	ldrh	r3, [r8, #2398]
5753
-	muls	r3, r1, r3
5754
-	it	mi
5755
-	addmi	r3, r3, #3
5756
-	bic	r3, r3, #3
5757
-	add	r3, r3, r4
5758
-	str	r3, [r6, r7]
5759
-	ldr	r3, [r2, #1140]
5760
-	ldr	r6, [r0, #1148]
5761
-	add	r7, r7, r3
5762
-	ldrh	r3, [r8, #2400]
5763
-	muls	r3, r1, r3
5764
-	add	r1, r1, #1
5765
-	it	mi
5766
-	addmi	r3, r3, #3
5767
-	bic	r3, r3, #3
5768
-	uxth	r1, r1
5769
-	add	r3, r3, r6
5770
-	str	r3, [r7, #4]
5771
-	b	.L798
5772
-.L803:
5959
+	cmp	r4, r3
5960
+	bcc	.L779
5773
5961
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
5774
-.L805:
5962
+.L775:
5963
+	uxth	r3, r3
5964
+	ldr	r9, [r2, #1140]
5965
+	mul	r8, r7, r3
5966
+	add	r4, r9, r8
5967
+	str	ip, [r4, #8]
5968
+	ldrh	r4, [r0, #2400]
5969
+	muls	r4, r3, r4
5970
+	it	mi
5971
+	addmi	r4, r4, #3
5972
+	bic	r10, r4, #3
5973
+	ldr	r4, [r5, #1144]
5974
+	add	r4, r4, r10
5975
+	str	r4, [r9, r8]
5976
+	ldrh	r4, [r1, #2402]
5977
+	muls	r4, r3, r4
5978
+	it	mi
5979
+	addmi	r4, r4, #3
5980
+	ldr	r10, [r2, #1140]
5981
+	bic	fp, r4, #3
5982
+	ldr	r4, [r5, #1148]
5983
+	add	r9, r10, r8
5984
+	add	r4, r4, fp
5985
+	str	r4, [r9, #4]
5986
+	ldr	r4, [r2, #1152]
5987
+	mla	r3, lr, r3, r4
5988
+	ldr	r4, [r10, r8]
5989
+	str	r4, [r3, #8]
5990
+	ldr	r4, [r9, #4]
5991
+	str	r4, [r3, #12]
5992
+	mov	r3, r6
5993
+	b	.L772
5994
+.L779:
5995
+	mul	ip, lr, r4
5996
+	ldr	r0, [r2, #1140]
5997
+	ldr	r5, [r2, #1144]
5998
+	add	r3, r0, ip
5999
+	str	r6, [r3, #8]
6000
+	ldrh	r3, [r1, #2400]
6001
+	muls	r3, r4, r3
6002
+	it	mi
6003
+	addmi	r3, r3, #3
6004
+	bic	r3, r3, #3
6005
+	add	r3, r3, r5
6006
+	str	r3, [r0, ip]
6007
+	ldr	r3, [r2, #1140]
6008
+	ldr	r0, [r7, #1148]
6009
+	add	ip, ip, r3
6010
+	ldrh	r3, [r1, #2402]
6011
+	muls	r3, r4, r3
6012
+	it	mi
6013
+	addmi	r3, r3, #3
6014
+	bic	r3, r3, #3
6015
+	adds	r4, r4, #1
6016
+	add	r3, r3, r0
6017
+	uxth	r4, r4
6018
+	str	r3, [ip, #4]
6019
+	b	.L776
6020
+.L781:
5775
6021
 	.align	2
5776
-.L804:
6022
+.L780:
5777
6023
 	.word	.LANCHOR2
5778
6024
 	.word	.LANCHOR0
5779
6025
 	.fnend
5780
6026
 	.size	FtlGcBufInit, .-FtlGcBufInit
5781
6027
 	.align	1
5782
6028
 	.global	FtlGcBufFree
6029
+	.syntax unified
5783
6030
 	.thumb
5784
6031
 	.thumb_func
6032
+	.fpu softvfp
5785
6033
 	.type	FtlGcBufFree, %function
5786
6034
 FtlGcBufFree:
5787
6035
 	.fnstart
5788
6036
 	@ args = 0, pretend = 0, frame = 0
5789
6037
 	@ frame_needed = 0, uses_anonymous_args = 0
5790
-	ldr	r3, .L813
6038
+	ldr	r3, .L789
5791
6039
 	push	{r4, r5, r6, r7, r8, r9, r10, lr}
5792
6040
 	.save {r4, r5, r6, r7, r8, r9, r10, lr}
5793
6041
 	movs	r5, #0
5794
-	ldr	lr, [r3, #1156]
5795
6042
 	mov	r10, #36
6043
+	mov	lr, #12
6044
+	mov	r8, r5
6045
+	ldr	ip, [r3, #1156]
5796
6046
 	ldr	r6, [r3, #1140]
5797
-	mov	r8, #12
5798
-	mov	ip, r5
5799
-.L807:
5800
-	uxth	r4, r5
5801
-	cmp	r4, r1
5802
-	bcs	.L806
5803
-	mla	r4, r10, r4, r0
6047
+.L783:
6048
+	uxth	r3, r5
6049
+	cmp	r1, r3
6050
+	bls	.L782
6051
+	mla	r4, r10, r3, r0
5804
6052
 	movs	r2, #0
5805
-.L808:
6053
+.L784:
5806
6054
 	uxth	r3, r2
5807
-	cmp	r3, lr
5808
-	bcs	.L809
5809
-	mul	r3, r8, r3
6055
+	cmp	ip, r3
6056
+	bls	.L785
6057
+	mul	r3, lr, r3
5810
6058
 	ldr	r7, [r4, #8]
5811
6059
 	adds	r2, r2, #1
5812
6060
 	add	r9, r6, r3
5813
6061
 	ldr	r3, [r6, r3]
5814
6062
 	cmp	r3, r7
5815
-	bne	.L808
5816
-	str	ip, [r9, #8]
5817
-.L809:
6063
+	bne	.L784
6064
+	str	r8, [r9, #8]
6065
+.L785:
5818
6066
 	adds	r5, r5, #1
5819
-	b	.L807
5820
-.L806:
6067
+	b	.L783
6068
+.L782:
5821
6069
 	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
5822
-.L814:
6070
+.L790:
5823
6071
 	.align	2
5824
-.L813:
6072
+.L789:
5825
6073
 	.word	.LANCHOR2
5826
6074
 	.fnend
5827
6075
 	.size	FtlGcBufFree, .-FtlGcBufFree
5828
6076
 	.align	1
5829
6077
 	.global	FtlGcBufAlloc
6078
+	.syntax unified
5830
6079
 	.thumb
5831
6080
 	.thumb_func
6081
+	.fpu softvfp
5832
6082
 	.type	FtlGcBufAlloc, %function
5833
6083
 FtlGcBufAlloc:
5834
6084
 	.fnstart
5835
6085
 	@ args = 0, pretend = 0, frame = 0
5836
6086
 	@ frame_needed = 0, uses_anonymous_args = 0
5837
-	ldr	r3, .L823
5838
-	mov	ip, #1
6087
+	ldr	r3, .L798
6088
+	mov	ip, #12
5839
6089
 	push	{r4, r5, r6, r7, r8, r9, lr}
5840
6090
 	.save {r4, r5, r6, r7, r8, r9, lr}
5841
6091
 	movs	r4, #0
5842
-	ldr	r5, [r3, #1156]
5843
-	mov	lr, #12
5844
-	ldr	r6, [r3, #1140]
6092
+	mov	lr, #1
5845
6093
 	mov	r8, #36
5846
-.L816:
6094
+	ldr	r5, [r3, #1156]
6095
+	ldr	r6, [r3, #1140]
6096
+.L792:
5847
6097
 	uxth	r2, r4
5848
-	cmp	r2, r1
5849
-	bcs	.L822
6098
+	cmp	r1, r2
6099
+	bhi	.L796
6100
+	pop	{r4, r5, r6, r7, r8, r9, pc}
6101
+.L796:
5850
6102
 	mov	r9, #0
5851
-.L817:
6103
+.L793:
5852
6104
 	uxth	r3, r9
5853
-	cmp	r3, r5
5854
-	bcs	.L818
5855
-	mla	r3, lr, r3, r6
6105
+	cmp	r5, r3
6106
+	bls	.L794
6107
+	mla	r3, ip, r3, r6
5856
6108
 	add	r9, r9, #1
5857
6109
 	ldr	r7, [r3, #8]
5858
6110
 	cmp	r7, #0
5859
-	bne	.L817
6111
+	bne	.L793
5860
6112
 	mla	r2, r8, r2, r0
5861
6113
 	ldr	r7, [r3]
5862
-	str	ip, [r3, #8]
6114
+	str	lr, [r3, #8]
5863
6115
 	str	r7, [r2, #8]
5864
6116
 	ldr	r3, [r3, #4]
5865
6117
 	str	r3, [r2, #12]
5866
-.L818:
6118
+.L794:
5867
6119
 	adds	r4, r4, #1
5868
-	b	.L816
5869
-.L822:
5870
-	pop	{r4, r5, r6, r7, r8, r9, pc}
5871
-.L824:
6120
+	b	.L792
6121
+.L799:
5872
6122
 	.align	2
5873
-.L823:
6123
+.L798:
5874
6124
 	.word	.LANCHOR2
5875
6125
 	.fnend
5876
6126
 	.size	FtlGcBufAlloc, .-FtlGcBufAlloc
5877
6127
 	.align	1
5878
6128
 	.global	IsBlkInGcList
6129
+	.syntax unified
5879
6130
 	.thumb
5880
6131
 	.thumb_func
6132
+	.fpu softvfp
5881
6133
 	.type	IsBlkInGcList, %function
5882
6134
 IsBlkInGcList:
5883
6135
 	.fnstart
5884
6136
 	@ args = 0, pretend = 0, frame = 0
5885
6137
 	@ frame_needed = 0, uses_anonymous_args = 0
5886
6138
 	@ link register save eliminated.
5887
-	ldr	r2, .L831
6139
+	ldr	r2, .L805
5888
6140
 	ldr	r3, [r2, #1160]
5889
6141
 	ldrh	r2, [r2, #1164]
5890
6142
 	add	r2, r3, r2, lsl #1
5891
-.L826:
6143
+.L801:
5892
6144
 	cmp	r3, r2
5893
-	beq	.L830
5894
-	ldrh	r1, [r3], #2
5895
-	cmp	r1, r0
5896
-	bne	.L826
5897
-	movs	r0, #1
5898
-	bx	lr
5899
-.L830:
6145
+	bne	.L803
5900
6146
 	movs	r0, #0
5901
6147
 	bx	lr
5902
-.L832:
6148
+.L803:
6149
+	ldrh	r1, [r3], #2
6150
+	cmp	r1, r0
6151
+	bne	.L801
6152
+	movs	r0, #1
6153
+	bx	lr
6154
+.L806:
5903
6155
 	.align	2
5904
-.L831:
6156
+.L805:
5905
6157
 	.word	.LANCHOR2
5906
6158
 	.fnend
5907
6159
 	.size	IsBlkInGcList, .-IsBlkInGcList
5908
6160
 	.align	1
5909
6161
 	.global	FtlGcUpdatePage
6162
+	.syntax unified
5910
6163
 	.thumb
5911
6164
 	.thumb_func
6165
+	.fpu softvfp
5912
6166
 	.type	FtlGcUpdatePage, %function
5913
6167
 FtlGcUpdatePage:
5914
6168
 	.fnstart
5915
6169
 	@ args = 0, pretend = 0, frame = 0
5916
6170
 	@ frame_needed = 0, uses_anonymous_args = 0
5917
-	push	{r4, r5, r6, r7, r8, lr}
5918
-	.save {r4, r5, r6, r7, r8, lr}
5919
-	mov	r6, r0
6171
+	push	{r3, r4, r5, r6, r7, lr}
6172
+	.save {r3, r4, r5, r6, r7, lr}
6173
+	mov	r5, r0
5920
6174
 	ubfx	r0, r0, #10, #16
5921
-	mov	r7, r1
5922
-	mov	r8, r2
5923
-	bl	P2V_block_in_plane
5924
-	ldr	r3, .L840
6175
+	mov	r6, r1
6176
+	mov	r7, r2
5925
6177
 	movs	r4, #0
6178
+	bl	P2V_block_in_plane
6179
+	ldr	r3, .L811
5926
6180
 	ldrh	r1, [r3, #1164]
5927
6181
 	ldr	r2, [r3, #1160]
5928
-.L834:
5929
-	uxth	r5, r4
5930
-	cmp	r5, r1
5931
-	bcs	.L838
5932
-	adds	r4, r4, #1
5933
-	add	lr, r2, r4, lsl #1
5934
-	ldrh	lr, [lr, #-2]
5935
-	cmp	lr, r0
5936
-	bne	.L834
5937
-.L838:
5938
-	cmp	r5, r1
5939
-	bne	.L836
5940
-	strh	r0, [r2, r5, lsl #1]	@ movhi
6182
+.L808:
6183
+	uxth	ip, r4
6184
+	cmp	ip, r1
6185
+	bcc	.L810
6186
+	bne	.L809
6187
+	strh	r0, [r2, ip, lsl #1]	@ movhi
5941
6188
 	ldrh	r0, [r3, #1164]
5942
6189
 	adds	r0, r0, #1
5943
6190
 	strh	r0, [r3, #1164]	@ movhi
5944
-.L836:
6191
+	b	.L809
6192
+.L810:
6193
+	adds	r4, r4, #1
6194
+	add	ip, r2, r4, lsl #1
6195
+	ldrh	ip, [ip, #-2]
6196
+	cmp	ip, r0
6197
+	bne	.L808
6198
+.L809:
5945
6199
 	ldrh	r2, [r3, #1172]
5946
6200
 	movs	r0, #12
5947
6201
 	muls	r0, r2, r0
5948
6202
 	ldr	r2, [r3, #1168]
5949
6203
 	adds	r1, r2, r0
5950
-	str	r7, [r1, #4]
5951
-	str	r8, [r1, #8]
5952
-	str	r6, [r2, r0]
6204
+	str	r6, [r1, #4]
6205
+	str	r7, [r1, #8]
6206
+	str	r5, [r2, r0]
5953
6207
 	ldrh	r2, [r3, #1172]
5954
6208
 	adds	r2, r2, #1
5955
6209
 	strh	r2, [r3, #1172]	@ movhi
5956
-	pop	{r4, r5, r6, r7, r8, pc}
5957
-.L841:
6210
+	pop	{r3, r4, r5, r6, r7, pc}
6211
+.L812:
5958
6212
 	.align	2
5959
-.L840:
6213
+.L811:
5960
6214
 	.word	.LANCHOR2
5961
6215
 	.fnend
5962
6216
 	.size	FtlGcUpdatePage, .-FtlGcUpdatePage
5963
6217
 	.align	1
5964
6218
 	.global	FtlGcRefreshOpenBlock
6219
+	.syntax unified
5965
6220
 	.thumb
5966
6221
 	.thumb_func
6222
+	.fpu softvfp
5967
6223
 	.type	FtlGcRefreshOpenBlock, %function
5968
6224
 FtlGcRefreshOpenBlock:
5969
6225
 	.fnstart
..
..
@@ -5972,59 +6228,61 @@
5972
6228
 	push	{r3, r4, r5, lr}
5973
6229
 	.save {r3, r4, r5, lr}
5974
6230
 	mov	r5, r0
5975
-	ldr	r4, .L849
6231
+	ldr	r4, .L820
5976
6232
 	ldrh	r3, [r4, #1174]
5977
6233
 	cmp	r3, r0
5978
-	beq	.L844
6234
+	beq	.L815
5979
6235
 	ldrh	r3, [r4, #1176]
5980
6236
 	cmp	r3, r0
5981
-	beq	.L844
6237
+	beq	.L815
5982
6238
 	ldrh	r3, [r4, #1178]
5983
6239
 	cmp	r3, r0
5984
-	beq	.L844
6240
+	beq	.L815
5985
6241
 	ldrh	r3, [r4, #1180]
5986
6242
 	cmp	r3, r0
5987
-	beq	.L844
5988
-	ldr	r0, .L849+4
5989
-	mov	r1, r5
6243
+	beq	.L815
6244
+	mov	r1, r0
6245
+	ldr	r0, .L820+4
5990
6246
 	bl	printk
5991
6247
 	ldrh	r2, [r4, #1174]
5992
6248
 	movw	r3, #65535
5993
6249
 	cmp	r2, r3
5994
-	bne	.L846
6250
+	bne	.L817
5995
6251
 	strh	r5, [r4, #1174]	@ movhi
5996
-	b	.L844
5997
-.L846:
6252
+.L815:
6253
+	movs	r0, #0
6254
+	pop	{r3, r4, r5, pc}
6255
+.L817:
5998
6256
 	ldrh	r2, [r4, #1176]
5999
6257
 	cmp	r2, r3
6000
-	bne	.L847
6258
+	bne	.L818
6001
6259
 	strh	r5, [r4, #1176]	@ movhi
6002
-	b	.L844
6003
-.L847:
6260
+	b	.L815
6261
+.L818:
6004
6262
 	ldrh	r2, [r4, #1178]
6005
6263
 	cmp	r2, r3
6006
-	bne	.L848
6264
+	bne	.L819
6007
6265
 	strh	r5, [r4, #1178]	@ movhi
6008
-	b	.L844
6009
-.L848:
6266
+	b	.L815
6267
+.L819:
6010
6268
 	ldrh	r2, [r4, #1180]
6011
6269
 	cmp	r2, r3
6012
6270
 	it	eq
6013
6271
 	strheq	r5, [r4, #1180]	@ movhi
6014
-.L844:
6015
-	movs	r0, #0
6016
-	pop	{r3, r4, r5, pc}
6017
-.L850:
6272
+	b	.L815
6273
+.L821:
6018
6274
 	.align	2
6019
-.L849:
6275
+.L820:
6020
6276
 	.word	.LANCHOR2
6021
6277
 	.word	.LC79
6022
6278
 	.fnend
6023
6279
 	.size	FtlGcRefreshOpenBlock, .-FtlGcRefreshOpenBlock
6024
6280
 	.align	1
6025
6281
 	.global	FtlGcRefreshBlock
6282
+	.syntax unified
6026
6283
 	.thumb
6027
6284
 	.thumb_func
6285
+	.fpu softvfp
6028
6286
 	.type	FtlGcRefreshBlock, %function
6029
6287
 FtlGcRefreshBlock:
6030
6288
 	.fnstart
..
..
@@ -6033,62 +6291,64 @@
6033
6291
 	push	{r3, r4, r5, lr}
6034
6292
 	.save {r3, r4, r5, lr}
6035
6293
 	mov	r5, r0
6036
-	ldr	r4, .L861
6294
+	ldr	r4, .L832
6037
6295
 	ldrh	r3, [r4, #1174]
6038
6296
 	cmp	r3, r0
6039
-	beq	.L859
6297
+	beq	.L830
6040
6298
 	ldrh	r3, [r4, #1176]
6041
6299
 	cmp	r3, r0
6042
-	beq	.L859
6300
+	beq	.L830
6043
6301
 	ldrh	r3, [r4, #1178]
6044
6302
 	cmp	r3, r0
6045
-	beq	.L859
6303
+	beq	.L830
6046
6304
 	ldrh	r3, [r4, #1180]
6047
6305
 	cmp	r3, r0
6048
-	beq	.L859
6049
-	ldr	r0, .L861+4
6050
-	mov	r1, r5
6306
+	beq	.L830
6307
+	mov	r1, r0
6308
+	ldr	r0, .L832+4
6051
6309
 	bl	printk
6052
6310
 	ldrh	r2, [r4, #1174]
6053
6311
 	movw	r3, #65535
6054
6312
 	cmp	r2, r3
6055
-	bne	.L853
6313
+	bne	.L824
6056
6314
 	strh	r5, [r4, #1174]	@ movhi
6057
-	b	.L859
6058
-.L853:
6059
-	ldrh	r2, [r4, #1176]
6060
-	cmp	r2, r3
6061
-	bne	.L854
6062
-	strh	r5, [r4, #1176]	@ movhi
6063
-	b	.L859
6064
-.L854:
6065
-	ldrh	r2, [r4, #1178]
6066
-	cmp	r2, r3
6067
-	bne	.L855
6068
-	strh	r5, [r4, #1178]	@ movhi
6069
-	b	.L859
6070
-.L855:
6071
-	ldrh	r2, [r4, #1180]
6072
-	cmp	r2, r3
6073
-	bne	.L860
6074
-	strh	r5, [r4, #1180]	@ movhi
6075
-.L859:
6315
+.L830:
6076
6316
 	movs	r0, #0
6077
6317
 	pop	{r3, r4, r5, pc}
6078
-.L860:
6318
+.L824:
6319
+	ldrh	r2, [r4, #1176]
6320
+	cmp	r2, r3
6321
+	bne	.L825
6322
+	strh	r5, [r4, #1176]	@ movhi
6323
+	b	.L830
6324
+.L825:
6325
+	ldrh	r2, [r4, #1178]
6326
+	cmp	r2, r3
6327
+	bne	.L826
6328
+	strh	r5, [r4, #1178]	@ movhi
6329
+	b	.L830
6330
+.L826:
6331
+	ldrh	r2, [r4, #1180]
6332
+	cmp	r2, r3
6333
+	bne	.L831
6334
+	strh	r5, [r4, #1180]	@ movhi
6335
+	b	.L830
6336
+.L831:
6079
6337
 	mov	r0, #-1
6080
6338
 	pop	{r3, r4, r5, pc}
6081
-.L862:
6339
+.L833:
6082
6340
 	.align	2
6083
-.L861:
6341
+.L832:
6084
6342
 	.word	.LANCHOR2
6085
6343
 	.word	.LC79
6086
6344
 	.fnend
6087
6345
 	.size	FtlGcRefreshBlock, .-FtlGcRefreshBlock
6088
6346
 	.align	1
6089
6347
 	.global	FtlGcMarkBadPhyBlk
6348
+	.syntax unified
6090
6349
 	.thumb
6091
6350
 	.thumb_func
6351
+	.fpu softvfp
6092
6352
 	.type	FtlGcMarkBadPhyBlk, %function
6093
6353
 FtlGcMarkBadPhyBlk:
6094
6354
 	.fnstart
..
..
@@ -6097,52 +6357,52 @@
6097
6357
 	push	{r4, r5, r6, lr}
6098
6358
 	.save {r4, r5, r6, lr}
6099
6359
 	mov	r5, r0
6360
+	ldr	r4, .L842
6100
6361
 	bl	P2V_block_in_plane
6101
-	ldr	r4, .L872
6102
6362
 	mov	r2, r5
6103
-	ldrh	r1, [r4, #1182]
6104
6363
 	mov	r6, r0
6105
-	ldr	r0, .L872+4
6364
+	ldrh	r1, [r4, #1182]
6365
+	ldr	r0, .L842+4
6106
6366
 	bl	printk
6107
6367
 	mov	r0, r6
6108
6368
 	bl	FtlGcRefreshBlock
6109
-	ldr	r3, .L872+8
6110
-	ldr	r2, [r3, #2244]
6369
+	ldr	r3, .L842+8
6370
+	ldr	r2, [r3, #2248]
6111
6371
 	mov	r3, r4
6112
-	cbz	r2, .L864
6113
-	ldr	r1, [r4, #232]
6372
+	cbz	r2, .L835
6373
+	ldr	r1, [r4, #236]
6114
6374
 	ldrh	r2, [r1, r6, lsl #1]
6115
6375
 	cmp	r2, #39
6116
6376
 	itt	hi
6117
6377
 	subhi	r2, r2, #40
6118
6378
 	strhhi	r2, [r1, r6, lsl #1]	@ movhi
6119
-.L864:
6379
+.L835:
6120
6380
 	ldrh	r2, [r3, #1182]
6121
6381
 	movs	r1, #0
6122
-	ldr	r4, .L872+12
6123
-.L865:
6382
+	ldr	r4, .L842+12
6383
+.L836:
6124
6384
 	uxth	r0, r1
6125
-	cmp	r0, r2
6126
-	bcs	.L871
6127
-	adds	r1, r1, #1
6128
-	add	r0, r4, r1, lsl #1
6129
-	ldrh	r0, [r0, #-2]
6130
-	cmp	r0, r5
6131
-	bne	.L865
6132
-	b	.L866
6133
-.L871:
6385
+	cmp	r2, r0
6386
+	bhi	.L838
6134
6387
 	cmp	r2, #15
6135
6388
 	itttt	ls
6136
6389
 	addls	r1, r2, #1
6137
6390
 	strhls	r1, [r3, #1182]	@ movhi
6138
6391
 	addls	r3, r3, r2, lsl #1
6139
6392
 	strhls	r5, [r3, #1184]	@ movhi
6140
-.L866:
6393
+	b	.L837
6394
+.L838:
6395
+	adds	r1, r1, #1
6396
+	add	r0, r4, r1, lsl #1
6397
+	ldrh	r0, [r0, #-2]
6398
+	cmp	r0, r5
6399
+	bne	.L836
6400
+.L837:
6141
6401
 	movs	r0, #0
6142
6402
 	pop	{r4, r5, r6, pc}
6143
-.L873:
6403
+.L843:
6144
6404
 	.align	2
6145
-.L872:
6405
+.L842:
6146
6406
 	.word	.LANCHOR2
6147
6407
 	.word	.LC80
6148
6408
 	.word	.LANCHOR0
..
..
@@ -6151,8 +6411,10 @@
6151
6411
 	.size	FtlGcMarkBadPhyBlk, .-FtlGcMarkBadPhyBlk
6152
6412
 	.align	1
6153
6413
 	.global	FtlGcReFreshBadBlk
6414
+	.syntax unified
6154
6415
 	.thumb
6155
6416
 	.thumb_func
6417
+	.fpu softvfp
6156
6418
 	.type	FtlGcReFreshBadBlk, %function
6157
6419
 FtlGcReFreshBadBlk:
6158
6420
 	.fnstart
..
..
@@ -6160,13 +6422,13 @@
6160
6422
 	@ frame_needed = 0, uses_anonymous_args = 0
6161
6423
 	push	{r4, lr}
6162
6424
 	.save {r4, lr}
6163
-	ldr	r4, .L880
6425
+	ldr	r4, .L850
6164
6426
 	ldrh	r3, [r4, #1182]
6165
-	cbz	r3, .L875
6427
+	cbz	r3, .L845
6166
6428
 	ldrh	r1, [r4, #1174]
6167
6429
 	movw	r2, #65535
6168
6430
 	cmp	r1, r2
6169
-	bne	.L875
6431
+	bne	.L845
6170
6432
 	ldrh	r2, [r4, #1218]
6171
6433
 	cmp	r2, r3
6172
6434
 	itt	cs
..
..
@@ -6180,19 +6442,21 @@
6180
6442
 	ldrh	r3, [r4, #1218]
6181
6443
 	adds	r3, r3, #1
6182
6444
 	strh	r3, [r4, #1218]	@ movhi
6183
-.L875:
6445
+.L845:
6184
6446
 	movs	r0, #0
6185
6447
 	pop	{r4, pc}
6186
-.L881:
6448
+.L851:
6187
6449
 	.align	2
6188
-.L880:
6450
+.L850:
6189
6451
 	.word	.LANCHOR2
6190
6452
 	.fnend
6191
6453
 	.size	FtlGcReFreshBadBlk, .-FtlGcReFreshBadBlk
6192
6454
 	.align	1
6193
6455
 	.global	ftl_memset
6456
+	.syntax unified
6194
6457
 	.thumb
6195
6458
 	.thumb_func
6459
+	.fpu softvfp
6196
6460
 	.type	ftl_memset, %function
6197
6461
 ftl_memset:
6198
6462
 	.fnstart
..
..
@@ -6204,386 +6468,381 @@
6204
6468
 	.size	ftl_memset, .-ftl_memset
6205
6469
 	.align	1
6206
6470
 	.global	BuildFlashLsbPageTable
6471
+	.syntax unified
6207
6472
 	.thumb
6208
6473
 	.thumb_func
6474
+	.fpu softvfp
6209
6475
 	.type	BuildFlashLsbPageTable, %function
6210
6476
 BuildFlashLsbPageTable:
6211
6477
 	.fnstart
6212
6478
 	@ args = 0, pretend = 0, frame = 0
6213
6479
 	@ frame_needed = 0, uses_anonymous_args = 0
6214
-	push	{r4, r5, r6, lr}
6215
-	.save {r4, r5, r6, lr}
6480
+	push	{r3, r4, r5, lr}
6481
+	.save {r3, r4, r5, lr}
6216
6482
 	mov	r4, r1
6217
-	cbnz	r0, .L884
6218
-	ldr	r3, .L926
6219
-.L885:
6483
+	cbnz	r0, .L854
6484
+	ldr	r3, .L909
6485
+.L855:
6220
6486
 	strh	r0, [r3, r0, lsl #1]	@ movhi
6221
6487
 	adds	r0, r0, #1
6222
6488
 	cmp	r0, #512
6223
-	bne	.L885
6224
-.L889:
6489
+	bne	.L855
6490
+.L861:
6225
6491
 	movs	r1, #255
6226
-	ldr	r0, .L926+4
6227
6492
 	mov	r2, #2048
6493
+	ldr	r0, .L909+4
6228
6494
 	uxth	r4, r4
6229
6495
 	bl	ftl_memset
6496
+	ldr	r1, .L909
6230
6497
 	movs	r3, #0
6231
-	ldr	r1, .L926
6232
-	ldr	r0, .L926+8
6233
-	b	.L886
6234
-.L884:
6498
+	ldr	r0, .L909+8
6499
+.L856:
6500
+	uxth	r2, r3
6501
+	cmp	r4, r2
6502
+	bhi	.L889
6503
+	pop	{r3, r4, r5, pc}
6504
+.L854:
6235
6505
 	cmp	r0, #1
6236
-	bne	.L887
6237
-	ldr	r5, .L926
6506
+	bne	.L857
6507
+	ldr	r1, .L909
6238
6508
 	movs	r3, #0
6239
-.L888:
6509
+.L860:
6510
+	cmp	r3, #3
6240
6511
 	uxth	r2, r3
6241
-	cmp	r2, #3
6242
-	ite	ls
6243
-	movls	r0, #0
6244
-	movhi	r0, #1
6245
-	bics	r1, r0, r3
6512
+	bls	.L858
6513
+	tst	r2, #1
6246
6514
 	ite	ne
6247
-	movne	r1, #2
6248
-	moveq	r1, #3
6249
-	rsb	r1, r1, r2, lsl #1
6250
-	cmp	r0, #0
6251
-	it	ne
6252
-	movne	r2, r1
6253
-	strh	r2, [r5, r3, lsl #1]	@ movhi
6515
+	movne	r0, #3
6516
+	moveq	r0, #2
6517
+	rsb	r2, r0, r2, lsl #1
6518
+	uxth	r2, r2
6519
+.L858:
6520
+	strh	r2, [r1, r3, lsl #1]	@ movhi
6254
6521
 	adds	r3, r3, #1
6255
6522
 	cmp	r3, #512
6256
-	bne	.L888
6257
-	b	.L889
6258
-.L887:
6523
+	bne	.L860
6524
+	b	.L861
6525
+.L857:
6259
6526
 	cmp	r0, #2
6260
-	bne	.L890
6261
-	ldr	r0, .L926
6262
-	movs	r3, #0
6263
-.L891:
6264
-	uxth	r2, r3
6265
-	lsls	r1, r2, #1
6266
-	subs	r1, r1, #1
6527
+	bne	.L862
6528
+	ldr	r1, .L909
6529
+	movs	r2, #0
6530
+.L864:
6531
+	uxth	r3, r2
6267
6532
 	cmp	r2, #1
6268
-	it	hi
6269
-	movhi	r2, r1
6270
-	strh	r2, [r0, r3, lsl #1]	@ movhi
6271
-	adds	r3, r3, #1
6272
-	cmp	r3, #512
6273
-	bne	.L891
6274
-	b	.L889
6275
-.L890:
6533
+	ittt	hi
6534
+	lslhi	r3, r3, #1
6535
+	addhi	r3, r3, #-1
6536
+	uxthhi	r3, r3
6537
+	strh	r3, [r1, r2, lsl #1]	@ movhi
6538
+	adds	r2, r2, #1
6539
+	cmp	r2, #512
6540
+	bne	.L864
6541
+	b	.L861
6542
+.L862:
6276
6543
 	cmp	r0, #3
6277
-	bne	.L892
6278
-	ldr	r5, .L926
6544
+	bne	.L865
6545
+	ldr	r1, .L909
6279
6546
 	movs	r3, #0
6280
-.L893:
6547
+.L868:
6548
+	cmp	r3, #5
6281
6549
 	uxth	r2, r3
6282
-	cmp	r2, #5
6283
-	ite	ls
6284
-	movls	r0, #0
6285
-	movhi	r0, #1
6286
-	bics	r1, r0, r3
6550
+	bls	.L866
6551
+	tst	r2, #1
6287
6552
 	ite	ne
6288
-	movne	r1, #4
6289
-	moveq	r1, #5
6290
-	rsb	r1, r1, r2, lsl #1
6291
-	cmp	r0, #0
6292
-	it	ne
6293
-	movne	r2, r1
6294
-	strh	r2, [r5, r3, lsl #1]	@ movhi
6553
+	movne	r0, #5
6554
+	moveq	r0, #4
6555
+	rsb	r2, r0, r2, lsl #1
6556
+	uxth	r2, r2
6557
+.L866:
6558
+	strh	r2, [r1, r3, lsl #1]	@ movhi
6295
6559
 	adds	r3, r3, #1
6296
6560
 	cmp	r3, #512
6297
-	bne	.L893
6298
-	b	.L889
6299
-.L892:
6561
+	bne	.L868
6562
+	b	.L861
6563
+.L865:
6300
6564
 	cmp	r0, #4
6301
6565
 	mov	r3, #0
6302
-	bne	.L894
6303
-	ldr	r2, .L926+12
6304
-	strh	r3, [r2, #148]	@ movhi
6566
+	bne	.L869
6567
+	ldr	r2, .L909+12
6568
+	strh	r3, [r2, #156]	@ movhi
6305
6569
 	movs	r3, #1
6306
-	strh	r0, [r2, #156]	@ movhi
6307
-	strh	r3, [r2, #150]	@ movhi
6308
-	movs	r3, #2
6309
-	strh	r3, [r2, #152]	@ movhi
6310
-	movs	r3, #3
6311
-	strh	r3, [r2, #154]	@ movhi
6312
-	movs	r3, #5
6313
6570
 	strh	r3, [r2, #158]	@ movhi
6314
-	movs	r3, #7
6571
+	movs	r3, #2
6315
6572
 	strh	r3, [r2, #160]	@ movhi
6573
+	movs	r3, #3
6574
+	strh	r3, [r2, #162]	@ movhi
6575
+	movs	r3, #5
6576
+	strh	r3, [r2, #166]	@ movhi
6577
+	movs	r3, #7
6578
+	strh	r3, [r2, #168]	@ movhi
6316
6579
 	movs	r3, #8
6317
-	strh	r3, [r2, #162]!	@ movhi
6318
-.L895:
6580
+	strh	r0, [r2, #164]	@ movhi
6581
+	strh	r3, [r2, #170]!	@ movhi
6582
+.L871:
6319
6583
 	tst	r3, #1
6320
6584
 	ite	ne
6321
6585
 	movne	r1, #7
6322
6586
 	moveq	r1, #6
6323
6587
 	rsb	r1, r1, r3, lsl #1
6324
6588
 	adds	r3, r3, #1
6325
-	strh	r1, [r2, #2]!	@ movhi
6326
6589
 	uxth	r3, r3
6590
+	strh	r1, [r2, #2]!	@ movhi
6327
6591
 	cmp	r3, #512
6328
-	bne	.L895
6329
-	b	.L889
6330
-.L894:
6592
+	bne	.L871
6593
+	b	.L861
6594
+.L869:
6331
6595
 	cmp	r0, #5
6332
-	bne	.L896
6333
-	ldr	r2, .L926
6334
-.L897:
6335
-	strh	r3, [r2, r3, lsl #1]	@ movhi
6596
+	bne	.L872
6597
+	ldr	r2, .L909+12
6598
+	add	r1, r2, #156
6599
+.L873:
6600
+	strh	r3, [r1, r3, lsl #1]	@ movhi
6336
6601
 	adds	r3, r3, #1
6337
6602
 	cmp	r3, #16
6338
-	bne	.L897
6339
-	ldr	r2, .L926+16
6340
-.L898:
6603
+	bne	.L873
6604
+	adds	r2, r2, #186
6605
+.L874:
6341
6606
 	strh	r3, [r2, #2]!	@ movhi
6342
6607
 	adds	r3, r3, #2
6343
6608
 	uxth	r3, r3
6344
6609
 	cmp	r3, #1008
6345
-	bne	.L898
6346
-	b	.L889
6347
-.L896:
6610
+	bne	.L874
6611
+	b	.L861
6612
+.L872:
6348
6613
 	cmp	r0, #6
6349
-	bne	.L899
6350
-	ldr	r5, .L926
6351
-.L900:
6352
-	uxth	r2, r3
6353
-	cmp	r2, #5
6354
-	ite	ls
6355
-	movls	r0, #0
6356
-	movhi	r0, #1
6357
-	add	r1, r2, r2, lsl #1
6358
-	bics	r6, r0, r3
6614
+	bne	.L875
6615
+	ldr	r0, .L909
6616
+	mov	r1, r3
6617
+.L878:
6618
+	cmp	r1, #5
6619
+	uxth	r2, r1
6620
+	bls	.L876
6621
+	tst	r2, #1
6359
6622
 	ite	ne
6360
-	movne	r6, #10
6361
-	moveq	r6, #12
6362
-	subs	r1, r1, r6
6363
-	cmp	r0, #0
6364
-	it	ne
6365
-	movne	r2, r1
6366
-	strh	r2, [r5, r3, lsl #1]	@ movhi
6367
-	adds	r3, r3, #1
6368
-	cmp	r3, #512
6369
-	bne	.L900
6370
-	b	.L889
6371
-.L899:
6372
-	cmp	r0, #9
6373
-	bne	.L901
6374
-	ldr	r2, .L926+12
6375
-	movw	r1, #1021
6376
-	strh	r3, [r2, #148]	@ movhi
6377
-	movs	r3, #1
6378
-	strh	r3, [r2, #150]	@ movhi
6379
-	movs	r3, #2
6380
-	strh	r3, [r2, #152]!	@ movhi
6381
-	movs	r3, #3
6382
-.L902:
6383
-	strh	r3, [r2, #2]!	@ movhi
6384
-	adds	r3, r3, #2
6623
+	movne	r2, #12
6624
+	moveq	r2, #10
6625
+	subs	r2, r3, r2
6626
+	uxth	r2, r2
6627
+.L876:
6628
+	strh	r2, [r0, r1, lsl #1]	@ movhi
6629
+	adds	r1, r1, #1
6630
+	cmp	r1, #512
6631
+	add	r3, r3, #3
6385
6632
 	uxth	r3, r3
6386
-	cmp	r3, r1
6387
-	bne	.L902
6388
-	b	.L889
6389
-.L901:
6633
+	bne	.L878
6634
+	b	.L861
6635
+.L875:
6636
+	cmp	r0, #9
6637
+	bne	.L879
6638
+	ldr	r2, .L909+12
6639
+	movw	r1, #1021
6640
+	strh	r3, [r2, #156]	@ movhi
6641
+	movs	r3, #1
6642
+	strh	r3, [r2, #158]	@ movhi
6643
+	mov	r3, r2
6644
+	movs	r2, #2
6645
+	strh	r2, [r3, #160]!	@ movhi
6646
+	movs	r2, #3
6647
+.L880:
6648
+	strh	r2, [r3, #2]!	@ movhi
6649
+	adds	r2, r2, #2
6650
+	uxth	r2, r2
6651
+	cmp	r2, r1
6652
+	bne	.L880
6653
+	b	.L861
6654
+.L879:
6390
6655
 	cmp	r0, #10
6391
-	bne	.L903
6392
-	ldr	r2, .L926
6393
-.L904:
6394
-	strh	r3, [r2, r3, lsl #1]	@ movhi
6656
+	bne	.L881
6657
+	ldr	r2, .L909+12
6658
+	add	r1, r2, #156
6659
+.L882:
6660
+	strh	r3, [r1, r3, lsl #1]	@ movhi
6395
6661
 	adds	r3, r3, #1
6396
6662
 	cmp	r3, #63
6397
-	bne	.L904
6398
-	ldr	r2, .L926+20
6663
+	bne	.L882
6664
+	add	r2, r2, #280
6399
6665
 	movw	r1, #961
6400
-.L905:
6666
+.L883:
6401
6667
 	strh	r3, [r2, #2]!	@ movhi
6402
6668
 	adds	r3, r3, #2
6403
6669
 	uxth	r3, r3
6404
6670
 	cmp	r3, r1
6405
-	bne	.L905
6406
-	b	.L889
6407
-.L903:
6671
+	bne	.L883
6672
+	b	.L861
6673
+.L881:
6408
6674
 	cmp	r0, #11
6409
-	bne	.L906
6410
-	ldr	r2, .L926
6675
+	bne	.L884
6676
+	ldr	r2, .L909+12
6411
6677
 	movs	r3, #0
6412
-.L907:
6413
-	strh	r3, [r2, r3, lsl #1]	@ movhi
6678
+	add	r1, r2, #156
6679
+.L885:
6680
+	strh	r3, [r1, r3, lsl #1]	@ movhi
6414
6681
 	adds	r3, r3, #1
6415
6682
 	cmp	r3, #8
6416
-	bne	.L907
6417
-	ldr	r1, .L926+24
6418
-.L908:
6683
+	bne	.L885
6684
+	adds	r2, r2, #170
6685
+.L887:
6419
6686
 	tst	r3, #1
6420
6687
 	ite	ne
6421
-	movne	r2, #7
6422
-	moveq	r2, #6
6423
-	rsb	r2, r2, r3, lsl #1
6688
+	movne	r1, #7
6689
+	moveq	r1, #6
6690
+	rsb	r1, r1, r3, lsl #1
6424
6691
 	adds	r3, r3, #1
6425
-	strh	r2, [r1, #2]!	@ movhi
6426
6692
 	uxth	r3, r3
6693
+	strh	r1, [r2, #2]!	@ movhi
6427
6694
 	cmp	r3, #512
6428
-	bne	.L908
6429
-	b	.L889
6430
-.L906:
6695
+	bne	.L887
6696
+	b	.L861
6697
+.L884:
6431
6698
 	cmp	r0, #12
6432
-	bne	.L889
6433
-	ldr	r3, .L926+12
6699
+	bne	.L861
6700
+	ldr	r3, .L909+12
6434
6701
 	movs	r2, #0
6435
-	strh	r2, [r3, #148]	@ movhi
6702
+	strh	r2, [r3, #156]	@ movhi
6436
6703
 	movs	r2, #1
6437
-	strh	r2, [r3, #150]	@ movhi
6704
+	strh	r2, [r3, #158]	@ movhi
6438
6705
 	movs	r2, #2
6439
-	strh	r2, [r3, #152]	@ movhi
6706
+	strh	r2, [r3, #160]	@ movhi
6440
6707
 	movs	r2, #3
6441
-	strh	r2, [r3, #154]!	@ movhi
6708
+	strh	r2, [r3, #162]!	@ movhi
6442
6709
 	movs	r2, #4
6443
-.L909:
6710
+.L888:
6444
6711
 	subs	r1, r2, #1
6445
6712
 	add	r1, r1, r2, lsr #1
6446
6713
 	adds	r2, r2, #1
6447
-	strh	r1, [r3, #2]!	@ movhi
6448
6714
 	uxth	r2, r2
6715
+	strh	r1, [r3, #2]!	@ movhi
6449
6716
 	cmp	r2, #512
6450
-	bne	.L909
6451
-	b	.L889
6452
-.L886:
6453
-	uxth	r2, r3
6454
-	cmp	r2, r4
6455
-	bcs	.L925
6717
+	bne	.L888
6718
+	b	.L861
6719
+.L889:
6456
6720
 	ldrh	r2, [r1, r3, lsl #1]
6457
6721
 	adds	r3, r3, #1
6458
6722
 	add	r5, r0, r2, lsl #1
6459
6723
 	strh	r2, [r5, #1220]	@ movhi
6460
-	b	.L886
6461
-.L925:
6462
-	pop	{r4, r5, r6, pc}
6463
-.L927:
6724
+	b	.L856
6725
+.L910:
6464
6726
 	.align	2
6465
-.L926:
6466
-	.word	.LANCHOR0+148
6727
+.L909:
6728
+	.word	.LANCHOR0+156
6467
6729
 	.word	.LANCHOR2+1220
6468
6730
 	.word	.LANCHOR2
6469
6731
 	.word	.LANCHOR0
6470
-	.word	.LANCHOR0+178
6471
-	.word	.LANCHOR0+272
6472
-	.word	.LANCHOR0+162
6473
6732
 	.fnend
6474
6733
 	.size	BuildFlashLsbPageTable, .-BuildFlashLsbPageTable
6475
6734
 	.align	1
6476
6735
 	.global	FlashDieInfoInit
6736
+	.syntax unified
6477
6737
 	.thumb
6478
6738
 	.thumb_func
6739
+	.fpu softvfp
6479
6740
 	.type	FlashDieInfoInit, %function
6480
6741
 FlashDieInfoInit:
6481
6742
 	.fnstart
6482
6743
 	@ args = 0, pretend = 0, frame = 0
6483
6744
 	@ frame_needed = 0, uses_anonymous_args = 0
6484
-	push	{r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
6485
-	.save {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
6745
+	ldr	r3, .L925
6746
+	push	{r4, r5, r6, r7, r8, r9, r10, lr}
6747
+	.save {r4, r5, r6, r7, r8, r9, r10, lr}
6486
6748
 	movs	r7, #0
6487
-	ldr	r3, .L942
6488
-	ldr	r4, .L942+4
6489
-	ldr	r6, .L942+8
6490
-	ldrh	r0, [r3, #482]
6491
-	addw	fp, r4, #2068
6492
-	strb	r7, [r4, #2230]
6493
-	mov	r9, r4
6749
+	ldr	r4, .L925+4
6750
+	ldr	r6, .L925+8
6751
+	ldrh	r0, [r3, #478]
6752
+	addw	r10, r4, #2072
6753
+	strb	r7, [r4, #2234]
6754
+	mov	r9, r10
6494
6755
 	strb	r7, [r6, #3268]
6495
6756
 	bl	FlashBlockAlignInit
6496
-	mov	r1, r7
6497
6757
 	movs	r2, #8
6498
-	addw	r0, r4, #2232
6499
-	bl	ftl_memset
6500
6758
 	mov	r1, r7
6759
+	addw	r0, r4, #2236
6760
+	bl	ftl_memset
6501
6761
 	movs	r2, #32
6502
-	addw	r0, r4, #1172
6503
-	bl	ftl_memset
6504
-	addw	r0, r4, #2100
6505
6762
 	mov	r1, r7
6506
-	movs	r2, #128
6763
+	addw	r0, r4, #1180
6507
6764
 	bl	ftl_memset
6508
-	ldr	r5, [r4, #44]
6765
+	movs	r2, #128
6766
+	mov	r1, r7
6767
+	addw	r0, r4, #2104
6768
+	bl	ftl_memset
6769
+	ldr	r5, [r4, #48]
6509
6770
 	add	r8, r5, #1
6510
-.L930:
6511
-	mov	r0, r8
6512
-	add	r1, fp, r7, lsl #3
6771
+.L913:
6513
6772
 	ldrb	r2, [r5]	@ zero_extendqisi2
6773
+	add	r1, r10, r7, lsl #3
6774
+	mov	r0, r8
6514
6775
 	bl	FlashMemCmp8
6515
-	ldr	r10, .L942+12
6516
-	cbnz	r0, .L929
6517
-	ldrb	r3, [r9, #2230]	@ zero_extendqisi2
6518
-	add	r2, r9, r3, lsl #2
6519
-	str	r0, [r2, #1172]
6776
+	cbnz	r0, .L912
6777
+	ldrb	r3, [r4, #2234]	@ zero_extendqisi2
6778
+	add	r2, r4, r3, lsl #2
6779
+	str	r0, [r2, #1180]
6520
6780
 	adds	r2, r3, #1
6521
-	add	r3, r3, r9
6522
-	strb	r2, [r9, #2230]
6523
-	strb	r7, [r3, #2232]
6524
-.L929:
6781
+	add	r3, r3, r4
6782
+	strb	r2, [r4, #2234]
6783
+	strb	r7, [r3, #2236]
6784
+.L912:
6525
6785
 	adds	r7, r7, #1
6526
6786
 	cmp	r7, #4
6527
-	bne	.L930
6528
-	ldrb	r3, [r4, #2230]	@ zero_extendqisi2
6529
-	ldr	r2, .L942+4
6787
+	bne	.L913
6788
+	ldrb	r3, [r4, #2234]	@ zero_extendqisi2
6530
6789
 	strb	r3, [r6, #3268]
6531
6790
 	ldrb	r3, [r5, #8]	@ zero_extendqisi2
6532
6791
 	cmp	r3, #2
6533
-	beq	.L931
6534
-.L935:
6535
-	ldrb	r3, [r5, #13]	@ zero_extendqisi2
6536
-	ldrb	r2, [r4, #2230]	@ zero_extendqisi2
6537
-	smulbb	r2, r2, r3
6538
-	ldrh	r3, [r5, #14]
6539
-	smulbb	r3, r2, r3
6792
+	beq	.L914
6793
+.L918:
6794
+	ldrh	r2, [r5, #14]
6795
+	ldrb	r3, [r4, #2234]	@ zero_extendqisi2
6796
+	smulbb	r3, r3, r2
6797
+	ldrb	r2, [r5, #13]	@ zero_extendqisi2
6798
+	smulbb	r3, r3, r2
6540
6799
 	strh	r3, [r6, #3270]	@ movhi
6541
-	pop	{r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
6542
-.L931:
6543
-	ldr	r9, [r2, #4]
6800
+	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
6801
+.L914:
6802
+	ldr	r10, [r4, #40]
6544
6803
 	movs	r7, #0
6545
-	mov	fp, r2
6546
-.L934:
6547
-	mov	r0, r8
6548
-	add	r1, r10, r7, lsl #3
6804
+.L917:
6549
6805
 	ldrb	r2, [r5]	@ zero_extendqisi2
6806
+	add	r1, r9, r7, lsl #3
6807
+	mov	r0, r8
6550
6808
 	bl	FlashMemCmp8
6551
-	cbnz	r0, .L932
6552
-	ldrb	r0, [r5, #13]	@ zero_extendqisi2
6809
+	cbnz	r0, .L915
6553
6810
 	ldrh	r3, [r5, #14]
6554
-	ldrb	r2, [fp, #2230]	@ zero_extendqisi2
6555
-	mul	r0, r9, r0
6556
-	and	r3, r3, #65280
6557
-	add	r1, fp, r2, lsl #2
6558
-	muls	r3, r0, r3
6559
-	str	r3, [r1, #1172]
6811
+	ldrb	r2, [r4, #2234]	@ zero_extendqisi2
6812
+	and	r1, r3, #65280
6813
+	ldrb	r3, [r5, #13]	@ zero_extendqisi2
6814
+	mul	r3, r10, r3
6815
+	muls	r3, r1, r3
6816
+	add	r1, r4, r2, lsl #2
6817
+	str	r3, [r1, #1180]
6560
6818
 	ldrb	r0, [r5, #23]	@ zero_extendqisi2
6561
-	cbz	r0, .L933
6819
+	cbz	r0, .L916
6562
6820
 	lsls	r3, r3, #1
6563
-	str	r3, [r1, #1172]
6564
-.L933:
6821
+	str	r3, [r1, #1180]
6822
+.L916:
6565
6823
 	adds	r3, r2, #1
6566
6824
 	add	r2, r2, r4
6567
-	strb	r3, [r4, #2230]
6568
-	strb	r7, [r2, #2232]
6569
-.L932:
6825
+	strb	r3, [r4, #2234]
6826
+	strb	r7, [r2, #2236]
6827
+.L915:
6570
6828
 	adds	r7, r7, #1
6571
6829
 	cmp	r7, #4
6572
-	bne	.L934
6573
-	b	.L935
6574
-.L943:
6830
+	bne	.L917
6831
+	b	.L918
6832
+.L926:
6575
6833
 	.align	2
6576
-.L942:
6834
+.L925:
6577
6835
 	.word	.LANCHOR1
6578
6836
 	.word	.LANCHOR0
6579
6837
 	.word	.LANCHOR2
6580
-	.word	.LANCHOR0+2068
6581
6838
 	.fnend
6582
6839
 	.size	FlashDieInfoInit, .-FlashDieInfoInit
6583
6840
 	.align	1
6584
6841
 	.global	ftl_read_flash_info
6842
+	.syntax unified
6585
6843
 	.thumb
6586
6844
 	.thumb_func
6845
+	.fpu softvfp
6587
6846
 	.type	ftl_read_flash_info, %function
6588
6847
 ftl_read_flash_info:
6589
6848
 	.fnstart
..
..
@@ -6591,23 +6850,23 @@
6591
6850
 	@ frame_needed = 0, uses_anonymous_args = 0
6592
6851
 	push	{r4, r5, r6, lr}
6593
6852
 	.save {r4, r5, r6, lr}
6594
-	movs	r1, #0
6595
6853
 	movs	r2, #11
6854
+	movs	r1, #0
6596
6855
 	mov	r4, r0
6597
-	bl	ftl_memset
6598
-	ldr	r3, .L948
6599
6856
 	movs	r5, #1
6600
-	ldr	r2, [r3, #44]
6601
-	ldrb	r1, [r2, #9]	@ zero_extendqisi2
6602
-	ldr	r2, [r3, #4]
6603
-	smulbb	r2, r1, r2
6857
+	bl	ftl_memset
6858
+	ldr	r3, .L930
6859
+	ldr	r2, [r3, #48]
6860
+	ldr	r1, [r3, #40]
6861
+	ldrb	r2, [r2, #9]	@ zero_extendqisi2
6862
+	smulbb	r2, r2, r1
6604
6863
 	strh	r2, [r4, #4]	@ unaligned
6605
-	ldrb	r2, [r3, #2312]	@ zero_extendqisi2
6864
+	ldrb	r2, [r3, #2316]	@ zero_extendqisi2
6606
6865
 	strb	r2, [r4, #7]
6607
-	ldr	r2, [r3, #2428]
6866
+	ldr	r2, [r3, #2432]
6608
6867
 	str	r2, [r4]	@ unaligned
6609
-	ldr	r2, [r3, #44]
6610
-	addw	r3, r3, #2232
6868
+	ldr	r2, [r3, #48]
6869
+	addw	r3, r3, #2236
6611
6870
 	ldrb	r0, [r3, #-2]	@ zero_extendqisi2
6612
6871
 	ldrb	r1, [r2, #9]	@ zero_extendqisi2
6613
6872
 	strb	r1, [r4, #6]
..
..
@@ -6617,29 +6876,31 @@
6617
6876
 	strb	r2, [r4, #9]
6618
6877
 	movs	r2, #0
6619
6878
 	strb	r2, [r4, #10]
6620
-.L945:
6879
+.L928:
6621
6880
 	uxtb	r1, r2
6622
-	cmp	r1, r0
6623
-	bcs	.L947
6881
+	cmp	r0, r1
6882
+	bhi	.L929
6883
+	pop	{r4, r5, r6, pc}
6884
+.L929:
6624
6885
 	ldrb	r1, [r2, r3]	@ zero_extendqisi2
6625
6886
 	adds	r2, r2, #1
6626
-	lsl	r6, r5, r1
6627
-	ldrb	r1, [r4, #10]	@ zero_extendqisi2
6887
+	ldrb	r6, [r4, #10]	@ zero_extendqisi2
6888
+	lsl	r1, r5, r1
6628
6889
 	orrs	r1, r1, r6
6629
6890
 	strb	r1, [r4, #10]
6630
-	b	.L945
6631
-.L947:
6632
-	pop	{r4, r5, r6, pc}
6633
-.L949:
6891
+	b	.L928
6892
+.L931:
6634
6893
 	.align	2
6635
-.L948:
6894
+.L930:
6636
6895
 	.word	.LANCHOR0
6637
6896
 	.fnend
6638
6897
 	.size	ftl_read_flash_info, .-ftl_read_flash_info
6639
6898
 	.align	1
6640
6899
 	.global	FtlMemInit
6900
+	.syntax unified
6641
6901
 	.thumb
6642
6902
 	.thumb_func
6903
+	.fpu softvfp
6643
6904
 	.type	FtlMemInit, %function
6644
6905
 FtlMemInit:
6645
6906
 	.fnstart
..
..
@@ -6647,16 +6908,25 @@
6647
6908
 	@ frame_needed = 0, uses_anonymous_args = 0
6648
6909
 	push	{r3, r4, r5, r6, r7, r8, r9, lr}
6649
6910
 	.save {r3, r4, r5, r6, r7, r8, r9, lr}
6650
-	mov	r0, #1024
6651
-	ldr	r4, .L1054
6652
-	movs	r6, #0
6653
-	ldr	r5, .L1054+4
6654
6911
 	movw	r3, #65535
6912
+	ldr	r4, .L1034
6913
+	movs	r6, #0
6914
+	mov	r0, #1024
6655
6915
 	movs	r7, #12
6916
+	ldr	r5, .L1034+4
6656
6917
 	mov	r8, #36
6918
+	str	r3, [r4, #3284]
6919
+	strh	r3, [r4, #1174]	@ movhi
6920
+	strh	r3, [r4, #1176]	@ movhi
6921
+	strh	r3, [r4, #1178]	@ movhi
6922
+	strh	r3, [r4, #1180]	@ movhi
6923
+	movs	r3, #32
6924
+	strh	r3, [r4, #1120]	@ movhi
6925
+	movs	r3, #128
6926
+	strh	r3, [r4, #1122]	@ movhi
6657
6927
 	strh	r6, [r4, #3272]	@ movhi
6658
6928
 	str	r6, [r4, #3276]
6659
-	str	r6, [r4, #604]
6929
+	str	r6, [r4, #1116]
6660
6930
 	str	r6, [r4, #508]
6661
6931
 	str	r6, [r4, #512]
6662
6932
 	str	r6, [r4, #496]
..
..
@@ -6667,47 +6937,38 @@
6667
6937
 	str	r6, [r4, #476]
6668
6938
 	str	r6, [r4, #516]
6669
6939
 	str	r6, [r4, #520]
6670
-	str	r6, [r4, #236]
6940
+	str	r6, [r4, #240]
6671
6941
 	str	r6, [r4, #528]
6672
6942
 	str	r6, [r4, #532]
6673
6943
 	str	r6, [r4, #3280]
6674
6944
 	str	r6, [r4, #1132]
6675
-	str	r3, [r4, #3284]
6676
6945
 	str	r6, [r4, #3288]
6677
6946
 	str	r6, [r4, #1124]
6678
6947
 	str	r6, [r4, #3292]
6679
-	strh	r3, [r4, #1174]	@ movhi
6680
-	strh	r3, [r4, #1176]	@ movhi
6681
-	strh	r3, [r4, #1178]	@ movhi
6682
-	strh	r3, [r4, #1180]	@ movhi
6683
-	movs	r3, #32
6684
6948
 	strh	r6, [r4, #1128]	@ movhi
6685
-	strh	r3, [r4, #1120]	@ movhi
6686
-	movs	r3, #128
6687
6949
 	strh	r6, [r4, #1182]	@ movhi
6688
-	strh	r3, [r4, #1122]	@ movhi
6689
6950
 	strh	r6, [r4, #3296]	@ movhi
6690
6951
 	strh	r6, [r4, #1218]	@ movhi
6691
-	ldrh	r1, [r5, #2394]
6952
+	ldrh	r1, [r5, #2396]
6692
6953
 	bl	__aeabi_idiv
6693
-	ldrh	r3, [r5, #2320]
6694
-	str	r6, [r5, #2440]
6954
+	ldrh	r3, [r5, #2324]
6955
+	str	r0, [r4, #3300]
6956
+	str	r6, [r5, #2444]
6695
6957
 	lsls	r3, r3, #2
6696
6958
 	cmp	r0, r3
6697
-	str	r0, [r4, #3300]
6698
-	ldrh	r0, [r5, #2392]
6959
+	ldrh	r0, [r5, #2394]
6699
6960
 	it	hi
6700
6961
 	strhi	r3, [r4, #3300]
6701
6962
 	lsls	r0, r0, #1
6702
6963
 	bl	ftl_malloc
6703
6964
 	str	r0, [r4, #1160]
6704
-	ldrh	r0, [r5, #2392]
6965
+	ldrh	r0, [r5, #2394]
6705
6966
 	muls	r0, r7, r0
6706
6967
 	bl	ftl_malloc
6707
-	ldrh	r6, [r5, #2320]
6968
+	ldrh	r6, [r5, #2324]
6969
+	str	r0, [r4, #1168]
6708
6970
 	mul	r6, r8, r6
6709
6971
 	lsl	r9, r6, #3
6710
-	str	r0, [r4, #1168]
6711
6972
 	mov	r0, r9
6712
6973
 	bl	ftl_malloc
6713
6974
 	str	r0, [r4, #3304]
..
..
@@ -6719,20 +6980,20 @@
6719
6980
 	str	r0, [r4, #3312]
6720
6981
 	mov	r0, r6
6721
6982
 	bl	ftl_malloc
6722
-	str	r0, [r4, #228]
6983
+	str	r0, [r4, #232]
6723
6984
 	mov	r0, r6
6724
6985
 	bl	ftl_malloc
6725
6986
 	str	r0, [r4, #1152]
6726
6987
 	ldr	r0, [r4, #3300]
6727
6988
 	mul	r0, r8, r0
6728
6989
 	bl	ftl_malloc
6729
-	ldrh	r6, [r5, #2398]
6730
-	ldrh	r3, [r5, #2320]
6990
+	ldrh	r3, [r5, #2324]
6991
+	ldrh	r6, [r5, #2400]
6992
+	str	r0, [r5, #2448]
6731
6993
 	lsls	r3, r3, #1
6994
+	mov	r0, r6
6732
6995
 	adds	r3, r3, #1
6733
6996
 	str	r3, [r4, #1156]
6734
-	str	r0, [r5, #2444]
6735
-	mov	r0, r6
6736
6997
 	bl	ftl_malloc
6737
6998
 	str	r0, [r4, #3316]
6738
6999
 	mov	r0, r6
..
..
@@ -6758,272 +7019,274 @@
6758
7019
 	ldr	r0, [r4, #1156]
6759
7020
 	muls	r0, r7, r0
6760
7021
 	bl	ftl_malloc
6761
-	ldrh	r3, [r5, #2320]
6762
-	ldrh	r6, [r5, #2400]
6763
-	muls	r6, r3, r6
7022
+	ldrh	r3, [r5, #2402]
7023
+	ldrh	r6, [r5, #2324]
6764
7024
 	str	r0, [r4, #1140]
7025
+	muls	r6, r3, r6
6765
7026
 	mov	r0, r6
6766
7027
 	bl	ftl_malloc
6767
7028
 	str	r0, [r4, #3340]
6768
7029
 	lsls	r0, r6, #3
6769
7030
 	bl	ftl_malloc
6770
-	ldrh	r3, [r5, #2400]
7031
+	ldrh	r3, [r5, #2402]
6771
7032
 	str	r0, [r4, #3344]
6772
7033
 	ldr	r0, [r4, #1156]
6773
7034
 	muls	r0, r3, r0
6774
7035
 	bl	ftl_malloc
6775
-	ldrh	r3, [r5, #2400]
7036
+	ldrh	r3, [r5, #2402]
6776
7037
 	str	r0, [r4, #1148]
6777
7038
 	ldr	r0, [r4, #3300]
6778
7039
 	muls	r0, r3, r0
6779
7040
 	bl	ftl_malloc
6780
7041
 	str	r0, [r4, #3348]
6781
-	ldrh	r0, [r5, #2330]
7042
+	ldrh	r0, [r5, #2334]
6782
7043
 	lsls	r0, r0, #1
6783
7044
 	uxth	r0, r0
6784
7045
 	strh	r0, [r4, #3352]	@ movhi
6785
7046
 	bl	ftl_malloc
7047
+	ldrh	r3, [r4, #3352]
6786
7048
 	str	r0, [r4, #3356]
6787
-	ldrh	r0, [r4, #3352]
6788
-	addw	r0, r0, #547
6789
-	lsrs	r0, r0, #9
6790
-	strh	r0, [r4, #3352]	@ movhi
6791
-	lsls	r0, r0, #9
7049
+	ldr	r0, .L1034+8
7050
+	addw	r3, r3, #547
7051
+	lsrs	r3, r3, #9
7052
+	and	r0, r0, r3, lsl #9
7053
+	strh	r3, [r4, #3352]	@ movhi
6792
7054
 	bl	ftl_malloc
6793
-	ldrh	r6, [r5, #2330]
6794
-	lsls	r6, r6, #1
7055
+	ldrh	r6, [r5, #2334]
6795
7056
 	str	r0, [r4, #3360]
6796
7057
 	adds	r0, r0, #32
6797
-	str	r0, [r4, #232]
7058
+	str	r0, [r4, #236]
7059
+	lsls	r6, r6, #1
6798
7060
 	mov	r0, r6
6799
7061
 	bl	ftl_malloc
6800
7062
 	str	r0, [r4, #3364]
6801
7063
 	mov	r0, r6
6802
7064
 	bl	ftl_malloc
6803
-	ldr	r6, [r5, #2416]
7065
+	ldr	r6, [r5, #2420]
7066
+	str	r0, [r4, #300]
6804
7067
 	lsls	r6, r6, #1
6805
-	str	r0, [r4, #296]
6806
7068
 	mov	r0, r6
6807
7069
 	bl	ftl_malloc
6808
7070
 	str	r0, [r4, #3368]
6809
7071
 	mov	r0, r6
6810
7072
 	bl	ftl_malloc
6811
7073
 	str	r0, [r4, #3372]
6812
-	ldrh	r0, [r5, #2330]
7074
+	ldrh	r0, [r5, #2334]
6813
7075
 	lsrs	r0, r0, #3
6814
7076
 	adds	r0, r0, #4
6815
7077
 	bl	ftl_malloc
6816
-	str	r0, [r4, #472]
6817
-	ldrh	r0, [r5, #2408]
7078
+	str	r0, [r5, #32]
7079
+	ldrh	r0, [r5, #2412]
6818
7080
 	lsls	r0, r0, #1
6819
7081
 	bl	ftl_malloc
6820
-	str	r0, [r5, #2436]
6821
-	ldrh	r0, [r5, #2408]
7082
+	str	r0, [r5, #2440]
7083
+	ldrh	r0, [r5, #2412]
6822
7084
 	lsls	r0, r0, #1
6823
7085
 	bl	ftl_malloc
6824
7086
 	str	r0, [r4, #3376]
6825
-	ldrh	r0, [r5, #2408]
7087
+	ldrh	r0, [r5, #2412]
6826
7088
 	lsls	r0, r0, #2
6827
7089
 	bl	ftl_malloc
6828
7090
 	str	r0, [r4, #3380]
6829
-	ldrh	r0, [r5, #2410]
7091
+	ldrh	r0, [r5, #2414]
6830
7092
 	lsls	r0, r0, #2
6831
7093
 	bl	ftl_malloc
6832
-	ldrh	r2, [r5, #2410]
7094
+	ldrh	r2, [r5, #2414]
6833
7095
 	movs	r1, #0
6834
-	lsls	r2, r2, #2
6835
7096
 	str	r0, [r4, #3384]
7097
+	lsls	r2, r2, #2
6836
7098
 	bl	ftl_memset
6837
-	ldrh	r6, [r5, #2424]
7099
+	ldrh	r6, [r5, #2428]
6838
7100
 	lsls	r6, r6, #2
6839
7101
 	mov	r0, r6
6840
7102
 	bl	ftl_malloc
6841
7103
 	str	r0, [r4, #3388]
6842
7104
 	mov	r0, r6
6843
7105
 	bl	ftl_malloc
6844
-	ldr	r6, .L1054+8
6845
7106
 	str	r0, [r4, #3392]
6846
-	ldr	r0, [r5, #2416]
7107
+	ldr	r0, [r5, #2420]
7108
+	ldr	r6, .L1034+12
6847
7109
 	lsls	r0, r0, #2
6848
7110
 	bl	ftl_malloc
6849
7111
 	str	r0, [r4, #3396]
6850
-	ldrh	r0, [r5, #2426]
7112
+	ldrh	r0, [r5, #2430]
6851
7113
 	muls	r0, r7, r0
6852
7114
 	bl	ftl_malloc
6853
-	ldrh	r3, [r5, #2426]
6854
-	str	r0, [r4, #460]
6855
-	ldrh	r0, [r5, #2398]
7115
+	ldrh	r3, [r5, #2430]
7116
+	str	r0, [r4, #464]
7117
+	ldrh	r0, [r5, #2400]
6856
7118
 	muls	r0, r3, r0
6857
7119
 	bl	ftl_malloc
6858
-	ldrh	r3, [r5, #2330]
7120
+	ldrh	r3, [r5, #2334]
6859
7121
 	str	r0, [r4, #3400]
6860
7122
 	movs	r0, #6
6861
7123
 	muls	r0, r3, r0
6862
7124
 	bl	ftl_malloc
6863
-	ldrh	r3, [r5, #2386]
6864
-	adds	r3, r3, #31
6865
-	asrs	r3, r3, #5
6866
-	strh	r3, [r4, #3404]	@ movhi
6867
-	str	r0, [r4, #288]
6868
-	ldrh	r0, [r5, #2342]
7125
+	str	r0, [r4, #292]
7126
+	ldrh	r0, [r5, #2388]
7127
+	ldrh	r3, [r5, #2346]
7128
+	adds	r0, r0, #31
7129
+	asrs	r0, r0, #5
7130
+	strh	r0, [r4, #3404]	@ movhi
6869
7131
 	muls	r0, r3, r0
6870
7132
 	lsls	r0, r0, #2
6871
7133
 	bl	ftl_malloc
6872
7134
 	ldrh	r2, [r4, #3404]
6873
-	ldrh	r7, [r5, #2342]
6874
7135
 	movs	r3, #1
7136
+	ldrh	r7, [r5, #2346]
7137
+	str	r0, [r5, #2484]
6875
7138
 	lsls	r2, r2, #2
6876
7139
 	mov	r1, r2
6877
-	str	r0, [r5, #2480]
6878
-.L952:
7140
+.L934:
6879
7141
 	cmp	r3, r7
6880
-	bcs	.L1052
6881
-	ldr	r0, [r5, #2480]
7142
+	bcc	.L935
7143
+	ldr	r2, .L1034+16
7144
+	movs	r1, #0
7145
+	add	r3, r2, r3, lsl #2
7146
+	adds	r2, r2, #56
7147
+	adds	r3, r3, #24
7148
+.L936:
7149
+	cmp	r2, r3
7150
+	bne	.L937
7151
+	ldr	r3, [r4, #3368]
7152
+	cbnz	r3, .L938
7153
+.L940:
7154
+	ldr	r1, .L1034+20
7155
+	ldr	r0, .L1034+24
7156
+	bl	printk
7157
+	mov	r0, #-1
7158
+	pop	{r3, r4, r5, r6, r7, r8, r9, pc}
7159
+.L935:
7160
+	ldr	r0, [r5, #2484]
6882
7161
 	adds	r3, r3, #1
6883
7162
 	add	r0, r0, r1
6884
7163
 	add	r1, r1, r2
6885
7164
 	str	r0, [r6, #4]!
6886
-	b	.L952
6887
-.L1052:
6888
-	ldr	r2, .L1054+12
6889
-	movs	r1, #0
6890
-.L954:
6891
-	cmp	r3, #8
6892
-	beq	.L1053
6893
-	add	r0, r2, r3, lsl #2
6894
-	adds	r3, r3, #1
6895
-	str	r1, [r0, #28]
6896
-	b	.L954
6897
-.L1053:
6898
-	ldr	r2, [r4, #3368]
6899
-	ldr	r3, .L1054
6900
-	cbnz	r2, .L956
6901
-.L958:
6902
-	ldr	r1, .L1054+16
6903
-	ldr	r0, .L1054+20
6904
-	bl	printk
6905
-	mov	r0, #-1
6906
-	pop	{r3, r4, r5, r6, r7, r8, r9, pc}
6907
-.L1055:
7165
+	b	.L934
7166
+.L937:
7167
+	str	r1, [r3, #4]!
7168
+	b	.L936
7169
+.L1035:
6908
7170
 	.align	2
6909
-.L1054:
7171
+.L1034:
6910
7172
 	.word	.LANCHOR2
6911
7173
 	.word	.LANCHOR0
6912
-	.word	.LANCHOR0+2480
6913
-	.word	.LANCHOR0+2452
7174
+	.word	33553920
7175
+	.word	.LANCHOR0+2484
7176
+	.word	.LANCHOR0+2456
6914
7177
 	.word	.LANCHOR3
6915
7178
 	.word	.LC81
6916
-.L956:
6917
-	ldr	r2, [r3, #3372]
6918
-	cmp	r2, #0
6919
-	beq	.L958
6920
-	ldr	r2, [r3, #3388]
6921
-	cmp	r2, #0
6922
-	beq	.L958
6923
-	ldr	r2, [r3, #3396]
6924
-	cmp	r2, #0
6925
-	beq	.L958
6926
-	ldr	r2, [r3, #460]
6927
-	cmp	r2, #0
6928
-	beq	.L958
6929
-	ldr	r2, [r3, #3400]
6930
-	cmp	r2, #0
6931
-	beq	.L958
6932
-	ldr	r2, [r3, #288]
6933
-	cmp	r2, #0
6934
-	beq	.L958
6935
-	ldr	r2, [r5, #2480]
6936
-	cmp	r2, #0
6937
-	beq	.L958
6938
-	ldr	r3, [r3, #296]
7179
+.L938:
7180
+	ldr	r3, [r4, #3372]
6939
7181
 	cmp	r3, #0
6940
-	beq	.L958
6941
-	ldr	r2, [r4, #1160]
6942
-	ldr	r3, .L1056
6943
-	cmp	r2, #0
6944
-	beq	.L958
6945
-	ldr	r2, [r3, #1168]
6946
-	cmp	r2, #0
6947
-	beq	.L958
6948
-	ldr	r2, [r3, #3304]
6949
-	cmp	r2, #0
6950
-	beq	.L958
6951
-	ldr	r2, [r3, #3312]
6952
-	cmp	r2, #0
6953
-	beq	.L958
6954
-	ldr	r2, [r3, #228]
6955
-	cmp	r2, #0
6956
-	beq	.L958
6957
-	ldr	r2, [r3, #1152]
6958
-	cmp	r2, #0
6959
-	beq	.L958
6960
-	ldr	r2, [r3, #3308]
6961
-	cmp	r2, #0
6962
-	beq	.L958
6963
-	ldr	r2, [r3, #3316]
6964
-	cmp	r2, #0
6965
-	beq	.L958
6966
-	ldr	r2, [r3, #3320]
6967
-	cmp	r2, #0
6968
-	beq	.L958
6969
-	ldr	r3, [r3, #3324]
7182
+	beq	.L940
7183
+	ldr	r3, [r4, #3388]
6970
7184
 	cmp	r3, #0
6971
-	beq	.L958
6972
-	ldr	r2, [r4, #1144]
6973
-	ldr	r3, .L1056
6974
-	cmp	r2, #0
6975
-	beq	.L958
6976
-	ldr	r2, [r3, #3332]
6977
-	cmp	r2, #0
6978
-	beq	.L958
6979
-	ldr	r2, [r3, #3336]
6980
-	cmp	r2, #0
6981
-	beq	.L958
6982
-	ldr	r2, [r3, #1140]
6983
-	cmp	r2, #0
6984
-	beq	.L958
6985
-	ldr	r2, [r3, #3340]
6986
-	cmp	r2, #0
6987
-	beq	.L958
6988
-	ldr	r2, [r3, #3344]
6989
-	cmp	r2, #0
6990
-	beq	.L958
6991
-	ldr	r2, [r3, #1148]
6992
-	cmp	r2, #0
6993
-	beq	.L958
6994
-	ldr	r2, [r3, #232]
6995
-	cmp	r2, #0
6996
-	beq	.L958
6997
-	ldr	r3, [r3, #3356]
7185
+	beq	.L940
7186
+	ldr	r3, [r4, #3396]
6998
7187
 	cmp	r3, #0
6999
-	beq	.L958
7000
-	ldr	r3, .L1056+4
7001
-	ldr	r3, [r3, #2436]
7188
+	beq	.L940
7189
+	ldr	r3, [r4, #464]
7002
7190
 	cmp	r3, #0
7003
-	beq	.L958
7004
-	ldr	r3, .L1056
7191
+	beq	.L940
7192
+	ldr	r3, [r4, #3400]
7193
+	cmp	r3, #0
7194
+	beq	.L940
7195
+	ldr	r3, [r4, #292]
7196
+	cmp	r3, #0
7197
+	beq	.L940
7198
+	ldr	r3, [r5, #2484]
7199
+	cmp	r3, #0
7200
+	beq	.L940
7201
+	ldr	r3, [r4, #300]
7202
+	cmp	r3, #0
7203
+	beq	.L940
7204
+	ldr	r3, [r4, #1160]
7205
+	cmp	r3, #0
7206
+	beq	.L940
7207
+	ldr	r3, [r4, #1168]
7208
+	cmp	r3, #0
7209
+	beq	.L940
7210
+	ldr	r3, [r4, #3304]
7211
+	cmp	r3, #0
7212
+	beq	.L940
7213
+	ldr	r3, [r4, #3312]
7214
+	cmp	r3, #0
7215
+	beq	.L940
7216
+	ldr	r3, [r4, #232]
7217
+	cmp	r3, #0
7218
+	beq	.L940
7219
+	ldr	r3, [r4, #1152]
7220
+	cmp	r3, #0
7221
+	beq	.L940
7222
+	ldr	r3, [r4, #3308]
7223
+	cmp	r3, #0
7224
+	beq	.L940
7225
+	ldr	r3, [r4, #3316]
7226
+	cmp	r3, #0
7227
+	beq	.L940
7228
+	ldr	r3, [r4, #3320]
7229
+	cmp	r3, #0
7230
+	beq	.L940
7231
+	ldr	r3, [r4, #3324]
7232
+	cmp	r3, #0
7233
+	beq	.L940
7234
+	ldr	r3, [r4, #1144]
7235
+	cmp	r3, #0
7236
+	beq	.L940
7237
+	ldr	r3, [r4, #3332]
7238
+	cmp	r3, #0
7239
+	beq	.L940
7240
+	ldr	r3, [r4, #3336]
7241
+	cmp	r3, #0
7242
+	beq	.L940
7243
+	ldr	r3, [r4, #1140]
7244
+	cmp	r3, #0
7245
+	beq	.L940
7246
+	ldr	r3, [r4, #3340]
7247
+	cmp	r3, #0
7248
+	beq	.L940
7249
+	ldr	r3, [r4, #3344]
7250
+	cmp	r3, #0
7251
+	beq	.L940
7252
+	ldr	r3, [r4, #1148]
7253
+	cmp	r3, #0
7254
+	beq	.L940
7255
+	ldr	r3, [r4, #236]
7256
+	cmp	r3, #0
7257
+	beq	.L940
7258
+	ldr	r3, [r4, #3356]
7259
+	cmp	r3, #0
7260
+	beq	.L940
7261
+	ldr	r3, .L1036
7262
+	ldr	r3, [r3, #2440]
7263
+	cmp	r3, #0
7264
+	beq	.L940
7265
+	ldr	r3, .L1036+4
7005
7266
 	ldr	r2, [r3, #3376]
7006
7267
 	cmp	r2, #0
7007
-	beq	.L958
7268
+	beq	.L940
7008
7269
 	ldr	r2, [r3, #3380]
7009
7270
 	cmp	r2, #0
7010
-	beq	.L958
7271
+	beq	.L940
7011
7272
 	ldr	r3, [r3, #3384]
7012
7273
 	cmp	r3, #0
7013
-	beq	.L958
7274
+	beq	.L940
7014
7275
 	movs	r0, #0
7015
7276
 	pop	{r3, r4, r5, r6, r7, r8, r9, pc}
7016
-.L1057:
7277
+.L1037:
7017
7278
 	.align	2
7018
-.L1056:
7019
-	.word	.LANCHOR2
7279
+.L1036:
7020
7280
 	.word	.LANCHOR0
7281
+	.word	.LANCHOR2
7021
7282
 	.fnend
7022
7283
 	.size	FtlMemInit, .-FtlMemInit
7023
7284
 	.align	1
7024
7285
 	.global	FtlBbt2Bitmap
7286
+	.syntax unified
7025
7287
 	.thumb
7026
7288
 	.thumb_func
7289
+	.fpu softvfp
7027
7290
 	.type	FtlBbt2Bitmap, %function
7028
7291
 FtlBbt2Bitmap:
7029
7292
 	.fnstart
..
..
@@ -7031,101 +7294,107 @@
7031
7294
 	@ frame_needed = 0, uses_anonymous_args = 0
7032
7295
 	push	{r3, r4, r5, r6, r7, lr}
7033
7296
 	.save {r3, r4, r5, r6, r7, lr}
7034
-	mov	r4, r0
7035
-	ldr	r3, .L1063
7036
-	mov	r0, r1
7037
7297
 	mov	r5, r1
7298
+	ldr	r3, .L1043
7299
+	mov	r4, r0
7038
7300
 	movs	r1, #0
7301
+	mov	r0, r5
7039
7302
 	movs	r7, #1
7040
7303
 	ldrh	r2, [r3, #3404]
7041
7304
 	lsls	r2, r2, #2
7042
7305
 	bl	ftl_memset
7043
-	ldr	r1, .L1063+4
7306
+	ldr	r0, .L1043+4
7044
7307
 	subs	r2, r4, #2
7308
+	movw	ip, #65535
7045
7309
 	addw	r4, r4, #1022
7046
-	movw	lr, #65535
7047
-.L1060:
7310
+.L1040:
7048
7311
 	ldrh	r3, [r2, #2]!
7049
-	cmp	r3, lr
7050
-	beq	.L1058
7051
-	lsrs	r0, r3, #5
7312
+	cmp	r3, ip
7313
+	beq	.L1038
7314
+	lsrs	r6, r3, #5
7052
7315
 	and	r3, r3, #31
7053
7316
 	lsl	r3, r7, r3
7054
7317
 	cmp	r2, r4
7055
-	ldr	r6, [r5, r0, lsl #2]
7056
-	orr	r3, r3, r6
7057
-	str	r3, [r5, r0, lsl #2]
7058
-	ldrh	r3, [r1, #2458]
7318
+	ldr	r1, [r5, r6, lsl #2]
7319
+	orr	r3, r3, r1
7320
+	str	r3, [r5, r6, lsl #2]
7321
+	ldrh	r3, [r0, #2462]
7059
7322
 	add	r3, r3, #1
7060
-	strh	r3, [r1, #2458]	@ movhi
7061
-	bne	.L1060
7062
-.L1058:
7323
+	strh	r3, [r0, #2462]	@ movhi
7324
+	bne	.L1040
7325
+.L1038:
7063
7326
 	pop	{r3, r4, r5, r6, r7, pc}
7064
-.L1064:
7327
+.L1044:
7065
7328
 	.align	2
7066
-.L1063:
7329
+.L1043:
7067
7330
 	.word	.LANCHOR2
7068
7331
 	.word	.LANCHOR0
7069
7332
 	.fnend
7070
7333
 	.size	FtlBbt2Bitmap, .-FtlBbt2Bitmap
7071
7334
 	.align	1
7072
7335
 	.global	FtlBbtMemInit
7336
+	.syntax unified
7073
7337
 	.thumb
7074
7338
 	.thumb_func
7339
+	.fpu softvfp
7075
7340
 	.type	FtlBbtMemInit, %function
7076
7341
 FtlBbtMemInit:
7077
7342
 	.fnstart
7078
7343
 	@ args = 0, pretend = 0, frame = 0
7079
7344
 	@ frame_needed = 0, uses_anonymous_args = 0
7080
7345
 	@ link register save eliminated.
7081
-	ldr	r0, .L1066
7346
+	ldr	r0, .L1046
7082
7347
 	movw	r3, #65535
7083
-	movs	r1, #255
7084
7348
 	movs	r2, #16
7085
-	add	r0, r0, #2464
7086
-	strh	r3, [r0, #-12]	@ movhi
7349
+	movs	r1, #255
7350
+	strh	r3, [r0, #2456]	@ movhi
7087
7351
 	movs	r3, #0
7088
-	strh	r3, [r0, #-6]	@ movhi
7352
+	strh	r3, [r0, #2462]	@ movhi
7353
+	addw	r0, r0, #2468
7089
7354
 	b	ftl_memset
7090
-.L1067:
7355
+.L1047:
7091
7356
 	.align	2
7092
-.L1066:
7357
+.L1046:
7093
7358
 	.word	.LANCHOR0
7094
7359
 	.fnend
7095
7360
 	.size	FtlBbtMemInit, .-FtlBbtMemInit
7096
7361
 	.align	1
7097
7362
 	.global	FtlFreeSysBlkQueueInit
7363
+	.syntax unified
7098
7364
 	.thumb
7099
7365
 	.thumb_func
7366
+	.fpu softvfp
7100
7367
 	.type	FtlFreeSysBlkQueueInit, %function
7101
7368
 FtlFreeSysBlkQueueInit:
7102
7369
 	.fnstart
7103
7370
 	@ args = 0, pretend = 0, frame = 0
7104
7371
 	@ frame_needed = 0, uses_anonymous_args = 0
7105
-	ldr	r3, .L1069
7372
+	ldr	r3, .L1049
7106
7373
 	mov	r2, #2048
7107
7374
 	push	{r4, lr}
7108
7375
 	.save {r4, lr}
7109
7376
 	movs	r4, #0
7110
-	strh	r0, [r3, #2512]	@ movhi
7111
-	addw	r0, r3, #2520
7112
7377
 	mov	r1, r4
7113
-	strh	r4, [r3, #2514]	@ movhi
7114
-	strh	r4, [r3, #2516]	@ movhi
7378
+	strh	r0, [r3, #2516]	@ movhi
7379
+	addw	r0, r3, #2524
7115
7380
 	strh	r4, [r3, #2518]	@ movhi
7381
+	strh	r4, [r3, #2520]	@ movhi
7382
+	strh	r4, [r3, #2522]	@ movhi
7116
7383
 	bl	ftl_memset
7117
7384
 	mov	r0, r4
7118
7385
 	pop	{r4, pc}
7119
-.L1070:
7386
+.L1050:
7120
7387
 	.align	2
7121
-.L1069:
7388
+.L1049:
7122
7389
 	.word	.LANCHOR0
7123
7390
 	.fnend
7124
7391
 	.size	FtlFreeSysBlkQueueInit, .-FtlFreeSysBlkQueueInit
7125
7392
 	.align	1
7126
7393
 	.global	ftl_free_no_use_map_blk
7394
+	.syntax unified
7127
7395
 	.thumb
7128
7396
 	.thumb_func
7397
+	.fpu softvfp
7129
7398
 	.type	ftl_free_no_use_map_blk, %function
7130
7399
 ftl_free_no_use_map_blk:
7131
7400
 	.fnstart
..
..
@@ -7136,159 +7405,142 @@
7136
7405
 	movs	r1, #0
7137
7406
 	ldrh	r2, [r0, #10]
7138
7407
 	mov	r4, r0
7139
-	ldr	r6, [r0, #20]
7408
+	ldr	r5, [r0, #20]
7140
7409
 	ldr	r7, [r0, #12]
7141
-	ldr	r5, [r0, #24]
7410
+	ldr	r6, [r0, #24]
7142
7411
 	lsls	r2, r2, #1
7143
-	mov	r0, r6
7412
+	mov	r0, r5
7144
7413
 	bl	ftl_memset
7145
-	movs	r1, #0
7146
-.L1072:
7147
-	ldrh	r2, [r4, #6]
7148
-	uxth	r3, r1
7149
-	cmp	r2, r3
7150
-	bls	.L1091
7151
-	ldr	r2, [r5, r3, lsl #2]
7152
-	movs	r0, #0
7153
-	ubfx	r2, r2, #10, #16
7154
-.L1073:
7155
-	ldrh	lr, [r4, #10]
7156
-	uxth	r3, r0
7157
-	cmp	lr, r3
7158
-	bls	.L1092
7159
-	ldrh	lr, [r7, r3, lsl #1]
7160
-	cmp	lr, r2
7161
-	bne	.L1074
7162
-	cbz	r2, .L1074
7163
-	ldrh	lr, [r6, r3, lsl #1]
7164
-	add	lr, lr, #1
7165
-	strh	lr, [r6, r3, lsl #1]	@ movhi
7166
-.L1074:
7167
-	adds	r0, r0, #1
7168
-	b	.L1073
7169
-.L1092:
7170
-	adds	r1, r1, #1
7171
-	b	.L1072
7172
-.L1091:
7173
-	ldr	r3, .L1095
7174
-	mov	r8, #0
7175
-	mov	r10, r8
7176
-	ldrh	r2, [r3, #2390]
7414
+	movs	r3, #0
7415
+.L1052:
7416
+	ldrh	r1, [r4, #6]
7417
+	uxth	r2, r3
7418
+	cmp	r1, r2
7419
+	bhi	.L1056
7420
+	ldr	r3, .L1071
7421
+	movs	r6, #0
7422
+	mov	r9, r6
7423
+	mov	fp, r6
7424
+	ldrh	r2, [r3, #2392]
7177
7425
 	ldrh	r3, [r4]
7178
-	strh	r2, [r6, r3, lsl #1]	@ movhi
7179
-	mov	r2, r8
7180
-	ldrh	r9, [r6]
7181
-.L1077:
7426
+	strh	r2, [r5, r3, lsl #1]	@ movhi
7427
+	ldrh	r10, [r5]
7428
+.L1057:
7182
7429
 	ldrh	r3, [r4, #10]
7183
-	uxth	r5, r8
7184
-	cmp	r3, r5
7185
-	bls	.L1093
7186
-	ldrh	r3, [r6, r5, lsl #1]
7187
-	lsls	r1, r5, #1
7188
-	cmp	r9, r3
7189
-	bls	.L1078
7190
-	ldrh	r0, [r7, r5, lsl #1]
7191
-	add	fp, r7, r1
7192
-	cbnz	r0, .L1079
7193
-	b	.L1080
7194
-.L1078:
7195
-	cbnz	r3, .L1080
7196
-	ldrh	r0, [r7, r1]
7197
-	add	fp, r7, r1
7198
-	cbz	r0, .L1080
7199
-	mov	r5, r2
7200
-	b	.L1082
7201
-.L1079:
7202
-	cbnz	r3, .L1094
7203
-	mov	r9, r3
7204
-.L1082:
7430
+	uxth	r1, r6
7431
+	cmp	r3, r1
7432
+	bhi	.L1061
7433
+	mov	r0, r9
7434
+	pop	{r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
7435
+.L1056:
7436
+	uxth	r2, r3
7437
+	ldr	r1, [r6, r2, lsl #2]
7438
+	movs	r2, #0
7439
+	ubfx	r1, r1, #10, #16
7440
+.L1053:
7441
+	ldrh	ip, [r4, #10]
7442
+	uxth	r0, r2
7443
+	cmp	ip, r0
7444
+	bhi	.L1055
7445
+	adds	r3, r3, #1
7446
+	b	.L1052
7447
+.L1055:
7448
+	uxth	r0, r2
7449
+	ldrh	ip, [r7, r0, lsl #1]
7450
+	cmp	ip, r1
7451
+	bne	.L1054
7452
+	cbz	r1, .L1054
7453
+	ldrh	ip, [r5, r0, lsl #1]
7454
+	add	ip, ip, #1
7455
+	strh	ip, [r5, r0, lsl #1]	@ movhi
7456
+.L1054:
7457
+	adds	r2, r2, #1
7458
+	b	.L1053
7459
+.L1061:
7460
+	uxth	r2, r6
7461
+	ldrh	r3, [r5, r2, lsl #1]
7462
+	lsl	r8, r2, #1
7463
+	cmp	r10, r3
7464
+	bls	.L1058
7465
+	ldrh	r0, [r7, r2, lsl #1]
7466
+	add	r8, r8, r7
7467
+	cbnz	r0, .L1059
7468
+.L1060:
7469
+	adds	r6, r6, #1
7470
+	b	.L1057
7471
+.L1058:
7472
+	cmp	r3, #0
7473
+	bne	.L1060
7474
+	ldrh	r0, [r7, r2, lsl #1]
7475
+	add	r8, r8, r7
7476
+	cmp	r0, #0
7477
+	beq	.L1060
7478
+.L1062:
7205
7479
 	movs	r1, #1
7206
7480
 	bl	FtlFreeSysBlkQueueIn
7207
-	strh	r10, [fp]	@ movhi
7481
+	strh	fp, [r8]	@ movhi
7208
7482
 	ldrh	r3, [r4, #8]
7209
-	mov	r2, r5
7210
7483
 	subs	r3, r3, #1
7211
7484
 	strh	r3, [r4, #8]	@ movhi
7212
-.L1080:
7213
-	add	r8, r8, #1
7214
-	b	.L1077
7215
-.L1094:
7216
-	mov	r2, r5
7217
-	mov	r9, r3
7218
-	b	.L1080
7219
-.L1093:
7220
-	mov	r0, r2
7221
-	pop	{r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
7222
-.L1096:
7485
+	b	.L1060
7486
+.L1059:
7487
+	mov	r9, r1
7488
+	mov	r10, r3
7489
+	cmp	r3, #0
7490
+	beq	.L1062
7491
+	b	.L1060
7492
+.L1072:
7223
7493
 	.align	2
7224
-.L1095:
7494
+.L1071:
7225
7495
 	.word	.LANCHOR0
7226
7496
 	.fnend
7227
7497
 	.size	ftl_free_no_use_map_blk, .-ftl_free_no_use_map_blk
7228
7498
 	.align	1
7229
7499
 	.global	FtlL2PDataInit
7500
+	.syntax unified
7230
7501
 	.thumb
7231
7502
 	.thumb_func
7503
+	.fpu softvfp
7232
7504
 	.type	FtlL2PDataInit, %function
7233
7505
 FtlL2PDataInit:
7234
7506
 	.fnstart
7235
7507
 	@ args = 0, pretend = 0, frame = 0
7236
7508
 	@ frame_needed = 0, uses_anonymous_args = 0
7237
-	push	{r3, r4, r5, r6, r7, r8, r9, lr}
7238
-	.save {r3, r4, r5, r6, r7, r8, r9, lr}
7509
+	push	{r3, r4, r5, r6, r7, lr}
7510
+	.save {r3, r4, r5, r6, r7, lr}
7239
7511
 	movs	r1, #0
7240
-	ldr	r4, .L1101
7241
-	movs	r7, #0
7242
-	ldr	r5, .L1101+4
7243
-	mov	r6, r7
7244
-	ldr	r2, [r4, #2416]
7245
-	mov	r9, r4
7512
+	ldr	r4, .L1076
7513
+	movs	r7, #12
7514
+	ldr	r5, .L1076+4
7515
+	ldr	r2, [r4, #2420]
7246
7516
 	ldr	r0, [r5, #3372]
7247
7517
 	lsls	r2, r2, #1
7248
7518
 	bl	ftl_memset
7249
-	ldrh	r3, [r4, #2398]
7250
-	ldrh	r2, [r4, #2426]
7519
+	ldrh	r3, [r4, #2400]
7251
7520
 	movs	r1, #255
7521
+	ldrh	r2, [r4, #2430]
7252
7522
 	ldr	r0, [r5, #3400]
7253
7523
 	muls	r2, r3, r2
7254
7524
 	bl	ftl_memset
7525
+	movs	r2, #0
7255
7526
 	mov	r3, r5
7256
-	movs	r5, #12
7257
-	mov	r2, r4
7258
-	movw	lr, #65535
7259
-.L1098:
7260
-	ldrh	ip, [r2, #2426]
7261
-	adds	r0, r7, #1
7262
-	uxth	r7, r7
7263
-	ldr	r1, .L1101
7264
-	cmp	ip, r7
7265
-	bls	.L1100
7266
-	mul	r1, r5, r7
7267
-	ldr	ip, [r3, #460]
7268
-	add	r8, ip, r1
7269
-	str	r6, [r8, #4]
7270
-	strh	lr, [ip, r1]	@ movhi
7271
-	ldr	r4, [r3, #460]
7272
-	add	ip, r4, r1
7273
-	ldrh	r1, [r9, #2398]
7274
-	muls	r1, r7, r1
7275
-	ldr	r7, [r3, #3400]
7276
-	bic	r1, r1, #3
7277
-	add	r1, r1, r7
7278
-	mov	r7, r0
7279
-	str	r1, [ip, #8]
7280
-	b	.L1098
7281
-.L1100:
7282
-	movw	r2, #65535
7283
-	strh	r2, [r3, #3410]	@ movhi
7284
-	strh	r2, [r3, #3408]	@ movhi
7285
-	ldr	r2, [r1, #2416]
7527
+	movw	r1, #65535
7528
+	mov	ip, r2
7529
+.L1074:
7530
+	ldrh	r5, [r4, #2430]
7531
+	uxth	r0, r2
7532
+	adds	r6, r2, #1
7533
+	cmp	r5, r0
7534
+	bhi	.L1075
7535
+	ldr	r2, [r4, #2420]
7536
+	strh	r1, [r3, #3410]	@ movhi
7537
+	strh	r1, [r3, #3408]	@ movhi
7286
7538
 	strh	r2, [r3, #3418]	@ movhi
7287
7539
 	movw	r2, #61634
7288
7540
 	strh	r2, [r3, #3412]	@ movhi
7289
7541
 	ldrh	r2, [r3, #3452]
7290
7542
 	strh	r2, [r3, #3416]	@ movhi
7291
-	ldrh	r2, [r1, #2424]
7543
+	ldrh	r2, [r4, #2428]
7292
7544
 	strh	r2, [r3, #3414]	@ movhi
7293
7545
 	ldr	r2, [r3, #3368]
7294
7546
 	str	r2, [r3, #3420]
..
..
@@ -7298,18 +7550,37 @@
7298
7550
 	str	r2, [r3, #3428]
7299
7551
 	ldr	r2, [r3, #3388]
7300
7552
 	str	r2, [r3, #3432]
7301
-	pop	{r3, r4, r5, r6, r7, r8, r9, pc}
7302
-.L1102:
7553
+	pop	{r3, r4, r5, r6, r7, pc}
7554
+.L1075:
7555
+	uxth	r2, r2
7556
+	ldr	r0, [r3, #464]
7557
+	mul	r5, r7, r2
7558
+	add	lr, r0, r5
7559
+	str	ip, [lr, #4]
7560
+	strh	r1, [r0, r5]	@ movhi
7561
+	ldr	r0, [r3, #464]
7562
+	add	r0, r0, r5
7563
+	ldrh	r5, [r4, #2400]
7564
+	muls	r2, r5, r2
7565
+	ldr	r5, [r3, #3400]
7566
+	bic	r2, r2, #3
7567
+	add	r2, r2, r5
7568
+	str	r2, [r0, #8]
7569
+	mov	r2, r6
7570
+	b	.L1074
7571
+.L1077:
7303
7572
 	.align	2
7304
-.L1101:
7573
+.L1076:
7305
7574
 	.word	.LANCHOR0
7306
7575
 	.word	.LANCHOR2
7307
7576
 	.fnend
7308
7577
 	.size	FtlL2PDataInit, .-FtlL2PDataInit
7309
7578
 	.align	1
7310
7579
 	.global	FtlVariablesInit
7580
+	.syntax unified
7311
7581
 	.thumb
7312
7582
 	.thumb_func
7583
+	.fpu softvfp
7313
7584
 	.type	FtlVariablesInit, %function
7314
7585
 FtlVariablesInit:
7315
7586
 	.fnstart
..
..
@@ -7317,56 +7588,58 @@
7317
7588
 	@ frame_needed = 0, uses_anonymous_args = 0
7318
7589
 	push	{r4, r5, r6, lr}
7319
7590
 	.save {r4, r5, r6, lr}
7320
-	movs	r4, #0
7321
-	ldr	r6, .L1104
7322
7591
 	movw	r3, #65535
7323
-	ldr	r5, .L1104+4
7592
+	ldr	r6, .L1079
7593
+	movs	r4, #0
7324
7594
 	mov	r1, r4
7325
-	ldrh	r2, [r6, #2408]
7326
-	ldr	r0, [r6, #2436]
7595
+	ldr	r5, .L1079+4
7596
+	ldrh	r2, [r6, #2412]
7597
+	ldr	r0, [r6, #2440]
7327
7598
 	strh	r3, [r5, #3460]	@ movhi
7328
7599
 	mov	r3, #-1
7329
-	lsls	r2, r2, #1
7330
7600
 	str	r3, [r5, #3472]
7601
+	lsls	r2, r2, #1
7331
7602
 	str	r4, [r5, #3456]
7332
7603
 	str	r4, [r5, #3464]
7333
7604
 	str	r4, [r5, #3468]
7334
-	str	r4, [r6, #2244]
7335
-	strh	r4, [r6, #2434]	@ movhi
7605
+	str	r4, [r6, #2248]
7606
+	strh	r4, [r6, #2438]	@ movhi
7336
7607
 	bl	ftl_memset
7337
-	ldrh	r2, [r6, #2330]
7608
+	ldrh	r2, [r6, #2334]
7338
7609
 	mov	r1, r4
7339
-	ldr	r0, [r5, #232]
7610
+	ldr	r0, [r5, #236]
7340
7611
 	lsls	r2, r2, #1
7341
7612
 	bl	ftl_memset
7342
-	ldrh	r2, [r6, #2330]
7613
+	ldrh	r2, [r6, #2334]
7343
7614
 	mov	r1, r4
7344
7615
 	ldr	r0, [r5, #3356]
7345
7616
 	lsls	r2, r2, #1
7346
7617
 	bl	ftl_memset
7347
7618
 	mov	r1, r4
7348
-	add	r0, r5, #240
7349
7619
 	movs	r2, #48
7620
+	add	r0, r5, #244
7350
7621
 	bl	ftl_memset
7351
-	mov	r1, r4
7352
7622
 	mov	r2, #512
7353
-	add	r0, r5, #608
7623
+	mov	r1, r4
7624
+	add	r0, r5, #604
7354
7625
 	bl	ftl_memset
7355
7626
 	bl	FtlGcBufInit
7356
7627
 	bl	FtlL2PDataInit
7357
7628
 	mov	r0, r4
7358
7629
 	pop	{r4, r5, r6, pc}
7359
-.L1105:
7630
+.L1080:
7360
7631
 	.align	2
7361
-.L1104:
7632
+.L1079:
7362
7633
 	.word	.LANCHOR0
7363
7634
 	.word	.LANCHOR2
7364
7635
 	.fnend
7365
7636
 	.size	FtlVariablesInit, .-FtlVariablesInit
7366
7637
 	.align	1
7367
7638
 	.global	SupperBlkListInit
7639
+	.syntax unified
7368
7640
 	.thumb
7369
7641
 	.thumb_func
7642
+	.fpu softvfp
7370
7643
 	.type	SupperBlkListInit, %function
7371
7644
 SupperBlkListInit:
7372
7645
 	.fnstart
..
..
@@ -7374,119 +7647,121 @@
7374
7647
 	@ frame_needed = 0, uses_anonymous_args = 0
7375
7648
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
7376
7649
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
7377
-	movs	r2, #6
7378
-	ldr	r6, .L1117
7379
7650
 	movs	r5, #0
7380
-	ldr	r4, .L1117+4
7651
+	ldr	r6, .L1091
7652
+	movs	r2, #6
7653
+	mov	r9, r5
7654
+	mov	r10, r5
7655
+	ldr	r4, .L1091+4
7656
+	movw	fp, #65535
7657
+	ldrh	r3, [r6, #2334]
7658
+	mov	r8, r6
7381
7659
 	.pad #20
7382
7660
 	sub	sp, sp, #20
7383
7661
 	movs	r1, #0
7384
-	mov	r9, r5
7385
-	ldrh	r3, [r6, #2330]
7386
-	mov	r10, r5
7387
-	ldr	r0, [r4, #288]
7388
-	mov	r8, r6
7662
+	ldr	r0, [r4, #292]
7389
7663
 	muls	r2, r3, r2
7390
7664
 	bl	ftl_memset
7391
-	str	r5, [r4, #308]
7392
-	str	r5, [r4, #292]
7393
-	str	r5, [r4, #300]
7394
-	strh	r5, [r4, #304]	@ movhi
7395
-	strh	r5, [r4, #312]	@ movhi
7665
+	str	r5, [r4, #312]
7666
+	str	r5, [r4, #296]
7667
+	str	r5, [r4, #304]
7668
+	strh	r5, [r4, #308]	@ movhi
7669
+	strh	r5, [r4, #316]	@ movhi
7396
7670
 	strh	r5, [r4, #3272]	@ movhi
7397
-.L1107:
7398
-	uxth	fp, r5
7399
-	ldrh	r2, [r8, #2328]
7400
-	sxth	r7, fp
7401
-	cmp	r7, r2
7402
-	bge	.L1114
7403
-	ldr	r3, .L1117
7404
-	movs	r2, #0
7405
-	mov	r6, r2
7406
-	ldrh	ip, [r3, #2320]
7407
-	ldrh	r3, [r3, #2388]
7408
-	str	r3, [sp, #4]
7409
-.L1115:
7410
-	sxth	r1, r2
7411
-	cmp	r1, ip
7412
-	bge	.L1116
7413
-	add	r1, r1, r8
7414
-	str	r2, [sp, #12]
7415
-	str	ip, [sp, #8]
7416
-	ldrb	r0, [r1, #2348]	@ zero_extendqisi2
7417
-	mov	r1, fp
7671
+.L1082:
7672
+	ldrh	r3, [r8, #2332]
7673
+	sxth	r7, r5
7674
+	cmp	r7, r3
7675
+	bge	.L1089
7676
+	ldrh	r3, [r8, #2390]
7677
+	uxth	r1, r5
7678
+	ldrh	r2, [r8, #2324]
7679
+	str	r1, [sp, #4]
7680
+	str	r3, [sp]
7681
+	movs	r3, #0
7682
+	mov	r6, r3
7683
+	b	.L1090
7684
+.L1084:
7685
+	add	r0, r8, r1
7686
+	ldr	r1, [sp, #4]
7687
+	ldrb	r0, [r0, #2350]	@ zero_extendqisi2
7688
+	str	r3, [sp, #12]
7689
+	str	r2, [sp, #8]
7418
7690
 	bl	V2P_block
7419
7691
 	bl	FtlBbmIsBadBlock
7420
-	ldr	ip, [sp, #8]
7421
-	ldr	r2, [sp, #12]
7422
-	cbnz	r0, .L1108
7423
-	ldr	r3, [sp, #4]
7424
-	add	r6, r6, r3
7425
-	uxth	r6, r6
7426
-.L1108:
7427
-	adds	r2, r2, #1
7428
-	b	.L1115
7429
-.L1116:
7430
-	cbz	r6, .L1110
7431
-	sxth	r1, r6
7692
+	ldr	r2, [sp, #8]
7693
+	ldr	r3, [sp, #12]
7694
+	cbnz	r0, .L1083
7695
+	ldr	r1, [sp]
7696
+	add	r6, r6, r1
7697
+	sxth	r6, r6
7698
+.L1083:
7699
+	adds	r3, r3, #1
7700
+.L1090:
7701
+	sxth	r1, r3
7702
+	cmp	r1, r2
7703
+	blt	.L1084
7704
+	lsls	r2, r7, #1
7705
+	cbz	r6, .L1085
7706
+	mov	r1, r6
7707
+	str	r2, [sp]
7432
7708
 	mov	r0, #32768
7433
7709
 	bl	__aeabi_idiv
7434
-	uxth	r6, r0
7435
-	b	.L1111
7436
-.L1110:
7437
-	ldr	r1, [r4, #296]
7438
-	sxth	r2, fp
7439
-	movw	r0, #65535
7440
-	strh	r0, [r1, r2, lsl #1]	@ movhi
7441
-.L1111:
7442
-	add	r0, r7, r7, lsl #1
7443
-	ldr	r1, [r4, #288]
7444
-	ldr	r2, .L1117+4
7445
-	add	r1, r1, r0, lsl #1
7446
-	strh	r6, [r1, #4]	@ movhi
7447
-	ldrh	r1, [r4, #316]
7448
-	cmp	r7, r1
7449
-	beq	.L1112
7450
-	ldrh	r1, [r2, #364]
7451
-	cmp	r7, r1
7452
-	beq	.L1112
7453
-	ldrh	r1, [r2, #412]
7454
-	cmp	r7, r1
7455
-	beq	.L1112
7456
-	ldr	r2, [r2, #296]
7457
-	ldrh	r2, [r2, r7, lsl #1]
7458
-	cbnz	r2, .L1113
7710
+	ldr	r2, [sp]
7711
+	sxth	r6, r0
7712
+.L1086:
7713
+	ldr	r3, [r4, #292]
7714
+	add	r2, r2, r7
7715
+	add	r3, r3, r2, lsl #1
7716
+	strh	r6, [r3, #4]	@ movhi
7717
+	ldrh	r3, [r4, #320]
7718
+	cmp	r7, r3
7719
+	beq	.L1087
7720
+	ldrh	r3, [r4, #368]
7721
+	cmp	r7, r3
7722
+	beq	.L1087
7723
+	ldrh	r3, [r4, #416]
7724
+	cmp	r7, r3
7725
+	beq	.L1087
7726
+	ldr	r3, [r4, #300]
7727
+	uxth	r0, r5
7728
+	ldrh	r3, [r3, r7, lsl #1]
7729
+	cbnz	r3, .L1088
7459
7730
 	add	r9, r9, #1
7460
-	mov	r0, fp
7461
7731
 	uxth	r9, r9
7462
7732
 	bl	INSERT_FREE_LIST
7463
-	b	.L1112
7464
-.L1113:
7733
+.L1087:
7734
+	adds	r5, r5, #1
7735
+	b	.L1082
7736
+.L1085:
7737
+	ldr	r3, [r4, #300]
7738
+	strh	fp, [r3, r7, lsl #1]	@ movhi
7739
+	b	.L1086
7740
+.L1088:
7465
7741
 	add	r10, r10, #1
7466
-	mov	r0, fp
7467
7742
 	uxth	r10, r10
7468
7743
 	bl	INSERT_DATA_LIST
7469
-.L1112:
7470
-	adds	r5, r5, #1
7471
-	b	.L1107
7472
-.L1114:
7744
+	b	.L1087
7745
+.L1089:
7473
7746
 	movs	r0, #0
7474
-	strh	r10, [r4, #304]	@ movhi
7475
-	strh	r9, [r4, #312]	@ movhi
7747
+	strh	r10, [r4, #308]	@ movhi
7748
+	strh	r9, [r4, #316]	@ movhi
7476
7749
 	add	sp, sp, #20
7477
7750
 	@ sp needed
7478
7751
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
7479
-.L1118:
7752
+.L1092:
7480
7753
 	.align	2
7481
-.L1117:
7754
+.L1091:
7482
7755
 	.word	.LANCHOR0
7483
7756
 	.word	.LANCHOR2
7484
7757
 	.fnend
7485
7758
 	.size	SupperBlkListInit, .-SupperBlkListInit
7486
7759
 	.align	1
7487
7760
 	.global	FtlGcPageVarInit
7761
+	.syntax unified
7488
7762
 	.thumb
7489
7763
 	.thumb_func
7764
+	.fpu softvfp
7490
7765
 	.type	FtlGcPageVarInit, %function
7491
7766
 FtlGcPageVarInit:
7492
7767
 	.fnstart
..
..
@@ -7495,16 +7770,16 @@
7495
7770
 	push	{r3, r4, r5, lr}
7496
7771
 	.save {r3, r4, r5, lr}
7497
7772
 	movs	r1, #255
7498
-	ldr	r5, .L1120
7773
+	ldr	r5, .L1094
7499
7774
 	movs	r3, #0
7500
-	ldr	r4, .L1120+4
7501
-	ldrh	r2, [r5, #2392]
7775
+	ldr	r4, .L1094+4
7776
+	ldrh	r2, [r5, #2394]
7502
7777
 	ldr	r0, [r4, #1160]
7503
7778
 	strh	r3, [r4, #1164]	@ movhi
7504
7779
 	lsls	r2, r2, #1
7505
7780
 	strh	r3, [r4, #1172]	@ movhi
7506
7781
 	bl	ftl_memset
7507
-	ldrh	r3, [r5, #2392]
7782
+	ldrh	r3, [r5, #2394]
7508
7783
 	movs	r2, #12
7509
7784
 	ldr	r0, [r4, #1168]
7510
7785
 	movs	r1, #255
..
..
@@ -7512,17 +7787,19 @@
7512
7787
 	bl	ftl_memset
7513
7788
 	pop	{r3, r4, r5, lr}
7514
7789
 	b	FtlGcBufInit
7515
-.L1121:
7790
+.L1095:
7516
7791
 	.align	2
7517
-.L1120:
7792
+.L1094:
7518
7793
 	.word	.LANCHOR0
7519
7794
 	.word	.LANCHOR2
7520
7795
 	.fnend
7521
7796
 	.size	FtlGcPageVarInit, .-FtlGcPageVarInit
7522
7797
 	.align	1
7523
7798
 	.global	ftl_memcpy
7799
+	.syntax unified
7524
7800
 	.thumb
7525
7801
 	.thumb_func
7802
+	.fpu softvfp
7526
7803
 	.type	ftl_memcpy, %function
7527
7804
 ftl_memcpy:
7528
7805
 	.fnstart
..
..
@@ -7534,8 +7811,10 @@
7534
7811
 	.size	ftl_memcpy, .-ftl_memcpy
7535
7812
 	.align	1
7536
7813
 	.global	FlashReadIdbData
7814
+	.syntax unified
7537
7815
 	.thumb
7538
7816
 	.thumb_func
7817
+	.fpu softvfp
7539
7818
 	.type	FlashReadIdbData, %function
7540
7819
 FlashReadIdbData:
7541
7820
 	.fnstart
..
..
@@ -7544,94 +7823,93 @@
7544
7823
 	push	{r3, lr}
7545
7824
 	.save {r3, lr}
7546
7825
 	mov	r2, #2048
7547
-	ldr	r1, .L1124
7826
+	ldr	r1, .L1098
7548
7827
 	bl	ftl_memcpy
7549
7828
 	movs	r0, #0
7550
7829
 	pop	{r3, pc}
7551
-.L1125:
7830
+.L1099:
7552
7831
 	.align	2
7553
-.L1124:
7832
+.L1098:
7554
7833
 	.word	.LANCHOR2+3476
7555
7834
 	.fnend
7556
7835
 	.size	FlashReadIdbData, .-FlashReadIdbData
7557
7836
 	.align	1
7558
7837
 	.global	FlashLoadPhyInfoInRam
7838
+	.syntax unified
7559
7839
 	.thumb
7560
7840
 	.thumb_func
7841
+	.fpu softvfp
7561
7842
 	.type	FlashLoadPhyInfoInRam, %function
7562
7843
 FlashLoadPhyInfoInRam:
7563
7844
 	.fnstart
7564
7845
 	@ args = 0, pretend = 0, frame = 0
7565
7846
 	@ frame_needed = 0, uses_anonymous_args = 0
7566
-	push	{r3, r4, r5, r6, r7, lr}
7567
-	.save {r3, r4, r5, r6, r7, lr}
7847
+	push	{r4, r5, r6, r7, r8, lr}
7848
+	.save {r4, r5, r6, r7, r8, lr}
7568
7849
 	movs	r4, #0
7569
-	ldr	r5, .L1138
7570
-.L1130:
7571
-	mov	r0, r5
7572
-	ldr	r1, .L1138+4
7573
-	ldrb	r2, [r5, #-1]	@ zero_extendqisi2
7574
-	bl	FlashMemCmp8
7575
-	mov	r6, r0
7576
-	cbnz	r0, .L1127
7577
-	ldr	r5, .L1138+8
7578
-	lsls	r4, r4, #5
7579
-	add	r2, r5, #508
7580
-	adds	r7, r2, r4
7581
-	beq	.L1133
7582
-	add	r4, r4, r5
7583
-	mov	r3, r0
7584
-	addw	r1, r5, #3260
7585
-	ldrb	r2, [r4, #530]	@ zero_extendqisi2
7586
-	b	.L1132
7587
-.L1127:
7588
-	adds	r4, r4, #1
7589
-	adds	r5, r5, #32
7590
-	cmp	r4, #86
7591
-	bne	.L1130
7592
-	b	.L1133
7593
-.L1137:
7594
-	adds	r3, r3, #1
7595
-	cmp	r3, #4
7596
-	beq	.L1131
7597
-.L1132:
7598
-	lsls	r0, r3, #5
7599
-	ldrb	r0, [r0, r1]	@ zero_extendqisi2
7600
-	cmp	r0, r2
7601
-	bne	.L1137
7602
-.L1131:
7603
-	ldr	r1, .L1138+12
7604
-	movs	r2, #32
7605
-	ldr	r0, .L1138+16
7606
-	add	r1, r1, r3, lsl #5
7607
-	bl	ftl_memcpy
7608
-	mov	r1, r7
7609
-	movs	r2, #32
7610
-	ldr	r0, .L1138+20
7611
-	bl	ftl_memcpy
7612
-	ldrh	r0, [r5, #482]
7613
-	bl	FlashBlockAlignInit
7614
-	b	.L1128
7615
-.L1133:
7616
-	mov	r6, #-1
7617
-.L1128:
7850
+	ldr	r6, .L1108
7851
+	ldr	r8, .L1108+16
7852
+.L1103:
7853
+	ldrb	r2, [r6, #-1]	@ zero_extendqisi2
7854
+	mov	r1, r8
7618
7855
 	mov	r0, r6
7619
-	pop	{r3, r4, r5, r6, r7, pc}
7620
-.L1139:
7856
+	lsls	r7, r4, #5
7857
+	bl	FlashMemCmp8
7858
+	mov	r5, r0
7859
+	cbnz	r0, .L1101
7860
+	ldr	r4, .L1108+4
7861
+	mov	r1, r0
7862
+	add	r6, r4, #504
7863
+	addw	r3, r4, #3256
7864
+	add	r6, r6, r7
7865
+	add	r7, r7, r4
7866
+	ldrb	r2, [r7, #526]	@ zero_extendqisi2
7867
+	mov	r0, r3
7868
+.L1102:
7869
+	lsls	r7, r1, #5
7870
+	ldrb	r7, [r7, r3]	@ zero_extendqisi2
7871
+	cmp	r7, r2
7872
+	beq	.L1105
7873
+	adds	r1, r1, #1
7874
+	cmp	r1, #4
7875
+	bne	.L1102
7876
+.L1105:
7877
+	add	r1, r0, r1, lsl #5
7878
+	movs	r2, #32
7879
+	ldr	r0, .L1108+8
7880
+	bl	ftl_memcpy
7881
+	movs	r2, #32
7882
+	mov	r1, r6
7883
+	ldr	r0, .L1108+12
7884
+	bl	ftl_memcpy
7885
+	ldrh	r0, [r4, #478]
7886
+	bl	FlashBlockAlignInit
7887
+	b	.L1100
7888
+.L1101:
7889
+	adds	r4, r4, #1
7890
+	adds	r6, r6, #32
7891
+	cmp	r4, #86
7892
+	bne	.L1103
7893
+	mov	r5, #-1
7894
+.L1100:
7895
+	mov	r0, r5
7896
+	pop	{r4, r5, r6, r7, r8, pc}
7897
+.L1109:
7621
7898
 	.align	2
7622
-.L1138:
7623
-	.word	.LANCHOR1+509
7624
-	.word	.LANCHOR0+2068
7899
+.L1108:
7900
+	.word	.LANCHOR1+505
7625
7901
 	.word	.LANCHOR1
7626
-	.word	.LANCHOR1+3260
7627
-	.word	.LANCHOR0+48
7628
-	.word	.LANCHOR1+472
7902
+	.word	.LANCHOR0+52
7903
+	.word	.LANCHOR1+468
7904
+	.word	.LANCHOR0+2072
7629
7905
 	.fnend
7630
7906
 	.size	FlashLoadPhyInfoInRam, .-FlashLoadPhyInfoInRam
7631
7907
 	.align	1
7632
7908
 	.global	NandcCopy1KB
7909
+	.syntax unified
7633
7910
 	.thumb
7634
7911
 	.thumb_func
7912
+	.fpu softvfp
7635
7913
 	.type	NandcCopy1KB, %function
7636
7914
 NandcCopy1KB:
7637
7915
 	.fnstart
..
..
@@ -7642,57 +7920,51 @@
7642
7920
 	.save {r4, r5, r6, lr}
7643
7921
 	mov	r4, r2
7644
7922
 	add	r2, r0, #4096
7645
-	ldr	r6, [sp, #16]
7646
7923
 	add	r5, r0, #512
7647
-	add	r2, r2, r4, lsl #9
7648
-	bne	.L1141
7649
-	cbz	r3, .L1142
7650
-	mov	r0, r2
7651
-	mov	r1, r3
7924
+	add	r0, r2, r4, lsl #9
7925
+	ldr	r6, [sp, #16]
7926
+	bne	.L1111
7927
+	cbz	r3, .L1112
7652
7928
 	mov	r2, #1024
7929
+	mov	r1, r3
7653
7930
 	bl	ftl_memcpy
7654
-.L1142:
7655
-	cbz	r6, .L1140
7656
-	ldrb	r3, [r6, #2]	@ zero_extendqisi2
7931
+.L1112:
7932
+	cbz	r6, .L1110
7657
7933
 	lsrs	r4, r4, #1
7658
-	ldrb	r2, [r6, #1]	@ zero_extendqisi2
7934
+	ldr	r3, [r6]	@ unaligned
7659
7935
 	add	r4, r4, r4, lsl #1
7660
-	lsls	r3, r3, #16
7661
-	orr	r2, r3, r2, lsl #8
7662
-	ldrb	r3, [r6]	@ zero_extendqisi2
7663
7936
 	lsls	r4, r4, #2
7664
-	orrs	r3, r3, r2
7665
-	ldrb	r2, [r6, #3]	@ zero_extendqisi2
7666
-	orr	r3, r3, r2, lsl #24
7667
7937
 	str	r3, [r5, r4, lsl #2]
7668
7938
 	pop	{r4, r5, r6, pc}
7669
-.L1141:
7670
-	cbz	r3, .L1145
7671
-	mov	r1, r2
7672
-	mov	r0, r3
7939
+.L1111:
7940
+	cbz	r3, .L1115
7941
+	mov	r1, r0
7673
7942
 	mov	r2, #1024
7943
+	mov	r0, r3
7674
7944
 	bl	ftl_memcpy
7675
-.L1145:
7676
-	cbz	r6, .L1140
7945
+.L1115:
7946
+	cbz	r6, .L1110
7677
7947
 	lsrs	r4, r4, #1
7678
7948
 	add	r4, r4, r4, lsl #1
7679
7949
 	lsls	r4, r4, #2
7680
7950
 	ldr	r3, [r5, r4, lsl #2]
7681
-	lsrs	r2, r3, #8
7682
7951
 	strb	r3, [r6]
7952
+	lsrs	r2, r3, #8
7683
7953
 	strb	r2, [r6, #1]
7684
7954
 	lsrs	r2, r3, #16
7685
7955
 	lsrs	r3, r3, #24
7686
7956
 	strb	r2, [r6, #2]
7687
7957
 	strb	r3, [r6, #3]
7688
-.L1140:
7958
+.L1110:
7689
7959
 	pop	{r4, r5, r6, pc}
7690
7960
 	.fnend
7691
7961
 	.size	NandcCopy1KB, .-NandcCopy1KB
7692
7962
 	.align	1
7693
7963
 	.global	ftl_memcpy32
7964
+	.syntax unified
7694
7965
 	.thumb
7695
7966
 	.thumb_func
7967
+	.fpu softvfp
7696
7968
 	.type	ftl_memcpy32, %function
7697
7969
 ftl_memcpy32:
7698
7970
 	.fnstart
..
..
@@ -7701,21 +7973,23 @@
7701
7973
 	movs	r3, #0
7702
7974
 	push	{r4, lr}
7703
7975
 	.save {r4, lr}
7704
-.L1157:
7976
+.L1127:
7705
7977
 	cmp	r3, r2
7706
-	beq	.L1159
7978
+	bne	.L1128
7979
+	pop	{r4, pc}
7980
+.L1128:
7707
7981
 	ldr	r4, [r1, r3, lsl #2]
7708
7982
 	str	r4, [r0, r3, lsl #2]
7709
7983
 	adds	r3, r3, #1
7710
-	b	.L1157
7711
-.L1159:
7712
-	pop	{r4, pc}
7984
+	b	.L1127
7713
7985
 	.fnend
7714
7986
 	.size	ftl_memcpy32, .-ftl_memcpy32
7715
7987
 	.align	1
7716
7988
 	.global	ftl_memcmp
7989
+	.syntax unified
7717
7990
 	.thumb
7718
7991
 	.thumb_func
7992
+	.fpu softvfp
7719
7993
 	.type	ftl_memcmp, %function
7720
7994
 ftl_memcmp:
7721
7995
 	.fnstart
..
..
@@ -7727,56 +8001,66 @@
7727
8001
 	.size	ftl_memcmp, .-ftl_memcmp
7728
8002
 	.align	1
7729
8003
 	.global	timer_get_time
8004
+	.syntax unified
7730
8005
 	.thumb
7731
8006
 	.thumb_func
8007
+	.fpu softvfp
7732
8008
 	.type	timer_get_time, %function
7733
8009
 timer_get_time:
7734
8010
 	.fnstart
7735
8011
 	@ args = 0, pretend = 0, frame = 0
7736
8012
 	@ frame_needed = 0, uses_anonymous_args = 0
7737
8013
 	@ link register save eliminated.
7738
-	ldr	r3, .L1162
8014
+	ldr	r3, .L1131
7739
8015
 	ldr	r0, [r3]
7740
8016
 	b	jiffies_to_msecs
7741
-.L1163:
8017
+.L1132:
7742
8018
 	.align	2
7743
-.L1162:
8019
+.L1131:
7744
8020
 	.word	jiffies
7745
8021
 	.fnend
7746
8022
 	.size	timer_get_time, .-timer_get_time
7747
8023
 	.align	1
7748
8024
 	.global	FlashSramLoadStore
8025
+	.syntax unified
7749
8026
 	.thumb
7750
8027
 	.thumb_func
8028
+	.fpu softvfp
7751
8029
 	.type	FlashSramLoadStore, %function
7752
8030
 FlashSramLoadStore:
7753
8031
 	.fnstart
7754
8032
 	@ args = 0, pretend = 0, frame = 0
7755
8033
 	@ frame_needed = 0, uses_anonymous_args = 0
7756
-	push	{r4, r5, lr}
7757
-	.save {r4, r5, lr}
7758
-	mov	r5, r0
7759
-	ldr	r4, .L1167
8034
+	@ link register save eliminated.
8035
+	push	{r4, r5}
8036
+	.save {r4, r5}
8037
+	ldr	r4, .L1136
7760
8038
 	ldr	r4, [r4, #1180]
7761
8039
 	add	r4, r4, #4096
7762
-	add	r1, r1, r4
7763
-	cbz	r2, .L1166
7764
-	mov	r0, r1
7765
-	mov	r1, r5
7766
-.L1166:
8040
+	add	r4, r4, r1
8041
+	cbnz	r2, .L1134
7767
8042
 	mov	r2, r3
7768
-	pop	{r4, r5, lr}
8043
+	mov	r1, r4
8044
+.L1135:
8045
+	pop	{r4, r5}
7769
8046
 	b	ftl_memcpy
7770
-.L1168:
8047
+.L1134:
8048
+	mov	r1, r0
8049
+	mov	r2, r3
8050
+	mov	r0, r4
8051
+	b	.L1135
8052
+.L1137:
7771
8053
 	.align	2
7772
-.L1167:
8054
+.L1136:
7773
8055
 	.word	.LANCHOR4
7774
8056
 	.fnend
7775
8057
 	.size	FlashSramLoadStore, .-FlashSramLoadStore
7776
8058
 	.align	1
7777
8059
 	.global	FlashCs123Init
8060
+	.syntax unified
7778
8061
 	.thumb
7779
8062
 	.thumb_func
8063
+	.fpu softvfp
7780
8064
 	.type	FlashCs123Init, %function
7781
8065
 FlashCs123Init:
7782
8066
 	.fnstart
..
..
@@ -7787,9 +8071,55 @@
7787
8071
 	.fnend
7788
8072
 	.size	FlashCs123Init, .-FlashCs123Init
7789
8073
 	.align	1
7790
-	.global	rk_nand_suspend
8074
+	.global	ftl_dma32_malloc
8075
+	.syntax unified
7791
8076
 	.thumb
7792
8077
 	.thumb_func
8078
+	.fpu softvfp
8079
+	.type	ftl_dma32_malloc, %function
8080
+ftl_dma32_malloc:
8081
+	.fnstart
8082
+	@ args = 0, pretend = 0, frame = 0
8083
+	@ frame_needed = 0, uses_anonymous_args = 0
8084
+	cmp	r0, #8192
8085
+	push	{r3, r4, r5, lr}
8086
+	.save {r3, r4, r5, lr}
8087
+	mov	r4, r0
8088
+	ble	.L1140
8089
+	pop	{r3, r4, r5, lr}
8090
+	b	ftl_malloc
8091
+.L1140:
8092
+	ldr	r5, .L1142
8093
+	adds	r4, r4, #63
8094
+	bic	r4, r4, #63
8095
+	ldr	r3, [r5, #1184]
8096
+	cmp	r4, r3
8097
+	ble	.L1141
8098
+	mov	r0, #16384
8099
+	bl	ftl_malloc
8100
+	mov	r3, #16384
8101
+	str	r0, [r5, #1188]
8102
+	str	r3, [r5, #1184]
8103
+.L1141:
8104
+	ldr	r3, [r5, #1184]
8105
+	ldr	r0, [r5, #1188]
8106
+	subs	r3, r3, r4
8107
+	add	r4, r4, r0
8108
+	str	r3, [r5, #1184]
8109
+	str	r4, [r5, #1188]
8110
+	pop	{r3, r4, r5, pc}
8111
+.L1143:
8112
+	.align	2
8113
+.L1142:
8114
+	.word	.LANCHOR4
8115
+	.fnend
8116
+	.size	ftl_dma32_malloc, .-ftl_dma32_malloc
8117
+	.align	1
8118
+	.global	rk_nand_suspend
8119
+	.syntax unified
8120
+	.thumb
8121
+	.thumb_func
8122
+	.fpu softvfp
7793
8123
 	.type	rk_nand_suspend, %function
7794
8124
 rk_nand_suspend:
7795
8125
 	.fnstart
..
..
@@ -7801,8 +8131,10 @@
7801
8131
 	.size	rk_nand_suspend, .-rk_nand_suspend
7802
8132
 	.align	1
7803
8133
 	.global	rk_nand_resume
8134
+	.syntax unified
7804
8135
 	.thumb
7805
8136
 	.thumb_func
8137
+	.fpu softvfp
7806
8138
 	.type	rk_nand_resume, %function
7807
8139
 rk_nand_resume:
7808
8140
 	.fnstart
..
..
@@ -7814,27 +8146,31 @@
7814
8146
 	.size	rk_nand_resume, .-rk_nand_resume
7815
8147
 	.align	1
7816
8148
 	.global	rk_ftl_get_capacity
8149
+	.syntax unified
7817
8150
 	.thumb
7818
8151
 	.thumb_func
8152
+	.fpu softvfp
7819
8153
 	.type	rk_ftl_get_capacity, %function
7820
8154
 rk_ftl_get_capacity:
7821
8155
 	.fnstart
7822
8156
 	@ args = 0, pretend = 0, frame = 0
7823
8157
 	@ frame_needed = 0, uses_anonymous_args = 0
7824
8158
 	@ link register save eliminated.
7825
-	ldr	r3, .L1173
7826
-	ldr	r0, [r3, #2428]
8159
+	ldr	r3, .L1147
8160
+	ldr	r0, [r3, #2432]
7827
8161
 	bx	lr
7828
-.L1174:
8162
+.L1148:
7829
8163
 	.align	2
7830
-.L1173:
8164
+.L1147:
7831
8165
 	.word	.LANCHOR0
7832
8166
 	.fnend
7833
8167
 	.size	rk_ftl_get_capacity, .-rk_ftl_get_capacity
7834
8168
 	.align	1
7835
8169
 	.global	rk_nandc_get_irq_status
8170
+	.syntax unified
7836
8171
 	.thumb
7837
8172
 	.thumb_func
8173
+	.fpu softvfp
7838
8174
 	.type	rk_nandc_get_irq_status, %function
7839
8175
 rk_nandc_get_irq_status:
7840
8176
 	.fnstart
..
..
@@ -7847,8 +8183,10 @@
7847
8183
 	.size	rk_nandc_get_irq_status, .-rk_nandc_get_irq_status
7848
8184
 	.align	1
7849
8185
 	.global	rknand_proc_ftlread
8186
+	.syntax unified
7850
8187
 	.thumb
7851
8188
 	.thumb_func
8189
+	.fpu softvfp
7852
8190
 	.type	rknand_proc_ftlread, %function
7853
8191
 rknand_proc_ftlread:
7854
8192
 	.fnstart
..
..
@@ -7860,8 +8198,10 @@
7860
8198
 	.size	rknand_proc_ftlread, .-rknand_proc_ftlread
7861
8199
 	.align	1
7862
8200
 	.global	ReadFlashInfo
8201
+	.syntax unified
7863
8202
 	.thumb
7864
8203
 	.thumb_func
8204
+	.fpu softvfp
7865
8205
 	.type	ReadFlashInfo, %function
7866
8206
 ReadFlashInfo:
7867
8207
 	.fnstart
..
..
@@ -7873,269 +8213,280 @@
7873
8213
 	.size	ReadFlashInfo, .-ReadFlashInfo
7874
8214
 	.align	1
7875
8215
 	.global	rknand_print_hex
8216
+	.syntax unified
7876
8217
 	.thumb
7877
8218
 	.thumb_func
8219
+	.fpu softvfp
7878
8220
 	.type	rknand_print_hex, %function
7879
8221
 rknand_print_hex:
7880
8222
 	.fnstart
7881
8223
 	@ args = 0, pretend = 0, frame = 0
7882
8224
 	@ frame_needed = 0, uses_anonymous_args = 0
7883
-	push	{r3, r4, r5, r6, r7, r8, r9, lr}
7884
-	.save {r3, r4, r5, r6, r7, r8, r9, lr}
8225
+	push	{r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
8226
+	.save {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
7885
8227
 	movs	r5, #0
7886
-	mov	r9, r0
8228
+	ldr	r7, .L1161
8229
+	mov	r10, r0
7887
8230
 	mov	r6, r1
7888
-	mov	r7, r2
7889
-	mov	r8, r3
8231
+	mov	r8, r2
8232
+	ldr	fp, .L1161+4
8233
+	mov	r9, r3
7890
8234
 	mov	r4, r5
7891
-.L1179:
7892
-	cmp	r4, r8
7893
-	beq	.L1187
7894
-	cbnz	r5, .L1180
7895
-	ldr	r0, .L1188
7896
-	mov	r1, r9
7897
-	mov	r2, r6
8235
+.L1153:
8236
+	cmp	r4, r9
8237
+	bne	.L1159
8238
+	ldr	r1, .L1161+4
8239
+	ldr	r0, .L1161+8
8240
+	pop	{r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
8241
+	b	printk
8242
+.L1159:
8243
+	cbnz	r5, .L1154
7898
8244
 	mov	r3, r4
8245
+	mov	r2, r6
8246
+	mov	r1, r10
8247
+	ldr	r0, .L1161+12
7899
8248
 	bl	printk
7900
-.L1180:
7901
-	cmp	r7, #4
7902
-	ldr	r0, .L1188+4
7903
-	bne	.L1181
8249
+.L1154:
8250
+	cmp	r8, #4
8251
+	bne	.L1155
7904
8252
 	ldr	r1, [r6, r4, lsl #2]
7905
-	b	.L1186
7906
-.L1181:
7907
-	cmp	r7, #2
7908
-	ite	eq
7909
-	ldrsheq	r1, [r6, r4, lsl #1]
7910
-	ldrbne	r1, [r6, r4]	@ zero_extendqisi2
7911
-.L1186:
8253
+.L1160:
8254
+	mov	r0, r7
7912
8255
 	adds	r5, r5, #1
7913
8256
 	bl	printk
7914
8257
 	cmp	r5, #15
7915
-	bls	.L1184
7916
-	ldr	r0, .L1188+8
8258
+	bls	.L1158
7917
8259
 	movs	r5, #0
7918
-	ldr	r1, .L1188+12
8260
+	mov	r1, fp
8261
+	ldr	r0, .L1161+8
7919
8262
 	bl	printk
7920
-.L1184:
8263
+.L1158:
7921
8264
 	adds	r4, r4, #1
7922
-	b	.L1179
7923
-.L1187:
7924
-	ldr	r0, .L1188+8
7925
-	ldr	r1, .L1188+12
7926
-	pop	{r3, r4, r5, r6, r7, r8, r9, lr}
7927
-	b	printk
7928
-.L1189:
8265
+	b	.L1153
8266
+.L1155:
8267
+	cmp	r8, #2
8268
+	ite	eq
8269
+	ldrsheq	r1, [r6, r4, lsl #1]
8270
+	ldrbne	r1, [r6, r4]	@ zero_extendqisi2
8271
+	b	.L1160
8272
+.L1162:
7929
8273
 	.align	2
7930
-.L1188:
7931
-	.word	.LC82
8274
+.L1161:
7932
8275
 	.word	.LC83
7933
-	.word	.LC76
7934
8276
 	.word	.LC84
8277
+	.word	.LC77
8278
+	.word	.LC82
7935
8279
 	.fnend
7936
8280
 	.size	rknand_print_hex, .-rknand_print_hex
7937
8281
 	.align	1
7938
8282
 	.global	HynixGetReadRetryDefault
8283
+	.syntax unified
7939
8284
 	.thumb
7940
8285
 	.thumb_func
8286
+	.fpu softvfp
7941
8287
 	.type	HynixGetReadRetryDefault, %function
7942
8288
 HynixGetReadRetryDefault:
7943
8289
 	.fnstart
7944
-	@ args = 0, pretend = 0, frame = 40
8290
+	@ args = 0, pretend = 0, frame = 56
7945
8291
 	@ frame_needed = 0, uses_anonymous_args = 0
7946
8292
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
7947
8293
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
8294
+	movs	r3, #172
8295
+	ldr	r7, .L1279
7948
8296
 	cmp	r0, #2
7949
-	ldr	r7, .L1299
7950
-	mov	r3, #172
7951
8297
 	mov	r1, #173
7952
8298
 	mov	r2, #174
7953
-	.pad #44
7954
-	sub	sp, sp, #44
8299
+	.pad #60
8300
+	sub	sp, sp, #60
7955
8301
 	mov	r4, r0
7956
-	strb	r3, [r7, #1214]
8302
+	strb	r3, [r7, #1220]
7957
8303
 	mov	r3, #175
7958
-	strb	r0, [r7, #1210]
7959
-	strb	r1, [r7, #1215]
7960
-	strb	r2, [r7, #1216]
7961
-	strb	r3, [r7, #1217]
7962
-	bne	.L1191
7963
-	movs	r3, #167
7964
-	strb	r3, [r7, #1214]
7965
-	ldr	r3, .L1299+4
7966
-	movs	r2, #247
7967
-	movs	r5, #7
7968
-	strb	r2, [r3, #3405]
7969
-	b	.L1252
7970
-.L1191:
7971
-	cmp	r0, #3
7972
-	bne	.L1193
7973
-	movs	r3, #176
7974
-	strb	r3, [r7, #1214]
7975
-	movs	r3, #177
7976
-	strb	r3, [r7, #1215]
7977
-	movs	r3, #178
7978
-	strb	r3, [r7, #1216]
7979
-	movs	r3, #179
7980
-	strb	r3, [r7, #1217]
7981
-	movs	r3, #180
7982
-	strb	r3, [r7, #1218]
7983
-	movs	r3, #181
7984
-	strb	r3, [r7, #1219]
7985
-	movs	r3, #182
7986
-	strb	r3, [r7, #1220]
7987
-	movs	r3, #183
7988
-	b	.L1293
7989
-.L1193:
7990
-	cmp	r0, #4
7991
-	bne	.L1194
7992
-	movs	r0, #204
7993
-	strb	r1, [r7, #1219]
7994
-	strb	r0, [r7, #1214]
7995
-	movs	r0, #191
7996
-	strb	r2, [r7, #1220]
7997
-	strb	r0, [r7, #1215]
7998
-	movs	r0, #170
7999
8304
 	strb	r0, [r7, #1216]
8000
-	movs	r0, #171
8001
-	strb	r0, [r7, #1217]
8002
-	movs	r0, #205
8003
-	strb	r0, [r7, #1218]
8004
-.L1293:
8005
-	movs	r5, #8
8006
-	strb	r3, [r7, #1221]
8007
-	mov	r6, r5
8008
-	b	.L1192
8009
-.L1194:
8010
-	cmp	r0, #5
8011
-	bne	.L1195
8012
-	movs	r3, #56
8013
-	movs	r5, #8
8014
-	strb	r3, [r7, #1214]
8015
-	movs	r3, #57
8016
-	strb	r3, [r7, #1215]
8017
-	movs	r3, #58
8018
-	strb	r3, [r7, #1216]
8019
-	movs	r3, #59
8020
-	strb	r3, [r7, #1217]
8021
-	b	.L1252
8022
-.L1195:
8023
-	cmp	r0, #6
8024
-	bne	.L1196
8025
-	movs	r3, #14
8026
-	movs	r5, #12
8027
-	strb	r3, [r7, #1214]
8028
-	movs	r3, #15
8029
-	strb	r3, [r7, #1215]
8030
-	movs	r3, #16
8031
-	strb	r3, [r7, #1216]
8032
-	movs	r3, #17
8033
-	strb	r3, [r7, #1217]
8034
-	b	.L1252
8035
-.L1196:
8036
-	cmp	r0, #7
8037
-	bne	.L1197
8038
-	movs	r3, #176
8039
-	movs	r5, #12
8040
-	strb	r3, [r7, #1214]
8041
-	movs	r6, #10
8042
-	movs	r3, #177
8043
-	strb	r3, [r7, #1215]
8044
-	movs	r3, #178
8045
-	strb	r3, [r7, #1216]
8046
-	movs	r3, #179
8047
-	strb	r3, [r7, #1217]
8048
-	movs	r3, #180
8049
-	strb	r3, [r7, #1218]
8050
-	movs	r3, #181
8051
-	strb	r3, [r7, #1219]
8052
-	movs	r3, #182
8053
-	strb	r3, [r7, #1220]
8054
-	movs	r3, #183
8055
-	strb	r3, [r7, #1221]
8056
-	movs	r3, #212
8057
-	strb	r3, [r7, #1222]
8058
-	movs	r3, #213
8305
+	strb	r1, [r7, #1221]
8306
+	strb	r2, [r7, #1222]
8059
8307
 	strb	r3, [r7, #1223]
8060
-	b	.L1192
8061
-.L1197:
8062
-	cmp	r0, #8
8063
-	mov	r5, #7
8064
-	bne	.L1252
8065
-	movs	r3, #6
8066
-	strb	r5, [r7, #1215]
8067
-	strb	r3, [r7, #1214]
8068
-	movs	r5, #50
8069
-	movs	r3, #9
8070
-	strb	r0, [r7, #1216]
8071
-	strb	r3, [r7, #1217]
8072
-	movs	r6, #5
8073
-	movs	r3, #10
8074
-	strb	r3, [r7, #1218]
8075
-	b	.L1192
8076
-.L1252:
8308
+	bne	.L1164
8309
+	movs	r3, #167
8310
+	movs	r5, #7
8311
+	strb	r3, [r7, #1220]
8312
+	movs	r2, #247
8313
+	ldr	r3, .L1279+4
8314
+	strb	r2, [r3, #3401]
8315
+.L1229:
8077
8316
 	movs	r6, #4
8078
-.L1192:
8317
+	b	.L1165
8318
+.L1164:
8319
+	cmp	r0, #3
8320
+	bne	.L1166
8321
+	movs	r3, #176
8322
+	strb	r3, [r7, #1220]
8323
+	movs	r3, #177
8324
+	strb	r3, [r7, #1221]
8325
+	movs	r3, #178
8326
+	strb	r3, [r7, #1222]
8327
+	movs	r3, #179
8328
+	strb	r3, [r7, #1223]
8329
+	movs	r3, #180
8330
+	strb	r3, [r7, #1224]
8331
+	movs	r3, #181
8332
+	strb	r3, [r7, #1225]
8333
+	movs	r3, #182
8334
+	strb	r3, [r7, #1226]
8335
+	movs	r3, #183
8336
+.L1274:
8337
+	movs	r5, #8
8338
+	strb	r3, [r7, #1227]
8339
+	mov	r6, r5
8340
+.L1165:
8079
8341
 	subs	r3, r4, #1
8080
8342
 	cmp	r3, #1
8081
-	bhi	.L1290
8082
-	ldr	r1, .L1299+8
8343
+	bhi	.L1171
8344
+	ldr	fp, .L1279+12
8083
8345
 	mov	r10, #0
8084
-.L1198:
8085
-	ldrb	r3, [r7, #2230]	@ zero_extendqisi2
8086
-	uxtb	r8, r10
8087
-	ldr	r2, .L1299
8088
-	cmp	r3, r8
8089
-	bls	.L1205
8090
-	add	r8, r8, r2
8091
-	addw	fp, r2, #1213
8092
-	ldrb	r3, [r8, #2232]	@ zero_extendqisi2
8093
-	add	r4, r2, r3, lsl #6
8094
-	add	r3, r2, r3, lsl #3
8095
-	addw	r4, r4, #1230
8096
-	movs	r2, #55
8097
-	ldrb	r8, [r3, #16]	@ zero_extendqisi2
8098
-	ldr	r0, [r3, #12]
8099
-	mov	r9, r4
8100
-	mov	r3, r4
8101
-	add	r8, r0, r8, lsl #8
8102
-	addw	ip, r8, #2056
8103
-.L1200:
8104
-	str	r2, [ip]
8105
-	ldrb	r0, [fp, #1]!	@ zero_extendqisi2
8106
-	str	r1, [sp, #16]
8107
-	str	r3, [sp, #12]
8108
-	str	r0, [r8, #2052]
8109
-	movs	r0, #80
8346
+	ldr	r2, .L1279+8
8347
+.L1172:
8348
+	ldrb	r1, [r7, #2234]	@ zero_extendqisi2
8349
+	uxtb	r3, r10
8350
+	cmp	r1, r3
8351
+	bhi	.L1178
8352
+.L1179:
8353
+	ldr	r3, .L1279
8354
+	strb	r6, [r3, #1217]
8355
+	strb	r5, [r3, #1218]
8356
+	add	sp, sp, #60
8357
+	@ sp needed
8358
+	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
8359
+.L1166:
8360
+	cmp	r0, #4
8361
+	bne	.L1167
8362
+	movs	r0, #204
8363
+	strb	r1, [r7, #1225]
8364
+	strb	r0, [r7, #1220]
8365
+	movs	r0, #191
8366
+	strb	r0, [r7, #1221]
8367
+	movs	r0, #170
8368
+	strb	r0, [r7, #1222]
8369
+	movs	r0, #171
8370
+	strb	r0, [r7, #1223]
8371
+	movs	r0, #205
8372
+	strb	r0, [r7, #1224]
8373
+	strb	r2, [r7, #1226]
8374
+	b	.L1274
8375
+.L1167:
8376
+	cmp	r0, #5
8377
+	bne	.L1168
8378
+	movs	r3, #56
8379
+	movs	r5, #8
8380
+	strb	r3, [r7, #1220]
8381
+	movs	r3, #57
8382
+	strb	r3, [r7, #1221]
8383
+	movs	r3, #58
8384
+	strb	r3, [r7, #1222]
8385
+	movs	r3, #59
8386
+	strb	r3, [r7, #1223]
8387
+	b	.L1229
8388
+.L1168:
8389
+	cmp	r0, #6
8390
+	bne	.L1169
8391
+	movs	r3, #14
8392
+	movs	r5, #12
8393
+	strb	r3, [r7, #1220]
8394
+	movs	r3, #15
8395
+	strb	r3, [r7, #1221]
8396
+	movs	r3, #16
8397
+	strb	r3, [r7, #1222]
8398
+	movs	r3, #17
8399
+	strb	r3, [r7, #1223]
8400
+	b	.L1229
8401
+.L1169:
8402
+	cmp	r0, #7
8403
+	bne	.L1170
8404
+	movs	r3, #176
8405
+	movs	r5, #12
8406
+	strb	r3, [r7, #1220]
8407
+	movs	r3, #177
8408
+	strb	r3, [r7, #1221]
8409
+	movs	r3, #178
8410
+	strb	r3, [r7, #1222]
8411
+	movs	r3, #179
8412
+	strb	r3, [r7, #1223]
8413
+	movs	r3, #180
8414
+	strb	r3, [r7, #1224]
8415
+	movs	r3, #181
8416
+	strb	r3, [r7, #1225]
8417
+	movs	r3, #182
8418
+	strb	r3, [r7, #1226]
8419
+	movs	r3, #183
8420
+	strb	r3, [r7, #1227]
8421
+	movs	r3, #212
8422
+	strb	r3, [r7, #1228]
8423
+	movs	r3, #213
8424
+	strb	r3, [r7, #1229]
8425
+	movs	r6, #10
8426
+	b	.L1165
8427
+.L1170:
8428
+	cmp	r0, #8
8429
+	mov	r5, #7
8430
+	bne	.L1229
8431
+	movs	r3, #6
8432
+	strb	r5, [r7, #1221]
8433
+	strb	r3, [r7, #1220]
8434
+	movs	r3, #9
8435
+	strb	r3, [r7, #1223]
8436
+	movs	r3, #10
8437
+	strb	r0, [r7, #1222]
8438
+	movs	r5, #50
8439
+	strb	r3, [r7, #1224]
8440
+	movs	r6, #5
8441
+	b	.L1165
8442
+.L1178:
8443
+	add	r3, r3, r7
8444
+	mov	r8, #0
8445
+	ldrb	r3, [r3, #2236]	@ zero_extendqisi2
8446
+	ldr	r1, [r7, r3, lsl #3]
8447
+	add	r4, fp, r3, lsl #6
8448
+	add	r3, r7, r3, lsl #3
8449
+	ldrb	r9, [r3, #4]	@ zero_extendqisi2
8450
+	adds	r4, r4, #20
8451
+	add	r9, r1, r9, lsl #8
8452
+	movs	r1, #55
8453
+	addw	r3, r9, #2056
8454
+.L1173:
8455
+	add	r0, fp, r8
8456
+	str	r1, [r3]
8457
+	ldrb	r0, [r0, #4]	@ zero_extendqisi2
8110
8458
 	str	r2, [sp, #8]
8111
-	str	ip, [sp, #4]
8112
-	bl	NandcDelayns
8113
-	ldr	r0, [r8, #2048]
8114
-	ldr	r3, [sp, #12]
8115
-	ldr	ip, [sp, #4]
8459
+	str	r1, [sp, #4]
8460
+	str	r0, [r9, #2052]
8461
+	movs	r0, #80
8462
+	str	r3, [sp]
8463
+	bl	ndelay
8464
+	ldr	r0, [r9, #2048]
8465
+	ldr	r3, [sp]
8466
+	ldr	r1, [sp, #4]
8467
+	strb	r0, [r4, r8]
8468
+	add	r8, r8, #1
8469
+	uxtb	r0, r8
8116
8470
 	ldr	r2, [sp, #8]
8117
-	strb	r0, [r3], #1
8118
-	subs	r0, r3, r4
8119
-	ldr	r1, [sp, #16]
8120
-	uxtb	r0, r0
8121
-	cmp	r0, r6
8122
-	bcc	.L1200
8123
-	movs	r2, #0
8124
-.L1201:
8471
+	cmp	r6, r0
8472
+	bhi	.L1173
8473
+	mov	r0, r4
8474
+	movs	r1, #0
8475
+.L1176:
8125
8476
 	movs	r3, #1
8126
-	add	lr, r1, r2
8127
-.L1202:
8477
+	add	lr, r2, r1
8478
+.L1175:
8128
8479
 	ldrb	ip, [lr, r3, lsl #2]	@ zero_extendqisi2
8129
-	ldrb	r0, [r9]	@ zero_extendqisi2
8130
-	add	r0, r0, ip
8131
-	strb	r0, [r9, r3, lsl #3]
8480
+	ldrb	r8, [r0]	@ zero_extendqisi2
8481
+	add	ip, ip, r8
8482
+	strb	ip, [r0, r3, lsl #3]
8132
8483
 	adds	r3, r3, #1
8133
8484
 	cmp	r3, #7
8134
-	bne	.L1202
8135
-	adds	r2, r2, #1
8136
-	add	r9, r9, #1
8137
-	cmp	r2, #4
8138
-	bne	.L1201
8485
+	bne	.L1175
8486
+	adds	r1, r1, #1
8487
+	adds	r0, r0, #1
8488
+	cmp	r1, #4
8489
+	bne	.L1176
8139
8490
 	movs	r3, #0
8140
8491
 	add	r10, r10, #1
8141
8492
 	strb	r3, [r4, #16]
..
..
@@ -8145,105 +8496,90 @@
8145
8496
 	strb	r3, [r4, #48]
8146
8497
 	strb	r3, [r4, #41]
8147
8498
 	strb	r3, [r4, #49]
8148
-	b	.L1198
8149
-.L1290:
8499
+	b	.L1172
8500
+.L1171:
8150
8501
 	subs	r3, r4, #3
8151
8502
 	cmp	r3, #5
8152
-	bhi	.L1205
8153
-	smulbb	r2, r6, r5
8154
-	lsls	r3, r2, #4
8155
-	asrs	r2, r2, #1
8156
-	str	r3, [sp, #36]
8503
+	bhi	.L1179
8504
+	smulbb	r3, r6, r5
8505
+	ldr	r8, .L1279
8506
+	asrs	r2, r3, #1
8507
+	lsls	r3, r3, #4
8508
+	str	r3, [sp, #48]
8509
+	lsls	r3, r2, #2
8510
+	str	r2, [sp, #8]
8511
+	str	r3, [sp, #44]
8157
8512
 	lsls	r3, r2, #1
8158
-	str	r3, [sp, #8]
8513
+	str	r3, [sp, #28]
8159
8514
 	movs	r3, #0
8160
-.L1297:
8161
-	str	r3, [sp, #20]
8162
-	ldrb	r3, [sp, #20]	@ zero_extendqisi2
8163
-	str	r3, [sp, #16]
8164
-	ldr	r3, .L1299
8165
-	ldr	r2, [sp, #16]
8166
-	ldrb	r3, [r3, #2230]	@ zero_extendqisi2
8515
+	str	r3, [sp, #24]
8516
+.L1180:
8517
+	ldrb	r3, [sp, #24]	@ zero_extendqisi2
8518
+	str	r3, [sp, #12]
8519
+	ldr	r2, [sp, #12]
8520
+	ldrb	r3, [r8, #2234]	@ zero_extendqisi2
8167
8521
 	cmp	r3, r2
8168
-	bhi	.L1250
8169
-.L1205:
8170
-	ldr	r3, .L1299
8171
-	strb	r6, [r3, #1211]
8172
-	strb	r5, [r3, #1212]
8173
-	add	sp, sp, #44
8174
-	@ sp needed
8175
-	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
8176
-.L1250:
8177
-	ldr	r2, [sp, #16]
8178
-	ldr	r3, .L1299
8179
-	add	r3, r3, r2
8180
-	ldrb	fp, [r3, #2232]	@ zero_extendqisi2
8181
-	ldr	r3, .L1299
8182
-	add	r3, r3, fp, lsl #3
8183
-	mov	r0, fp
8184
-	ldr	r10, [r3, #12]
8185
-	ldrb	r3, [r3, #16]	@ zero_extendqisi2
8186
-	lsls	r7, r3, #8
8187
-	str	r3, [sp, #4]
8188
-	add	r8, r10, r7
8522
+	bls	.L1179
8523
+	ldr	r3, [sp, #12]
8524
+	add	r3, r8, r3
8525
+	ldrb	r10, [r3, #2236]	@ zero_extendqisi2
8526
+	ldr	fp, [r8, r10, lsl #3]
8527
+	mov	r0, r10
8528
+	add	r3, r8, r10, lsl #3
8529
+	ldrb	r9, [r3, #4]	@ zero_extendqisi2
8189
8530
 	movs	r3, #255
8190
-	str	r3, [r8, #2056]
8531
+	add	r7, fp, r9, lsl #8
8532
+	str	r3, [r7, #2056]
8191
8533
 	bl	NandcWaitFlashReady
8192
8534
 	cmp	r4, #7
8193
-	bne	.L1207
8194
-	ldr	r2, .L1299+12
8195
-	movs	r3, #160
8196
-	mla	ip, r3, fp, r2
8197
-	add	r3, ip, #28
8198
-	b	.L1294
8199
-.L1207:
8200
-	cmp	r4, #8
8201
-	beq	.L1209
8202
-	ldr	r2, .L1299+12
8203
-	add	ip, r2, fp, lsl #6
8204
-	add	r3, ip, #20
8205
-.L1294:
8206
-	add	r7, r7, r10
8535
+	bne	.L1181
8536
+	ldr	r3, .L1279+12
8537
+	movs	r0, #160
8538
+	mla	r0, r0, r10, r3
8539
+	add	r3, r0, #28
8540
+.L1275:
8541
+	str	r3, [sp, #16]
8207
8542
 	cmp	r4, #4
8208
-	str	r3, [sp, #24]
8209
-	mov	r3, #54
8210
-	str	r3, [r7, #2056]
8211
-	bne	.L1210
8212
-	movs	r3, #255
8213
-	str	r3, [r7, #2052]
8214
-	movs	r3, #64
8215
-	str	r3, [r7, #2048]
8216
-	movs	r3, #204
8217
-	b	.L1295
8218
-.L1210:
8219
-	subs	r3, r4, #5
8220
-	cmp	r3, #1
8221
-	bhi	.L1212
8222
-	ldr	r3, .L1299
8223
-	ldrb	r2, [r3, #1214]	@ zero_extendqisi2
8224
-	ldr	r3, [sp, #4]
8225
-	add	r3, r10, r3, lsl #8
8543
+	add	r3, fp, r9, lsl #8
8544
+	mov	r2, #54
8545
+	str	r2, [r3, #2056]
8546
+	bne	.L1184
8547
+	movs	r2, #255
8548
+	str	r2, [r3, #2052]
8549
+	movs	r2, #64
8550
+	str	r2, [r3, #2048]
8551
+	movs	r2, #204
8552
+.L1276:
8553
+	str	r2, [r3, #2052]
8554
+	movs	r2, #77
8555
+	b	.L1277
8556
+.L1181:
8557
+	cmp	r4, #8
8558
+	beq	.L1183
8559
+	ldr	r0, .L1279+12
8560
+	add	r0, r0, r10, lsl #6
8561
+	add	r3, r0, #20
8562
+	b	.L1275
8563
+.L1280:
8564
+	.align	2
8565
+.L1279:
8566
+	.word	.LANCHOR0
8567
+	.word	.LANCHOR1
8568
+	.word	.LANCHOR1+3384
8569
+	.word	.LANCHOR0+1216
8570
+.L1184:
8571
+	subs	r2, r4, #5
8572
+	cmp	r2, #1
8573
+	bhi	.L1186
8574
+	ldrb	r2, [r8, #1220]	@ zero_extendqisi2
8226
8575
 	str	r2, [r3, #2052]
8227
8576
 	movs	r2, #82
8577
+.L1277:
8228
8578
 	str	r2, [r3, #2048]
8229
-	b	.L1211
8230
-.L1212:
8231
-	cmp	r4, #7
8232
-	bne	.L1211
8233
-	movs	r3, #174
8234
-	str	r3, [r7, #2052]
8235
-	movs	r3, #0
8236
-	str	r3, [r7, #2048]
8237
-	movs	r3, #176
8238
-.L1295:
8239
-	str	r3, [r7, #2052]
8240
-	movs	r3, #77
8241
-	str	r3, [r7, #2048]
8242
-.L1211:
8243
-	ldr	r3, [sp, #4]
8579
+.L1185:
8580
+	add	r3, fp, r9, lsl #8
8581
+	movs	r2, #22
8244
8582
 	cmp	r4, #6
8245
-	mov	r2, #22
8246
-	add	r3, r10, r3, lsl #8
8247
8583
 	str	r2, [r3, #2056]
8248
8584
 	mov	r2, #23
8249
8585
 	str	r2, [r3, #2056]
..
..
@@ -8262,314 +8598,334 @@
8262
8598
 	str	r2, [r3, #2052]
8263
8599
 	movs	r2, #0
8264
8600
 	str	r2, [r3, #2052]
8265
-.L1251:
8266
-	ldr	r3, [sp, #4]
8601
+.L1228:
8602
+	add	r3, fp, r9, lsl #8
8267
8603
 	movs	r2, #48
8268
-	mov	r0, fp
8269
-	add	r3, r10, r3, lsl #8
8604
+	mov	r0, r10
8270
8605
 	str	r2, [r3, #2056]
8271
8606
 	bl	NandcWaitFlashReady
8272
8607
 	subs	r3, r4, #5
8273
8608
 	cmp	r3, #1
8274
-	str	r3, [sp, #28]
8275
-	bls	.L1255
8609
+	str	r3, [sp, #32]
8610
+	bls	.L1231
8276
8611
 	cmp	r4, #8
8277
-	beq	.L1255
8612
+	beq	.L1231
8278
8613
 	cmp	r4, #7
8279
-	ite	ne
8280
-	movne	r2, #2
8614
+	ite	eq
8281
8615
 	moveq	r2, #32
8282
-	b	.L1215
8283
-.L1300:
8284
-	.align	2
8285
-.L1299:
8286
-	.word	.LANCHOR0
8287
-	.word	.LANCHOR1
8288
-	.word	.LANCHOR1+3388
8289
-	.word	.LANCHOR0+1210
8290
-.L1255:
8291
-	movs	r2, #16
8292
-.L1215:
8293
-	ldr	r3, .L1301
8294
-	ldr	r1, [sp, #4]
8295
-	ldr	r3, [r3, #1184]
8296
-	add	r0, r10, r1, lsl #8
8297
-	mov	r7, r3
8298
-.L1216:
8299
-	ldr	r1, [r0, #2048]
8300
-	strb	r1, [r7], #1
8301
-	subs	r1, r7, r3
8302
-	uxtb	r1, r1
8303
-	cmp	r1, r2
8304
-	bcc	.L1216
8616
+	movne	r2, #2
8617
+.L1189:
8618
+	ldr	r3, .L1281
8619
+	subs	r2, r2, #1
8620
+	add	r7, fp, r9, lsl #8
8621
+	ldr	r3, [r3, #1192]
8622
+	str	r7, [sp, #4]
8623
+	subs	r1, r3, #1
8624
+	uxtab	r2, r3, r2
8625
+	mov	r0, r1
8626
+.L1190:
8627
+	ldr	r7, [sp, #4]
8628
+	ldr	r7, [r7, #2048]
8629
+	strb	r7, [r0, #1]!
8630
+	cmp	r0, r2
8631
+	bne	.L1190
8305
8632
 	cmp	r4, #8
8306
-	bne	.L1217
8633
+	bne	.L1191
8307
8634
 	movs	r2, #0
8308
-.L1219:
8309
-	ldrb	r7, [r3, r2, lsl #2]	@ zero_extendqisi2
8635
+.L1193:
8636
+	ldrb	r0, [r3, r2, lsl #2]	@ zero_extendqisi2
8310
8637
 	uxtb	r1, r2
8311
-	cmp	r7, #50
8312
-	beq	.L1218
8313
-	add	r7, r3, r2, lsl #2
8314
-	ldrb	r7, [r7, #1]	@ zero_extendqisi2
8315
-	cmp	r7, #5
8316
-	beq	.L1218
8638
+	cmp	r0, #50
8639
+	beq	.L1192
8640
+	add	r0, r3, r2, lsl #2
8641
+	ldrb	r0, [r0, #1]	@ zero_extendqisi2
8642
+	cmp	r0, #5
8643
+	beq	.L1192
8317
8644
 	adds	r2, r2, #1
8318
8645
 	cmp	r2, #8
8319
-	bne	.L1219
8320
-	b	.L1220
8321
-.L1218:
8322
-	cmp	r1, #7
8323
-	bne	.L1221
8324
-.L1220:
8325
-	ldr	r0, .L1301+4
8646
+	bne	.L1193
8647
+.L1194:
8326
8648
 	movs	r1, #0
8649
+	ldr	r0, .L1281+4
8327
8650
 	bl	printk
8328
-.L1222:
8329
-	b	.L1222
8330
-.L1217:
8651
+.L1196:
8652
+	b	.L1196
8653
+.L1186:
8331
8654
 	cmp	r4, #7
8332
-	bne	.L1223
8655
+	bne	.L1185
8656
+	movs	r2, #174
8657
+	str	r2, [r3, #2052]
8333
8658
 	movs	r2, #0
8334
-.L1225:
8335
-	ldrb	r7, [r3, r2, lsl #2]	@ zero_extendqisi2
8336
-	uxtb	r1, r2
8337
-	cmp	r7, #12
8338
-	beq	.L1224
8339
-	add	r7, r3, r2, lsl #2
8340
-	ldrb	r7, [r7, #1]	@ zero_extendqisi2
8341
-	cmp	r7, #10
8342
-	beq	.L1224
8343
-	adds	r2, r2, #1
8344
-	cmp	r2, #8
8345
-	bne	.L1225
8346
-	b	.L1226
8347
-.L1224:
8348
-	cmp	r1, #7
8349
-	bne	.L1221
8350
-.L1226:
8351
-	ldr	r0, .L1301+4
8352
-	movs	r1, #0
8353
-	bl	printk
8354
-.L1227:
8355
-	b	.L1227
8356
-.L1223:
8357
-	cmp	r4, #6
8358
-	bne	.L1221
8359
-	subs	r2, r3, #1
8360
-	adds	r3, r3, #7
8361
-.L1228:
8362
-	ldrb	r1, [r2, #1]!	@ zero_extendqisi2
8363
-	cmp	r1, #12
8364
-	beq	.L1221
8365
-	ldrb	r1, [r2, #8]	@ zero_extendqisi2
8366
-	cmp	r1, #4
8367
-	beq	.L1221
8368
-	cmp	r2, r3
8369
-	bne	.L1228
8370
-	ldr	r0, .L1301+4
8371
-	movs	r1, #0
8372
-	bl	printk
8373
-.L1230:
8374
-	b	.L1230
8375
-.L1221:
8376
-	ldr	r1, .L1301
8377
-	ldr	r7, [sp, #36]
8378
-	ldr	r2, [r1, #1184]
8379
-	adds	r7, r2, r7
8380
-	mov	r3, r2
8659
+	str	r2, [r3, #2048]
8660
+	movs	r2, #176
8661
+	b	.L1276
8381
8662
 .L1231:
8382
-	cmp	r3, r7
8383
-	beq	.L1298
8384
-	ldr	lr, [r0, #2048]
8385
-	strb	lr, [r3], #1
8386
-	b	.L1231
8387
-.L1298:
8388
-	ldr	r3, [r1, #1184]
8389
-	movs	r0, #8
8390
-	ldr	r1, [sp, #8]
8391
-	adds	r1, r3, r1
8392
-	str	r1, [sp, #32]
8393
-.L1234:
8394
-	ldr	r7, [sp, #8]
8395
-	add	lr, r1, r7
8396
-.L1233:
8397
-	ldrh	r7, [r1]
8398
-	mvns	r7, r7
8399
-	strh	r7, [r1], #2	@ movhi
8400
-	cmp	r1, lr
8401
-	bne	.L1233
8402
-	ldr	r7, [sp, #8]
8403
-	subs	r0, r0, #1
8404
-	add	r1, r1, r7
8405
-	bne	.L1234
8406
-	str	r3, [sp, #12]
8407
-.L1235:
8663
+	movs	r2, #16
8664
+	b	.L1189
8665
+.L1192:
8666
+	cmp	r1, #6
8667
+	bhi	.L1194
8668
+.L1195:
8669
+	ldr	r3, .L1281
8670
+	ldr	r3, [r3, #1192]
8671
+	str	r3, [sp]
8672
+.L1205:
8673
+	ldr	r2, [sp]
8674
+	ldr	r0, [sp, #48]
8675
+	subs	r1, r3, r2
8676
+	cmp	r1, r0
8677
+	blt	.L1206
8678
+	ldr	r3, .L1281
8679
+	ldr	r1, [r3, #1192]
8680
+	ldr	r3, [sp, #28]
8681
+	adds	r0, r1, r3
8682
+	movs	r3, #8
8683
+.L1208:
8684
+	mov	ip, r0
8685
+	movs	r7, #0
8686
+.L1207:
8687
+	ldr	r2, [sp, #8]
8688
+	adds	r7, r7, #1
8689
+	ldrh	lr, [ip]
8690
+	cmp	r2, r7
8691
+	mvn	lr, lr
8692
+	strh	lr, [ip], #2	@ movhi
8693
+	bgt	.L1207
8694
+	ldr	r2, [sp, #44]
8695
+	subs	r3, r3, #1
8696
+	add	r0, r0, r2
8697
+	bne	.L1208
8698
+	str	r3, [sp, #20]
8699
+.L1214:
8408
8700
 	movs	r7, #0
8409
8701
 	mov	r0, r7
8410
-.L1238:
8411
-	movs	r3, #1
8702
+.L1213:
8703
+	movs	r2, #1
8704
+	mov	ip, r1
8705
+	lsls	r2, r2, r0
8412
8706
 	mov	lr, #0
8413
-	mov	r8, #16
8414
-	lsl	r1, r3, r0
8415
-	mov	ip, lr
8416
-.L1236:
8417
-	ldr	r3, [sp, #12]
8418
-	ldrh	r9, [r3, lr]
8419
-	ldr	r3, [sp, #8]
8420
-	and	r9, r9, r1
8421
-	cmp	r9, r1
8707
+	str	r2, [sp, #36]
8708
+	movs	r2, #16
8709
+	str	r2, [sp, #40]
8710
+.L1211:
8711
+	ldrh	r2, [ip]
8712
+	str	r2, [sp, #52]
8713
+	ldr	r2, [sp, #36]
8714
+	mov	r3, r2
8715
+	ldr	r2, [sp, #52]
8716
+	bics	r3, r3, r2
8717
+	ldr	r2, [sp, #28]
8422
8718
 	it	eq
8423
-	addeq	ip, ip, #1
8424
-	subs	r8, r8, #1
8425
-	add	lr, lr, r3
8426
-	bne	.L1236
8427
-	cmp	ip, #8
8719
+	addeq	lr, lr, #1
8720
+	add	ip, ip, r2
8721
+	ldr	r2, [sp, #40]
8722
+	subs	r2, r2, #1
8723
+	str	r2, [sp, #40]
8724
+	bne	.L1211
8725
+	cmp	lr, #8
8428
8726
 	add	r0, r0, #1
8429
-	itt	hi
8430
-	orrhi	r7, r7, r1
8727
+	ittt	hi
8728
+	ldrhi	r2, [sp, #36]
8729
+	orrhi	r7, r7, r2
8431
8730
 	uxthhi	r7, r7
8432
8731
 	cmp	r0, #16
8433
-	bne	.L1238
8434
-	ldr	r3, [sp, #12]
8435
-	strh	r7, [r3], #2	@ movhi
8436
-	str	r3, [sp, #12]
8437
-	ldr	r1, [sp, #12]
8438
-	ldr	r3, [sp, #32]
8439
-	cmp	r1, r3
8440
-	bne	.L1235
8441
-	ldr	r3, .L1301
8442
-	ldr	r1, [r3, #1184]
8732
+	bne	.L1213
8733
+	ldr	r3, [sp, #20]
8734
+	ldr	r2, [sp, #8]
8735
+	strh	r7, [r1], #2	@ movhi
8736
+	adds	r3, r3, #1
8737
+	cmp	r2, r3
8738
+	str	r3, [sp, #20]
8739
+	bgt	.L1214
8740
+	ldr	r3, .L1281
8741
+	ldr	r1, [r3, #1192]
8443
8742
 	movs	r3, #0
8444
8743
 	subs	r0, r1, #4
8445
8744
 	add	r7, r1, #28
8446
-.L1240:
8447
-	ldr	lr, [r0, #4]!
8448
-	cmp	lr, #0
8449
-	it	eq
8450
-	addeq	r3, r3, #1
8451
-	cmp	r0, r7
8452
-	bne	.L1240
8745
+.L1217:
8746
+	ldr	ip, [r0, #4]!
8747
+	cmp	ip, #0
8748
+	bne	.L1216
8749
+	adds	r3, r3, #1
8750
+.L1216:
8751
+	cmp	r7, r0
8752
+	bne	.L1217
8453
8753
 	cmp	r3, #7
8454
-	ble	.L1241
8455
-	ldr	r0, .L1301+8
8456
-	movs	r2, #1
8754
+	ble	.L1218
8755
+	ldr	r0, .L1281+8
8457
8756
 	mov	r3, #1024
8757
+	movs	r2, #1
8458
8758
 	bl	rknand_print_hex
8459
-	ldr	r0, .L1301+4
8460
8759
 	movs	r1, #0
8760
+	ldr	r0, .L1281+4
8461
8761
 	bl	printk
8462
-.L1242:
8463
-	b	.L1242
8464
-.L1241:
8465
-	cmp	r4, #6
8466
-	beq	.L1257
8762
+.L1219:
8763
+	b	.L1219
8764
+.L1191:
8467
8765
 	cmp	r4, #7
8468
-	beq	.L1258
8766
+	bne	.L1197
8767
+	movs	r2, #0
8768
+.L1199:
8769
+	ldrb	r0, [r3, r2, lsl #2]	@ zero_extendqisi2
8770
+	uxtb	r1, r2
8771
+	cmp	r0, #12
8772
+	beq	.L1198
8773
+	add	r0, r3, r2, lsl #2
8774
+	ldrb	r0, [r0, #1]	@ zero_extendqisi2
8775
+	cmp	r0, #10
8776
+	beq	.L1198
8777
+	adds	r2, r2, #1
8778
+	cmp	r2, #8
8779
+	bne	.L1199
8780
+.L1200:
8781
+	movs	r1, #0
8782
+	ldr	r0, .L1281+4
8783
+	bl	printk
8784
+.L1201:
8785
+	b	.L1201
8786
+.L1198:
8787
+	cmp	r1, #6
8788
+	bls	.L1195
8789
+	b	.L1200
8790
+.L1197:
8791
+	cmp	r4, #6
8792
+	bne	.L1195
8793
+	adds	r3, r3, #7
8794
+.L1202:
8795
+	ldrb	r2, [r1, #1]!	@ zero_extendqisi2
8796
+	cmp	r2, #12
8797
+	beq	.L1195
8798
+	ldrb	r2, [r1, #8]	@ zero_extendqisi2
8799
+	cmp	r2, #4
8800
+	beq	.L1195
8801
+	cmp	r1, r3
8802
+	bne	.L1202
8803
+	movs	r1, #0
8804
+	ldr	r0, .L1281+4
8805
+	bl	printk
8806
+.L1204:
8807
+	b	.L1204
8808
+.L1206:
8809
+	ldr	r1, [sp, #4]
8810
+	ldr	r1, [r1, #2048]
8811
+	strb	r1, [r3], #1
8812
+	b	.L1205
8813
+.L1218:
8814
+	cmp	r4, #6
8815
+	beq	.L1233
8816
+	cmp	r4, #7
8817
+	beq	.L1234
8469
8818
 	cmp	r4, #8
8470
-	ite	ne
8471
-	movne	r0, #8
8472
-	moveq	r0, #5
8473
-	b	.L1243
8474
-.L1257:
8475
-	movs	r0, #4
8476
-	b	.L1243
8477
-.L1258:
8478
-	movs	r0, #10
8479
-.L1243:
8480
-	add	r9, r6, #-1
8481
-	ldr	r1, [sp, #24]
8482
-	movs	r7, #0
8483
-	uxtb	r9, r9
8484
-	add	r9, r9, #1
8485
-.L1244:
8486
-	mov	ip, r1
8487
-	mov	r3, r2
8488
-.L1245:
8489
-	ldrb	lr, [r3], #1	@ zero_extendqisi2
8490
-	strb	lr, [ip], #1
8491
-	rsb	lr, r2, r3
8492
-	uxtb	lr, lr
8493
-	cmp	lr, r6
8494
-	bcc	.L1245
8495
-	adds	r7, r7, #1
8496
-	add	r2, r2, r9
8497
-	cmp	r7, r5
8498
-	add	r1, r1, r0
8499
-	blt	.L1244
8500
-	ldr	r3, [sp, #4]
8501
-	mov	r0, fp
8502
-	add	r7, r10, r3, lsl #8
8503
-	movs	r3, #255
8504
-	str	r3, [r7, #2056]
8505
-	bl	NandcWaitFlashReady
8506
-	ldr	r3, [sp, #28]
8507
-	cmp	r3, #1
8508
-	bhi	.L1247
8509
-	movs	r3, #54
8510
-	str	r3, [r7, #2056]
8511
-	ldr	r3, .L1301+12
8512
-	mov	r1, #-1
8819
+	ite	eq
8820
+	moveq	r7, #5
8821
+	movne	r7, #8
8822
+.L1220:
8823
+	subs	r3, r6, #1
8513
8824
 	ldr	r0, [sp, #16]
8514
-	ldrb	r3, [r3, #1214]	@ zero_extendqisi2
8515
-	str	r3, [r7, #2052]
8825
+	uxtb	r3, r3
8826
+	mov	ip, #0
8827
+	adds	r3, r3, #1
8828
+	mov	r2, r3
8829
+.L1221:
8830
+	ldr	r1, [sp]
8831
+	str	r0, [sp, #16]
8832
+.L1222:
8833
+	ldr	r3, [sp, #16]
8834
+	ldrb	lr, [r1], #1	@ zero_extendqisi2
8835
+	strb	lr, [r3], #1
8836
+	str	r3, [sp, #16]
8837
+	ldr	r3, [sp]
8838
+	sub	lr, r1, r3
8839
+	uxtb	lr, lr
8840
+	cmp	r6, lr
8841
+	bhi	.L1222
8842
+	ldr	r1, [sp]
8843
+	add	ip, ip, #1
8844
+	cmp	r5, ip
8845
+	add	r0, r0, r7
8846
+	add	r1, r1, r2
8847
+	str	r1, [sp]
8848
+	bgt	.L1221
8849
+	add	r9, fp, r9, lsl #8
8850
+	movs	r3, #255
8851
+	mov	r0, r10
8852
+	str	r3, [r9, #2056]
8853
+	bl	NandcWaitFlashReady
8854
+	ldr	r3, [sp, #32]
8855
+	cmp	r3, #1
8856
+	bhi	.L1224
8857
+	movs	r3, #54
8858
+	ldr	r2, [sp, #4]
8859
+	str	r3, [r9, #2056]
8860
+	mov	r1, #-1
8861
+	ldrb	r3, [r8, #1220]	@ zero_extendqisi2
8862
+	ldr	r0, [sp, #12]
8863
+	str	r3, [r2, #2052]
8516
8864
 	movs	r3, #0
8517
-	str	r3, [r7, #2048]
8865
+	str	r3, [r2, #2048]
8518
8866
 	movs	r3, #22
8519
-	str	r3, [r7, #2056]
8867
+	str	r3, [r9, #2056]
8520
8868
 	bl	FlashReadCmd
8521
-	b	.L1248
8522
-.L1247:
8869
+.L1225:
8870
+	mov	r0, r10
8871
+	bl	NandcWaitFlashReady
8872
+	ldr	r3, [sp, #24]
8873
+	adds	r3, r3, #1
8874
+	str	r3, [sp, #24]
8875
+	b	.L1180
8876
+.L1233:
8877
+	movs	r7, #4
8878
+	b	.L1220
8879
+.L1234:
8880
+	movs	r7, #10
8881
+	b	.L1220
8882
+.L1224:
8523
8883
 	cmp	r4, #8
8524
8884
 	ite	eq
8525
8885
 	moveq	r3, #190
8526
8886
 	movne	r3, #56
8527
-	str	r3, [r7, #2056]
8528
-.L1248:
8529
-	mov	r0, fp
8530
-	bl	NandcWaitFlashReady
8531
-	ldr	r3, [sp, #20]
8532
-	adds	r3, r3, #1
8533
-	b	.L1297
8534
-.L1209:
8887
+	str	r3, [r9, #2056]
8888
+	b	.L1225
8889
+.L1183:
8535
8890
 	movs	r3, #120
8536
8891
 	movs	r2, #23
8537
-	str	r3, [r8, #2056]
8538
-	movs	r1, #25
8892
+	str	r3, [r7, #2056]
8539
8893
 	movs	r3, #0
8540
-	str	r3, [r8, #2052]
8541
-	str	r3, [r8, #2052]
8542
-	str	r3, [r8, #2052]
8543
-	str	r2, [r8, #2056]
8894
+	str	r3, [r7, #2052]
8895
+	movs	r1, #25
8896
+	str	r3, [r7, #2052]
8897
+	str	r3, [r7, #2052]
8898
+	str	r2, [r7, #2056]
8544
8899
 	movs	r2, #4
8545
-	str	r2, [r8, #2056]
8546
-	str	r1, [r8, #2056]
8900
+	str	r2, [r7, #2056]
8901
+	str	r1, [r7, #2056]
8547
8902
 	movs	r1, #218
8548
-	str	r1, [r8, #2056]
8903
+	str	r1, [r7, #2056]
8549
8904
 	movs	r1, #21
8550
-	str	r3, [r8, #2056]
8551
-	str	r3, [r8, #2052]
8552
-	str	r3, [r8, #2052]
8553
-	str	r1, [r8, #2052]
8554
-	str	r2, [r8, #2052]
8555
-	str	r3, [r8, #2052]
8556
-	ldr	r3, .L1301+16
8557
-	str	r3, [sp, #24]
8558
-	b	.L1251
8559
-.L1302:
8905
+	str	r3, [r7, #2056]
8906
+	str	r3, [r7, #2052]
8907
+	str	r3, [r7, #2052]
8908
+	str	r1, [r7, #2052]
8909
+	str	r2, [r7, #2052]
8910
+	str	r3, [r7, #2052]
8911
+	ldr	r3, .L1281+12
8912
+	str	r3, [sp, #16]
8913
+	b	.L1228
8914
+.L1282:
8560
8915
 	.align	2
8561
-.L1301:
8916
+.L1281:
8562
8917
 	.word	.LANCHOR4
8563
8918
 	.word	.LC85
8564
8919
 	.word	.LC86
8565
-	.word	.LANCHOR0
8566
-	.word	.LANCHOR0+1238
8920
+	.word	.LANCHOR0+1244
8567
8921
 	.fnend
8568
8922
 	.size	HynixGetReadRetryDefault, .-HynixGetReadRetryDefault
8569
8923
 	.align	1
8570
8924
 	.global	FlashGetReadRetryDefault
8925
+	.syntax unified
8571
8926
 	.thumb
8572
8927
 	.thumb_func
8928
+	.fpu softvfp
8573
8929
 	.type	FlashGetReadRetryDefault, %function
8574
8930
 FlashGetReadRetryDefault:
8575
8931
 	.fnstart
..
..
@@ -8578,245 +8934,248 @@
8578
8934
 	@ link register save eliminated.
8579
8935
 	mov	r3, r0
8580
8936
 	cmp	r0, #0
8581
-	beq	.L1303
8937
+	beq	.L1283
8582
8938
 	subs	r2, r0, #1
8583
8939
 	cmp	r2, #7
8584
-	bhi	.L1305
8940
+	bhi	.L1285
8585
8941
 	b	HynixGetReadRetryDefault
8586
-.L1305:
8942
+.L1285:
8587
8943
 	cmp	r0, #49
8588
-	bne	.L1306
8589
-	ldr	r0, .L1326
8944
+	bne	.L1286
8945
+	ldr	r0, .L1306
8590
8946
 	movs	r2, #64
8591
-	ldr	r1, .L1326+4
8592
-	addw	r0, r0, #1214
8593
-	strb	r3, [r0, #-4]
8947
+	ldr	r1, .L1306+4
8948
+	strb	r3, [r0, #1216]
8594
8949
 	movs	r3, #4
8595
-	strb	r3, [r0, #-3]
8950
+	strb	r3, [r0, #1217]
8596
8951
 	movs	r3, #15
8597
-	strb	r3, [r0, #-2]
8598
-	b	.L1324
8599
-.L1306:
8952
+	strb	r3, [r0, #1218]
8953
+.L1304:
8954
+	addw	r0, r0, #1220
8955
+	b	ftl_memcpy
8956
+.L1286:
8600
8957
 	cmp	r0, #33
8601
-	beq	.L1307
8958
+	beq	.L1287
8602
8959
 	sub	r2, r0, #65
8603
8960
 	cmp	r2, #1
8604
-	bhi	.L1308
8605
-.L1307:
8606
-	ldr	r0, .L1326
8607
-	strb	r3, [r0, #1210]
8961
+	bhi	.L1288
8962
+.L1287:
8963
+	ldr	r0, .L1306
8964
+	strb	r3, [r0, #1216]
8608
8965
 	movs	r3, #4
8609
-	b	.L1325
8610
-.L1308:
8611
-	cmp	r0, #34
8612
-	beq	.L1309
8613
-	cmp	r0, #67
8614
-	bne	.L1310
8615
-.L1309:
8616
-	ldr	r0, .L1326
8617
-	strb	r3, [r0, #1210]
8618
-	movs	r3, #5
8619
-.L1325:
8620
-	strb	r3, [r0, #1211]
8621
-	movs	r2, #45
8966
+.L1305:
8967
+	strb	r3, [r0, #1217]
8622
8968
 	movs	r3, #7
8623
-	addw	r0, r0, #1214
8624
-	strb	r3, [r0, #-2]
8625
-	ldr	r1, .L1326+8
8626
-	b	.L1324
8627
-.L1310:
8628
-	cmp	r0, #35
8629
-	beq	.L1311
8630
-	cmp	r0, #68
8631
-	bne	.L1303
8632
-.L1311:
8633
-	ldr	r0, .L1326
8634
-	movs	r2, #95
8635
-	ldr	r1, .L1326+12
8636
-	addw	r0, r0, #1214
8637
-	strb	r3, [r0, #-4]
8969
+	strb	r3, [r0, #1218]
8970
+	movs	r2, #45
8971
+	ldr	r1, .L1306+8
8972
+	b	.L1304
8973
+.L1288:
8974
+	cmp	r0, #34
8975
+	beq	.L1289
8976
+	cmp	r0, #67
8977
+	bne	.L1290
8978
+.L1289:
8979
+	ldr	r0, .L1306
8980
+	strb	r3, [r0, #1216]
8638
8981
 	movs	r3, #5
8639
-	strb	r3, [r0, #-3]
8982
+	b	.L1305
8983
+.L1290:
8984
+	cmp	r0, #35
8985
+	beq	.L1291
8986
+	cmp	r0, #68
8987
+	bne	.L1283
8988
+.L1291:
8989
+	ldr	r0, .L1306
8990
+	movs	r2, #95
8991
+	ldr	r1, .L1306+12
8992
+	strb	r3, [r0, #1216]
8993
+	movs	r3, #5
8994
+	strb	r3, [r0, #1217]
8640
8995
 	movs	r3, #17
8641
-	strb	r3, [r0, #-2]
8642
-.L1324:
8643
-	b	ftl_memcpy
8644
-.L1303:
8996
+	strb	r3, [r0, #1218]
8997
+	b	.L1304
8998
+.L1283:
8645
8999
 	bx	lr
8646
-.L1327:
9000
+.L1307:
8647
9001
 	.align	2
8648
-.L1326:
9002
+.L1306:
8649
9003
 	.word	.LANCHOR0
8650
-	.word	.LANCHOR1+408
9004
+	.word	.LANCHOR1+404
8651
9005
 	.word	.LANCHOR1+256
8652
-	.word	.LANCHOR1+304
9006
+	.word	.LANCHOR1+301
8653
9007
 	.fnend
8654
9008
 	.size	FlashGetReadRetryDefault, .-FlashGetReadRetryDefault
8655
9009
 	.align	1
8656
9010
 	.global	NandcXferComp
9011
+	.syntax unified
8657
9012
 	.thumb
8658
9013
 	.thumb_func
9014
+	.fpu softvfp
8659
9015
 	.type	NandcXferComp, %function
8660
9016
 NandcXferComp:
8661
9017
 	.fnstart
8662
9018
 	@ args = 0, pretend = 0, frame = 8
8663
9019
 	@ frame_needed = 0, uses_anonymous_args = 0
8664
-	push	{r0, r1, r4, r5, r6, lr}
8665
-	.save {r4, r5, r6, lr}
9020
+	push	{r0, r1, r4, r5, r6, r7, r8, lr}
9021
+	.save {r4, r5, r6, r7, r8, lr}
8666
9022
 	.pad #8
8667
-	ldr	r5, .L1367
8668
-	add	r0, r5, r0, lsl #3
8669
-	ldr	r3, [r5, #2260]
8670
-	ldr	r4, [r0, #12]
9023
+	ldr	r5, .L1347
9024
+	ldr	r3, [r5, #2264]
9025
+	ldr	r4, [r5, r0, lsl #3]
8671
9026
 	cmp	r3, #3
8672
-	bls	.L1359
9027
+	bls	.L1339
8673
9028
 	ldr	r3, [r4, #16]
8674
9029
 	lsls	r6, r3, #29
8675
-	bpl	.L1359
9030
+	bpl	.L1339
8676
9031
 	ldr	r6, [r4, #16]
8677
9032
 	ldr	r3, [r4, #8]
8678
9033
 	ubfx	r6, r6, #1, #1
8679
9034
 	str	r3, [sp]
8680
9035
 	cmp	r6, #0
8681
-	beq	.L1341
9036
+	beq	.L1310
9037
+	ldr	r7, .L1347+4
8682
9038
 	movs	r6, #0
8683
-.L1331:
9039
+	ldr	r8, .L1347+12
9040
+.L1311:
8684
9041
 	ldr	r2, [r4, #28]
8685
9042
 	ldr	r3, [sp]
8686
9043
 	ubfx	r2, r2, #16, #5
8687
9044
 	ubfx	r3, r3, #22, #6
8688
9045
 	cmp	r2, r3
8689
-	bge	.L1339
8690
-	ldr	r3, [r5, #2260]
9046
+	bge	.L1319
9047
+	ldr	r3, [r5, #2264]
8691
9048
 	cmp	r3, #5
8692
-	bhi	.L1332
8693
-.L1335:
9049
+	bhi	.L1312
9050
+.L1315:
8694
9051
 	adds	r6, r6, #1
8695
-	bic	r3, r6, #-16777216
8696
-	cmp	r3, #0
8697
-	bne	.L1334
9052
+	bics	r3, r6, #-16777216
9053
+	bne	.L1314
8698
9054
 	ldr	r2, [r4, #28]
8699
9055
 	mov	r1, r6
8700
9056
 	ldr	r3, [sp]
9057
+	mov	r0, r7
8701
9058
 	ubfx	r2, r2, #16, #5
8702
-	ldr	r0, .L1367+4
8703
9059
 	ubfx	r3, r3, #22, #6
8704
9060
 	bl	printk
8705
-	ldr	r0, .L1367+8
8706
-	mov	r1, r4
8707
-	movs	r2, #4
8708
9061
 	mov	r3, #512
9062
+	movs	r2, #4
9063
+	mov	r1, r4
9064
+	mov	r0, r8
8709
9065
 	bl	rknand_print_hex
8710
-	b	.L1334
8711
-.L1332:
9066
+.L1314:
9067
+	movs	r1, #5
9068
+	movs	r0, #1
9069
+	bl	usleep_range
9070
+	b	.L1311
9071
+.L1312:
8712
9072
 	ldr	r3, [r4]
8713
9073
 	str	r3, [sp, #4]
8714
9074
 	ldr	r3, [sp, #4]
8715
9075
 	lsls	r0, r3, #18
8716
-	bpl	.L1335
9076
+	bpl	.L1315
8717
9077
 	ldr	r3, [sp, #4]
8718
9078
 	lsls	r1, r3, #14
8719
-	bpl	.L1335
8720
-.L1339:
8721
-	ldr	r3, [r5, #2296]
8722
-	ldr	r4, .L1367
8723
-	cmp	r3, #0
8724
-	beq	.L1340
9079
+	bpl	.L1315
9080
+.L1319:
9081
+	ldr	r3, [r5, #2300]
9082
+	cbz	r3, .L1320
8725
9083
 	ldr	r1, [sp]
8726
9084
 	movs	r2, #0
8727
-	ldr	r0, [r4, #2288]
9085
+	ldr	r0, [r5, #2292]
8728
9086
 	ubfx	r1, r1, #22, #5
8729
9087
 	lsls	r1, r1, #10
8730
9088
 	bl	rknand_dma_unmap_single
8731
-	ldr	r0, [r4, #2292]
8732
-	movs	r2, #0
8733
9089
 	ldr	r1, [sp]
9090
+	movs	r2, #0
9091
+	ldr	r0, [r5, #2296]
8734
9092
 	ubfx	r1, r1, #22, #5
8735
9093
 	lsls	r1, r1, #7
8736
9094
 	bl	rknand_dma_unmap_single
8737
-	b	.L1340
8738
-.L1334:
8739
-	movs	r0, #1
8740
-	movs	r1, #5
8741
-	bl	usleep_range
8742
-	b	.L1331
8743
-.L1343:
9095
+.L1320:
9096
+	movs	r3, #0
9097
+	str	r3, [r5, #2300]
9098
+.L1308:
9099
+	add	sp, sp, #8
9100
+	@ sp needed
9101
+	pop	{r4, r5, r6, r7, r8, pc}
9102
+.L1310:
9103
+	ldr	r7, .L1347+8
9104
+	ldr	r8, .L1347+12
9105
+.L1321:
9106
+	ldr	r3, [sp]
9107
+	lsls	r2, r3, #11
9108
+	bpl	.L1323
9109
+	ldr	r3, [r5, #2308]
9110
+	cbz	r3, .L1324
9111
+	mov	r0, r4
9112
+	bl	NandcSendDumpDataStart
9113
+.L1324:
9114
+	ldr	r3, [r5, #2300]
9115
+	cbz	r3, .L1325
9116
+	ldr	r1, [sp]
9117
+	movs	r2, #1
9118
+	ldr	r0, [r5, #2292]
9119
+	ubfx	r1, r1, #22, #5
9120
+	lsls	r1, r1, #10
9121
+	bl	rknand_dma_unmap_single
9122
+	ldr	r1, [sp]
9123
+	movs	r2, #1
9124
+	ldr	r0, [r5, #2296]
9125
+	ubfx	r1, r1, #22, #5
9126
+	lsls	r1, r1, #7
9127
+	bl	rknand_dma_unmap_single
9128
+.L1325:
9129
+	ldr	r3, [r5, #2308]
9130
+	cmp	r3, #0
9131
+	beq	.L1320
9132
+	mov	r0, r4
9133
+	bl	NandcSendDumpDataDone
9134
+	b	.L1320
9135
+.L1323:
8744
9136
 	ldr	r3, [r4, #8]
8745
9137
 	adds	r6, r6, #1
8746
9138
 	str	r3, [sp]
8747
-	bic	r3, r6, #-16777216
8748
-	cbnz	r3, .L1342
9139
+	bics	r3, r6, #-16777216
9140
+	bne	.L1322
8749
9141
 	ldr	r2, [sp]
8750
9142
 	mov	r1, r6
8751
9143
 	ldr	r3, [r4, #28]
8752
-	ldr	r0, .L1367+12
9144
+	mov	r0, r7
8753
9145
 	ubfx	r3, r3, #16, #5
8754
9146
 	bl	printk
8755
-	ldr	r0, .L1367+8
8756
-	mov	r1, r4
8757
-	movs	r2, #4
8758
9147
 	mov	r3, #512
9148
+	movs	r2, #4
9149
+	mov	r1, r4
9150
+	mov	r0, r8
8759
9151
 	bl	rknand_print_hex
8760
-.L1342:
8761
-	movs	r0, #1
9152
+.L1322:
8762
9153
 	movs	r1, #5
9154
+	movs	r0, #1
8763
9155
 	bl	usleep_range
8764
-.L1341:
8765
-	ldr	r3, [sp]
8766
-	lsls	r2, r3, #11
8767
-	bpl	.L1343
8768
-	ldr	r3, [r5, #2304]
8769
-	cbz	r3, .L1344
8770
-	mov	r0, r4
8771
-	bl	NandcSendDumpDataStart
8772
-.L1344:
8773
-	ldr	r3, [r5, #2296]
8774
-	ldr	r6, .L1367
8775
-	cbz	r3, .L1345
8776
-	ldr	r1, [sp]
8777
-	movs	r2, #1
8778
-	ldr	r0, [r6, #2288]
8779
-	ubfx	r1, r1, #22, #5
8780
-	lsls	r1, r1, #10
8781
-	bl	rknand_dma_unmap_single
8782
-	ldr	r0, [r6, #2292]
8783
-	movs	r2, #1
8784
-	ldr	r1, [sp]
8785
-	ubfx	r1, r1, #22, #5
8786
-	lsls	r1, r1, #7
8787
-	bl	rknand_dma_unmap_single
8788
-.L1345:
8789
-	ldr	r3, [r5, #2304]
8790
-	cbz	r3, .L1340
8791
-	mov	r0, r4
8792
-	bl	NandcSendDumpDataDone
8793
-.L1340:
8794
-	movs	r3, #0
8795
-	str	r3, [r5, #2296]
8796
-	b	.L1328
8797
-.L1359:
9156
+	b	.L1321
9157
+.L1339:
8798
9158
 	ldr	r3, [r4, #8]
8799
9159
 	str	r3, [sp]
8800
9160
 	ldr	r3, [sp]
8801
9161
 	lsls	r3, r3, #11
8802
-	bpl	.L1359
8803
-.L1328:
8804
-	add	sp, sp, #8
8805
-	@ sp needed
8806
-	pop	{r4, r5, r6, pc}
8807
-.L1368:
9162
+	bpl	.L1339
9163
+	b	.L1308
9164
+.L1348:
8808
9165
 	.align	2
8809
-.L1367:
9166
+.L1347:
8810
9167
 	.word	.LANCHOR0
8811
9168
 	.word	.LC87
8812
-	.word	.LC88
8813
9169
 	.word	.LC89
9170
+	.word	.LC88
8814
9171
 	.fnend
8815
9172
 	.size	NandcXferComp, .-NandcXferComp
8816
9173
 	.align	1
8817
9174
 	.global	NandcXferData
9175
+	.syntax unified
8818
9176
 	.thumb
8819
9177
 	.thumb_func
9178
+	.fpu softvfp
8820
9179
 	.type	NandcXferData, %function
8821
9180
 NandcXferData:
8822
9181
 	.fnstart
..
..
@@ -8824,293 +9183,288 @@
8824
9183
 	@ frame_needed = 0, uses_anonymous_args = 0
8825
9184
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
8826
9185
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
8827
-	mov	r10, r3
8828
-	ldr	r6, .L1413
8829
-	tst	r10, #63
9186
+	mov	r8, r3
9187
+	ldr	r3, .L1385
9188
+	tst	r8, #63
8830
9189
 	.pad #92
8831
9190
 	sub	sp, sp, #92
8832
-	mov	r9, r0
8833
-	add	r3, r6, r0, lsl #3
9191
+	mov	r7, r0
8834
9192
 	mov	r5, r1
8835
-	mov	r7, r2
8836
-	ldr	r8, [r3, #12]
8837
-	bne	.L1370
8838
-	ldr	r3, [sp, #128]
8839
-	cbnz	r3, .L1371
8840
-	add	r0, sp, #24
8841
-	movs	r1, #255
9193
+	mov	r10, r2
9194
+	ldr	fp, [sp, #128]
9195
+	mov	r9, r3
9196
+	ldr	r6, [r3, r0, lsl #3]
9197
+	bne	.L1350
9198
+	cmp	fp, #0
9199
+	bne	.L1351
8842
9200
 	movs	r2, #64
9201
+	movs	r1, #255
9202
+	add	r0, sp, #24
8843
9203
 	bl	ftl_memset
8844
-	add	r3, sp, #24
8845
-	str	r3, [sp, #128]
8846
-.L1371:
8847
-	ldr	r3, [sp, #128]
8848
-	mov	r0, r9
9204
+	add	fp, sp, #24
9205
+.L1351:
8849
9206
 	mov	r1, r5
8850
-	str	r10, [sp]
8851
-	mov	r2, r7
8852
-	str	r3, [sp, #4]
9207
+	mov	r0, r7
9208
+	stm	sp, {r8, fp}
8853
9209
 	movs	r3, #0
9210
+	mov	r2, r10
8854
9211
 	bl	NandcXferStart
8855
-	mov	r0, r9
8856
9212
 	mov	r1, r5
9213
+	mov	r0, r7
8857
9214
 	bl	NandcXferComp
8858
9215
 	cmp	r5, #0
8859
-	bne	.L1397
8860
-	ldr	r3, [r6, #2308]
8861
-	lsrs	r4, r7, #1
9216
+	bne	.L1375
9217
+	ldr	r3, [r9, #2312]
9218
+	lsr	r0, r10, #1
8862
9219
 	mov	r2, r5
8863
-	mov	r1, r5
8864
9220
 	cmp	r3, #25
8865
-	ldr	r3, [sp, #128]
9221
+	mov	r3, r5
8866
9222
 	ite	cc
8867
-	movcc	lr, #64
8868
-	movcs	lr, #128
8869
-.L1374:
8870
-	cmp	r1, r4
8871
-	add	r3, r3, #4
8872
-	add	ip, r2, lr
8873
-	bcs	.L1411
8874
-	ldr	r0, [r6, #2276]
8875
-	lsrs	r2, r2, #2
8876
-	adds	r1, r1, #1
8877
-	ldr	r2, [r0, r2, lsl #2]
8878
-	lsrs	r0, r2, #8
8879
-	strb	r2, [r3, #-4]
8880
-	strb	r0, [r3, #-3]
8881
-	lsrs	r0, r2, #16
8882
-	lsrs	r2, r2, #24
8883
-	strb	r0, [r3, #-2]
8884
-	strb	r2, [r3, #-1]
8885
-	mov	r2, ip
8886
-	b	.L1374
8887
-.L1411:
9223
+	movcc	r4, #64
9224
+	movcs	r4, #128
9225
+.L1354:
9226
+	cmp	r2, r0
9227
+	add	fp, fp, #4
9228
+	add	r7, r4, r3
9229
+	bcc	.L1355
8888
9230
 	movs	r2, #0
8889
-	ldr	r0, [r6, #2308]
8890
-	ldr	r1, [r6, #2260]
8891
-	lsrs	r7, r7, #2
8892
-	mov	fp, r2
8893
-.L1376:
8894
-	cmp	r2, r7
8895
-	bcs	.L1372
8896
-	cmp	r0, #0
8897
-	beq	.L1372
8898
-	add	r3, r2, #8
8899
-	ldr	r3, [r8, r3, lsl #2]
8900
-	str	r3, [sp, #20]
8901
-	ldr	r3, [sp, #20]
8902
-	lsls	r4, r3, #29
8903
-	bmi	.L1400
8904
-	ldr	r4, [sp, #20]
8905
-	ubfx	r4, r4, #15, #1
8906
-	cmp	r4, #0
8907
-	bne	.L1400
8908
-	cmp	r1, #5
8909
-	bls	.L1378
8910
-	ldr	r4, [sp, #20]
8911
-	ldr	r3, [sp, #20]
8912
-	ubfx	r4, r4, #3, #5
8913
-	ubfx	ip, r3, #27, #1
8914
-	ldr	r3, [sp, #20]
8915
-	ldr	lr, [sp, #20]
8916
-	ubfx	r3, r3, #16, #5
8917
-	orr	r4, r4, ip, lsl #5
8918
-	ubfx	lr, lr, #29, #1
8919
-	orr	r3, r3, lr, lsl #5
8920
-	cmp	r4, r3
8921
-	ldr	r3, [sp, #20]
8922
-	ittee	hi
8923
-	ldrhi	r4, [sp, #20]
8924
-	ubfxhi	r3, r3, #3, #5
8925
-	ldrls	r4, [sp, #20]
8926
-	ubfxls	r3, r3, #16, #5
8927
-	ite	hi
8928
-	ubfxhi	r4, r4, #27, #1
8929
-	ubfxls	r4, r4, #29, #1
8930
-	b	.L1410
8931
-.L1378:
8932
-	cmp	r1, #3
8933
-	bls	.L1380
8934
-	ldr	r4, [sp, #20]
8935
-	ldr	r3, [sp, #20]
8936
-	ubfx	r4, r4, #3, #5
8937
-	ubfx	ip, r3, #28, #1
8938
-	ldr	r3, [sp, #20]
8939
-	ldr	lr, [sp, #20]
8940
-	ubfx	r3, r3, #16, #5
8941
-	orr	r4, r4, ip, lsl #5
8942
-	ubfx	lr, lr, #30, #1
8943
-	orr	r3, r3, lr, lsl #5
8944
-	cmp	r4, r3
8945
-	ldr	r3, [sp, #20]
8946
-	ittee	hi
8947
-	ldrhi	r4, [sp, #20]
8948
-	ubfxhi	r3, r3, #3, #5
8949
-	ldrls	r4, [sp, #20]
8950
-	ubfxls	r3, r3, #16, #5
8951
-	ite	hi
8952
-	ubfxhi	r4, r4, #28, #1
8953
-	ubfxls	r4, r4, #30, #1
8954
-.L1410:
8955
-	orr	r4, r3, r4, lsl #5
8956
-.L1380:
8957
-	cmp	fp, r4
8958
-	it	cc
8959
-	movcc	fp, r4
8960
-	b	.L1377
8961
-.L1400:
8962
-	mov	fp, #-1
8963
-.L1377:
8964
-	adds	r2, r2, #1
8965
-	b	.L1376
8966
-.L1397:
8967
-	mov	fp, #0
8968
-.L1372:
9231
+	lsr	r0, r10, #2
9232
+	ldr	r1, [r9, #2312]
9233
+	ldr	r4, [r9, #2264]
9234
+	mov	r9, r2
9235
+.L1356:
9236
+	cmp	r2, r0
9237
+	bcs	.L1352
9238
+	cbnz	r1, .L1362
9239
+.L1352:
8969
9240
 	movs	r3, #0
8970
-	str	r3, [r8, #16]
8971
-	b	.L1383
8972
-.L1370:
8973
-	cmp	r1, #1
8974
-	mov	r4, #0
8975
-	bne	.L1409
8976
-	mov	fp, r4
8977
-.L1384:
8978
-	cmp	r4, r7
8979
-	bcs	.L1412
8980
-	and	ip, r4, #3
8981
-	cmp	r10, #0
8982
-	beq	.L1403
8983
-	add	r3, r10, r4, lsl #9
8984
-	b	.L1386
8985
-.L1403:
8986
-	mov	r3, r10
8987
-.L1386:
8988
-	ldr	r2, [sp, #128]
8989
-	mov	r0, r8
8990
-	ldr	r1, [sp, #128]
8991
-	cmp	r2, #0
8992
-	str	ip, [sp, #8]
8993
-	ite	ne
8994
-	movne	r2, #2
8995
-	moveq	r2, #0
8996
-	mla	r2, r4, r2, r1
8997
-	movs	r1, #1
8998
-	adds	r4, r4, #2
8999
-	str	r2, [sp]
9000
-	mov	r2, ip
9001
-	bl	NandcCopy1KB
9002
-	mov	r0, r9
9003
-	movs	r1, #1
9004
-	movs	r2, #2
9005
-	ldr	ip, [sp, #8]
9006
-	str	fp, [sp]
9007
-	str	fp, [sp, #4]
9008
-	mov	r3, ip
9009
-	bl	NandcXferStart
9010
-	mov	r0, r9
9011
-	movs	r1, #1
9012
-	bl	NandcXferComp
9013
-	b	.L1384
9014
-.L1412:
9015
-	mov	fp, #0
9016
-	b	.L1383
9017
-.L1409:
9018
-	str	r4, [sp]
9019
-	mov	r1, r4
9020
-	str	r4, [sp, #4]
9021
-	movs	r2, #2
9022
-	mov	r3, r4
9023
-	mov	fp, r4
9024
-	bl	NandcXferStart
9025
-	str	r10, [sp, #8]
9026
-.L1389:
9027
-	cmp	r4, r7
9028
-	bcs	.L1383
9029
-	mov	r0, r9
9030
-	mov	r1, r5
9031
-	bl	NandcXferComp
9032
-	ldr	r3, [r8, #32]
9033
-	add	ip, r4, #2
9034
-	cmp	ip, r7
9035
-	str	r3, [sp, #20]
9036
-	bcs	.L1390
9037
-	movs	r3, #0
9038
-	mov	r0, r9
9039
-	str	r3, [sp]
9040
-	movs	r2, #2
9041
-	str	r3, [sp, #4]
9042
-	mov	r1, r3
9043
-	and	r3, ip, #3
9044
-	str	ip, [sp, #12]
9045
-	bl	NandcXferStart
9046
-	ldr	ip, [sp, #12]
9047
-.L1390:
9048
-	ldr	r3, [sp, #20]
9049
-	lsls	r3, r3, #29
9050
-	bmi	.L1405
9051
-	ldr	r2, [sp, #20]
9052
-	ldr	r3, [sp, #20]
9053
-	ubfx	r2, r2, #3, #5
9054
-	ubfx	r3, r3, #27, #1
9055
-	orr	r3, r2, r3, lsl #5
9056
-	cmp	fp, r3
9057
-	it	cc
9058
-	movcc	fp, r3
9059
-	b	.L1391
9060
-.L1405:
9061
-	mov	fp, #-1
9062
-.L1391:
9063
-	ldr	r1, [sp, #128]
9064
-	cmp	r10, #0
9065
-	ldr	r3, [sp, #8]
9066
-	it	eq
9067
-	moveq	r3, #0
9068
-	ldr	r0, [sp, #128]
9069
-	cmp	r1, #0
9070
-	ite	ne
9071
-	movne	r1, #2
9072
-	moveq	r1, #0
9073
-	sub	r2, ip, #2
9074
-	str	ip, [sp, #12]
9075
-	mla	r4, r4, r1, r0
9076
-	and	r2, r2, #3
9077
-	mov	r0, r8
9078
-	movs	r1, #0
9079
-	str	r4, [sp]
9080
-	bl	NandcCopy1KB
9081
-	ldr	ip, [sp, #12]
9082
-	ldr	r3, [sp, #8]
9083
-	mov	r4, ip
9084
-	add	r3, r3, #1024
9085
-	str	r3, [sp, #8]
9086
-	b	.L1389
9087
-.L1383:
9088
-	ldr	r3, [r6, #2260]
9241
+	str	r3, [r6, #16]
9242
+.L1363:
9243
+	ldr	r3, .L1385
9244
+	ldr	r3, [r3, #2264]
9089
9245
 	cmp	r3, #5
9090
-	bls	.L1395
9091
-	cbnz	r5, .L1395
9092
-	ldr	r3, [r8]
9246
+	bls	.L1349
9247
+	cbnz	r5, .L1349
9248
+	ldr	r3, [r6]
9093
9249
 	and	r2, r3, #139264
9094
9250
 	cmp	r2, #139264
9095
9251
 	ittt	eq
9096
-	moveq	fp, #-1
9252
+	moveq	r9, #-1
9097
9253
 	orreq	r3, r3, #131072
9098
-	streq	r3, [r8]
9099
-.L1395:
9100
-	mov	r0, fp
9254
+	streq	r3, [r6]
9255
+.L1349:
9256
+	mov	r0, r9
9101
9257
 	add	sp, sp, #92
9102
9258
 	@ sp needed
9103
9259
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
9104
-.L1414:
9260
+.L1355:
9261
+	ldr	r1, [r9, #2280]
9262
+	bic	r3, r3, #3
9263
+	adds	r2, r2, #1
9264
+	ldr	r3, [r1, r3]
9265
+	strb	r3, [fp, #-4]
9266
+	lsrs	r1, r3, #8
9267
+	strb	r1, [fp, #-3]
9268
+	lsrs	r1, r3, #16
9269
+	lsrs	r3, r3, #24
9270
+	strb	r1, [fp, #-2]
9271
+	strb	r3, [fp, #-1]
9272
+	mov	r3, r7
9273
+	b	.L1354
9274
+.L1362:
9275
+	add	r3, r2, #8
9276
+	ldr	r3, [r6, r3, lsl #2]
9277
+	str	r3, [sp, #20]
9278
+	ldr	r3, [sp, #20]
9279
+	lsls	r7, r3, #29
9280
+	bmi	.L1378
9281
+	ldr	r3, [sp, #20]
9282
+	ubfx	r3, r3, #15, #1
9283
+	cmp	r3, #0
9284
+	bne	.L1378
9285
+	cmp	r4, #5
9286
+	bls	.L1358
9287
+	ldr	r7, [sp, #20]
9288
+	ldr	r3, [sp, #20]
9289
+	ubfx	r7, r7, #3, #5
9290
+	ubfx	lr, r3, #27, #1
9291
+	ldr	r3, [sp, #20]
9292
+	ldr	ip, [sp, #20]
9293
+	orr	r7, r7, lr, lsl #5
9294
+	ubfx	r3, r3, #16, #5
9295
+	ubfx	ip, ip, #29, #1
9296
+	orr	r3, r3, ip, lsl #5
9297
+	cmp	r7, r3
9298
+	ldr	r3, [sp, #20]
9299
+	itete	hi
9300
+	ldrhi	r7, [sp, #20]
9301
+	ldrls	r7, [sp, #20]
9302
+	ubfxhi	r3, r3, #3, #5
9303
+	ubfxls	r3, r3, #16, #5
9304
+	ite	hi
9305
+	ubfxhi	r7, r7, #27, #1
9306
+	ubfxls	r7, r7, #29, #1
9307
+.L1384:
9308
+	orr	r3, r3, r7, lsl #5
9309
+.L1360:
9310
+	cmp	r9, r3
9311
+	it	cc
9312
+	movcc	r9, r3
9313
+.L1357:
9314
+	adds	r2, r2, #1
9315
+	b	.L1356
9316
+.L1358:
9317
+	cmp	r4, #3
9318
+	bls	.L1360
9319
+	ldr	r7, [sp, #20]
9320
+	ldr	r3, [sp, #20]
9321
+	ubfx	r7, r7, #3, #5
9322
+	ubfx	lr, r3, #28, #1
9323
+	ldr	r3, [sp, #20]
9324
+	ldr	ip, [sp, #20]
9325
+	orr	r7, r7, lr, lsl #5
9326
+	ubfx	r3, r3, #16, #5
9327
+	ubfx	ip, ip, #30, #1
9328
+	orr	r3, r3, ip, lsl #5
9329
+	cmp	r7, r3
9330
+	ldr	r3, [sp, #20]
9331
+	itete	hi
9332
+	ldrhi	r7, [sp, #20]
9333
+	ldrls	r7, [sp, #20]
9334
+	ubfxhi	r3, r3, #3, #5
9335
+	ubfxls	r3, r3, #16, #5
9336
+	ite	hi
9337
+	ubfxhi	r7, r7, #28, #1
9338
+	ubfxls	r7, r7, #30, #1
9339
+	b	.L1384
9340
+.L1378:
9341
+	mov	r9, #-1
9342
+	b	.L1357
9343
+.L1375:
9344
+	mov	r9, #0
9345
+	b	.L1352
9346
+.L1350:
9347
+	cmp	r1, #1
9348
+	bne	.L1364
9349
+	cmp	fp, #0
9350
+	mov	r4, fp
9351
+	mov	r9, #0
9352
+	ite	ne
9353
+	movne	r3, #4
9354
+	moveq	r3, #0
9355
+	str	r3, [sp, #8]
9356
+.L1365:
9357
+	cmp	r9, r10
9358
+	bcc	.L1367
9359
+	mov	r9, #0
9360
+	b	.L1363
9361
+.L1367:
9362
+	and	fp, r9, #3
9363
+	cmp	r8, #0
9364
+	beq	.L1380
9365
+	add	r3, r8, r9, lsl #9
9366
+.L1366:
9367
+	str	r4, [sp]
9368
+	mov	r2, fp
9369
+	movs	r1, #1
9370
+	mov	r0, r6
9371
+	bl	NandcCopy1KB
9372
+	movs	r3, #0
9373
+	movs	r2, #2
9374
+	str	r3, [sp, #4]
9375
+	movs	r1, #1
9376
+	str	r3, [sp]
9377
+	mov	r0, r7
9378
+	mov	r3, fp
9379
+	add	r9, r9, #2
9380
+	bl	NandcXferStart
9381
+	movs	r1, #1
9382
+	mov	r0, r7
9383
+	bl	NandcXferComp
9384
+	ldr	r3, [sp, #8]
9385
+	add	r4, r4, r3
9386
+	b	.L1365
9387
+.L1380:
9388
+	mov	r3, r8
9389
+	b	.L1366
9390
+.L1364:
9391
+	movs	r4, #0
9392
+	movs	r2, #2
9393
+	mov	r3, r4
9394
+	str	r4, [sp, #4]
9395
+	str	r4, [sp]
9396
+	mov	r1, r4
9397
+	bl	NandcXferStart
9398
+	mov	r9, r4
9399
+	cmp	fp, r4
9400
+	ite	ne
9401
+	movne	r3, #4
9402
+	moveq	r3, r4
9403
+	str	r3, [sp, #12]
9404
+	str	r8, [sp, #8]
9405
+.L1368:
9406
+	cmp	r4, r10
9407
+	bcs	.L1363
9408
+	mov	r1, r5
9409
+	mov	r0, r7
9410
+	bl	NandcXferComp
9411
+	adds	r4, r4, #2
9412
+	ldr	r3, [r6, #32]
9413
+	cmp	r10, r4
9414
+	str	r3, [sp, #20]
9415
+	bls	.L1369
9416
+	movs	r3, #0
9417
+	movs	r2, #2
9418
+	str	r3, [sp, #4]
9419
+	movs	r1, #0
9420
+	str	r3, [sp]
9421
+	mov	r0, r7
9422
+	and	r3, r4, #3
9423
+	bl	NandcXferStart
9424
+.L1369:
9425
+	ldr	r3, [sp, #20]
9426
+	lsls	r3, r3, #29
9427
+	bmi	.L1381
9428
+	ldr	r3, [sp, #20]
9429
+	ldr	r2, [sp, #20]
9430
+	ubfx	r3, r3, #3, #5
9431
+	ubfx	r2, r2, #27, #1
9432
+	orr	r3, r3, r2, lsl #5
9433
+	cmp	r9, r3
9434
+	it	cc
9435
+	movcc	r9, r3
9436
+.L1370:
9437
+	cmp	r8, #0
9438
+	sub	r2, r4, #2
9439
+	ldr	r3, [sp, #8]
9440
+	and	r2, r2, #3
9441
+	str	fp, [sp]
9442
+	it	eq
9443
+	moveq	r3, #0
9444
+	movs	r1, #0
9445
+	mov	r0, r6
9446
+	bl	NandcCopy1KB
9447
+	ldr	r3, [sp, #8]
9448
+	add	r3, r3, #1024
9449
+	str	r3, [sp, #8]
9450
+	ldr	r3, [sp, #12]
9451
+	add	fp, fp, r3
9452
+	b	.L1368
9453
+.L1381:
9454
+	mov	r9, #-1
9455
+	b	.L1370
9456
+.L1386:
9105
9457
 	.align	2
9106
-.L1413:
9458
+.L1385:
9107
9459
 	.word	.LANCHOR0
9108
9460
 	.fnend
9109
9461
 	.size	NandcXferData, .-NandcXferData
9110
9462
 	.align	1
9111
9463
 	.global	FlashReadRawPage
9464
+	.syntax unified
9112
9465
 	.thumb
9113
9466
 	.thumb_func
9467
+	.fpu softvfp
9114
9468
 	.type	FlashReadRawPage, %function
9115
9469
 FlashReadRawPage:
9116
9470
 	.fnstart
..
..
@@ -9120,20 +9474,20 @@
9120
9474
 	.save {r4, r5, r6, r7, r8, lr}
9121
9475
 	.pad #8
9122
9476
 	mov	r8, r3
9123
-	ldr	r3, .L1417
9477
+	ldr	r3, .L1389
9124
9478
 	mov	r6, r1
9125
9479
 	mov	r7, r2
9126
9480
 	mov	r4, r0
9127
-	ldrb	r5, [r3, #481]	@ zero_extendqisi2
9128
-	cbnz	r0, .L1416
9129
-	ldr	r2, .L1417+4
9130
-	ldrb	r3, [r2, #1]	@ zero_extendqisi2
9131
-	ldr	r2, [r2, #4]
9132
-	muls	r2, r3, r2
9133
-	cmp	r1, r2
9134
-	it	cc
9135
-	movcc	r5, #4
9136
-.L1416:
9481
+	ldrb	r5, [r3, #477]	@ zero_extendqisi2
9482
+	cbnz	r0, .L1388
9483
+	ldr	r1, .L1389+4
9484
+	ldrb	r3, [r1, #37]	@ zero_extendqisi2
9485
+	ldr	r0, [r1, #40]
9486
+	muls	r0, r3, r0
9487
+	cmp	r0, r6
9488
+	it	hi
9489
+	movhi	r5, #4
9490
+.L1388:
9137
9491
 	mov	r0, r4
9138
9492
 	bl	NandcWaitFlashReady
9139
9493
 	mov	r0, r4
..
..
@@ -9143,30 +9497,32 @@
9143
9497
 	bl	FlashReadCmd
9144
9498
 	mov	r0, r4
9145
9499
 	bl	NandcWaitFlashReady
9146
-	mov	r2, r5
9147
-	movs	r1, #0
9148
9500
 	mov	r3, r7
9149
-	mov	r0, r4
9501
+	mov	r2, r5
9150
9502
 	str	r8, [sp]
9503
+	movs	r1, #0
9504
+	mov	r0, r4
9151
9505
 	bl	NandcXferData
9152
-	mov	r5, r0
9506
+	mov	r1, r0
9153
9507
 	mov	r0, r4
9154
9508
 	bl	NandcFlashDeCs
9155
-	mov	r0, r5
9509
+	mov	r0, r1
9156
9510
 	add	sp, sp, #8
9157
9511
 	@ sp needed
9158
9512
 	pop	{r4, r5, r6, r7, r8, pc}
9159
-.L1418:
9513
+.L1390:
9160
9514
 	.align	2
9161
-.L1417:
9515
+.L1389:
9162
9516
 	.word	.LANCHOR1
9163
9517
 	.word	.LANCHOR0
9164
9518
 	.fnend
9165
9519
 	.size	FlashReadRawPage, .-FlashReadRawPage
9166
9520
 	.align	1
9167
9521
 	.global	FlashDdrTunningRead
9522
+	.syntax unified
9168
9523
 	.thumb
9169
9524
 	.thumb_func
9525
+	.fpu softvfp
9170
9526
 	.type	FlashDdrTunningRead, %function
9171
9527
 FlashDdrTunningRead:
9172
9528
 	.fnstart
..
..
@@ -9175,156 +9531,149 @@
9175
9531
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
9176
9532
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
9177
9533
 	mov	r7, r3
9178
-	ldr	r4, .L1445
9534
+	ldr	r4, .L1416
9179
9535
 	.pad #20
9180
9536
 	sub	sp, sp, #20
9181
-	mov	r10, r0
9182
9537
 	mov	fp, r2
9183
-	str	r1, [sp]
9184
-	ldr	r3, [r4, #80]
9538
+	stm	sp, {r0, r1}
9539
+	ldr	r3, [r4, #88]
9185
9540
 	ldr	r3, [r3, #304]
9186
-	str	r3, [sp, #8]
9187
-	ldr	r3, [r4, #2260]
9541
+	str	r3, [sp, #12]
9542
+	ldr	r3, [r4, #2264]
9188
9543
 	cmp	r3, #8
9189
9544
 	ldr	r3, [sp, #56]
9190
9545
 	ite	cc
9191
-	movcc	r9, #6
9192
-	movcs	r9, #12
9546
+	movcc	r10, #6
9547
+	movcs	r10, #12
9193
9548
 	cmp	r3, #0
9194
-	beq	.L1433
9549
+	beq	.L1405
9195
9550
 	movs	r0, #1
9196
9551
 	bl	FlashSetInterfaceMode
9197
9552
 	movs	r0, #1
9198
9553
 	bl	NandcSetMode
9199
-	mov	r0, r10
9554
+	ldr	r0, [sp]
9200
9555
 	bl	FlashReset
9201
9556
 	mov	r3, r7
9202
9557
 	mov	r2, fp
9203
-	mov	r0, r10
9204
-	ldr	r1, [sp]
9558
+	ldm	sp, {r0, r1}
9205
9559
 	bl	FlashReadRawPage
9206
-	mov	r6, r0
9207
-	ldrb	r0, [r4, #2229]	@ zero_extendqisi2
9560
+	mov	r5, r0
9561
+	ldrb	r0, [r4, #2233]	@ zero_extendqisi2
9208
9562
 	bl	FlashSetInterfaceMode
9209
-	ldrb	r0, [r4, #2229]	@ zero_extendqisi2
9563
+	ldrb	r0, [r4, #2233]	@ zero_extendqisi2
9210
9564
 	bl	NandcSetMode
9211
-	adds	r3, r6, #1
9212
-	bne	.L1422
9213
-.L1431:
9214
-	mov	r6, #-1
9215
-	b	.L1423
9216
-.L1422:
9217
-	mov	r2, r6
9218
-	ldr	r0, .L1445+4
9219
-	ldr	r1, [sp]
9220
-	bl	printk
9221
-	cmp	r6, #9
9222
-	itt	ls
9223
-	addls	r4, r4, r10, lsl #3
9224
-	ldrls	r3, [r4, #12]
9225
-	ldr	r4, .L1445+8
9226
-	itttt	ls
9227
-	ldrls	r2, [r3, #3840]
9228
-	ldrls	r2, [r3]
9229
-	orrls	r2, r2, #131072
9230
-	strls	r2, [r3]
9231
-	ldr	r3, [r4, #1188]
9232
-	adds	r3, r3, #1
9233
-	str	r3, [r4, #1188]
9234
-	cmp	r3, #2048
9235
-	bcc	.L1423
9236
-	movs	r7, #0
9237
-	str	r7, [r4, #1188]
9238
-	mov	fp, r7
9239
-	b	.L1421
9240
-.L1433:
9241
-	mov	r6, #1024
9242
-.L1421:
9243
-	movs	r4, #0
9244
-	mov	r8, #-1
9245
-	str	r4, [sp, #4]
9246
-	mov	ip, r4
9247
-	mov	r5, r4
9248
-.L1429:
9249
-	uxtb	r0, r9
9250
-	str	ip, [sp, #12]
9251
-	bl	NandcSetDdrPara
9252
-	mov	r3, r7
9253
-	mov	r0, r10
9254
-	mov	r2, fp
9255
-	ldr	r1, [sp]
9256
-	bl	FlashReadRawPage
9257
-	adds	r3, r6, #1
9258
-	cmp	r0, r3
9259
-	ldr	ip, [sp, #12]
9260
-	bhi	.L1425
9261
-	cmp	r0, #2
9262
-	bhi	.L1435
9263
-	adds	r5, r5, #1
9264
-	cmp	r5, #9
9265
-	bls	.L1435
9266
-	rsb	r4, r5, r9
9267
-	mov	r6, r0
9268
-	mov	r8, #0
9269
-	b	.L1427
9270
-.L1425:
9271
-	ldr	r3, [sp, #4]
9272
-	cmp	r3, r5
9273
-	bcs	.L1436
9274
-	cmp	r5, #7
9275
-	rsb	ip, r5, r4
9276
-	bhi	.L1437
9277
-	str	r5, [sp, #4]
9278
-	b	.L1436
9279
-.L1435:
9280
-	mov	r8, #0
9281
-	mov	r4, r9
9282
-	mov	r6, r0
9283
-	mov	r7, r8
9284
-	mov	fp, r8
9285
-	b	.L1426
9286
-.L1436:
9287
-	movs	r5, #0
9288
-.L1426:
9289
-	add	r9, r9, #2
9290
-	cmp	r9, #69
9291
-	bls	.L1429
9292
-.L1427:
9293
-	ldr	r3, [sp, #4]
9294
-	cmp	r3, r5
9295
-	it	cs
9296
-	movcs	r4, ip
9297
-	b	.L1428
9298
-.L1437:
9299
-	mov	r4, ip
9300
-.L1428:
9301
-	cbz	r4, .L1430
9302
-	ldr	r0, .L1445+12
9303
-	mov	r1, r4
9304
-	bl	printk
9305
-	uxtb	r0, r4
9306
-	bl	NandcSetDdrPara
9307
-.L1430:
9308
-	cmp	r8, #0
9309
-	beq	.L1423
9310
-	ldr	r0, .L1445+16
9311
-	mov	r1, r10
9312
-	ldr	r2, [sp]
9313
-	bl	printk
9314
-	ldr	r3, [sp, #56]
9315
-	cmp	r3, #0
9316
-	beq	.L1431
9317
-	ldr	r3, [sp, #8]
9318
-	ubfx	r0, r3, #8, #8
9319
-	bl	NandcSetDdrPara
9320
-.L1423:
9321
-	mov	r0, r6
9565
+	adds	r3, r5, #1
9566
+	bne	.L1394
9567
+.L1403:
9568
+	mov	r5, #-1
9569
+.L1391:
9570
+	mov	r0, r5
9322
9571
 	add	sp, sp, #20
9323
9572
 	@ sp needed
9324
9573
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
9325
-.L1446:
9574
+.L1394:
9575
+	mov	r2, r5
9576
+	ldr	r1, [sp, #4]
9577
+	ldr	r0, .L1416+4
9578
+	bl	printk
9579
+	cmp	r5, #9
9580
+	bhi	.L1396
9581
+	ldr	r3, [sp]
9582
+	ldr	r3, [r4, r3, lsl #3]
9583
+	ldr	r2, [r3, #3840]
9584
+	ldr	r2, [r3]
9585
+	orr	r2, r2, #131072
9586
+	str	r2, [r3]
9587
+.L1396:
9588
+	ldr	r2, .L1416+8
9589
+	ldr	r3, [r2, #1196]
9590
+	adds	r3, r3, #1
9591
+	cmp	r3, #2048
9592
+	str	r3, [r2, #1196]
9593
+	bcc	.L1391
9594
+	movs	r7, #0
9595
+	mov	fp, r7
9596
+	str	r7, [r2, #1196]
9597
+.L1393:
9598
+	mov	r9, #0
9599
+	mov	r8, #-1
9600
+	mov	r6, r9
9601
+	mov	r4, r9
9602
+	str	r9, [sp, #8]
9603
+.L1401:
9604
+	uxtb	r0, r10
9605
+	bl	NandcSetDdrPara
9606
+	mov	r3, r7
9607
+	mov	r2, fp
9608
+	ldm	sp, {r0, r1}
9609
+	bl	FlashReadRawPage
9610
+	adds	r3, r5, #1
9611
+	cmp	r0, r3
9612
+	bhi	.L1397
9613
+	cmp	r0, #2
9614
+	bhi	.L1407
9615
+	adds	r4, r4, #1
9616
+	cmp	r4, #9
9617
+	bls	.L1407
9618
+	mov	r3, r6
9619
+	mov	r5, r0
9620
+	sub	r6, r10, r4
9621
+	mov	r8, #0
9622
+.L1399:
9623
+	ldr	r2, [sp, #8]
9624
+	cmp	r4, r2
9625
+	it	ls
9626
+	movls	r6, r3
9627
+.L1400:
9628
+	cbz	r6, .L1402
9629
+	mov	r1, r6
9630
+	ldr	r0, .L1416+12
9631
+	bl	printk
9632
+	uxtb	r0, r6
9633
+	bl	NandcSetDdrPara
9634
+.L1402:
9635
+	cmp	r8, #0
9636
+	beq	.L1391
9637
+	ldm	sp, {r1, r2}
9638
+	ldr	r0, .L1416+16
9639
+	bl	printk
9640
+	ldr	r3, [sp, #56]
9641
+	cmp	r3, #0
9642
+	beq	.L1403
9643
+	ldr	r3, [sp, #12]
9644
+	ubfx	r0, r3, #8, #8
9645
+	bl	NandcSetDdrPara
9646
+	b	.L1391
9647
+.L1405:
9648
+	mov	r5, #1024
9649
+	b	.L1393
9650
+.L1397:
9651
+	ldr	r3, [sp, #8]
9652
+	cmp	r4, r3
9653
+	bls	.L1408
9654
+	cmp	r4, #7
9655
+	sub	r6, r9, r4
9656
+	bhi	.L1400
9657
+	str	r4, [sp, #8]
9658
+.L1408:
9659
+	movs	r4, #0
9660
+	b	.L1398
9661
+.L1407:
9662
+	mov	r8, #0
9663
+	mov	r9, r10
9664
+	mov	r5, r0
9665
+	mov	r7, r8
9666
+	mov	fp, r8
9667
+.L1398:
9668
+	add	r10, r10, #2
9669
+	cmp	r10, #69
9670
+	bls	.L1401
9671
+	mov	r3, r6
9672
+	mov	r6, r9
9673
+	b	.L1399
9674
+.L1417:
9326
9675
 	.align	2
9327
-.L1445:
9676
+.L1416:
9328
9677
 	.word	.LANCHOR0
9329
9678
 	.word	.LC90
9330
9679
 	.word	.LANCHOR4
..
..
@@ -9334,8 +9683,10 @@
9334
9683
 	.size	FlashDdrTunningRead, .-FlashDdrTunningRead
9335
9684
 	.align	1
9336
9685
 	.global	FlashReadPage
9686
+	.syntax unified
9337
9687
 	.thumb
9338
9688
 	.thumb_func
9689
+	.fpu softvfp
9339
9690
 	.type	FlashReadPage, %function
9340
9691
 FlashReadPage:
9341
9692
 	.fnstart
..
..
@@ -9344,98 +9695,95 @@
9344
9695
 	push	{r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr}
9345
9696
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
9346
9697
 	.pad #12
9347
-	mov	r8, r2
9698
+	mov	r7, r2
9348
9699
 	mov	r5, r0
9349
9700
 	mov	r6, r1
9350
-	mov	r7, r3
9701
+	mov	r8, r3
9351
9702
 	bl	FlashReadRawPage
9352
9703
 	adds	r2, r0, #1
9353
9704
 	mov	r4, r0
9354
-	bne	.L1448
9355
-	ldr	r9, .L1467+4
9356
-	ldrb	fp, [r9, #8]	@ zero_extendqisi2
9705
+	bne	.L1419
9706
+	ldr	r9, .L1437+4
9707
+	ldrb	fp, [r9, #44]	@ zero_extendqisi2
9357
9708
 	mov	r10, r9
9358
9709
 	cmp	fp, #0
9359
-	bne	.L1449
9360
-.L1451:
9361
-	ldrb	r3, [r10, #2252]	@ zero_extendqisi2
9362
-	ldr	r9, .L1467+4
9363
-	cbz	r3, .L1448
9364
-	b	.L1466
9365
-.L1449:
9366
-	movs	r3, #0
9367
-	mov	r0, r5
9368
-	strb	r3, [r9, #8]
9710
+	bne	.L1420
9711
+.L1422:
9712
+	ldrb	r3, [r10, #2256]	@ zero_extendqisi2
9713
+	cbz	r3, .L1419
9714
+	ldr	r3, [r10, #88]
9369
9715
 	mov	r1, r6
9370
-	mov	r3, r7
9371
-	mov	r2, r8
9372
-	bl	FlashReadRawPage
9373
-	strb	fp, [r9, #8]
9374
-	adds	r3, r0, #1
9375
-	beq	.L1451
9376
-	mov	r4, r0
9377
-	b	.L1448
9378
-.L1466:
9379
-	ldr	r3, [r9, #80]
9380
-	mov	r1, r6
9716
+	mov	r2, r7
9381
9717
 	mov	r0, r5
9382
-	mov	r2, r8
9383
-	ldr	r10, [r3, #304]
9718
+	ldr	r9, [r3, #304]
9384
9719
 	movs	r3, #1
9385
9720
 	str	r3, [sp]
9386
-	mov	r3, r7
9721
+	mov	r3, r8
9387
9722
 	bl	FlashDdrTunningRead
9388
9723
 	adds	r1, r0, #1
9389
9724
 	mov	r4, r0
9390
-	beq	.L1452
9391
-	ldrb	r3, [r9, #2312]	@ zero_extendqisi2
9725
+	beq	.L1423
9726
+	ldrb	r3, [r10, #2316]	@ zero_extendqisi2
9392
9727
 	cmp	r0, r3, lsr #1
9393
-	bls	.L1448
9394
-.L1452:
9395
-	ubfx	r0, r10, #8, #8
9728
+	bls	.L1419
9729
+.L1423:
9730
+	ubfx	r0, r9, #8, #8
9396
9731
 	bl	NandcSetDdrPara
9397
-.L1448:
9398
-	ldr	r9, .L1467+8
9399
-	ldr	ip, [r9, #1192]
9400
-	cmp	ip, #0
9401
-	beq	.L1453
9402
-	adds	r2, r4, #1
9403
-	bne	.L1453
9732
+	b	.L1419
9733
+.L1420:
9734
+	movs	r3, #0
9735
+	mov	r2, r7
9736
+	strb	r3, [r9, #44]
9404
9737
 	mov	r1, r6
9405
-	mov	r2, r8
9406
-	mov	r3, r7
9738
+	mov	r3, r8
9407
9739
 	mov	r0, r5
9408
-	blx	ip
9409
-	mov	r3, r6
9410
-	mov	r2, r5
9740
+	bl	FlashReadRawPage
9741
+	adds	r3, r0, #1
9742
+	strb	fp, [r9, #44]
9743
+	beq	.L1422
9411
9744
 	mov	r4, r0
9412
-	ldr	r0, .L1467
9413
-	mov	r1, r4
9745
+.L1419:
9746
+	ldr	r9, .L1437+8
9747
+	ldr	r10, [r9, #1200]
9748
+	cmp	r10, #0
9749
+	beq	.L1418
9750
+	adds	r2, r4, #1
9751
+	bne	.L1418
9752
+	mov	r3, r8
9753
+	mov	r2, r7
9754
+	mov	r1, r6
9755
+	mov	r0, r5
9756
+	blx	r10
9757
+	mov	r3, r6
9758
+	mov	r4, r0
9759
+	mov	r1, r0
9760
+	mov	r2, r5
9761
+	ldr	r0, .L1437
9414
9762
 	bl	printk
9415
9763
 	adds	r3, r4, #1
9416
-	bne	.L1453
9417
-	ldr	r3, .L1467+4
9418
-	ldrb	r3, [r3, #144]	@ zero_extendqisi2
9419
-	cbz	r3, .L1453
9764
+	bne	.L1418
9765
+	ldr	r3, .L1437+4
9766
+	ldrb	r3, [r3, #152]	@ zero_extendqisi2
9767
+	cbz	r3, .L1418
9420
9768
 	mov	r0, r5
9421
9769
 	bl	flash_enter_slc_mode
9422
-	ldr	r4, [r9, #1192]
9423
-	mov	r0, r5
9770
+	ldr	r4, [r9, #1200]
9771
+	mov	r3, r8
9772
+	mov	r2, r7
9424
9773
 	mov	r1, r6
9425
-	mov	r2, r8
9426
-	mov	r3, r7
9774
+	mov	r0, r5
9427
9775
 	blx	r4
9428
9776
 	mov	r4, r0
9429
9777
 	mov	r0, r5
9430
9778
 	bl	flash_exit_slc_mode
9431
-.L1453:
9779
+.L1418:
9432
9780
 	mov	r0, r4
9433
9781
 	add	sp, sp, #12
9434
9782
 	@ sp needed
9435
9783
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
9436
-.L1468:
9784
+.L1438:
9437
9785
 	.align	2
9438
-.L1467:
9786
+.L1437:
9439
9787
 	.word	.LC93
9440
9788
 	.word	.LANCHOR0
9441
9789
 	.word	.LANCHOR4
..
..
@@ -9443,8 +9791,10 @@
9443
9791
 	.size	FlashReadPage, .-FlashReadPage
9444
9792
 	.align	1
9445
9793
 	.global	FlashDdrParaScan
9794
+	.syntax unified
9446
9795
 	.thumb
9447
9796
 	.thumb_func
9797
+	.fpu softvfp
9448
9798
 	.type	FlashDdrParaScan, %function
9449
9799
 FlashDdrParaScan:
9450
9800
 	.fnstart
..
..
@@ -9453,60 +9803,60 @@
9453
9803
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
9454
9804
 	.save {r4, r5, r6, r7, r8, lr}
9455
9805
 	.pad #8
9456
-	mov	r7, r0
9457
-	ldr	r4, .L1479
9458
-	mov	r6, r1
9806
+	mov	r6, r0
9807
+	ldr	r4, .L1450
9459
9808
 	movs	r5, #0
9460
-	ldrb	r0, [r4, #2229]	@ zero_extendqisi2
9809
+	mov	r7, r1
9810
+	ldrb	r0, [r4, #2233]	@ zero_extendqisi2
9461
9811
 	bl	FlashSetInterfaceMode
9462
-	ldrb	r0, [r4, #2229]	@ zero_extendqisi2
9812
+	ldrb	r0, [r4, #2233]	@ zero_extendqisi2
9463
9813
 	bl	NandcSetMode
9464
-	mov	r1, r6
9465
-	mov	r2, r5
9466
9814
 	mov	r3, r5
9467
-	mov	r0, r7
9468
-	str	r5, [sp]
9469
-	bl	FlashDdrTunningRead
9470
-	mov	r1, r6
9471
9815
 	mov	r2, r5
9816
+	mov	r1, r7
9817
+	str	r5, [sp]
9818
+	mov	r0, r6
9819
+	bl	FlashDdrTunningRead
9472
9820
 	mov	r3, r5
9473
9821
 	mov	r8, r0
9474
-	mov	r0, r7
9822
+	mov	r2, r5
9823
+	mov	r1, r7
9824
+	mov	r0, r6
9475
9825
 	bl	FlashReadRawPage
9476
9826
 	adds	r0, r0, #1
9477
-	beq	.L1470
9827
+	beq	.L1440
9478
9828
 	cmp	r8, #-1
9479
-	bne	.L1471
9480
-.L1470:
9481
-	ldrb	r3, [r4, #2229]	@ zero_extendqisi2
9829
+	bne	.L1441
9830
+.L1440:
9831
+	ldrb	r3, [r4, #2233]	@ zero_extendqisi2
9482
9832
 	lsls	r3, r3, #31
9483
-	bpl	.L1471
9833
+	bpl	.L1441
9484
9834
 	movs	r0, #1
9485
9835
 	bl	FlashSetInterfaceMode
9486
9836
 	movs	r0, #1
9487
9837
 	bl	NandcSetMode
9488
-	ldr	r3, .L1479
9489
-	movs	r2, #0
9490
-	strb	r2, [r3, #2252]
9491
-	b	.L1472
9492
-.L1471:
9493
-	movs	r3, #1
9494
-	strb	r3, [r4, #2252]
9495
-.L1472:
9838
+	movs	r3, #0
9839
+.L1449:
9496
9840
 	movs	r0, #0
9841
+	strb	r3, [r4, #2256]
9497
9842
 	add	sp, sp, #8
9498
9843
 	@ sp needed
9499
9844
 	pop	{r4, r5, r6, r7, r8, pc}
9500
-.L1480:
9845
+.L1441:
9846
+	movs	r3, #1
9847
+	b	.L1449
9848
+.L1451:
9501
9849
 	.align	2
9502
-.L1479:
9850
+.L1450:
9503
9851
 	.word	.LANCHOR0
9504
9852
 	.fnend
9505
9853
 	.size	FlashDdrParaScan, .-FlashDdrParaScan
9506
9854
 	.align	1
9507
9855
 	.global	FlashLoadPhyInfo
9856
+	.syntax unified
9508
9857
 	.thumb
9509
9858
 	.thumb_func
9859
+	.fpu softvfp
9510
9860
 	.type	FlashLoadPhyInfo, %function
9511
9861
 FlashLoadPhyInfo:
9512
9862
 	.fnstart
..
..
@@ -9514,136 +9864,141 @@
9514
9864
 	@ frame_needed = 0, uses_anonymous_args = 0
9515
9865
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
9516
9866
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
9867
+	movs	r3, #60
9517
9868
 	.pad #20
9518
9869
 	sub	sp, sp, #20
9519
-	ldr	r3, .L1496
9520
-	movs	r4, #0
9521
-	ldr	r7, .L1496+4
9522
-	mov	r9, #4
9523
-	ldr	r5, .L1496+8
9524
-	mov	r8, #-1
9525
-	ldr	r0, [r3]	@ unaligned
9526
-	ldr	r3, [r7, #4]
9527
-	str	r4, [r5, #1200]
9528
-	mov	r6, r5
9529
-	str	r0, [sp, #12]	@ unaligned
9530
-	mov	r0, r4
9870
+	ldr	r6, .L1466
9871
+	movs	r5, #0
9872
+	mov	r8, #4
9873
+	strb	r3, [sp, #12]
9874
+	movs	r3, #40
9875
+	strb	r3, [sp, #13]
9876
+	movs	r3, #24
9877
+	strb	r3, [sp, #14]
9878
+	movs	r3, #16
9879
+	ldr	r4, .L1466+4
9880
+	mov	r7, #-1
9881
+	strb	r3, [sp, #15]
9882
+	mov	r0, r5
9883
+	ldr	r3, [r6, #40]
9884
+	ldr	r10, .L1466+24
9885
+	str	r5, [r4, #1208]
9531
9886
 	str	r3, [sp, #4]
9532
-	ldr	r3, [r5, #1184]
9533
-	str	r3, [r5, #1196]
9887
+	ldr	r3, [r4, #1192]
9888
+	str	r3, [r4, #1204]
9534
9889
 	bl	flash_enter_slc_mode
9535
-.L1482:
9536
-	add	fp, r4, #1
9537
-	mov	r10, #0
9538
-.L1484:
9890
+.L1453:
9891
+	add	fp, r5, #1
9892
+	mov	r9, #0
9893
+.L1455:
9539
9894
 	add	r3, sp, #12
9540
-	ldrb	r0, [r3, r10]	@ zero_extendqisi2
9895
+	ldrb	r0, [r3, r9]	@ zero_extendqisi2
9541
9896
 	bl	FlashBchSel
9542
-	movs	r0, #0
9543
-	mov	r1, r4
9544
-	ldr	r2, [r5, #1184]
9545
-	mov	r3, r0
9897
+	movs	r3, #0
9898
+	ldr	r2, [r4, #1192]
9899
+	mov	r1, r5
9900
+	mov	r0, r3
9546
9901
 	bl	FlashReadRawPage
9547
9902
 	adds	r0, r0, #1
9548
-	bne	.L1483
9549
-	movs	r0, #0
9903
+	bne	.L1454
9904
+	movs	r3, #0
9905
+	ldr	r2, [r4, #1192]
9550
9906
 	mov	r1, fp
9551
-	ldr	r2, [r6, #1184]
9552
-	mov	r3, r0
9907
+	mov	r0, r3
9553
9908
 	bl	FlashReadRawPage
9554
9909
 	adds	r0, r0, #1
9555
-	bne	.L1483
9556
-	add	r10, r10, #1
9557
-	cmp	r10, #4
9558
-	beq	.L1485
9559
-	b	.L1484
9560
-.L1486:
9561
-	add	r0, fp, #12
9910
+	bne	.L1454
9911
+	add	r9, r9, #1
9912
+	cmp	r9, #4
9913
+	bne	.L1455
9914
+.L1456:
9915
+	ldr	r3, [sp, #4]
9916
+	subs	r8, r8, #1
9917
+	add	r5, r5, r3
9918
+	bne	.L1453
9919
+	mov	r0, r8
9920
+	b	.L1465
9921
+.L1457:
9562
9922
 	movw	r1, #2036
9923
+	add	r0, r9, #12
9563
9924
 	bl	js_hash
9564
-	ldr	r3, [fp, #8]
9925
+	ldr	r3, [r9, #8]
9565
9926
 	cmp	r3, r0
9566
-	bne	.L1492
9567
-	ldr	r8, .L1496+24
9568
-	add	r1, fp, #160
9927
+	bne	.L1463
9569
9928
 	movs	r2, #32
9570
-	add	r0, r8, #472
9929
+	add	r1, r9, #160
9930
+	ldr	r0, .L1466+8
9571
9931
 	bl	ftl_memcpy
9572
-	ldr	r1, [r6, #1196]
9932
+	ldr	r1, [r4, #1204]
9573
9933
 	movs	r2, #32
9574
-	ldr	r0, .L1496+12
9934
+	ldr	r0, .L1466+12
9575
9935
 	adds	r1, r1, #192
9576
9936
 	bl	ftl_memcpy
9577
-	ldr	r1, [r6, #1196]
9937
+	ldr	r1, [r4, #1204]
9578
9938
 	mov	r2, #852
9579
-	ldr	r0, .L1496+16
9939
+	ldr	r0, .L1466+16
9580
9940
 	adds	r1, r1, #224
9581
9941
 	bl	ftl_memcpy
9582
-	ldrh	r0, [r8, #482]
9942
+	ldrh	r0, [r10, #478]
9583
9943
 	bl	FlashBlockAlignInit
9584
-	ldr	r8, [r6, #1196]
9585
-	str	r4, [r6, #1200]
9586
-	mov	r0, r4
9587
-	ldr	r1, [r7, #4]
9588
-	ldr	r3, [r8, #1076]
9589
-	strb	r3, [r7, #2252]
9944
+	ldr	r7, [r4, #1204]
9945
+	mov	r0, r5
9946
+	str	r5, [r4, #1208]
9947
+	ldr	r1, [r6, #40]
9948
+	ldr	r3, [r7, #1076]
9949
+	strb	r3, [r6, #2256]
9590
9950
 	bl	__aeabi_uidiv
9591
9951
 	adds	r0, r0, #1
9592
9952
 	cmp	r0, #1
9593
-	itee	hi
9594
-	strhi	r0, [r6, #1204]
9953
+	itet	ls
9595
9954
 	movls	r3, #2
9596
-	strls	r3, [r6, #1204]
9597
-	ldrh	r3, [r8, #14]
9598
-	mov	r8, #0
9599
-	strb	r3, [r5, #1208]
9600
-.L1485:
9601
-	ldr	r3, [sp, #4]
9602
-	subs	r9, r9, #1
9603
-	add	r4, r4, r3
9604
-	bne	.L1482
9605
-	mov	r0, r9
9606
-.L1495:
9955
+	strhi	r0, [r4, #1212]
9956
+	strls	r3, [r4, #1212]
9957
+	ldrh	r3, [r7, #14]
9958
+	movs	r7, #0
9959
+	strb	r3, [r4, #1216]
9960
+	b	.L1456
9961
+.L1463:
9962
+	mov	r7, #-1
9963
+	b	.L1456
9964
+.L1454:
9965
+	ldr	r9, [r4, #1204]
9966
+	ldr	r2, .L1466+20
9967
+	ldr	r3, [r9]
9968
+	cmp	r3, r2
9969
+	bne	.L1456
9970
+	cmp	r7, #0
9971
+	bne	.L1457
9972
+	ldr	r1, [r6, #40]
9973
+	mov	r0, r5
9974
+	bl	__aeabi_uidiv
9975
+	adds	r0, r0, #1
9976
+	str	r0, [r4, #1212]
9977
+	mov	r0, r7
9978
+.L1465:
9607
9979
 	bl	flash_exit_slc_mode
9608
-	mov	r0, r8
9980
+	mov	r0, r7
9609
9981
 	add	sp, sp, #20
9610
9982
 	@ sp needed
9611
9983
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
9612
-.L1483:
9613
-	ldr	fp, [r5, #1196]
9614
-	ldr	r2, .L1496+20
9615
-	ldr	r3, [fp]
9616
-	cmp	r3, r2
9617
-	bne	.L1485
9618
-	cmp	r8, #0
9619
-	bne	.L1486
9620
-	mov	r0, r4
9621
-	ldr	r1, [r7, #4]
9622
-	bl	__aeabi_uidiv
9623
-	ldr	r3, .L1496+8
9624
-	adds	r0, r0, #1
9625
-	str	r0, [r3, #1204]
9626
-	mov	r0, r8
9627
-	b	.L1495
9628
-.L1492:
9629
-	mov	r8, #-1
9630
-	b	.L1485
9631
-.L1497:
9984
+.L1467:
9632
9985
 	.align	2
9633
-.L1496:
9634
-	.word	.LANCHOR3+11
9986
+.L1466:
9635
9987
 	.word	.LANCHOR0
9636
9988
 	.word	.LANCHOR4
9637
-	.word	.LANCHOR0+48
9638
-	.word	.LANCHOR0+1210
9989
+	.word	.LANCHOR1+468
9990
+	.word	.LANCHOR0+52
9991
+	.word	.LANCHOR0+1216
9639
9992
 	.word	1312902724
9640
9993
 	.word	.LANCHOR1
9641
9994
 	.fnend
9642
9995
 	.size	FlashLoadPhyInfo, .-FlashLoadPhyInfo
9643
9996
 	.align	1
9644
9997
 	.global	ToshibaReadRetrial
9998
+	.syntax unified
9645
9999
 	.thumb
9646
10000
 	.thumb_func
10001
+	.fpu softvfp
9647
10002
 	.type	ToshibaReadRetrial, %function
9648
10003
 ToshibaReadRetrial:
9649
10004
 	.fnstart
..
..
@@ -9651,171 +10006,167 @@
9651
10006
 	@ frame_needed = 0, uses_anonymous_args = 0
9652
10007
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
9653
10008
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
10009
+	mov	r8, r0
10010
+	ldr	r4, .L1495
9654
10011
 	.pad #28
9655
10012
 	sub	sp, sp, #28
9656
-	mov	r9, r0
9657
10013
 	mov	fp, r3
10014
+	str	r1, [sp, #12]
9658
10015
 	str	r2, [sp, #8]
9659
-	str	r1, [sp, #16]
9660
10016
 	bl	NandcWaitFlashReady
9661
-	ldr	r4, .L1526
9662
-	add	r3, r4, r9, lsl #3
9663
-	ldrb	r2, [r3, #16]	@ zero_extendqisi2
9664
-	ldr	r7, [r3, #12]
9665
-	ldrb	r3, [r4, #1208]	@ zero_extendqisi2
9666
-	add	r6, r2, #8
10017
+	add	r3, r4, r8, lsl #3
10018
+	ldr	r6, [r4, r8, lsl #3]
10019
+	ldrb	r1, [r3, #4]	@ zero_extendqisi2
10020
+	ldrb	r3, [r4, #84]	@ zero_extendqisi2
10021
+	add	r7, r1, #8
9667
10022
 	subs	r3, r3, #67
9668
-	add	r6, r7, r6, lsl #8
10023
+	add	r7, r6, r7, lsl #8
9669
10024
 	cmp	r3, #1
9670
-	lsl	r3, r2, #8
9671
-	str	r3, [sp, #12]
9672
-	bls	.L1515
9673
-	ldrb	r5, [r4, #2252]	@ zero_extendqisi2
9674
-	cbz	r5, .L1516
10025
+	lsl	r3, r1, #8
10026
+	str	r3, [sp, #16]
10027
+	bls	.L1485
10028
+	ldrb	r5, [r4, #2256]	@ zero_extendqisi2
10029
+	cbz	r5, .L1470
10030
+	movs	r5, #1
9675
10031
 	movs	r0, #0
9676
-	str	r2, [sp, #20]
9677
10032
 	bl	NandcSetDdrMode
9678
-	movs	r3, #1
9679
-	ldr	r2, [sp, #20]
10033
+.L1470:
10034
+	lsls	r3, r1, #8
10035
+	movs	r2, #92
10036
+	adds	r3, r6, r3
10037
+	str	r2, [r3, #2056]
10038
+	movs	r2, #197
10039
+	str	r2, [r3, #2056]
10040
+.L1469:
10041
+	mov	r3, #-1
10042
+	mov	r9, #1
9680
10043
 	str	r3, [sp, #4]
9681
-	b	.L1500
9682
-.L1516:
9683
-	str	r5, [sp, #4]
9684
-.L1500:
9685
-	ldr	r3, [sp, #12]
9686
-	movs	r1, #92
9687
-	adds	r3, r7, r3
9688
-	str	r1, [r3, #2056]
9689
-	movs	r1, #197
9690
-	str	r1, [r3, #2056]
9691
-	b	.L1499
9692
-.L1515:
9693
-	movs	r3, #0
9694
-	str	r3, [sp, #4]
9695
-.L1499:
9696
-	mov	r8, #1
9697
-	mov	r10, #-1
9698
-	lsls	r3, r2, #8
10044
+	lsls	r3, r1, #8
9699
10045
 	str	r3, [sp, #20]
9700
-.L1501:
9701
-	ldr	r3, .L1526+4
9702
-	ldrb	r3, [r3, #1209]	@ zero_extendqisi2
10046
+.L1471:
10047
+	ldr	r3, .L1495+4
10048
+	ldrb	r3, [r3, #1217]	@ zero_extendqisi2
9703
10049
 	adds	r3, r3, #1
9704
-	cmp	r8, r3
9705
-	bcs	.L1525
9706
-	ldrb	r3, [r4, #1208]	@ zero_extendqisi2
9707
-	mov	r0, r6
9708
-	uxtb	r1, r8
9709
-	subs	r3, r3, #67
9710
-	cmp	r3, #1
9711
-	bhi	.L1502
9712
-	bl	SandiskSetRRPara
9713
-	b	.L1503
9714
-.L1502:
9715
-	bl	ToshibaSetRRPara
9716
-.L1503:
9717
-	ldrb	r3, [r4, #1208]	@ zero_extendqisi2
9718
-	cmp	r3, #34
9719
-	bne	.L1504
9720
-	ldr	r3, .L1526+4
9721
-	ldrb	r3, [r3, #1209]	@ zero_extendqisi2
9722
-	subs	r3, r3, #3
9723
-	cmp	r8, r3
9724
-	itttt	eq
9725
-	moveq	r2, #179
9726
-	ldreq	r3, [sp, #20]
9727
-	addeq	r3, r7, r3
9728
-	streq	r2, [r3, #2056]
9729
-.L1504:
9730
-	ldr	r3, [sp, #12]
9731
-	movs	r2, #38
9732
-	adds	r3, r7, r3
9733
-	str	r2, [r3, #2056]
9734
-	movs	r2, #93
9735
-	str	r2, [r3, #2056]
9736
-	ldr	r3, [sp, #4]
9737
-	cbz	r3, .L1505
9738
-	movs	r0, #4
9739
-	bl	NandcSetDdrMode
9740
-	mov	r0, r9
9741
-	mov	r3, fp
9742
-	ldr	r1, [sp, #16]
9743
-	ldr	r2, [sp, #8]
9744
-	bl	FlashReadRawPage
9745
-	mov	r5, r0
9746
-	movs	r0, #0
9747
-	bl	NandcSetDdrMode
9748
-	b	.L1506
9749
-.L1505:
9750
-	mov	r0, r9
9751
-	ldr	r1, [sp, #16]
9752
-	ldr	r2, [sp, #8]
9753
-	mov	r3, fp
9754
-	bl	FlashReadRawPage
9755
-	mov	r5, r0
9756
-.L1506:
9757
-	adds	r2, r5, #1
9758
-	beq	.L1507
9759
-	ldrb	r2, [r4, #2312]	@ zero_extendqisi2
9760
-	cmp	r10, #-1
9761
-	it	eq
9762
-	moveq	r10, r5
9763
-	add	r2, r2, r2, lsl #1
9764
-	cmp	r5, r2, asr #2
9765
-	bcc	.L1509
9766
-	mov	fp, #0
9767
-	str	fp, [sp, #8]
9768
-.L1507:
9769
-	add	r8, r8, #1
9770
-	b	.L1501
9771
-.L1525:
9772
-	mov	r5, r10
9773
-.L1509:
9774
-	ldrb	r2, [r4, #1208]	@ zero_extendqisi2
9775
-	mov	r0, r6
10050
+	cmp	r9, r3
10051
+	bcc	.L1480
10052
+	ldr	r10, [sp, #4]
10053
+.L1479:
10054
+	ldrb	r2, [r4, #84]	@ zero_extendqisi2
9776
10055
 	movs	r1, #0
10056
+	mov	r0, r7
9777
10057
 	subs	r2, r2, #67
9778
10058
 	cmp	r2, #1
9779
-	bhi	.L1511
10059
+	bhi	.L1481
9780
10060
 	bl	SandiskSetRRPara
9781
-	b	.L1512
9782
-.L1511:
9783
-	bl	ToshibaSetRRPara
9784
-.L1512:
9785
-	ldr	r3, [sp, #12]
10061
+.L1482:
10062
+	ldr	r3, [sp, #16]
9786
10063
 	movs	r2, #255
9787
-	add	r7, r7, r3
9788
-	str	r2, [r7, #2056]
9789
-	ldrb	r2, [r4, #2312]	@ zero_extendqisi2
10064
+	add	r6, r6, r3
10065
+	str	r2, [r6, #2056]
10066
+	ldrb	r2, [r4, #2316]	@ zero_extendqisi2
9790
10067
 	add	r2, r2, r2, lsl #1
9791
-	cmp	r5, r2, asr #2
9792
-	bcc	.L1513
9793
-	adds	r3, r5, #1
10068
+	cmp	r10, r2, asr #2
10069
+	bcc	.L1483
10070
+	cmp	r10, #-1
9794
10071
 	it	ne
9795
-	movne	r5, #256
9796
-.L1513:
9797
-	mov	r0, r9
10072
+	movne	r10, #256
10073
+.L1483:
10074
+	mov	r0, r8
9798
10075
 	bl	NandcWaitFlashReady
9799
-	ldr	r3, [sp, #4]
9800
-	cbz	r3, .L1514
10076
+	cbz	r5, .L1468
9801
10077
 	movs	r0, #4
9802
10078
 	bl	NandcSetDdrMode
9803
-.L1514:
9804
-	mov	r0, r5
10079
+.L1468:
10080
+	mov	r0, r10
9805
10081
 	add	sp, sp, #28
9806
10082
 	@ sp needed
9807
10083
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
9808
-.L1527:
10084
+.L1485:
10085
+	movs	r5, #0
10086
+	b	.L1469
10087
+.L1480:
10088
+	ldrb	r3, [r4, #84]	@ zero_extendqisi2
10089
+	mov	r0, r7
10090
+	uxtb	r1, r9
10091
+	subs	r3, r3, #67
10092
+	cmp	r3, #1
10093
+	bhi	.L1472
10094
+	bl	SandiskSetRRPara
10095
+.L1473:
10096
+	ldrb	r3, [r4, #84]	@ zero_extendqisi2
10097
+	cmp	r3, #34
10098
+	bne	.L1474
10099
+	ldr	r3, .L1495+4
10100
+	ldrb	r3, [r3, #1217]	@ zero_extendqisi2
10101
+	subs	r3, r3, #3
10102
+	cmp	r9, r3
10103
+	itttt	eq
10104
+	ldreq	r3, [sp, #20]
10105
+	moveq	r2, #179
10106
+	addeq	r3, r6, r3
10107
+	streq	r2, [r3, #2056]
10108
+.L1474:
10109
+	ldr	r3, [sp, #16]
10110
+	movs	r2, #38
10111
+	adds	r3, r6, r3
10112
+	str	r2, [r3, #2056]
10113
+	movs	r2, #93
10114
+	str	r2, [r3, #2056]
10115
+	cbz	r5, .L1475
10116
+	movs	r0, #4
10117
+	bl	NandcSetDdrMode
10118
+	mov	r3, fp
10119
+	ldr	r2, [sp, #8]
10120
+	ldr	r1, [sp, #12]
10121
+	mov	r0, r8
10122
+	bl	FlashReadRawPage
10123
+	mov	r10, r0
10124
+	movs	r0, #0
10125
+	bl	NandcSetDdrMode
10126
+.L1476:
10127
+	cmp	r10, #-1
10128
+	beq	.L1477
10129
+	ldrb	r2, [r4, #2316]	@ zero_extendqisi2
10130
+	ldr	r3, [sp, #4]
10131
+	add	r2, r2, r2, lsl #1
10132
+	cmp	r3, #-1
10133
+	it	eq
10134
+	moveq	r3, r10
10135
+	str	r3, [sp, #4]
10136
+	cmp	r10, r2, asr #2
10137
+	bcc	.L1479
10138
+	mov	fp, #0
10139
+	str	fp, [sp, #8]
10140
+.L1477:
10141
+	add	r9, r9, #1
10142
+	b	.L1471
10143
+.L1472:
10144
+	bl	ToshibaSetRRPara
10145
+	b	.L1473
10146
+.L1475:
10147
+	mov	r3, fp
10148
+	ldr	r2, [sp, #8]
10149
+	ldr	r1, [sp, #12]
10150
+	mov	r0, r8
10151
+	bl	FlashReadRawPage
10152
+	mov	r10, r0
10153
+	b	.L1476
10154
+.L1481:
10155
+	bl	ToshibaSetRRPara
10156
+	b	.L1482
10157
+.L1496:
9809
10158
 	.align	2
9810
-.L1526:
10159
+.L1495:
9811
10160
 	.word	.LANCHOR0
9812
10161
 	.word	.LANCHOR4
9813
10162
 	.fnend
9814
10163
 	.size	ToshibaReadRetrial, .-ToshibaReadRetrial
9815
10164
 	.align	1
9816
10165
 	.global	SamsungReadRetrial
10166
+	.syntax unified
9817
10167
 	.thumb
9818
10168
 	.thumb_func
10169
+	.fpu softvfp
9819
10170
 	.type	SamsungReadRetrial, %function
9820
10171
 SamsungReadRetrial:
9821
10172
 	.fnstart
..
..
@@ -9824,73 +10175,77 @@
9824
10175
 	push	{r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
9825
10176
 	.save {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
9826
10177
 	mov	r8, r0
9827
-	ldr	r5, .L1541
9828
-	mov	r9, r2
9829
-	mov	r7, r3
10178
+	ldr	r5, .L1510
10179
+	mov	r9, r3
9830
10180
 	mov	fp, r1
10181
+	mov	r10, r2
9831
10182
 	bl	NandcWaitFlashReady
9832
-	add	r2, r5, r8, lsl #3
9833
-	mov	r10, #1
10183
+	movs	r7, #1
9834
10184
 	mov	r4, #-1
9835
-	ldrb	r3, [r2, #16]	@ zero_extendqisi2
9836
-	ldr	r6, [r2, #12]
9837
-	adds	r3, r3, #8
10185
+	add	r3, r5, r8, lsl #3
10186
+	ldrb	r6, [r3, #4]	@ zero_extendqisi2
10187
+	add	r3, r6, #8
10188
+	ldr	r6, [r5, r8, lsl #3]
9838
10189
 	add	r6, r6, r3, lsl #8
9839
-.L1529:
9840
-	ldr	r3, .L1541+4
9841
-	ldrb	r3, [r3, #1209]	@ zero_extendqisi2
10190
+.L1498:
10191
+	ldr	r3, .L1510+4
10192
+	ldrb	r3, [r3, #1217]	@ zero_extendqisi2
9842
10193
 	adds	r3, r3, #1
9843
-	cmp	r10, r3
9844
-	bcs	.L1532
10194
+	cmp	r7, r3
10195
+	bcc	.L1502
10196
+.L1501:
10197
+	movs	r1, #0
9845
10198
 	mov	r0, r6
9846
-	uxtb	r1, r10
9847
10199
 	bl	SamsungSetRRPara
9848
-	mov	r2, r9
9849
-	mov	r0, r8
10200
+	ldrb	r3, [r5, #2316]	@ zero_extendqisi2
10201
+	add	r3, r3, r3, lsl #1
10202
+	cmp	r4, r3, asr #2
10203
+	bcc	.L1497
10204
+	adds	r3, r4, #1
10205
+	it	ne
10206
+	movne	r4, #256
10207
+.L1497:
10208
+	mov	r0, r4
10209
+	pop	{r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
10210
+.L1502:
10211
+	uxtb	r1, r7
10212
+	mov	r0, r6
10213
+	bl	SamsungSetRRPara
10214
+	mov	r2, r10
10215
+	mov	r3, r9
9850
10216
 	mov	r1, fp
9851
-	mov	r3, r7
10217
+	mov	r0, r8
9852
10218
 	bl	FlashReadRawPage
9853
10219
 	adds	r2, r0, #1
9854
-	beq	.L1530
9855
-	ldrb	r3, [r5, #2312]	@ zero_extendqisi2
10220
+	beq	.L1499
10221
+	ldrb	r3, [r5, #2316]	@ zero_extendqisi2
9856
10222
 	cmp	r4, #-1
9857
10223
 	it	eq
9858
10224
 	moveq	r4, r0
9859
10225
 	add	r3, r3, r3, lsl #1
9860
10226
 	cmp	r0, r3, asr #2
9861
-	bcc	.L1535
9862
-	movs	r7, #0
9863
-	mov	r9, r7
9864
-.L1530:
9865
-	add	r10, r10, #1
9866
-	b	.L1529
9867
-.L1535:
10227
+	bcc	.L1505
10228
+	mov	r9, #0
10229
+	mov	r10, r9
10230
+.L1499:
10231
+	adds	r7, r7, #1
10232
+	b	.L1498
10233
+.L1505:
9868
10234
 	mov	r4, r0
9869
-.L1532:
9870
-	mov	r0, r6
9871
-	movs	r1, #0
9872
-	bl	SamsungSetRRPara
9873
-	ldrb	r3, [r5, #2312]	@ zero_extendqisi2
9874
-	add	r3, r3, r3, lsl #1
9875
-	cmp	r4, r3, asr #2
9876
-	bcc	.L1534
9877
-	adds	r3, r4, #1
9878
-	it	ne
9879
-	movne	r4, #256
9880
-.L1534:
9881
-	mov	r0, r4
9882
-	pop	{r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
9883
-.L1542:
10235
+	b	.L1501
10236
+.L1511:
9884
10237
 	.align	2
9885
-.L1541:
10238
+.L1510:
9886
10239
 	.word	.LANCHOR0
9887
10240
 	.word	.LANCHOR4
9888
10241
 	.fnend
9889
10242
 	.size	SamsungReadRetrial, .-SamsungReadRetrial
9890
10243
 	.align	1
9891
10244
 	.global	MicronReadRetrial
10245
+	.syntax unified
9892
10246
 	.thumb
9893
10247
 	.thumb_func
10248
+	.fpu softvfp
9894
10249
 	.type	MicronReadRetrial, %function
9895
10250
 MicronReadRetrial:
9896
10251
 	.fnstart
..
..
@@ -9898,156 +10253,162 @@
9898
10253
 	@ frame_needed = 0, uses_anonymous_args = 0
9899
10254
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
9900
10255
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
9901
-	mov	r8, r3
9902
-	ldr	r3, .L1567
10256
+	mov	r7, r3
10257
+	ldr	r3, .L1536
10258
+	mov	r10, r2
9903
10259
 	.pad #36
9904
10260
 	sub	sp, sp, #36
9905
-	mov	r6, r0
9906
-	mov	fp, r2
9907
-	str	r1, [sp, #20]
9908
-	ldrb	r5, [r3, #2312]	@ zero_extendqisi2
9909
-	ldrb	r3, [r3, #144]	@ zero_extendqisi2
9910
-	cbnz	r3, .L1544
9911
-	add	r5, r5, r5, lsl #1
9912
-	ubfx	r5, r5, #2, #8
9913
-	b	.L1545
9914
-.L1544:
9915
-	ldr	r2, .L1567+4
9916
-	smull	r2, r3, r5, r2
9917
-	uxtb	r5, r3
9918
-.L1545:
9919
-	ldr	r3, .L1567
9920
-	mov	r10, #0
9921
-	add	r3, r3, r6, lsl #3
9922
-	str	r3, [sp, #24]
9923
-.L1555:
9924
-	mov	r0, r6
10261
+	mov	r5, r0
10262
+	str	r1, [sp, #24]
10263
+	ldrb	r2, [r3, #2316]	@ zero_extendqisi2
10264
+	ldrb	r3, [r3, #152]	@ zero_extendqisi2
10265
+	cmp	r3, #0
10266
+	bne	.L1513
10267
+	add	r2, r2, r2, lsl #1
10268
+	asr	fp, r2, #2
10269
+.L1514:
10270
+	movs	r3, #0
10271
+	str	r3, [sp, #8]
10272
+	ldr	r3, .L1536
10273
+	add	r3, r3, r5, lsl #3
10274
+	str	r3, [sp, #28]
10275
+.L1524:
10276
+	mov	r0, r5
9925
10277
 	mov	r9, #0
9926
10278
 	bl	NandcWaitFlashReady
10279
+	ldr	r3, .L1536
9927
10280
 	mov	r4, #-1
9928
-	ldr	r3, [sp, #24]
9929
-	ldr	r3, [r3, #12]
9930
-	str	r3, [sp, #12]
9931
-	ldr	r3, [sp, #24]
9932
-	ldrb	r3, [r3, #16]	@ zero_extendqisi2
10281
+	ldr	r3, [r3, r5, lsl #3]
9933
10282
 	str	r3, [sp, #16]
9934
-	ldr	r2, [sp, #16]
9935
-	ldr	r3, [sp, #12]
9936
-	add	r7, r3, r2, lsl #8
9937
-.L1546:
9938
-	ldr	r3, .L1567+8
9939
-	ldrb	r3, [r3, #1209]	@ zero_extendqisi2
10283
+	ldr	r3, [sp, #28]
10284
+	ldrb	r3, [r3, #4]	@ zero_extendqisi2
10285
+	str	r3, [sp, #20]
10286
+	ldr	r2, [sp, #20]
10287
+	ldr	r3, [sp, #16]
10288
+	add	r6, r3, r2, lsl #8
10289
+.L1515:
10290
+	ldr	r3, .L1536+4
10291
+	ldrb	r3, [r3, #1217]	@ zero_extendqisi2
9940
10292
 	cmp	r9, r3
9941
-	bcs	.L1549
10293
+	bcc	.L1519
10294
+.L1518:
10295
+	ldr	r3, [sp, #16]
10296
+	movs	r0, #200
10297
+	ldr	r2, [sp, #20]
10298
+	movs	r6, #0
10299
+	add	r8, r3, r2, lsl #8
10300
+	movs	r3, #239
10301
+	str	r3, [r8, #2056]
10302
+	movs	r3, #137
10303
+	str	r3, [r8, #2052]
10304
+	bl	ndelay
10305
+	cmp	r4, fp
10306
+	str	r6, [r8, #2048]
10307
+	str	r6, [r8, #2048]
10308
+	str	r6, [r8, #2048]
10309
+	str	r6, [r8, #2048]
10310
+	bcc	.L1520
10311
+	adds	r1, r4, #1
10312
+	mov	r3, r9
10313
+	it	ne
10314
+	movne	r4, #256
10315
+	ldr	r2, [sp, #24]
10316
+	str	r4, [sp]
10317
+	mov	r1, r9
10318
+	ldr	r0, .L1536+8
10319
+	bl	printk
10320
+	ldr	r3, [sp, #8]
10321
+	cmp	r3, #0
10322
+	bne	.L1522
10323
+	ldr	r3, .L1536
10324
+	ldrb	r3, [r3, #152]	@ zero_extendqisi2
10325
+	cmp	r3, #0
10326
+	beq	.L1512
10327
+	adds	r2, r4, #1
10328
+	bne	.L1512
10329
+	movs	r1, #3
10330
+	mov	r0, r5
10331
+	bl	micron_auto_read_calibration_config
10332
+	movs	r3, #1
10333
+	str	r3, [sp, #8]
10334
+	b	.L1524
10335
+.L1513:
10336
+	ldr	r3, .L1536+12
10337
+	smull	r2, r3, r2, r3
10338
+	mov	fp, r3
10339
+	b	.L1514
10340
+.L1519:
9942
10341
 	movs	r3, #239
9943
10342
 	movs	r0, #200
9944
-	str	r3, [r7, #2056]
10343
+	str	r3, [r6, #2056]
9945
10344
 	movs	r3, #137
9946
-	str	r3, [r7, #2052]
9947
-	bl	NandcDelayns
9948
-	mov	ip, #0
10345
+	str	r3, [r6, #2052]
10346
+	mov	r8, #0
10347
+	bl	ndelay
9949
10348
 	add	r3, r9, #1
9950
-	mov	r0, r6
9951
-	str	r3, [r7, #2048]
9952
-	mov	r2, fp
9953
-	str	ip, [r7, #2048]
9954
-	str	ip, [r7, #2048]
9955
-	str	ip, [r7, #2048]
9956
-	str	r3, [sp, #8]
9957
-	mov	r3, r8
9958
-	ldr	r1, [sp, #20]
9959
-	str	ip, [sp, #28]
10349
+	mov	r2, r10
10350
+	str	r3, [r6, #2048]
10351
+	mov	r0, r5
10352
+	str	r8, [r6, #2048]
10353
+	str	r3, [sp, #12]
10354
+	mov	r3, r7
10355
+	str	r8, [r6, #2048]
10356
+	ldr	r1, [sp, #24]
10357
+	str	r8, [r6, #2048]
9960
10358
 	bl	FlashReadRawPage
9961
10359
 	adds	r3, r0, #1
9962
-	beq	.L1547
10360
+	beq	.L1516
9963
10361
 	cmp	r4, #-1
9964
10362
 	it	eq
9965
10363
 	moveq	r4, r0
9966
-	cmp	r0, r5
9967
-	ldr	ip, [sp, #28]
9968
-	bcc	.L1557
9969
-	mov	r8, ip
9970
-	mov	fp, ip
9971
-.L1547:
9972
-	ldr	r9, [sp, #8]
9973
-	b	.L1546
9974
-.L1557:
10364
+	cmp	r0, fp
10365
+	bcc	.L1526
10366
+	mov	r7, r8
10367
+	mov	r10, r8
10368
+.L1516:
10369
+	ldr	r9, [sp, #12]
10370
+	b	.L1515
10371
+.L1526:
9975
10372
 	mov	r4, r0
9976
-	mov	r8, ip
9977
-	mov	fp, ip
9978
-.L1549:
9979
-	ldr	r2, [sp, #16]
9980
-	movs	r0, #200
9981
-	ldr	r3, [sp, #12]
9982
-	movs	r7, #0
9983
-	add	r3, r3, r2, lsl #8
9984
-	movs	r2, #239
9985
-	str	r3, [sp, #8]
9986
-	str	r2, [r3, #2056]
9987
-	movs	r2, #137
9988
-	str	r2, [r3, #2052]
9989
-	bl	NandcDelayns
9990
-	cmp	r4, r5
9991
-	ldr	r3, [sp, #8]
9992
-	str	r7, [r3, #2048]
9993
-	str	r7, [r3, #2048]
9994
-	str	r7, [r3, #2048]
9995
-	str	r7, [r3, #2048]
9996
-	bcc	.L1551
9997
-	adds	r1, r4, #1
9998
-	ldr	r0, .L1567+12
9999
-	it	ne
10000
-	movne	r4, #256
10001
-	mov	r1, r9
10002
-	str	r4, [sp]
10003
-	mov	r3, r9
10004
-	ldr	r2, [sp, #20]
10005
-	bl	printk
10006
-	cmp	r10, #0
10007
-	bne	.L1553
10008
-	ldr	r3, .L1567
10009
-	ldrb	r3, [r3, #144]	@ zero_extendqisi2
10010
-	cbz	r3, .L1562
10011
-	adds	r2, r4, #1
10012
-	bne	.L1562
10013
-	mov	r0, r6
10014
-	movs	r1, #3
10015
-	bl	micron_auto_read_calibration_config
10016
-	mov	r10, #1
10017
-	b	.L1555
10018
-.L1553:
10019
-	mov	r0, r6
10020
-	mov	r1, r7
10373
+	mov	r7, r8
10374
+	mov	r10, r8
10375
+	b	.L1518
10376
+.L1522:
10377
+	mov	r1, r6
10378
+	mov	r0, r5
10021
10379
 	bl	micron_auto_read_calibration_config
10022
10380
 	adds	r3, r4, #1
10023
10381
 	it	ne
10024
10382
 	movne	r4, #256
10025
-	b	.L1562
10026
-.L1551:
10027
-	cmp	r10, #0
10028
-	beq	.L1562
10029
-	mov	r0, r6
10030
-	mov	r1, r7
10031
-	bl	micron_auto_read_calibration_config
10032
-	mov	r4, #256
10033
-.L1562:
10383
+.L1512:
10034
10384
 	mov	r0, r4
10035
10385
 	add	sp, sp, #36
10036
10386
 	@ sp needed
10037
10387
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
10038
-.L1568:
10388
+.L1520:
10389
+	ldr	r3, [sp, #8]
10390
+	cmp	r3, #0
10391
+	beq	.L1512
10392
+	mov	r1, r6
10393
+	mov	r0, r5
10394
+	bl	micron_auto_read_calibration_config
10395
+	mov	r4, #256
10396
+	b	.L1512
10397
+.L1537:
10039
10398
 	.align	2
10040
-.L1567:
10399
+.L1536:
10041
10400
 	.word	.LANCHOR0
10042
-	.word	1431655766
10043
10401
 	.word	.LANCHOR4
10044
10402
 	.word	.LC94
10403
+	.word	1431655766
10045
10404
 	.fnend
10046
10405
 	.size	MicronReadRetrial, .-MicronReadRetrial
10047
10406
 	.align	1
10048
10407
 	.global	HynixReadRetrial
10408
+	.syntax unified
10049
10409
 	.thumb
10050
10410
 	.thumb_func
10411
+	.fpu softvfp
10051
10412
 	.type	HynixReadRetrial, %function
10052
10413
 HynixReadRetrial:
10053
10414
 	.fnstart
..
..
@@ -10056,267 +10417,267 @@
10056
10417
 	push	{r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr}
10057
10418
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
10058
10419
 	.pad #12
10059
-	mov	r8, r3
10060
-	ldr	r5, .L1586
10061
-	mov	r10, r2
10062
-	mov	r7, r0
10063
-	mov	fp, r1
10064
-	adds	r2, r5, r0
10420
+	mov	r9, r3
10421
+	ldr	r5, .L1555
10422
+	mov	r8, #0
10065
10423
 	mov	r6, #-1
10066
-	ldr	r3, [r5, #44]
10067
-	ldrb	r4, [r2, #1222]	@ zero_extendqisi2
10068
-	ldrb	r9, [r5, #1212]	@ zero_extendqisi2
10424
+	mov	fp, r2
10425
+	mov	r7, r0
10426
+	str	r1, [sp, #4]
10427
+	ldr	r3, [r5, #48]
10428
+	adds	r2, r5, r0
10429
+	ldrb	r4, [r2, #1228]	@ zero_extendqisi2
10430
+	ldrb	r10, [r5, #1218]	@ zero_extendqisi2
10069
10431
 	ldrb	r3, [r3, #19]	@ zero_extendqisi2
10070
10432
 	subs	r3, r3, #7
10071
10433
 	cmp	r3, #1
10072
10434
 	it	ls
10073
-	ldrbls	r4, [r2, #1230]	@ zero_extendqisi2
10435
+	ldrbls	r4, [r2, #1236]	@ zero_extendqisi2
10074
10436
 	bl	NandcWaitFlashReady
10075
-	mov	ip, #0
10076
-.L1571:
10077
-	cmp	ip, r9
10078
-	bcs	.L1575
10437
+.L1540:
10438
+	cmp	r8, r10
10439
+	bcc	.L1545
10440
+.L1544:
10441
+	ldr	r3, [r5, #48]
10442
+	add	r7, r7, r5
10443
+	ldrb	r3, [r3, #19]	@ zero_extendqisi2
10444
+	subs	r3, r3, #7
10445
+	cmp	r3, #1
10446
+	ldrb	r3, [r5, #2316]	@ zero_extendqisi2
10447
+	ite	ls
10448
+	strbls	r4, [r7, #1236]
10449
+	strbhi	r4, [r7, #1228]
10450
+	add	r3, r3, r3, lsl #1
10451
+	cmp	r6, r3, asr #2
10452
+	bcc	.L1538
10453
+	adds	r3, r6, #1
10454
+	it	ne
10455
+	movne	r6, #256
10456
+.L1538:
10457
+	mov	r0, r6
10458
+	add	sp, sp, #12
10459
+	@ sp needed
10460
+	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
10461
+.L1545:
10079
10462
 	adds	r4, r4, #1
10080
-	mov	r0, r7
10081
-	ldrb	r1, [r5, #1211]	@ zero_extendqisi2
10463
+	ldr	r2, .L1555+4
10082
10464
 	uxtb	r4, r4
10083
-	ldr	r2, .L1586+4
10084
-	cmp	r4, r9
10085
-	it	cs
10086
-	movcs	r4, #0
10087
-	str	ip, [sp, #4]
10465
+	ldrb	r1, [r5, #1217]	@ zero_extendqisi2
10466
+	mov	r0, r7
10467
+	cmp	r10, r4
10468
+	it	ls
10469
+	movls	r4, #0
10088
10470
 	mov	r3, r4
10089
10471
 	bl	HynixSetRRPara
10090
-	mov	r2, r10
10472
+	mov	r2, fp
10473
+	mov	r3, r9
10474
+	ldr	r1, [sp, #4]
10091
10475
 	mov	r0, r7
10092
-	mov	r1, fp
10093
-	mov	r3, r8
10094
10476
 	bl	FlashReadRawPage
10095
10477
 	adds	r2, r0, #1
10096
-	ldr	ip, [sp, #4]
10097
-	beq	.L1573
10098
-	ldrb	r3, [r5, #2312]	@ zero_extendqisi2
10478
+	beq	.L1542
10479
+	ldrb	r3, [r5, #2316]	@ zero_extendqisi2
10099
10480
 	cmp	r6, #-1
10100
10481
 	it	eq
10101
10482
 	moveq	r6, r0
10102
10483
 	add	r3, r3, r3, lsl #1
10103
10484
 	cmp	r0, r3, asr #2
10104
-	bcc	.L1580
10105
-	mov	r8, #0
10106
-	mov	r10, r8
10107
-.L1573:
10108
-	add	ip, ip, #1
10109
-	b	.L1571
10110
-.L1580:
10485
+	bcc	.L1549
10486
+	mov	r9, #0
10487
+	mov	fp, r9
10488
+.L1542:
10489
+	add	r8, r8, #1
10490
+	b	.L1540
10491
+.L1549:
10111
10492
 	mov	r6, r0
10112
-.L1575:
10113
-	ldr	r3, [r5, #44]
10114
-	add	r7, r7, r5
10115
-	ldrb	r3, [r3, #19]	@ zero_extendqisi2
10116
-	subs	r3, r3, #7
10117
-	cmp	r3, #1
10118
-	ldrb	r3, [r5, #2312]	@ zero_extendqisi2
10119
-	ite	ls
10120
-	strbls	r4, [r7, #1230]
10121
-	strbhi	r4, [r7, #1222]
10122
-	add	r3, r3, r3, lsl #1
10123
-	cmp	r6, r3, asr #2
10124
-	bcc	.L1579
10125
-	adds	r3, r6, #1
10126
-	it	ne
10127
-	movne	r6, #256
10128
-.L1579:
10129
-	mov	r0, r6
10130
-	add	sp, sp, #12
10131
-	@ sp needed
10132
-	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
10133
-.L1587:
10493
+	b	.L1544
10494
+.L1556:
10134
10495
 	.align	2
10135
-.L1586:
10496
+.L1555:
10136
10497
 	.word	.LANCHOR0
10137
-	.word	.LANCHOR0+1214
10498
+	.word	.LANCHOR0+1220
10138
10499
 	.fnend
10139
10500
 	.size	HynixReadRetrial, .-HynixReadRetrial
10140
10501
 	.align	1
10502
+	.syntax unified
10141
10503
 	.thumb
10142
10504
 	.thumb_func
10505
+	.fpu softvfp
10143
10506
 	.type	samsung_read_retrial, %function
10144
10507
 samsung_read_retrial:
10145
10508
 	.fnstart
10146
-	@ args = 0, pretend = 0, frame = 24
10509
+	@ args = 0, pretend = 0, frame = 16
10147
10510
 	@ frame_needed = 0, uses_anonymous_args = 0
10148
10511
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
10149
10512
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
10150
-	.pad #36
10151
-	sub	sp, sp, #36
10152
-	mov	r9, r0
10153
-	mov	r10, r2
10154
-	mov	r7, r3
10155
-	str	r1, [sp, #16]
10513
+	.pad #28
10514
+	sub	sp, sp, #28
10515
+	mov	r10, r0
10516
+	mov	fp, r2
10517
+	mov	r9, r3
10518
+	str	r1, [sp, #12]
10156
10519
 	bl	NandcWaitFlashReady
10157
-	ldr	r3, .L1614
10158
-	add	r2, r3, r9, lsl #3
10159
-	ldr	r4, [r2, #12]
10160
-	ldrb	r2, [r2, #16]	@ zero_extendqisi2
10161
-	str	r2, [sp, #12]
10162
-	ldrb	r2, [r3, #2228]	@ zero_extendqisi2
10520
+	ldr	r3, .L1582
10521
+	ldr	r2, [r3, r10, lsl #3]
10163
10522
 	str	r3, [sp, #20]
10523
+	str	r2, [sp, #8]
10524
+	add	r2, r3, r10, lsl #3
10525
+	ldrb	r6, [r2, #4]	@ zero_extendqisi2
10526
+	ldrb	r2, [r3, #2232]	@ zero_extendqisi2
10164
10527
 	cmp	r2, #0
10165
-	bne	.L1589
10166
-	ldr	r3, [sp, #12]
10167
-	mov	r5, #-1
10168
-	movs	r6, #1
10169
-	lsl	fp, r3, #8
10170
-	add	r8, r4, fp
10171
-	addw	r3, r8, #2056
10172
-	str	r3, [sp, #24]
10173
-.L1593:
10174
-	ldr	r3, [sp, #24]
10175
-	mov	ip, #0
10176
-	ldr	r1, [sp, #16]
10177
-	mov	r0, r9
10178
-	str	ip, [sp, #28]
10528
+	bne	.L1558
10529
+	ldr	r3, [sp, #8]
10530
+	lsl	r8, r6, #8
10531
+	mov	r4, #-1
10532
+	movs	r7, #1
10533
+	add	r5, r3, r8
10534
+	addw	r3, r5, #2056
10535
+	str	r3, [sp, #16]
10536
+.L1562:
10537
+	ldr	r3, [sp, #16]
10538
+	movs	r6, #0
10539
+	ldr	r1, [sp, #12]
10540
+	mov	r0, r10
10179
10541
 	mov	r2, r3
10180
10542
 	movs	r3, #239
10181
10543
 	str	r3, [r2]
10182
10544
 	movs	r3, #141
10183
-	str	r3, [r8, #2052]
10184
-	mov	r2, r10
10185
-	ldr	r3, .L1614+4
10186
-	ldrsb	r3, [r6, r3]
10187
-	str	r3, [r8, #2048]
10188
-	mov	r3, r7
10189
-	str	ip, [r8, #2048]
10190
-	str	ip, [r8, #2048]
10191
-	str	ip, [r8, #2048]
10545
+	str	r3, [r5, #2052]
10546
+	mov	r2, fp
10547
+	ldr	r3, .L1582+4
10548
+	ldrsb	r3, [r7, r3]
10549
+	str	r3, [r5, #2048]
10550
+	mov	r3, r9
10551
+	str	r6, [r5, #2048]
10552
+	str	r6, [r5, #2048]
10553
+	str	r6, [r5, #2048]
10192
10554
 	bl	FlashReadRawPage
10193
10555
 	adds	r1, r0, #1
10194
-	beq	.L1590
10556
+	beq	.L1559
10195
10557
 	ldr	r3, [sp, #20]
10196
-	cmp	r5, #-1
10558
+	cmp	r4, #-1
10197
10559
 	it	eq
10198
-	moveq	r5, r0
10199
-	ldrb	r3, [r3, #2312]	@ zero_extendqisi2
10560
+	moveq	r4, r0
10561
+	ldrb	r3, [r3, #2316]	@ zero_extendqisi2
10200
10562
 	add	r3, r3, r3, lsl #1
10201
10563
 	cmp	r0, r3, asr #2
10202
-	bcc	.L1601
10203
-	ldr	ip, [sp, #28]
10204
-	mov	r7, ip
10205
-	mov	r10, ip
10206
-.L1590:
10207
-	adds	r6, r6, #1
10208
-	cmp	r6, #26
10209
-	bne	.L1593
10210
-	b	.L1592
10211
-.L1601:
10212
-	mov	r5, r0
10213
-.L1592:
10214
-	add	fp, fp, r4
10564
+	bcc	.L1570
10565
+	mov	r9, r6
10566
+	mov	fp, r6
10567
+.L1559:
10568
+	adds	r7, r7, #1
10569
+	cmp	r7, #26
10570
+	bne	.L1562
10571
+.L1561:
10572
+	ldr	r3, [sp, #8]
10573
+	add	r3, r3, r8
10574
+	mov	r8, r3
10215
10575
 	movs	r3, #239
10216
-	str	r3, [fp, #2056]
10217
-	ldr	r3, [sp, #12]
10218
-	add	r4, r4, r3, lsl #8
10576
+	str	r3, [r8, #2056]
10219
10577
 	movs	r3, #141
10220
-	b	.L1613
10221
-.L1589:
10222
-	ldr	r3, [sp, #12]
10223
-	mov	r5, #-1
10224
-	ldr	r8, .L1614+12
10225
-	movs	r6, #1
10226
-	lsl	ip, r3, #8
10227
-	add	fp, r4, ip
10228
-	addw	r3, fp, #2056
10229
-	str	r3, [sp, #24]
10230
-.L1598:
10231
-	ldr	r3, [sp, #24]
10232
-	mov	r0, r9
10233
-	ldr	r1, [sp, #16]
10234
-	str	ip, [sp, #28]
10578
+.L1581:
10579
+	str	r3, [r5, #2052]
10580
+	movs	r3, #0
10581
+	str	r3, [r5, #2048]
10582
+	str	r3, [r5, #2048]
10583
+	str	r3, [r5, #2048]
10584
+	str	r3, [r5, #2048]
10585
+	ldr	r3, .L1582
10586
+	ldrb	r3, [r3, #2316]	@ zero_extendqisi2
10587
+	add	r3, r3, r3, lsl #1
10588
+	cmp	r4, r3, asr #2
10589
+	bcc	.L1568
10590
+	adds	r3, r4, #1
10591
+	ldr	r2, [sp, #12]
10592
+	it	ne
10593
+	movne	r4, #256
10594
+	mov	r3, r7
10595
+	str	r4, [sp]
10596
+	mov	r1, r7
10597
+	ldr	r0, .L1582+8
10598
+	bl	printk
10599
+.L1568:
10600
+	mov	r0, r10
10601
+	bl	NandcWaitFlashReady
10602
+	mov	r0, r4
10603
+	add	sp, sp, #28
10604
+	@ sp needed
10605
+	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
10606
+.L1570:
10607
+	mov	r4, r0
10608
+	b	.L1561
10609
+.L1558:
10610
+	ldr	r3, [sp, #8]
10611
+	lsls	r6, r6, #8
10612
+	ldr	r8, .L1582+12
10613
+	mov	r4, #-1
10614
+	movs	r7, #1
10615
+	adds	r5, r3, r6
10616
+	addw	r3, r5, #2056
10617
+	str	r3, [sp, #16]
10618
+.L1567:
10619
+	ldr	r3, [sp, #16]
10620
+	mov	r0, r10
10621
+	ldr	r1, [sp, #12]
10235
10622
 	mov	r2, r3
10236
10623
 	movs	r3, #239
10237
10624
 	str	r3, [r2]
10238
10625
 	movs	r3, #137
10239
-	str	r3, [fp, #2052]
10240
-	mov	r2, r10
10626
+	str	r3, [r5, #2052]
10627
+	mov	r2, fp
10241
10628
 	ldrb	r3, [r8, #4]	@ zero_extendqisi2
10242
-	str	r3, [fp, #2048]
10629
+	str	r3, [r5, #2048]
10243
10630
 	ldrb	r3, [r8, #5]	@ zero_extendqisi2
10244
-	str	r3, [fp, #2048]
10631
+	str	r3, [r5, #2048]
10245
10632
 	ldrb	r3, [r8, #6]	@ zero_extendqisi2
10246
-	str	r3, [fp, #2048]
10633
+	str	r3, [r5, #2048]
10247
10634
 	ldrb	r3, [r8, #7]	@ zero_extendqisi2
10248
-	str	r3, [fp, #2048]
10249
-	mov	r3, r7
10635
+	str	r3, [r5, #2048]
10636
+	mov	r3, r9
10250
10637
 	bl	FlashReadRawPage
10251
10638
 	adds	r2, r0, #1
10252
-	ldr	ip, [sp, #28]
10253
-	beq	.L1595
10254
-	ldr	r3, [sp, #20]
10255
-	cmp	r5, #-1
10639
+	beq	.L1564
10640
+	ldr	r3, .L1582
10641
+	cmp	r4, #-1
10256
10642
 	it	eq
10257
-	moveq	r5, r0
10258
-	ldrb	r3, [r3, #2312]	@ zero_extendqisi2
10643
+	moveq	r4, r0
10644
+	ldrb	r3, [r3, #2316]	@ zero_extendqisi2
10259
10645
 	add	r3, r3, r3, lsl #1
10260
10646
 	cmp	r0, r3, asr #2
10261
-	bcc	.L1602
10262
-	movs	r7, #0
10263
-	mov	r10, r7
10264
-.L1595:
10265
-	adds	r6, r6, #1
10647
+	bcc	.L1571
10648
+	mov	r9, #0
10649
+	mov	fp, r9
10650
+.L1564:
10651
+	adds	r7, r7, #1
10266
10652
 	add	r8, r8, #4
10267
-	cmp	r6, #26
10268
-	bne	.L1598
10269
-	b	.L1597
10270
-.L1602:
10271
-	mov	r5, r0
10272
-.L1597:
10273
-	add	ip, ip, r4
10653
+	cmp	r7, #26
10654
+	bne	.L1567
10655
+.L1566:
10656
+	ldr	r3, [sp, #8]
10657
+	add	r3, r3, r6
10658
+	mov	r6, r3
10274
10659
 	movs	r3, #239
10275
-	str	r3, [ip, #2056]
10276
-	ldr	r3, [sp, #12]
10277
-	add	r4, r4, r3, lsl #8
10660
+	str	r3, [r6, #2056]
10278
10661
 	movs	r3, #137
10279
-.L1613:
10280
-	str	r3, [r4, #2052]
10281
-	movs	r3, #0
10282
-	str	r3, [r4, #2048]
10283
-	str	r3, [r4, #2048]
10284
-	str	r3, [r4, #2048]
10285
-	str	r3, [r4, #2048]
10286
-	ldr	r3, [sp, #20]
10287
-	ldrb	r3, [r3, #2312]	@ zero_extendqisi2
10288
-	add	r3, r3, r3, lsl #1
10289
-	cmp	r5, r3, asr #2
10290
-	bcc	.L1599
10291
-	adds	r3, r5, #1
10292
-	ldr	r0, .L1614+8
10293
-	it	ne
10294
-	movne	r5, #256
10295
-	mov	r1, r6
10296
-	str	r5, [sp]
10297
-	mov	r3, r6
10298
-	ldr	r2, [sp, #16]
10299
-	bl	printk
10300
-.L1599:
10301
-	mov	r0, r9
10302
-	bl	NandcWaitFlashReady
10303
-	mov	r0, r5
10304
-	add	sp, sp, #36
10305
-	@ sp needed
10306
-	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
10307
-.L1615:
10662
+	b	.L1581
10663
+.L1571:
10664
+	mov	r4, r0
10665
+	b	.L1566
10666
+.L1583:
10308
10667
 	.align	2
10309
-.L1614:
10668
+.L1582:
10310
10669
 	.word	.LANCHOR0
10311
-	.word	.LANCHOR3+16
10670
+	.word	.LANCHOR3+11
10312
10671
 	.word	.LC95
10313
-	.word	.LANCHOR3+44
10672
+	.word	.LANCHOR3+37
10314
10673
 	.fnend
10315
10674
 	.size	samsung_read_retrial, .-samsung_read_retrial
10316
10675
 	.align	1
10317
10676
 	.global	FlashProgPage
10677
+	.syntax unified
10318
10678
 	.thumb
10319
10679
 	.thumb_func
10680
+	.fpu softvfp
10320
10681
 	.type	FlashProgPage, %function
10321
10682
 FlashProgPage:
10322
10683
 	.fnstart
..
..
@@ -10326,35 +10687,35 @@
10326
10687
 	.save {r4, r5, r6, r7, r8, lr}
10327
10688
 	.pad #8
10328
10689
 	mov	r8, r3
10329
-	ldr	r3, .L1619
10690
+	ldr	r3, .L1587
10330
10691
 	mov	r5, r1
10331
10692
 	mov	r7, r2
10332
10693
 	mov	r4, r0
10333
-	ldrb	r6, [r3, #481]	@ zero_extendqisi2
10334
-	cbnz	r0, .L1617
10335
-	ldr	r2, .L1619+4
10336
-	ldrb	r3, [r2, #1]	@ zero_extendqisi2
10337
-	ldr	r1, [r2, #4]
10338
-	muls	r1, r3, r1
10339
-	cmp	r5, r1
10340
-	bcs	.L1617
10341
-	ldrb	r3, [r2]	@ zero_extendqisi2
10694
+	ldrb	r6, [r3, #477]	@ zero_extendqisi2
10695
+	cbnz	r0, .L1585
10696
+	ldr	r1, .L1587+4
10697
+	ldrb	r3, [r1, #37]	@ zero_extendqisi2
10698
+	ldr	r0, [r1, #40]
10699
+	muls	r0, r3, r0
10700
+	cmp	r0, r5
10701
+	bls	.L1585
10702
+	ldrb	r3, [r1, #36]	@ zero_extendqisi2
10342
10703
 	cmp	r3, #0
10343
10704
 	it	ne
10344
10705
 	movne	r6, #4
10345
-.L1617:
10706
+.L1585:
10346
10707
 	mov	r0, r4
10347
10708
 	bl	NandcWaitFlashReady
10348
10709
 	mov	r0, r4
10349
10710
 	bl	NandcFlashCs
10350
-	mov	r0, r4
10351
10711
 	mov	r1, r5
10352
-	bl	FlashProgFirstCmd
10353
-	mov	r2, r6
10354
-	mov	r3, r7
10355
10712
 	mov	r0, r4
10356
-	movs	r1, #1
10713
+	bl	FlashProgFirstCmd
10714
+	mov	r3, r7
10715
+	mov	r2, r6
10357
10716
 	str	r8, [sp]
10717
+	movs	r1, #1
10718
+	mov	r0, r4
10358
10719
 	bl	NandcXferData
10359
10720
 	mov	r1, r5
10360
10721
 	mov	r0, r4
..
..
@@ -10364,281 +10725,285 @@
10364
10725
 	mov	r1, r5
10365
10726
 	mov	r0, r4
10366
10727
 	bl	FlashReadStatus
10367
-	mov	r5, r0
10728
+	mov	r1, r0
10368
10729
 	mov	r0, r4
10369
10730
 	bl	NandcFlashDeCs
10370
-	and	r0, r5, #1
10731
+	and	r0, r1, #1
10371
10732
 	add	sp, sp, #8
10372
10733
 	@ sp needed
10373
10734
 	pop	{r4, r5, r6, r7, r8, pc}
10374
-.L1620:
10735
+.L1588:
10375
10736
 	.align	2
10376
-.L1619:
10737
+.L1587:
10377
10738
 	.word	.LANCHOR1
10378
10739
 	.word	.LANCHOR0
10379
10740
 	.fnend
10380
10741
 	.size	FlashProgPage, .-FlashProgPage
10381
10742
 	.align	1
10382
10743
 	.global	FlashSavePhyInfo
10744
+	.syntax unified
10383
10745
 	.thumb
10384
10746
 	.thumb_func
10747
+	.fpu softvfp
10385
10748
 	.type	FlashSavePhyInfo, %function
10386
10749
 FlashSavePhyInfo:
10387
10750
 	.fnstart
10388
-	@ args = 0, pretend = 0, frame = 8
10751
+	@ args = 0, pretend = 0, frame = 0
10389
10752
 	@ frame_needed = 0, uses_anonymous_args = 0
10390
-	push	{r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr}
10391
-	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
10392
-	.pad #12
10393
-	ldr	r4, .L1634
10394
-	ldr	r5, .L1634+4
10395
-	ldr	r8, .L1634+12
10396
-	ldr	r3, [r4, #1184]
10397
-	mov	fp, r4
10398
-	ldrb	r0, [r4, #1210]	@ zero_extendqisi2
10399
-	mov	r10, r5
10400
-	str	r3, [r4, #1196]
10753
+	push	{r4, r5, r6, r7, r8, r9, r10, lr}
10754
+	.save {r4, r5, r6, r7, r8, r9, r10, lr}
10755
+	ldr	r4, .L1602
10756
+	ldr	r5, .L1602+4
10757
+	ldr	r3, [r4, #1192]
10758
+	ldrb	r0, [r4, #1218]	@ zero_extendqisi2
10759
+	ldr	r8, .L1602+12
10760
+	str	r3, [r4, #1204]
10401
10761
 	bl	FlashBchSel
10402
-	movs	r1, #0
10403
10762
 	mov	r2, #2048
10404
-	ldr	r0, [r4, #1184]
10763
+	movs	r1, #0
10764
+	ldr	r0, [r4, #1192]
10405
10765
 	bl	ftl_memset
10406
-	ldr	r3, [r4, #1196]
10407
-	addw	r1, r5, #2068
10766
+	ldr	r3, [r4, #1204]
10408
10767
 	movs	r2, #32
10768
+	addw	r1, r5, #2072
10409
10769
 	str	r8, [r3]
10410
-	ldr	r0, [r4, #1196]
10411
-	ldrb	r3, [r5, #2230]	@ zero_extendqisi2
10770
+	ldr	r0, [r4, #1204]
10771
+	ldrb	r3, [r5, #2234]	@ zero_extendqisi2
10412
10772
 	adds	r0, r0, #16
10413
10773
 	strh	r3, [r0, #-4]	@ movhi
10414
-	ldrb	r3, [r5, #1]	@ zero_extendqisi2
10774
+	ldrb	r3, [r5, #37]	@ zero_extendqisi2
10415
10775
 	strh	r3, [r0, #-2]	@ movhi
10416
-	ldrb	r3, [r5, #2252]	@ zero_extendqisi2
10776
+	ldrb	r3, [r5, #2256]	@ zero_extendqisi2
10417
10777
 	str	r3, [r0, #1060]
10418
10778
 	bl	ftl_memcpy
10419
-	ldr	r0, [r4, #1196]
10420
-	addw	r1, r5, #2232
10779
+	ldr	r0, [r4, #1204]
10421
10780
 	movs	r2, #8
10781
+	addw	r1, r5, #2236
10422
10782
 	adds	r0, r0, #80
10423
10783
 	bl	ftl_memcpy
10424
-	ldr	r0, [r4, #1196]
10425
-	addw	r1, r5, #1172
10784
+	ldr	r0, [r4, #1204]
10426
10785
 	movs	r2, #32
10786
+	addw	r1, r5, #1180
10427
10787
 	adds	r0, r0, #96
10428
10788
 	bl	ftl_memcpy
10429
-	ldr	r0, [r4, #1196]
10430
-	ldr	r1, .L1634+8
10789
+	ldr	r0, [r4, #1204]
10431
10790
 	movs	r2, #32
10791
+	ldr	r1, .L1602+8
10432
10792
 	adds	r0, r0, #160
10433
10793
 	bl	ftl_memcpy
10434
-	ldr	r0, [r4, #1196]
10435
-	add	r1, r5, #48
10794
+	ldr	r0, [r4, #1204]
10436
10795
 	movs	r2, #32
10796
+	add	r1, r5, #52
10437
10797
 	adds	r0, r0, #192
10438
10798
 	bl	ftl_memcpy
10439
-	ldr	r0, [r4, #1196]
10799
+	ldr	r0, [r4, #1204]
10440
10800
 	mov	r2, #852
10441
-	addw	r1, r5, #1210
10801
+	add	r1, r5, #1216
10442
10802
 	adds	r0, r0, #224
10443
10803
 	bl	ftl_memcpy
10444
-	ldr	r6, [r4, #1196]
10804
+	ldr	r6, [r4, #1204]
10445
10805
 	movw	r1, #2036
10446
10806
 	add	r0, r6, #12
10447
10807
 	bl	js_hash
10448
10808
 	mov	r3, #1592
10449
-	str	r3, [r6, #4]
10450
-	ldr	r3, [r4, #1212]
10451
-	str	r3, [r4, #1196]
10452
10809
 	str	r0, [r6, #8]
10453
-	movs	r0, #0
10454
-	bl	flash_enter_slc_mode
10810
+	str	r3, [r6, #4]
10455
10811
 	movs	r6, #0
10812
+	ldr	r3, [r4, #1220]
10456
10813
 	mov	r7, r6
10457
-.L1627:
10458
-	ldr	r1, [r5, #4]
10459
10814
 	movs	r0, #0
10460
-	mov	r2, r0
10815
+	str	r3, [r4, #1204]
10816
+	bl	flash_enter_slc_mode
10817
+.L1595:
10818
+	ldr	r1, [r5, #40]
10819
+	movs	r2, #0
10820
+	mov	r0, r2
10461
10821
 	muls	r1, r7, r1
10462
10822
 	bl	FlashEraseBlock
10463
-	ldrb	r9, [r5, #144]	@ zero_extendqisi2
10823
+	ldrb	r9, [r5, #152]	@ zero_extendqisi2
10464
10824
 	cmp	r9, #0
10465
-	beq	.L1622
10825
+	beq	.L1590
10466
10826
 	mov	r9, #0
10467
-.L1623:
10468
-	ldr	r1, [r5, #4]
10469
-	movs	r0, #0
10470
-	ldr	r2, [r4, #1184]
10471
-	mov	r3, r0
10827
+.L1591:
10828
+	ldr	r1, [r5, #40]
10829
+	movs	r3, #0
10830
+	ldr	r2, [r4, #1192]
10831
+	mov	r0, r3
10472
10832
 	mla	r1, r1, r7, r9
10473
10833
 	add	r9, r9, #1
10474
10834
 	bl	FlashProgPage
10475
10835
 	cmp	r9, #10
10476
-	bne	.L1623
10477
-	b	.L1624
10478
-.L1622:
10479
-	ldr	r1, [r10, #4]
10480
-	mov	r3, r9
10481
-	ldr	r2, [r4, #1184]
10482
-	mov	r0, r9
10483
-	muls	r1, r7, r1
10484
-	bl	FlashProgPage
10485
-	ldr	r1, [r10, #4]
10486
-	mov	r0, r9
10487
-	ldr	r2, [r4, #1184]
10488
-	mov	r3, r9
10489
-	muls	r1, r7, r1
10490
-	adds	r1, r1, #1
10491
-	bl	FlashProgPage
10492
-.L1624:
10493
-	ldr	r1, [r5, #4]
10494
-	movs	r0, #0
10495
-	ldr	r2, [r4, #1212]
10496
-	mov	r3, r0
10836
+	bne	.L1591
10837
+.L1592:
10838
+	ldr	r1, [r5, #40]
10839
+	movs	r3, #0
10840
+	ldr	r2, [r4, #1220]
10841
+	mov	r0, r3
10842
+	add	r10, r7, #1
10497
10843
 	muls	r1, r7, r1
10498
10844
 	bl	FlashReadRawPage
10499
-	adds	r2, r7, #1
10500
10845
 	adds	r0, r0, #1
10501
-	beq	.L1625
10502
-	ldr	r9, [fp, #1196]
10846
+	beq	.L1593
10847
+	ldr	r9, [r4, #1204]
10503
10848
 	ldr	r3, [r9]
10504
10849
 	cmp	r3, r8
10505
-	bne	.L1625
10506
-	add	r0, r9, #12
10850
+	bne	.L1593
10507
10851
 	movw	r1, #2036
10508
-	str	r2, [sp, #4]
10852
+	add	r0, r9, #12
10509
10853
 	bl	js_hash
10510
10854
 	ldr	r3, [r9, #8]
10511
10855
 	cmp	r3, r0
10512
-	ldr	r2, [sp, #4]
10513
-	bne	.L1625
10514
-	ldr	r3, [r10, #4]
10856
+	bne	.L1593
10857
+	ldr	r3, [r5, #40]
10515
10858
 	cmp	r6, #1
10516
-	str	r2, [fp, #1204]
10517
-	mul	r3, r3, r7
10518
-	str	r3, [fp, #1200]
10519
-	beq	.L1628
10859
+	str	r10, [r4, #1212]
10860
+	mul	r7, r7, r3
10861
+	str	r7, [r4, #1208]
10862
+	beq	.L1596
10520
10863
 	movs	r6, #1
10521
-.L1625:
10522
-	cmp	r2, #4
10523
-	mov	r7, r2
10524
-	bne	.L1627
10525
-	b	.L1626
10526
-.L1628:
10527
-	movs	r6, #2
10528
-.L1626:
10864
+.L1593:
10865
+	mov	r7, r10
10866
+	cmp	r7, #4
10867
+	bne	.L1595
10868
+.L1594:
10529
10869
 	movs	r0, #0
10530
10870
 	bl	flash_exit_slc_mode
10531
10871
 	clz	r0, r6
10532
10872
 	lsrs	r0, r0, #5
10533
10873
 	negs	r0, r0
10534
-	add	sp, sp, #12
10535
-	@ sp needed
10536
-	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
10537
-.L1635:
10874
+	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
10875
+.L1590:
10876
+	ldr	r1, [r5, #40]
10877
+	mov	r3, r9
10878
+	ldr	r2, [r4, #1192]
10879
+	mov	r0, r9
10880
+	muls	r1, r7, r1
10881
+	bl	FlashProgPage
10882
+	ldr	r1, [r5, #40]
10883
+	mov	r3, r9
10884
+	ldr	r2, [r4, #1192]
10885
+	mov	r0, r9
10886
+	muls	r1, r7, r1
10887
+	adds	r1, r1, #1
10888
+	bl	FlashProgPage
10889
+	b	.L1592
10890
+.L1596:
10891
+	movs	r6, #2
10892
+	b	.L1594
10893
+.L1603:
10538
10894
 	.align	2
10539
-.L1634:
10895
+.L1602:
10540
10896
 	.word	.LANCHOR4
10541
10897
 	.word	.LANCHOR0
10542
-	.word	.LANCHOR1+472
10898
+	.word	.LANCHOR1+468
10543
10899
 	.word	1312902724
10544
10900
 	.fnend
10545
10901
 	.size	FlashSavePhyInfo, .-FlashSavePhyInfo
10546
10902
 	.align	1
10547
10903
 	.global	FlashReadIdbDataRaw
10904
+	.syntax unified
10548
10905
 	.thumb
10549
10906
 	.thumb_func
10907
+	.fpu softvfp
10550
10908
 	.type	FlashReadIdbDataRaw, %function
10551
10909
 FlashReadIdbDataRaw:
10552
10910
 	.fnstart
10553
-	@ args = 0, pretend = 0, frame = 8
10911
+	@ args = 0, pretend = 0, frame = 16
10554
10912
 	@ frame_needed = 0, uses_anonymous_args = 0
10555
-	push	{r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr}
10913
+	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
10556
10914
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
10557
-	.pad #12
10558
-	mov	r9, r0
10559
-	ldr	r3, .L1655
10560
-	ldr	r4, .L1655+4
10561
-	ldr	r0, [r3]	@ unaligned
10562
-	ldr	r3, [r4, #2248]
10563
-	ldrb	r10, [r4, #2312]	@ zero_extendqisi2
10564
-	str	r0, [sp, #4]	@ unaligned
10565
-	cbz	r3, .L1637
10915
+	movs	r3, #60
10916
+	.pad #20
10917
+	sub	sp, sp, #20
10918
+	ldr	r4, .L1622
10919
+	mov	r10, r0
10920
+	strb	r3, [sp, #12]
10921
+	movs	r3, #40
10922
+	strb	r3, [sp, #13]
10923
+	movs	r3, #24
10924
+	strb	r3, [sp, #14]
10925
+	movs	r3, #16
10926
+	strb	r3, [sp, #15]
10927
+	ldrb	r3, [r4, #2316]	@ zero_extendqisi2
10928
+	str	r3, [sp, #4]
10929
+	ldr	r3, [r4, #2252]
10930
+	cbz	r3, .L1605
10566
10931
 	movs	r0, #0
10567
10932
 	bl	flash_enter_slc_mode
10568
-.L1637:
10569
-	mov	r0, r9
10570
-	movs	r1, #0
10571
-	mov	r2, #2048
10933
+.L1605:
10934
+	ldr	r6, .L1622+4
10572
10935
 	mov	r8, #-1
10573
-	bl	ftl_memset
10574
10936
 	movs	r5, #2
10575
-.L1638:
10576
-	ldrb	r3, [r4, #1]	@ zero_extendqisi2
10577
-	cmp	r5, r3
10578
-	bcs	.L1642
10579
-	movs	r7, #0
10580
-.L1640:
10581
-	add	r3, sp, #4
10582
-	ldr	r6, .L1655+8
10583
-	ldrb	fp, [r7, r3]	@ zero_extendqisi2
10584
-	mov	r0, fp
10585
-	bl	FlashBchSel
10586
-	ldr	r1, [r4, #4]
10587
-	movs	r0, #0
10588
-	ldr	r2, [r6, #1184]
10589
-	muls	r1, r5, r1
10590
-	mov	r3, r0
10591
-	bl	FlashReadRawPage
10592
-	adds	r0, r0, #1
10593
-	bne	.L1639
10594
-	adds	r7, r7, #1
10595
-	cmp	r7, #4
10596
-	bne	.L1640
10597
-	b	.L1641
10598
-.L1639:
10599
-	ldr	r3, [r6, #1184]
10600
-	ldr	r2, .L1655+12
10601
-	ldr	r3, [r3]
10602
-	cmp	r3, r2
10603
-	bne	.L1641
10604
-	mov	r1, fp
10605
-	ldr	r0, .L1655+16
10606
-	bl	printk
10607
10937
 	mov	r2, #2048
10608
-	mov	r0, r9
10609
-	ldr	r1, [r6, #1184]
10610
-	bl	ftl_memcpy
10611
-	ldr	r3, [r6, #1184]
10612
-	ldr	r2, .L1655+4
10613
-	ldr	r3, [r3, #512]
10614
-	strb	r3, [r2, #1]
10615
-	ldr	r3, [r6, #1204]
10616
-	cmp	r3, r5
10617
-	bls	.L1645
10618
-	str	r5, [r6, #1204]
10619
-	bl	FlashSavePhyInfo
10620
-	mov	r8, #0
10621
-.L1641:
10622
-	adds	r5, r5, #1
10623
-	b	.L1638
10624
-.L1645:
10625
-	mov	r8, #0
10626
-.L1642:
10938
+	movs	r1, #0
10627
10939
 	mov	r0, r10
10940
+	bl	ftl_memset
10941
+.L1606:
10942
+	ldrb	r3, [r4, #37]	@ zero_extendqisi2
10943
+	cmp	r5, r3
10944
+	bcc	.L1611
10945
+.L1610:
10946
+	ldr	r0, [sp, #4]
10628
10947
 	bl	FlashBchSel
10629
-	ldr	r3, [r4, #2248]
10630
-	cbz	r3, .L1649
10948
+	ldr	r3, [r4, #2252]
10949
+	cbz	r3, .L1604
10631
10950
 	movs	r0, #0
10632
10951
 	bl	flash_exit_slc_mode
10633
-.L1649:
10952
+.L1604:
10634
10953
 	mov	r0, r8
10635
-	add	sp, sp, #12
10954
+	add	sp, sp, #20
10636
10955
 	@ sp needed
10637
10956
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
10638
-.L1656:
10957
+.L1611:
10958
+	movs	r7, #0
10959
+	add	fp, sp, #12
10960
+.L1608:
10961
+	ldrb	r9, [r7, fp]	@ zero_extendqisi2
10962
+	mov	r0, r9
10963
+	bl	FlashBchSel
10964
+	ldr	r1, [r4, #40]
10965
+	movs	r3, #0
10966
+	ldr	r2, [r6, #1192]
10967
+	mov	r0, r3
10968
+	muls	r1, r5, r1
10969
+	bl	FlashReadRawPage
10970
+	adds	r0, r0, #1
10971
+	bne	.L1607
10972
+	adds	r7, r7, #1
10973
+	cmp	r7, #4
10974
+	bne	.L1608
10975
+.L1609:
10976
+	adds	r5, r5, #1
10977
+	b	.L1606
10978
+.L1614:
10979
+	mov	r8, #0
10980
+	b	.L1610
10981
+.L1607:
10982
+	ldr	r3, [r6, #1192]
10983
+	ldr	r2, .L1622+8
10984
+	ldr	r3, [r3]
10985
+	cmp	r3, r2
10986
+	bne	.L1609
10987
+	mov	r1, r9
10988
+	ldr	r0, .L1622+12
10989
+	bl	printk
10990
+	mov	r2, #2048
10991
+	ldr	r1, [r6, #1192]
10992
+	mov	r0, r10
10993
+	bl	ftl_memcpy
10994
+	ldr	r3, [r6, #1192]
10995
+	ldr	r3, [r3, #512]
10996
+	strb	r3, [r4, #37]
10997
+	ldr	r3, [r6, #1212]
10998
+	cmp	r5, r3
10999
+	bcs	.L1614
11000
+	str	r5, [r6, #1212]
11001
+	mov	r8, #0
11002
+	bl	FlashSavePhyInfo
11003
+	b	.L1609
11004
+.L1623:
10639
11005
 	.align	2
10640
-.L1655:
10641
-	.word	.LANCHOR3+11
11006
+.L1622:
10642
11007
 	.word	.LANCHOR0
10643
11008
 	.word	.LANCHOR4
10644
11009
 	.word	-52655045
..
..
@@ -10647,619 +11012,603 @@
10647
11012
 	.size	FlashReadIdbDataRaw, .-FlashReadIdbDataRaw
10648
11013
 	.align	1
10649
11014
 	.global	FlashInit
11015
+	.syntax unified
10650
11016
 	.thumb
10651
11017
 	.thumb_func
11018
+	.fpu softvfp
10652
11019
 	.type	FlashInit, %function
10653
11020
 FlashInit:
10654
11021
 	.fnstart
10655
-	@ args = 0, pretend = 0, frame = 0
11022
+	@ args = 0, pretend = 0, frame = 8
10656
11023
 	@ frame_needed = 0, uses_anonymous_args = 0
10657
11024
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
10658
11025
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
10659
-	mov	r5, r0
10660
-	.pad #20
10661
-	sub	sp, sp, #20
11026
+	mov	r7, r0
11027
+	ldr	r5, .L1740
11028
+	.pad #28
11029
+	sub	sp, sp, #28
11030
+	mov	r0, #32768
11031
+	movs	r6, #0
11032
+	bl	ftl_malloc
11033
+	str	r0, [r5, #1192]
10662
11034
 	mov	r0, #32768
10663
11035
 	bl	ftl_malloc
10664
-	ldr	r4, .L1780
10665
-	ldr	r6, .L1780+4
10666
-	movs	r7, #0
10667
-	add	r9, r6, #12
10668
-	mov	r8, r4
10669
-	str	r0, [r4, #1184]
10670
-	mov	r0, #32768
10671
-	bl	ftl_malloc
10672
-	str	r0, [r4, #1212]
11036
+	str	r0, [r5, #1220]
10673
11037
 	mov	r0, #4096
10674
-	bl	ftl_malloc
10675
-	str	r0, [r4, #1216]
11038
+	ldr	r4, .L1740+4
11039
+	mov	r8, r6
11040
+	bl	ftl_dma32_malloc
11041
+	str	r0, [r5, #1224]
10676
11042
 	mov	r0, #32768
10677
11043
 	bl	ftl_malloc
10678
-	str	r0, [r4, #1220]
11044
+	ldr	fp, .L1740+40
11045
+	str	r0, [r5, #1228]
10679
11046
 	mov	r0, #4096
10680
-	bl	ftl_malloc
11047
+	bl	ftl_dma32_malloc
10681
11048
 	movs	r3, #50
10682
-	str	r7, [r4, #1204]
10683
-	strb	r3, [r4, #1208]
10684
-	strb	r3, [r6, #1]
11049
+	str	r0, [r5, #1232]
11050
+	strb	r3, [r4, #37]
11051
+	mov	r0, r7
11052
+	strb	r3, [r5, #1216]
11053
+	addw	r7, r4, #2072
10685
11054
 	movs	r3, #128
10686
-	str	r7, [r4, #1188]
10687
-	str	r3, [r6, #4]
11055
+	str	r6, [r5, #1212]
11056
+	str	r3, [r4, #40]
10688
11057
 	movs	r3, #60
10689
-	strb	r7, [r4, #1228]
10690
-	strb	r3, [r4, #1210]
10691
-	strb	r7, [r6, #2252]
10692
-	strb	r7, [r6]
10693
-	str	r0, [r4, #1224]
10694
-	mov	r0, r5
11058
+	strb	r6, [r4, #2256]
11059
+	str	r6, [r5, #1196]
11060
+	strb	r6, [r4, #36]
11061
+	strb	r6, [r5, #1236]
11062
+	strb	r3, [r5, #1218]
10695
11063
 	bl	NandcInit
10696
-	addw	r5, r6, #2068
10697
-	mov	r4, r6
10698
-.L1663:
10699
-	add	r3, r9, r7, lsl #3
10700
-	uxtb	fp, r7
10701
-	ldr	r6, [r9, r7, lsl #3]
10702
-	ldrb	r10, [r3, #4]	@ zero_extendqisi2
10703
-	mov	r0, fp
11064
+.L1630:
11065
+	ldr	r3, [r4, r6, lsl #3]
11066
+	uxtb	r9, r6
11067
+	add	r2, r4, r6, lsl #3
11068
+	mov	r0, r9
11069
+	ldrb	r10, [r2, #4]	@ zero_extendqisi2
11070
+	str	r3, [sp, #20]
10704
11071
 	bl	FlashReset
10705
-	mov	r0, fp
11072
+	mov	r0, r9
10706
11073
 	bl	NandcFlashCs
10707
-	movs	r3, #144
10708
-	add	r6, r6, r10, lsl #8
11074
+	ldr	r3, [sp, #20]
10709
11075
 	movs	r0, #200
10710
-	mov	r10, #0
10711
-	str	r3, [r6, #2056]
10712
-	str	r10, [r6, #2052]
10713
-	bl	NandcDelayns
10714
-	ldr	r2, [r6, #2048]
11076
+	add	r10, r3, r10, lsl #8
11077
+	movs	r3, #144
11078
+	str	r3, [r10, #2056]
11079
+	str	r8, [r10, #2052]
11080
+	bl	ndelay
11081
+	ldr	r2, [r10, #2048]
10715
11082
 	uxtb	r2, r2
10716
-	strb	r2, [r5]
10717
-	ldr	r1, [r6, #2048]
11083
+	strb	r2, [r7]
10718
11084
 	cmp	r2, #44
10719
-	strb	r1, [r5, #1]
10720
-	ldr	r1, [r6, #2048]
10721
-	strb	r1, [r5, #2]
10722
-	ldr	r1, [r6, #2048]
10723
-	strb	r1, [r5, #3]
10724
-	ldr	r1, [r6, #2048]
10725
-	strb	r1, [r5, #4]
10726
-	ldr	r1, [r6, #2048]
10727
-	strb	r1, [r5, #5]
10728
-	bne	.L1658
11085
+	ldr	r1, [r10, #2048]
11086
+	strb	r1, [r7, #1]
11087
+	ldr	r1, [r10, #2048]
11088
+	strb	r1, [r7, #2]
11089
+	ldr	r1, [r10, #2048]
11090
+	strb	r1, [r7, #3]
11091
+	ldr	r1, [r10, #2048]
11092
+	strb	r1, [r7, #4]
11093
+	ldr	r1, [r10, #2048]
11094
+	strb	r1, [r7, #5]
11095
+	bne	.L1625
10729
11096
 	movs	r2, #239
10730
11097
 	movs	r0, #200
10731
-	str	r2, [r6, #2056]
11098
+	str	r2, [r10, #2056]
10732
11099
 	movs	r2, #1
10733
-	str	r2, [r6, #2052]
10734
-	bl	NandcDelayns
11100
+	str	r2, [r10, #2052]
11101
+	bl	ndelay
10735
11102
 	movs	r2, #4
10736
-	str	r2, [r6, #2048]
10737
-	str	r10, [r6, #2048]
10738
-	str	r10, [r6, #2048]
10739
-	str	r10, [r6, #2048]
10740
-.L1658:
10741
-	mov	r0, fp
11103
+	str	r2, [r10, #2048]
11104
+	str	r8, [r10, #2048]
11105
+	str	r8, [r10, #2048]
11106
+	str	r8, [r10, #2048]
11107
+.L1625:
11108
+	mov	r0, r9
10742
11109
 	bl	NandcFlashDeCs
10743
-	ldrb	r2, [r5]	@ zero_extendqisi2
11110
+	ldrb	r2, [r7]	@ zero_extendqisi2
10744
11111
 	subs	r3, r2, #1
10745
11112
 	uxtb	r3, r3
10746
11113
 	cmp	r3, #253
10747
-	bhi	.L1659
10748
-	ldrb	r1, [r5, #2]	@ zero_extendqisi2
10749
-	ldrb	r3, [r5, #1]	@ zero_extendqisi2
10750
-	ldr	r0, .L1780+8
10751
-	str	r1, [sp]
10752
-	ldrb	r1, [r5, #3]	@ zero_extendqisi2
10753
-	str	r1, [sp, #4]
10754
-	ldrb	r1, [r5, #4]	@ zero_extendqisi2
10755
-	str	r1, [sp, #8]
10756
-	ldrb	r1, [r5, #5]	@ zero_extendqisi2
11114
+	bhi	.L1626
11115
+	ldrb	r1, [r7, #5]	@ zero_extendqisi2
11116
+	mov	r0, fp
11117
+	ldrb	r3, [r7, #1]	@ zero_extendqisi2
10757
11118
 	str	r1, [sp, #12]
10758
-	adds	r1, r7, #1
11119
+	ldrb	r1, [r7, #4]	@ zero_extendqisi2
11120
+	str	r1, [sp, #8]
11121
+	ldrb	r1, [r7, #3]	@ zero_extendqisi2
11122
+	str	r1, [sp, #4]
11123
+	ldrb	r1, [r7, #2]	@ zero_extendqisi2
11124
+	str	r1, [sp]
11125
+	adds	r1, r6, #1
10759
11126
 	bl	printk
10760
-.L1659:
10761
-	cbnz	r7, .L1660
10762
-	ldrb	r3, [r4, #2068]	@ zero_extendqisi2
11127
+.L1626:
11128
+	cbnz	r6, .L1627
11129
+	ldrb	r3, [r4, #2072]	@ zero_extendqisi2
10763
11130
 	subs	r3, r3, #1
10764
11131
 	uxtb	r3, r3
10765
11132
 	cmp	r3, #253
10766
-	bhi	.L1716
10767
-	ldr	r3, .L1780+4
10768
-	ldrb	r3, [r3, #2069]	@ zero_extendqisi2
11133
+	bhi	.L1681
11134
+	ldrb	r3, [r4, #2073]	@ zero_extendqisi2
10769
11135
 	cmp	r3, #255
10770
-	beq	.L1716
10771
-.L1660:
10772
-	ldrb	r3, [r5]	@ zero_extendqisi2
10773
-	adds	r7, r7, #1
10774
-	adds	r5, r5, #8
11136
+	beq	.L1681
11137
+.L1627:
11138
+	ldrb	r3, [r7]	@ zero_extendqisi2
11139
+	adds	r6, r6, #1
11140
+	adds	r7, r7, #8
10775
11141
 	cmp	r3, #181
10776
11142
 	itt	eq
10777
11143
 	moveq	r3, #44
10778
-	strbeq	r3, [r5, #-8]
10779
-	cmp	r7, #4
10780
-	bne	.L1663
10781
-	ldrb	r3, [r4, #2068]	@ zero_extendqisi2
11144
+	strbeq	r3, [r7, #-8]
11145
+	cmp	r6, #4
11146
+	bne	.L1630
11147
+	ldrb	r3, [r4, #2072]	@ zero_extendqisi2
10782
11148
 	cmp	r3, #173
10783
-	beq	.L1664
10784
-	ldr	r3, .L1780+4
10785
-	ldr	r0, [r3, #2256]
11149
+	beq	.L1631
11150
+	ldr	r0, [r4, #2260]
10786
11151
 	bl	NandcSetDdrMode
10787
-.L1664:
10788
-	ldr	r6, .L1780+4
10789
-	movs	r1, #0
11152
+.L1631:
10790
11153
 	mov	r2, #852
10791
-	ldr	r5, .L1780+12
10792
-	addw	r0, r6, #1210
11154
+	movs	r1, #0
11155
+	ldr	r0, .L1740+8
10793
11156
 	bl	ftl_memset
10794
-	ldr	r0, .L1780+16
10795
-	add	r3, r0, #472
10796
-	str	r3, [r4, #44]
10797
-	movs	r3, #0
10798
-	strb	r3, [r4, #8]
10799
-	ldr	r3, [r4, #2264]
10800
-	cmp	r3, r5
10801
-	bne	.L1665
10802
-	ldrb	r2, [r0, #491]	@ zero_extendqisi2
11157
+	ldr	r6, .L1740+12
11158
+	ldr	r3, .L1740+16
11159
+	ldr	r1, [r4, #2268]
11160
+	add	r2, r3, #468
11161
+	cmp	r1, r6
11162
+	str	r2, [r4, #48]
11163
+	mov	r2, #0
11164
+	strb	r2, [r4, #44]
11165
+	bne	.L1632
11166
+	ldrb	r2, [r3, #487]	@ zero_extendqisi2
10803
11167
 	cmp	r2, #50
10804
11168
 	itt	ne
10805
11169
 	movne	r2, #1
10806
-	strne	r2, [r6, #2248]
10807
-.L1665:
10808
-	ldrb	r6, [r4, #2069]	@ zero_extendqisi2
10809
-	cmp	r6, #161
10810
-	beq	.L1666
10811
-	cmp	r6, #241
10812
-	beq	.L1666
10813
-	cmp	r6, #218
10814
-	beq	.L1666
10815
-	and	r2, r6, #253
10816
-	cmp	r2, #209
10817
-	beq	.L1666
10818
-	cmp	r6, #220
10819
-	bne	.L1667
10820
-	ldr	r2, .L1780+4
10821
-	ldrb	r2, [r2, #2071]	@ zero_extendqisi2
10822
-	cmp	r2, #149
10823
-	bne	.L1667
10824
-.L1666:
11170
+	strne	r2, [r4, #2252]
11171
+.L1632:
11172
+	ldrb	r2, [r4, #2073]	@ zero_extendqisi2
11173
+	cmp	r2, #161
11174
+	beq	.L1633
11175
+	cmp	r2, #241
11176
+	beq	.L1633
11177
+	cmp	r2, #218
11178
+	beq	.L1633
11179
+	and	r0, r2, #253
11180
+	cmp	r0, #209
11181
+	beq	.L1633
11182
+	cmp	r2, #220
11183
+	bne	.L1634
11184
+	ldrb	r0, [r4, #2075]	@ zero_extendqisi2
11185
+	cmp	r0, #149
11186
+	bne	.L1634
11187
+.L1633:
10825
11188
 	movs	r7, #16
10826
-	strb	r7, [r4, #1]
10827
-	strb	r7, [r8, #1210]
10828
-	movs	r1, #1
10829
-	ldrb	r7, [r4, #2068]	@ zero_extendqisi2
10830
-	strb	r1, [r4]
11189
+	movs	r0, #1
11190
+	strb	r7, [r4, #37]
11191
+	strb	r7, [r5, #1218]
11192
+	ldrb	r7, [r4, #2072]	@ zero_extendqisi2
11193
+	strb	r0, [r4, #36]
11194
+	strb	r2, [r3, #3414]
10831
11195
 	cmp	r7, #152
10832
-	ldr	r2, .L1780
10833
-	strb	r7, [r0, #3417]
10834
-	strb	r6, [r0, #3418]
10835
-	bne	.L1669
10836
-	ldr	r7, .L1780+4
10837
-	ldrsb	r7, [r7, #2072]
11196
+	strb	r7, [r3, #3413]
11197
+	bne	.L1636
11198
+	ldrsb	r7, [r4, #2076]
10838
11199
 	cmp	r7, #0
10839
-	blt	.L1670
10840
-	movs	r1, #24
10841
-	strb	r1, [r2, #1210]
10842
-.L1669:
10843
-	cmp	r3, r5
10844
-	beq	.L1672
10845
-	movw	r2, #2049
10846
-	cmp	r3, r2
10847
-	bne	.L1673
10848
-.L1672:
10849
-	movs	r3, #16
10850
-	strb	r3, [r8, #1210]
10851
-.L1673:
10852
-	cmp	r6, #218
10853
-	bne	.L1674
10854
-	mov	r3, #2048
10855
-	b	.L1775
10856
-.L1674:
10857
-	cmp	r6, #220
10858
-	bne	.L1676
10859
-	mov	r3, #4096
10860
-.L1775:
10861
-	strh	r3, [r0, #3430]	@ movhi
10862
-	strb	r6, [r0, #3418]
10863
-	b	.L1675
10864
-.L1676:
10865
-	cmp	r6, #211
10866
-	itttt	eq
10867
-	moveq	r3, #4096
10868
-	strheq	r3, [r0, #3430]	@ movhi
10869
-	moveq	r3, #2
10870
-	strbeq	r3, [r0, #3429]
10871
-.L1675:
10872
-	ldr	r1, .L1780+20
11200
+	blt	.L1637
11201
+	movs	r0, #24
11202
+	strb	r0, [r5, #1218]
11203
+.L1636:
11204
+	cmp	r1, r6
11205
+	beq	.L1639
11206
+	movw	r0, #2049
11207
+	cmp	r1, r0
11208
+	bne	.L1640
11209
+.L1639:
11210
+	movs	r1, #16
11211
+	strb	r1, [r5, #1218]
11212
+.L1640:
11213
+	cmp	r2, #218
11214
+	bne	.L1641
11215
+	mov	r1, #2048
11216
+.L1734:
11217
+	strh	r1, [r3, #3426]	@ movhi
11218
+	strb	r2, [r3, #3414]
11219
+.L1642:
10873
11220
 	movs	r2, #32
10874
-	ldr	r0, .L1780+24
11221
+	ldr	r1, .L1740+20
11222
+	ldr	r0, .L1740+24
10875
11223
 	bl	ftl_memcpy
10876
-	ldr	r0, .L1780+28
11224
+	ldr	r1, .L1740+28
10877
11225
 	movs	r2, #32
10878
-	add	r1, r0, #2944
11226
+	sub	r0, r1, #2944
10879
11227
 	bl	ftl_memcpy
10880
-.L1667:
10881
-	ldrb	r3, [r4]	@ zero_extendqisi2
10882
-	ldr	r6, .L1780+4
11228
+.L1634:
11229
+	ldrb	r3, [r4, #36]	@ zero_extendqisi2
10883
11230
 	cmp	r3, #0
10884
-	bne	.L1677
11231
+	bne	.L1645
10885
11232
 	bl	FlashLoadPhyInfoInRam
10886
-	cbnz	r0, .L1679
10887
-	ldr	r3, [r6, #44]
11233
+	cbnz	r0, .L1647
11234
+	ldr	r3, [r4, #48]
10888
11235
 	ldrh	r3, [r3, #16]
10889
11236
 	lsrs	r3, r3, #8
10890
11237
 	lsls	r7, r3, #31
10891
11238
 	and	r0, r3, #7
10892
-	strb	r0, [r6, #2229]
10893
-	bmi	.L1679
11239
+	strb	r0, [r4, #2233]
11240
+	bmi	.L1647
10894
11241
 	movs	r3, #1
10895
-	strb	r3, [r6, #2252]
11242
+	strb	r3, [r4, #2256]
10896
11243
 	bl	FlashSetInterfaceMode
10897
-	ldrb	r0, [r6, #2229]	@ zero_extendqisi2
11244
+	ldrb	r0, [r4, #2233]	@ zero_extendqisi2
10898
11245
 	bl	NandcSetMode
10899
-.L1679:
10900
-	ldr	r3, [r4, #44]
10901
-	ldr	r6, .L1780+4
11246
+.L1647:
11247
+	ldr	r3, [r4, #48]
10902
11248
 	ldrb	r3, [r3, #26]	@ zero_extendqisi2
10903
-	strb	r3, [r4, #144]
11249
+	strb	r3, [r4, #152]
10904
11250
 	bl	FlashLoadPhyInfo
10905
11251
 	cmp	r0, #0
10906
-	beq	.L1677
10907
-	ldr	r3, [r6, #2256]
10908
-	cbz	r3, .L1682
11252
+	beq	.L1645
11253
+	ldr	r3, [r4, #2260]
11254
+	cmp	r3, #0
11255
+	beq	.L1650
10909
11256
 	movs	r0, #1
10910
11257
 	bl	FlashSetInterfaceMode
10911
11258
 	movs	r0, #1
10912
-	b	.L1776
10913
-.L1781:
10914
-	.align	2
10915
-.L1780:
10916
-	.word	.LANCHOR4
10917
-	.word	.LANCHOR0
10918
-	.word	.LC97
10919
-	.word	1446522928
10920
-	.word	.LANCHOR1
10921
-	.word	.LANCHOR1+3292
10922
-	.word	.LANCHOR0+48
10923
-	.word	.LANCHOR1+472
10924
-.L1682:
10925
-	ldrb	r0, [r6, #2229]	@ zero_extendqisi2
10926
-	bl	FlashSetInterfaceMode
10927
-	ldrb	r0, [r6, #2229]	@ zero_extendqisi2
10928
-.L1776:
11259
+.L1735:
10929
11260
 	bl	NandcSetMode
10930
11261
 	bl	FlashLoadPhyInfo
10931
11262
 	cmp	r0, #0
10932
-	beq	.L1677
11263
+	beq	.L1645
10933
11264
 	movs	r0, #1
10934
-	ldr	r6, .L1782
10935
11265
 	bl	FlashSetInterfaceMode
10936
11266
 	movs	r0, #1
10937
11267
 	bl	NandcSetMode
10938
-	ldr	r3, [r4, #44]
10939
-	ldr	r0, .L1782+4
11268
+	ldr	r3, [r4, #48]
11269
+	ldr	r0, .L1740+32
10940
11270
 	ldrh	r1, [r3, #14]
10941
11271
 	bl	printk
10942
11272
 	bl	FlashLoadPhyInfoInRam
10943
11273
 	adds	r1, r0, #1
10944
-	beq	.L1736
11274
+	beq	.L1624
10945
11275
 	bl	FlashDieInfoInit
10946
-	ldr	r3, [r6, #44]
11276
+	ldr	r3, [r4, #48]
10947
11277
 	ldrb	r0, [r3, #19]	@ zero_extendqisi2
10948
11278
 	bl	FlashGetReadRetryDefault
10949
-	ldr	r2, .L1782+8
10950
-	ldr	r3, [r6, #44]
10951
-	ldrh	r2, [r2, #3270]
11279
+	ldr	r3, [r4, #48]
11280
+	ldr	r2, .L1740+36
10952
11281
 	ldrb	r1, [r3, #9]	@ zero_extendqisi2
11282
+	ldrh	r2, [r2, #3270]
10953
11283
 	addw	r2, r2, #4095
10954
11284
 	cmp	r1, r2, asr #12
10955
-	blt	.L1684
11285
+	blt	.L1652
10956
11286
 	ldrh	r2, [r3, #14]
10957
11287
 	adds	r2, r2, #255
10958
11288
 	cmp	r1, r2, asr #8
10959
-	bge	.L1685
10960
-.L1684:
11289
+	bge	.L1653
11290
+	b	.L1741
11291
+.L1742:
11292
+	.align	2
11293
+.L1740:
11294
+	.word	.LANCHOR4
11295
+	.word	.LANCHOR0
11296
+	.word	.LANCHOR0+1216
11297
+	.word	1446522928
11298
+	.word	.LANCHOR1
11299
+	.word	.LANCHOR1+3288
11300
+	.word	.LANCHOR0+52
11301
+	.word	.LANCHOR1+3412
11302
+	.word	.LC98
11303
+	.word	.LANCHOR2
11304
+	.word	.LC97
11305
+.L1741:
11306
+.L1652:
10961
11307
 	ldrh	r2, [r3, #14]
10962
11308
 	bic	r2, r2, #255
10963
11309
 	strh	r2, [r3, #14]	@ movhi
10964
-.L1685:
10965
-	ldrb	r3, [r4, #2229]	@ zero_extendqisi2
11310
+.L1653:
11311
+	ldrb	r3, [r4, #2233]	@ zero_extendqisi2
10966
11312
 	tst	r3, #6
10967
-	beq	.L1686
11313
+	beq	.L1654
10968
11314
 	bl	FlashSavePhyInfo
10969
11315
 	movs	r0, #0
10970
11316
 	bl	flash_enter_slc_mode
11317
+	ldr	r1, [r5, #1208]
10971
11318
 	movs	r0, #0
10972
-	ldr	r1, [r8, #1200]
10973
11319
 	bl	FlashDdrParaScan
10974
11320
 	movs	r0, #0
10975
11321
 	bl	flash_exit_slc_mode
10976
-.L1686:
11322
+.L1654:
10977
11323
 	bl	FlashSavePhyInfo
10978
-.L1677:
10979
-	ldr	r2, [r4, #44]
10980
-	mov	r9, #0
10981
-	str	r9, [r8, #1192]
10982
-	ldr	r7, .L1782
10983
-	ldrb	r3, [r2, #26]	@ zero_extendqisi2
10984
-	ldrh	r0, [r2, #10]
10985
-	ldrb	r10, [r2, #18]	@ zero_extendqisi2
10986
-	strb	r3, [r4, #144]
10987
-	ldrh	r3, [r2, #16]
10988
-	ldr	r6, .L1782+12
10989
-	ubfx	r1, r3, #7, #1
10990
-	strb	r1, [r4, #8]
10991
-	ubfx	r1, r3, #3, #1
10992
-	strb	r1, [r8, #1229]
10993
-	ubfx	r1, r3, #4, #1
11324
+.L1645:
11325
+	ldr	r7, [r4, #48]
11326
+	mov	r8, #0
11327
+	str	r8, [r5, #1200]
11328
+	ldrb	r3, [r7, #26]	@ zero_extendqisi2
11329
+	ldrb	r1, [r7, #12]	@ zero_extendqisi2
11330
+	ldrh	r0, [r7, #10]
11331
+	strb	r3, [r4, #152]
11332
+	ldrh	r3, [r7, #16]
11333
+	ubfx	r2, r3, #7, #1
11334
+	strb	r2, [r4, #44]
11335
+	ubfx	r2, r3, #3, #1
11336
+	strb	r2, [r5, #1237]
11337
+	ubfx	r2, r3, #4, #1
10994
11338
 	ubfx	r3, r3, #8, #3
10995
-	strb	r1, [r4, #2240]
10996
-	strb	r3, [r4, #2229]
10997
-	ldrb	r1, [r2, #12]	@ zero_extendqisi2
11339
+	strb	r2, [r4, #2244]
11340
+	strb	r3, [r4, #2233]
10998
11341
 	bl	__aeabi_idiv
10999
11342
 	mov	r1, r0
11000
-	mov	r0, r10
11343
+	ldrb	r0, [r7, #18]	@ zero_extendqisi2
11001
11344
 	bl	BuildFlashLsbPageTable
11002
11345
 	bl	FlashDieInfoInit
11003
-	ldr	r3, [r4, #44]
11346
+	ldr	r3, [r4, #48]
11004
11347
 	ldrh	r2, [r3, #16]
11005
11348
 	lsls	r2, r2, #25
11006
-	bpl	.L1688
11349
+	bpl	.L1656
11007
11350
 	ldrb	r0, [r3, #19]	@ zero_extendqisi2
11008
-	ldrb	r3, [r7, #1211]	@ zero_extendqisi2
11009
-	strb	r0, [r7, #1208]
11010
-	strb	r3, [r7, #1209]
11011
-	ldrb	r3, [r7, #1212]	@ zero_extendqisi2
11012
-	strb	r3, [r6, #1209]
11351
+	ldrb	r3, [r4, #1217]	@ zero_extendqisi2
11352
+	strb	r0, [r4, #84]
11353
+	strb	r3, [r4, #85]
11354
+	ldrb	r3, [r4, #1218]	@ zero_extendqisi2
11355
+	strb	r3, [r5, #1217]
11013
11356
 	subs	r3, r0, #1
11014
11357
 	cmp	r3, #7
11015
-	bhi	.L1689
11016
-	ldr	r3, .L1782+16
11017
-	str	r3, [r6, #1192]
11358
+	bhi	.L1657
11359
+	ldr	r3, .L1743
11360
+	str	r3, [r5, #1200]
11018
11361
 	subs	r3, r0, #5
11019
11362
 	cmp	r3, #1
11020
-	bls	.L1690
11363
+	bls	.L1658
11021
11364
 	cmp	r0, #8
11022
-	bne	.L1691
11023
-.L1690:
11365
+	bne	.L1659
11366
+.L1658:
11367
+	movs	r3, #1
11368
+	str	r3, [r4, #2308]
11369
+.L1659:
11024
11370
 	cmp	r0, #7
11025
-	mov	r3, #1
11026
-	str	r3, [r4, #2304]
11027
-	beq	.L1717
11371
+	ldr	r3, .L1743+4
11372
+	beq	.L1660
11373
+	sub	r2, r3, #8
11028
11374
 	cmp	r0, #8
11029
-	b	.L1779
11030
-.L1717:
11031
-	ldr	r3, .L1782+20
11032
-.L1693:
11375
+	it	ne
11376
+	movne	r3, r2
11377
+.L1660:
11033
11378
 	subs	r1, r3, #1
11034
11379
 	movs	r2, #0
11035
11380
 	adds	r3, r3, #31
11036
-.L1694:
11037
-	ldrsb	r6, [r1, #1]!
11038
-	cmp	r6, #0
11039
-	it	eq
11040
-	addeq	r2, r2, #1
11041
-	cmp	r1, r3
11042
-	bne	.L1694
11381
+.L1662:
11382
+	ldrsb	r7, [r1, #1]!
11383
+	cbnz	r7, .L1661
11384
+	adds	r2, r2, #1
11385
+.L1661:
11386
+	cmp	r3, r1
11387
+	bne	.L1662
11043
11388
 	cmp	r2, #27
11044
-	bls	.L1688
11389
+	bls	.L1656
11045
11390
 	bl	FlashGetReadRetryDefault
11046
11391
 	bl	FlashSavePhyInfo
11047
-	b	.L1688
11048
-.L1689:
11049
-	sub	r3, r0, #17
11050
-	cmp	r3, #2
11051
-	bhi	.L1696
11052
-	ldr	r3, .L1782+24
11053
-	cmp	r0, #19
11054
-	str	r3, [r6, #1192]
11055
-	ite	ne
11056
-	movne	r3, #7
11057
-	moveq	r3, #15
11058
-	strb	r3, [r6, #1209]
11059
-	b	.L1688
11060
-.L1696:
11061
-	cmp	r0, #33
11062
-	beq	.L1698
11063
-	sub	r3, r0, #65
11064
-	cmp	r3, #1
11065
-	bhi	.L1699
11066
-.L1698:
11067
-	ldr	r3, .L1782+28
11068
-	str	r3, [r8, #1192]
11069
-	movs	r3, #4
11070
-	strb	r3, [r4, #1209]
11071
-	movs	r3, #7
11072
-	strb	r3, [r8, #1209]
11073
-	b	.L1688
11074
-.L1699:
11075
-	sub	r3, r0, #67
11076
-	uxtb	r3, r3
11077
-	cmp	r3, #1
11078
-	bls	.L1700
11079
-	sub	r2, r0, #34
11080
-	cmp	r2, #1
11081
-	bhi	.L1701
11082
-.L1700:
11083
-	ldr	r2, .L1782+28
11084
-	cmp	r0, #35
11085
-	str	r2, [r8, #1192]
11086
-	beq	.L1702
11087
-	cmp	r0, #68
11088
-	beq	.L1702
11089
-	ldr	r2, .L1782+12
11090
-	movs	r1, #7
11091
-	strb	r1, [r2, #1209]
11092
-	b	.L1703
11093
-.L1702:
11094
-	movs	r2, #17
11095
-	strb	r2, [r8, #1209]
11096
-.L1703:
11097
-	cmp	r3, #1
11098
-	ite	ls
11099
-	movls	r3, #4
11100
-	movhi	r3, #5
11101
-	strb	r3, [r4, #1209]
11102
-	b	.L1688
11103
-.L1701:
11104
-	cmp	r0, #49
11105
-	bne	.L1705
11106
-	ldr	r3, .L1782+32
11107
-	str	r3, [r6, #1192]
11108
-	b	.L1688
11109
-.L1705:
11110
-	cmp	r0, #50
11111
-	ittt	eq
11112
-	streq	r9, [r7, #2248]
11113
-	ldreq	r3, .L1782+36
11114
-	streq	r3, [r6, #1192]
11115
-.L1688:
11116
-	ldr	r2, [r4, #2264]
11117
-	ldr	r3, .L1782
11118
-	cmp	r2, r5
11119
-	bne	.L1706
11120
-	ldrb	r1, [r3, #144]	@ zero_extendqisi2
11121
-	cbz	r1, .L1706
11122
-	ldr	r3, [r3, #44]
11392
+.L1656:
11393
+	ldr	r3, [r4, #2268]
11394
+	cmp	r3, r6
11395
+	bne	.L1674
11396
+	ldrb	r2, [r4, #152]	@ zero_extendqisi2
11397
+	cbz	r2, .L1674
11398
+	ldr	r2, [r4, #48]
11123
11399
 	movs	r1, #0
11124
-	strb	r1, [r3, #18]
11125
-.L1706:
11126
-	ldrb	r1, [r4, #2068]	@ zero_extendqisi2
11127
-	ldr	r3, .L1782
11128
-	cmp	r1, #44
11129
-	bne	.L1707
11130
-	ldrb	r1, [r3, #2252]	@ zero_extendqisi2
11131
-	cbz	r1, .L1707
11132
-	cmp	r2, r5
11133
-	bne	.L1708
11134
-	ldrb	r3, [r3, #144]	@ zero_extendqisi2
11135
-	cbnz	r3, .L1707
11136
-.L1708:
11137
-	movs	r0, #1
11400
+	strb	r1, [r2, #18]
11401
+.L1674:
11402
+	ldrb	r2, [r4, #2072]	@ zero_extendqisi2
11403
+	cmp	r2, #44
11404
+	bne	.L1675
11405
+	ldrb	r2, [r4, #2256]	@ zero_extendqisi2
11406
+	cbz	r2, .L1675
11407
+	cmp	r3, r6
11408
+	bne	.L1676
11409
+	ldrb	r3, [r4, #152]	@ zero_extendqisi2
11410
+	cbnz	r3, .L1675
11411
+.L1676:
11138
11412
 	movs	r3, #0
11139
-	strb	r3, [r4, #2252]
11413
+	movs	r0, #1
11414
+	strb	r3, [r4, #2256]
11140
11415
 	bl	FlashSetInterfaceMode
11141
11416
 	movs	r0, #1
11142
11417
 	bl	NandcSetMode
11143
-.L1707:
11144
-	ldrb	r3, [r4, #2229]	@ zero_extendqisi2
11418
+.L1675:
11419
+	ldrb	r3, [r4, #2233]	@ zero_extendqisi2
11145
11420
 	tst	r3, #6
11146
-	beq	.L1709
11147
-	ldr	r2, .L1782
11148
-	ldrb	r2, [r2, #2252]	@ zero_extendqisi2
11149
-	cbnz	r2, .L1710
11421
+	beq	.L1677
11422
+	ldrb	r2, [r4, #2256]	@ zero_extendqisi2
11423
+	cbnz	r2, .L1678
11150
11424
 	lsls	r3, r3, #31
11151
-	bmi	.L1709
11152
-.L1710:
11425
+	bmi	.L1677
11426
+.L1678:
11153
11427
 	movs	r0, #0
11154
11428
 	bl	flash_enter_slc_mode
11429
+	ldr	r1, [r5, #1208]
11155
11430
 	movs	r0, #0
11156
-	ldr	r1, [r8, #1200]
11157
11431
 	bl	FlashDdrParaScan
11158
11432
 	movs	r0, #0
11159
11433
 	bl	flash_exit_slc_mode
11160
-.L1709:
11161
-	ldr	r3, [r4, #44]
11162
-	movs	r7, #16
11163
-	ldr	r6, .L1782
11434
+.L1677:
11435
+	ldr	r3, [r4, #48]
11436
+	movs	r6, #16
11164
11437
 	ldrb	r0, [r3, #20]	@ zero_extendqisi2
11165
11438
 	bl	FlashBchSel
11166
-	ldr	r0, .L1782+40
11439
+	ldr	r0, .L1743+8
11167
11440
 	bl	FlashReadIdbDataRaw
11168
-	ldr	r0, .L1782+44
11169
-	strb	r7, [r4, #1]
11441
+	ldr	r0, .L1743+12
11442
+	strb	r6, [r4, #37]
11170
11443
 	bl	FlashTimingCfg
11171
-	ldr	r5, [r4, #44]
11172
-	ldrb	r2, [r4, #2069]	@ zero_extendqisi2
11444
+	ldr	r5, [r4, #48]
11445
+	ldrb	r2, [r4, #2073]	@ zero_extendqisi2
11173
11446
 	ldrb	r3, [r5, #12]	@ zero_extendqisi2
11174
-	ldrh	r8, [r5, #14]
11175
-	strh	r3, [r4, #124]	@ movhi
11176
-	ldrb	r3, [r5, #7]	@ zero_extendqisi2
11177
-	str	r3, [r4, #120]
11178
-	lsl	r3, r2, r7
11179
-	orr	r2, r3, r2, lsl #8
11180
-	ldrb	r3, [r4, #2068]	@ zero_extendqisi2
11181
-	orrs	r3, r3, r2
11182
-	ldrb	r2, [r4, #2071]	@ zero_extendqisi2
11183
-	orr	r3, r3, r2, lsl #24
11184
-	str	r3, [r4, #116]
11185
-	ldrb	r3, [r4, #2230]	@ zero_extendqisi2
11186
-	strh	r3, [r4, #126]	@ movhi
11187
-	ldrb	r3, [r5, #13]	@ zero_extendqisi2
11188
-	strh	r8, [r4, #130]	@ movhi
11189
-	strh	r3, [r4, #128]	@ movhi
11190
-	ldrh	r3, [r5, #10]
11447
+	ldrh	r7, [r5, #14]
11191
11448
 	strh	r3, [r4, #132]	@ movhi
11449
+	ldrb	r3, [r5, #7]	@ zero_extendqisi2
11450
+	str	r3, [r4, #128]
11451
+	lsl	r3, r2, r6
11452
+	orr	r3, r3, r2, lsl #8
11453
+	ldrb	r2, [r4, #2072]	@ zero_extendqisi2
11454
+	orrs	r3, r3, r2
11455
+	ldrb	r2, [r4, #2075]	@ zero_extendqisi2
11456
+	orr	r3, r3, r2, lsl #24
11457
+	str	r3, [r4, #124]
11458
+	ldrb	r3, [r4, #2234]	@ zero_extendqisi2
11459
+	strh	r3, [r4, #134]	@ movhi
11460
+	ldrb	r3, [r5, #13]	@ zero_extendqisi2
11461
+	strh	r7, [r4, #138]	@ movhi
11462
+	strh	r3, [r4, #136]	@ movhi
11463
+	ldrh	r3, [r5, #10]
11464
+	strh	r3, [r4, #140]	@ movhi
11192
11465
 	ldrb	r1, [r5, #12]	@ zero_extendqisi2
11193
11466
 	ldrh	r0, [r5, #10]
11194
11467
 	bl	__aeabi_idiv
11195
-	strh	r0, [r4, #134]	@ movhi
11468
+	strh	r0, [r4, #142]	@ movhi
11196
11469
 	ldrb	r2, [r5, #9]	@ zero_extendqisi2
11197
-	strh	r2, [r4, #136]	@ movhi
11198
-	ldrb	r1, [r5, #9]	@ zero_extendqisi2
11199
-	ldrh	r3, [r5, #10]
11200
-	smulbb	r3, r1, r3
11470
+	strh	r2, [r4, #144]	@ movhi
11471
+	ldrh	r1, [r5, #10]
11472
+	ldrb	r3, [r5, #9]	@ zero_extendqisi2
11473
+	smulbb	r3, r3, r1
11201
11474
 	mov	r1, #512
11202
-	strh	r1, [r4, #140]	@ movhi
11203
-	ldrb	r1, [r4, #1]	@ zero_extendqisi2
11204
-	strh	r1, [r4, #142]	@ movhi
11475
+	strh	r1, [r4, #148]	@ movhi
11476
+	ldrb	r1, [r4, #37]	@ zero_extendqisi2
11205
11477
 	uxth	r3, r3
11206
-	ldrb	r1, [r4]	@ zero_extendqisi2
11207
-	strh	r3, [r4, #138]	@ movhi
11478
+	strh	r1, [r4, #150]	@ movhi
11479
+	ldrb	r1, [r4, #36]	@ zero_extendqisi2
11480
+	strh	r3, [r4, #146]	@ movhi
11208
11481
 	cmp	r1, #1
11209
-	bne	.L1712
11482
+	bne	.L1679
11210
11483
 	lsls	r3, r3, #1
11211
-	lsr	r1, r8, #1
11484
+	lsrs	r1, r7, #1
11212
11485
 	lsls	r2, r2, #1
11213
-	strh	r3, [r6, #138]	@ movhi
11214
-	strb	r7, [r6, #1]
11486
+	strb	r6, [r4, #37]
11487
+	strh	r3, [r4, #146]	@ movhi
11215
11488
 	movs	r3, #8
11216
-	strh	r1, [r6, #130]	@ movhi
11217
-	strh	r2, [r6, #136]	@ movhi
11218
-	strh	r3, [r6, #142]	@ movhi
11219
-.L1712:
11489
+	strh	r1, [r4, #138]	@ movhi
11490
+	strh	r2, [r4, #144]	@ movhi
11491
+	strh	r3, [r4, #150]	@ movhi
11492
+.L1679:
11220
11493
 	ldrb	r0, [r5, #20]	@ zero_extendqisi2
11221
11494
 	bl	FlashBchSel
11222
11495
 	bl	ftl_flash_suspend
11223
11496
 	movs	r0, #0
11224
-	b	.L1736
11225
-.L1716:
11226
-	mvn	r0, #1
11227
-	b	.L1736
11228
-.L1691:
11229
-	cmp	r0, #7
11230
-.L1779:
11231
-	beq	.L1717
11232
-	ldr	r3, .L1782+48
11233
-	b	.L1693
11234
-.L1670:
11235
-	strb	r1, [r2, #1228]
11236
-	b	.L1669
11237
-.L1736:
11238
-	add	sp, sp, #20
11497
+.L1624:
11498
+	add	sp, sp, #28
11239
11499
 	@ sp needed
11240
11500
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
11241
-.L1783:
11501
+.L1641:
11502
+	cmp	r2, #220
11503
+	bne	.L1643
11504
+	mov	r1, #4096
11505
+	b	.L1734
11506
+.L1643:
11507
+	cmp	r2, #211
11508
+	itttt	eq
11509
+	moveq	r2, #4096
11510
+	strheq	r2, [r3, #3426]	@ movhi
11511
+	moveq	r2, #2
11512
+	strbeq	r2, [r3, #3425]
11513
+	b	.L1642
11514
+.L1650:
11515
+	ldrb	r0, [r4, #2233]	@ zero_extendqisi2
11516
+	bl	FlashSetInterfaceMode
11517
+	ldrb	r0, [r4, #2233]	@ zero_extendqisi2
11518
+	b	.L1735
11519
+.L1657:
11520
+	sub	r3, r0, #17
11521
+	cmp	r3, #2
11522
+	bhi	.L1664
11523
+	ldr	r3, .L1743+16
11524
+	cmp	r0, #19
11525
+	str	r3, [r5, #1200]
11526
+	beq	.L1665
11527
+.L1739:
11528
+	movs	r3, #7
11529
+	b	.L1737
11530
+.L1665:
11531
+	movs	r3, #15
11532
+.L1737:
11533
+	strb	r3, [r5, #1217]
11534
+	b	.L1656
11535
+.L1664:
11536
+	cmp	r0, #33
11537
+	beq	.L1666
11538
+	sub	r3, r0, #65
11539
+	cmp	r3, #1
11540
+	bhi	.L1667
11541
+.L1666:
11542
+	ldr	r3, .L1743+20
11543
+	str	r3, [r5, #1200]
11544
+	movs	r3, #4
11545
+	strb	r3, [r4, #85]
11546
+	b	.L1739
11547
+.L1667:
11548
+	sub	r3, r0, #67
11549
+	uxtb	r3, r3
11550
+	cmp	r3, #1
11551
+	bls	.L1668
11552
+	sub	r2, r0, #34
11553
+	cmp	r2, #1
11554
+	bhi	.L1669
11555
+.L1668:
11556
+	ldr	r2, .L1743+20
11557
+	cmp	r0, #35
11558
+	str	r2, [r5, #1200]
11559
+	beq	.L1670
11560
+	cmp	r0, #68
11561
+	beq	.L1670
11562
+	movs	r2, #7
11563
+.L1736:
11564
+	cmp	r3, #1
11565
+	strb	r2, [r5, #1217]
11566
+	ite	ls
11567
+	movls	r3, #4
11568
+	movhi	r3, #5
11569
+	strb	r3, [r4, #85]
11570
+	b	.L1656
11571
+.L1670:
11572
+	movs	r2, #17
11573
+	b	.L1736
11574
+.L1669:
11575
+	cmp	r0, #49
11576
+	bne	.L1673
11577
+	ldr	r3, .L1743+24
11578
+	str	r3, [r5, #1200]
11579
+	b	.L1656
11580
+.L1673:
11581
+	cmp	r0, #50
11582
+	ittt	eq
11583
+	ldreq	r3, .L1743+28
11584
+	streq	r8, [r4, #2252]
11585
+	streq	r3, [r5, #1200]
11586
+	b	.L1656
11587
+.L1681:
11588
+	mvn	r0, #1
11589
+	b	.L1624
11590
+.L1637:
11591
+	strb	r0, [r5, #1236]
11592
+	b	.L1636
11593
+.L1744:
11242
11594
 	.align	2
11243
-.L1782:
11244
-	.word	.LANCHOR0
11245
-	.word	.LC98
11246
-	.word	.LANCHOR2
11247
-	.word	.LANCHOR4
11595
+.L1743:
11248
11596
 	.word	HynixReadRetrial
11249
-	.word	.LANCHOR0+1238
11597
+	.word	.LANCHOR0+1244
11598
+	.word	.LANCHOR2+3476
11599
+	.word	150000
11250
11600
 	.word	MicronReadRetrial
11251
11601
 	.word	ToshibaReadRetrial
11252
11602
 	.word	SamsungReadRetrial
11253
11603
 	.word	samsung_read_retrial
11254
-	.word	.LANCHOR2+3476
11255
-	.word	150000
11256
-	.word	.LANCHOR0+1230
11257
11604
 	.fnend
11258
11605
 	.size	FlashInit, .-FlashInit
11259
11606
 	.align	1
11260
11607
 	.global	FlashPageProgMsbFFData
11608
+	.syntax unified
11261
11609
 	.thumb
11262
11610
 	.thumb_func
11611
+	.fpu softvfp
11263
11612
 	.type	FlashPageProgMsbFFData, %function
11264
11613
 FlashPageProgMsbFFData:
11265
11614
 	.fnstart
..
..
@@ -11267,749 +11616,742 @@
11267
11616
 	@ frame_needed = 0, uses_anonymous_args = 0
11268
11617
 	push	{r4, r5, r6, r7, r8, r9, r10, lr}
11269
11618
 	.save {r4, r5, r6, r7, r8, r9, r10, lr}
11619
+	mov	r6, r0
11620
+	ldr	r5, .L1765
11621
+	mov	r7, r1
11270
11622
 	mov	r4, r2
11271
-	ldr	r2, .L1805
11272
-	mov	r8, r1
11273
-	mov	r7, r0
11274
-	ldr	r3, [r2, #44]
11275
-	mov	r5, r2
11276
-	ldrb	r1, [r2, #144]	@ zero_extendqisi2
11277
-	ldrb	r3, [r3, #19]	@ zero_extendqisi2
11278
-	cbz	r1, .L1785
11279
-	ldr	r2, [r2, #2248]
11280
-	cbnz	r2, .L1784
11281
-.L1785:
11282
-	subs	r2, r3, #5
11283
-	cmp	r2, #2
11284
-	bls	.L1786
11285
-	cmp	r3, #50
11286
-	beq	.L1786
11287
-	cmp	r3, #68
11288
-	beq	.L1786
11289
-	cmp	r3, #35
11290
-	beq	.L1786
11291
-	cmp	r3, #19
11292
-	bne	.L1784
11293
-.L1786:
11294
-	ldr	r9, .L1805+8
11623
+	ldrb	r3, [r5, #152]	@ zero_extendqisi2
11624
+	cbz	r3, .L1746
11625
+	ldr	r3, [r5, #2252]
11626
+	cbnz	r3, .L1745
11627
+.L1746:
11628
+	ldr	r3, [r5, #48]
11629
+	ldrb	r2, [r3, #19]	@ zero_extendqisi2
11630
+	subs	r3, r2, #5
11631
+	uxtb	r3, r3
11632
+	cmp	r3, #30
11633
+	bhi	.L1747
11634
+	ldr	r1, .L1765+4
11635
+	lsr	r3, r1, r3
11636
+	lsls	r3, r3, #31
11637
+	bmi	.L1748
11638
+.L1752:
11639
+	cmp	r2, #68
11640
+	bne	.L1745
11641
+.L1748:
11642
+	ldr	r9, .L1765+8
11295
11643
 	movw	r10, #65535
11296
-	ldr	r6, .L1805+4
11297
-.L1788:
11298
-	ldr	r3, [r5, #44]
11644
+	ldr	r8, .L1765+12
11645
+.L1750:
11646
+	ldr	r3, [r5, #48]
11299
11647
 	ldrh	r3, [r3, #10]
11300
11648
 	cmp	r3, r4
11301
-	bls	.L1784
11649
+	bhi	.L1751
11650
+	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
11651
+.L1751:
11302
11652
 	add	r3, r9, r4, lsl #1
11303
11653
 	ldrh	r3, [r3, #1220]
11304
11654
 	cmp	r3, r10
11305
-	bne	.L1784
11306
-	movs	r1, #255
11655
+	bne	.L1745
11307
11656
 	mov	r2, #32768
11308
-	ldr	r0, [r6, #1212]
11657
+	movs	r1, #255
11658
+	ldr	r0, [r8, #1220]
11309
11659
 	bl	ftl_memset
11310
-	ldr	r2, [r6, #1212]
11311
-	add	r1, r4, r8
11660
+	ldr	r3, [r8, #1220]
11661
+	adds	r1, r4, r7
11662
+	mov	r0, r6
11312
11663
 	adds	r4, r4, #1
11313
-	mov	r0, r7
11314
-	mov	r3, r2
11315
11664
 	uxth	r4, r4
11665
+	mov	r2, r3
11316
11666
 	bl	FlashProgPage
11317
-	b	.L1788
11318
-.L1784:
11667
+	b	.L1750
11668
+.L1747:
11669
+	cmp	r2, #50
11670
+	bne	.L1752
11671
+	b	.L1748
11672
+.L1745:
11319
11673
 	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
11320
-.L1806:
11674
+.L1766:
11321
11675
 	.align	2
11322
-.L1805:
11676
+.L1765:
11323
11677
 	.word	.LANCHOR0
11324
-	.word	.LANCHOR4
11678
+	.word	1073758215
11325
11679
 	.word	.LANCHOR2
11680
+	.word	.LANCHOR4
11326
11681
 	.fnend
11327
11682
 	.size	FlashPageProgMsbFFData, .-FlashPageProgMsbFFData
11328
11683
 	.align	1
11329
11684
 	.global	FlashReadSlc2KPages
11685
+	.syntax unified
11330
11686
 	.thumb
11331
11687
 	.thumb_func
11688
+	.fpu softvfp
11332
11689
 	.type	FlashReadSlc2KPages, %function
11333
11690
 FlashReadSlc2KPages:
11334
11691
 	.fnstart
11335
-	@ args = 0, pretend = 0, frame = 24
11692
+	@ args = 0, pretend = 0, frame = 16
11336
11693
 	@ frame_needed = 0, uses_anonymous_args = 0
11337
-	ldr	r3, .L1857
11694
+	ldr	r3, .L1824
11338
11695
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
11339
11696
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
11340
-	movs	r7, #0
11341
-	ldrb	r3, [r3, #481]	@ zero_extendqisi2
11342
-	.pad #36
11343
-	sub	sp, sp, #36
11344
11697
 	mov	r4, r0
11345
-	str	r1, [sp, #16]
11346
-	str	r2, [sp, #20]
11347
-	str	r3, [sp, #12]
11348
-.L1808:
11349
-	ldr	r3, [sp, #16]
11350
-	cmp	r7, r3
11351
-	beq	.L1856
11352
-	ldr	r3, [sp, #16]
11353
-	add	r2, sp, #28
11698
+	ldr	r7, .L1824+4
11699
+	mov	r8, #0
11700
+	.pad #28
11701
+	sub	sp, sp, #28
11702
+	ldrb	fp, [r3, #477]	@ zero_extendqisi2
11703
+	str	r1, [sp, #8]
11704
+	str	r2, [sp, #12]
11705
+.L1768:
11706
+	ldr	r3, [sp, #8]
11707
+	cmp	r8, r3
11708
+	bne	.L1792
11709
+	movs	r0, #0
11710
+	add	sp, sp, #28
11711
+	@ sp needed
11712
+	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
11713
+.L1792:
11714
+	ldr	r3, [sp, #8]
11715
+	add	r2, sp, #20
11716
+	ldr	r1, [sp, #12]
11354
11717
 	mov	r0, r4
11355
-	ldr	r1, [sp, #20]
11356
-	subs	r3, r3, r7
11357
-	ldr	r8, .L1857+20
11718
+	sub	r3, r3, r8
11358
11719
 	uxtb	r3, r3
11359
11720
 	str	r3, [sp]
11360
-	add	r3, sp, #24
11361
-	mov	fp, r8
11721
+	add	r3, sp, #16
11362
11722
 	bl	LogAddr2PhyAddr
11363
-	ldrb	r2, [r8, #2230]	@ zero_extendqisi2
11364
-	ldr	r3, [sp, #24]
11365
-	cmp	r3, r2
11366
-	bcc	.L1809
11723
+	ldrb	r2, [r7, #2234]	@ zero_extendqisi2
11724
+	ldr	r3, [sp, #16]
11725
+	cmp	r2, r3
11726
+	bhi	.L1769
11367
11727
 	mov	r3, #-1
11368
11728
 	str	r3, [r4]
11369
-	b	.L1810
11370
-.L1809:
11371
-	add	r3, r3, r8
11729
+.L1770:
11730
+	add	r8, r8, #1
11731
+	adds	r4, r4, #36
11732
+	b	.L1768
11733
+.L1769:
11734
+	add	r3, r3, r7
11372
11735
 	mov	r9, #0
11373
-	ldrb	r6, [r3, #2232]	@ zero_extendqisi2
11374
-	mov	r0, r6
11736
+	ldrb	r5, [r3, #2236]	@ zero_extendqisi2
11737
+	mov	r0, r5
11375
11738
 	bl	NandcWaitFlashReady
11376
-	mov	r0, r6
11739
+	mov	r0, r5
11377
11740
 	bl	NandcFlashCs
11378
-.L1811:
11379
-	ldr	r1, [sp, #28]
11380
-	mov	r0, r6
11741
+.L1771:
11742
+	ldr	r1, [sp, #20]
11743
+	mov	r0, r5
11381
11744
 	bl	FlashReadCmd
11382
-	mov	r0, r6
11745
+	mov	r0, r5
11383
11746
 	bl	NandcWaitFlashReady
11384
11747
 	ldr	r3, [r4, #12]
11385
-	mov	r0, r6
11748
+	mov	r2, fp
11386
11749
 	movs	r1, #0
11750
+	mov	r0, r5
11387
11751
 	str	r3, [sp]
11388
-	ldr	r2, [sp, #12]
11389
11752
 	ldr	r3, [r4, #8]
11390
11753
 	bl	NandcXferData
11391
-	ldr	r3, .L1857+4
11392
-	ldrb	r3, [r3, #1228]	@ zero_extendqisi2
11393
-	mov	r5, r0
11394
-	cbnz	r3, .L1812
11395
-.L1815:
11396
-	adds	r3, r5, #1
11397
-	beq	.L1813
11398
-	b	.L1814
11399
-.L1812:
11400
-	mov	r0, r6
11401
-	bl	flash_read_ecc
11402
-	cmp	r0, #5
11403
-	bls	.L1815
11404
-	mov	r5, #256
11405
-	b	.L1814
11406
-.L1813:
11407
-	cmp	r9, #10
11408
-	beq	.L1834
11409
-	add	r9, r9, #1
11410
-	b	.L1811
11411
-.L1814:
11754
+	ldr	r3, .L1824+8
11755
+	mov	r6, r0
11756
+	ldrb	r3, [r3, #1236]	@ zero_extendqisi2
11757
+	cmp	r3, #0
11758
+	bne	.L1772
11759
+.L1775:
11760
+	adds	r0, r6, #1
11761
+	beq	.L1773
11762
+.L1774:
11412
11763
 	cmp	r9, #0
11413
-	it	ne
11414
-	movne	r5, #256
11415
-	b	.L1816
11416
-.L1834:
11417
-	mov	r5, #256
11418
-.L1816:
11764
+	beq	.L1777
11765
+.L1776:
11766
+	mov	r6, #256
11767
+.L1777:
11419
11768
 	mov	r9, #0
11420
-.L1817:
11421
-	ldr	r3, [sp, #28]
11422
-	mov	r0, r6
11423
-	ldr	r1, [fp, #4]
11769
+.L1778:
11770
+	ldr	r3, [r7, #40]
11771
+	mov	r0, r5
11772
+	ldr	r1, [sp, #20]
11424
11773
 	add	r1, r1, r3
11425
11774
 	bl	FlashReadCmd
11426
-	mov	r0, r6
11775
+	mov	r0, r5
11427
11776
 	bl	NandcWaitFlashReady
11428
11777
 	ldr	r3, [r4, #8]
11429
-	cbz	r3, .L1818
11778
+	cbz	r3, .L1779
11430
11779
 	add	r3, r3, #2048
11431
-.L1818:
11780
+.L1779:
11432
11781
 	ldr	r2, [r4, #12]
11433
-	cbz	r2, .L1819
11782
+	cbz	r2, .L1780
11434
11783
 	adds	r2, r2, #8
11435
-.L1819:
11784
+.L1780:
11436
11785
 	str	r2, [sp]
11437
-	mov	r0, r6
11438
-	ldr	r2, [sp, #12]
11439
11786
 	movs	r1, #0
11787
+	mov	r2, fp
11788
+	mov	r0, r5
11440
11789
 	bl	NandcXferData
11441
-	ldr	r3, .L1857+4
11442
-	ldrb	r2, [r3, #1228]	@ zero_extendqisi2
11790
+	ldr	r3, .L1824+8
11443
11791
 	mov	r10, r0
11444
-	cbnz	r2, .L1820
11445
-.L1823:
11792
+	ldrb	r2, [r3, #1236]	@ zero_extendqisi2
11793
+	cmp	r2, #0
11794
+	bne	.L1781
11795
+.L1784:
11446
11796
 	cmp	r10, #-1
11447
-	beq	.L1821
11448
-	b	.L1822
11449
-.L1820:
11450
-	mov	r0, r6
11451
-	bl	flash_read_ecc
11452
-	cmp	r0, #5
11453
-	bls	.L1823
11454
-	mov	r10, #256
11455
-	b	.L1822
11456
-.L1821:
11457
-	cmp	r9, #10
11458
-	beq	.L1838
11459
-	add	r9, r9, #1
11460
-	b	.L1817
11461
-.L1822:
11797
+	beq	.L1782
11798
+.L1783:
11462
11799
 	cmp	r9, #0
11463
-	it	ne
11464
-	movne	r10, #256
11465
-	b	.L1824
11466
-.L1838:
11800
+	beq	.L1786
11801
+.L1785:
11467
11802
 	mov	r10, #256
11468
-.L1824:
11469
-	mov	r0, r6
11803
+.L1786:
11804
+	mov	r0, r5
11470
11805
 	bl	NandcFlashDeCs
11471
-	ldrb	r3, [r8, #2312]	@ zero_extendqisi2
11472
-	cmp	r5, r10
11473
-	add	r3, r3, r3, lsl #1
11806
+	ldrb	r3, [r7, #2316]	@ zero_extendqisi2
11807
+	cmp	r6, r10
11474
11808
 	it	cc
11475
-	movcc	r5, r10
11476
-	cmp	r5, r3, asr #2
11477
-	bls	.L1825
11478
-	adds	r0, r5, #1
11479
-	it	ne
11480
-	movne	r5, #256
11481
-	str	r5, [r4]
11482
-	b	.L1827
11483
-.L1825:
11809
+	movcc	r6, r10
11810
+	add	r3, r3, r3, lsl #1
11811
+	cmp	r6, r3, asr #2
11812
+	bhi	.L1787
11484
11813
 	movs	r3, #0
11814
+.L1823:
11485
11815
 	str	r3, [r4]
11486
-.L1827:
11487
11816
 	ldr	r3, [r4, #12]
11488
-	cbz	r3, .L1828
11817
+	cbz	r3, .L1788
11489
11818
 	ldr	r2, [r3, #12]
11490
11819
 	adds	r2, r2, #1
11491
-	bne	.L1828
11820
+	bne	.L1788
11492
11821
 	ldr	r2, [r3, #8]
11493
11822
 	adds	r1, r2, #1
11494
-	bne	.L1828
11823
+	bne	.L1788
11495
11824
 	ldr	r3, [r3]
11496
11825
 	adds	r3, r3, #1
11497
11826
 	it	ne
11498
11827
 	strne	r2, [r4]
11499
-.L1828:
11828
+.L1788:
11500
11829
 	ldr	r3, [r4]
11501
11830
 	adds	r2, r3, #1
11502
-	bne	.L1810
11831
+	bne	.L1770
11503
11832
 	ldr	r1, [r4, #4]
11504
-	ldr	r0, .L1857+8
11505
-	ldrb	r2, [r8, #2312]	@ zero_extendqisi2
11833
+	ldrb	r2, [r7, #2316]	@ zero_extendqisi2
11834
+	ldr	r0, .L1824+12
11506
11835
 	bl	printk
11507
11836
 	ldr	r1, [r4, #8]
11508
-	cbz	r1, .L1830
11509
-	ldr	r0, .L1857+12
11510
-	movs	r2, #4
11837
+	cbz	r1, .L1790
11511
11838
 	movs	r3, #8
11512
-	bl	rknand_print_hex
11513
-.L1830:
11514
-	ldr	r1, [r4, #12]
11515
-	cbz	r1, .L1810
11516
11839
 	movs	r2, #4
11517
-	ldr	r0, .L1857+16
11518
-	mov	r3, r2
11840
+	ldr	r0, .L1824+16
11519
11841
 	bl	rknand_print_hex
11520
-.L1810:
11521
-	adds	r7, r7, #1
11522
-	adds	r4, r4, #36
11523
-	b	.L1808
11524
-.L1856:
11525
-	movs	r0, #0
11526
-	add	sp, sp, #36
11527
-	@ sp needed
11528
-	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
11529
-.L1858:
11842
+.L1790:
11843
+	ldr	r1, [r4, #12]
11844
+	cmp	r1, #0
11845
+	beq	.L1770
11846
+	movs	r3, #4
11847
+	ldr	r0, .L1824+20
11848
+	mov	r2, r3
11849
+	bl	rknand_print_hex
11850
+	b	.L1770
11851
+.L1772:
11852
+	mov	r0, r5
11853
+	bl	flash_read_ecc
11854
+	cmp	r0, #5
11855
+	bls	.L1775
11856
+	mov	r6, #256
11857
+	b	.L1774
11858
+.L1773:
11859
+	cmp	r9, #10
11860
+	beq	.L1776
11861
+	add	r9, r9, #1
11862
+	b	.L1771
11863
+.L1781:
11864
+	mov	r0, r5
11865
+	bl	flash_read_ecc
11866
+	cmp	r0, #5
11867
+	bls	.L1784
11868
+	mov	r10, #256
11869
+	b	.L1783
11870
+.L1782:
11871
+	cmp	r9, #10
11872
+	beq	.L1785
11873
+	add	r9, r9, #1
11874
+	b	.L1778
11875
+.L1787:
11876
+	mov	r3, #256
11877
+	b	.L1823
11878
+.L1825:
11530
11879
 	.align	2
11531
-.L1857:
11880
+.L1824:
11532
11881
 	.word	.LANCHOR1
11882
+	.word	.LANCHOR0
11533
11883
 	.word	.LANCHOR4
11534
11884
 	.word	.LC99
11535
11885
 	.word	.LC100
11536
11886
 	.word	.LC101
11537
-	.word	.LANCHOR0
11538
11887
 	.fnend
11539
11888
 	.size	FlashReadSlc2KPages, .-FlashReadSlc2KPages
11540
11889
 	.align	1
11541
11890
 	.global	FlashReadPages
11891
+	.syntax unified
11542
11892
 	.thumb
11543
11893
 	.thumb_func
11894
+	.fpu softvfp
11544
11895
 	.type	FlashReadPages, %function
11545
11896
 FlashReadPages:
11546
11897
 	.fnstart
11547
11898
 	@ args = 0, pretend = 0, frame = 40
11548
11899
 	@ frame_needed = 0, uses_anonymous_args = 0
11549
-	ldr	r3, .L1958
11550
11900
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
11551
11901
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
11552
11902
 	.pad #52
11553
11903
 	sub	sp, sp, #52
11554
-	ldrb	r3, [r3, #481]	@ zero_extendqisi2
11555
-	mov	r10, r0
11556
-	ldr	r5, .L1958+4
11557
-	str	r1, [sp, #28]
11558
-	str	r3, [sp, #24]
11559
-	ldrb	r3, [r5, #8]	@ zero_extendqisi2
11560
-	str	r2, [sp, #16]
11561
-	str	r3, [sp, #32]
11562
-	ldrb	r3, [r5]	@ zero_extendqisi2
11563
-	cbz	r3, .L1902
11564
-	bl	FlashReadSlc2KPages
11565
-	b	.L1953
11566
-.L1902:
11904
+	ldr	r4, .L1917
11905
+	mov	r9, r0
11906
+	str	r1, [sp, #32]
11907
+	ldrb	r3, [r4, #36]	@ zero_extendqisi2
11908
+	str	r2, [sp, #20]
11909
+	cbnz	r3, .L1827
11910
+	ldr	r2, .L1917+4
11567
11911
 	mov	r8, r3
11912
+	ldr	r10, .L1917+12
11568
11913
 	str	r3, [sp, #12]
11569
-.L1860:
11914
+	ldrb	r2, [r2, #477]	@ zero_extendqisi2
11915
+	str	r2, [sp, #28]
11916
+	ldrb	r2, [r4, #44]	@ zero_extendqisi2
11917
+	str	r2, [sp, #36]
11918
+.L1828:
11570
11919
 	ldr	r3, [sp, #12]
11571
-	ldr	r2, [sp, #28]
11920
+	ldr	r2, [sp, #32]
11572
11921
 	cmp	r3, r2
11573
-	bcs	.L1955
11574
-	ldr	r3, [sp, #12]
11575
-	mov	r9, #36
11922
+	bcc	.L1866
11923
+	movs	r0, #0
11924
+	b	.L1826
11925
+.L1827:
11926
+	bl	FlashReadSlc2KPages
11927
+.L1826:
11928
+	add	sp, sp, #52
11929
+	@ sp needed
11930
+	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
11931
+.L1866:
11576
11932
 	ldr	r2, [sp, #12]
11577
-	ldr	r1, [sp, #16]
11578
-	mul	r9, r9, r3
11579
-	ldr	r3, [sp, #28]
11933
+	movs	r3, #36
11934
+	ldr	r1, [sp, #20]
11935
+	muls	r3, r2, r3
11936
+	add	r7, r9, r3
11937
+	str	r3, [sp, #16]
11938
+	ldr	r3, [r7, #4]
11939
+	mov	r0, r7
11940
+	str	r3, [sp, #24]
11941
+	ldr	r3, [sp, #32]
11580
11942
 	subs	r3, r3, r2
11581
11943
 	add	r2, sp, #44
11582
-	add	r7, r10, r9
11583
11944
 	uxtb	r3, r3
11584
-	ldr	fp, [r7, #4]
11585
-	mov	r0, r7
11586
11945
 	str	r3, [sp]
11587
11946
 	add	r3, sp, #40
11588
11947
 	bl	LogAddr2PhyAddr
11589
-	ldrb	r2, [r5, #2230]	@ zero_extendqisi2
11590
-	ldr	r3, [sp, #40]
11948
+	ldrb	r2, [r4, #2234]	@ zero_extendqisi2
11591
11949
 	mov	r6, r0
11592
-	cmp	r3, r2
11593
-	bcc	.L1862
11950
+	ldr	r3, [sp, #40]
11951
+	cmp	r2, r3
11952
+	bhi	.L1830
11953
+	ldr	r2, [sp, #16]
11594
11954
 	mov	r3, #-1
11595
-	str	r3, [r10, r9]
11596
-	b	.L1863
11597
-.L1862:
11598
-	add	r3, r3, r5
11599
-	ldrb	r4, [r3, #2232]	@ zero_extendqisi2
11600
-	ldr	r3, .L1958+8
11601
-	mov	r0, r4
11602
-	ldrb	r3, [r3, #1229]	@ zero_extendqisi2
11955
+	str	r3, [r9, r2]
11956
+.L1831:
11957
+	ldr	r3, [sp, #12]
11958
+	adds	r3, r3, #1
11959
+	str	r3, [sp, #12]
11960
+	b	.L1828
11961
+.L1830:
11962
+	add	r3, r3, r4
11963
+	ldrb	r5, [r3, #2236]	@ zero_extendqisi2
11964
+	ldrb	r3, [r10, #1237]	@ zero_extendqisi2
11965
+	mov	r0, r5
11603
11966
 	cmp	r3, #0
11604
11967
 	it	eq
11605
11968
 	moveq	r6, #0
11606
11969
 	bl	NandcWaitFlashReady
11607
-	ldr	r3, .L1958+4
11608
-	ldr	r3, [r3, #44]
11970
+	ldr	r3, [r4, #48]
11609
11971
 	ldrb	r2, [r3, #19]	@ zero_extendqisi2
11610
11972
 	subs	r3, r2, #1
11611
11973
 	cmp	r3, #7
11612
-	bhi	.L1865
11974
+	bhi	.L1833
11613
11975
 	subs	r2, r2, #7
11614
-	adds	r1, r5, r4
11976
+	adds	r1, r4, r5
11615
11977
 	cmp	r2, #1
11616
-	ldr	r2, .L1958+4
11617
-	ldrb	r3, [r1, #1222]	@ zero_extendqisi2
11618
-	add	r2, r2, r4
11978
+	add	r2, r4, r5
11979
+	ldrb	r3, [r1, #1228]	@ zero_extendqisi2
11980
+	ldrb	r2, [r2, #2068]	@ zero_extendqisi2
11619
11981
 	it	ls
11620
-	ldrbls	r3, [r1, #1230]	@ zero_extendqisi2
11621
-	ldrb	r2, [r2, #2064]	@ zero_extendqisi2
11982
+	ldrbls	r3, [r1, #1236]	@ zero_extendqisi2
11622
11983
 	cmp	r2, r3
11623
-	beq	.L1865
11624
-	mov	r0, r4
11625
-	ldrb	r1, [r5, #1211]	@ zero_extendqisi2
11626
-	ldr	r2, .L1958+12
11984
+	beq	.L1833
11985
+	ldr	r2, .L1917+8
11986
+	mov	r0, r5
11987
+	ldrb	r1, [r4, #1217]	@ zero_extendqisi2
11627
11988
 	bl	HynixSetRRPara
11628
-.L1865:
11629
-	mov	r0, r4
11630
-	and	r3, fp, #-2147483648
11631
-	str	r3, [sp, #20]
11989
+.L1833:
11990
+	mov	r0, r5
11632
11991
 	bl	NandcFlashCs
11633
-	ldr	r3, [sp, #16]
11634
-	cmp	r3, #1
11635
-	beq	.L1867
11636
11992
 	ldr	r3, [sp, #20]
11637
-	cbz	r3, .L1868
11638
-.L1867:
11639
-	ldr	r3, .L1958+4
11640
-	ldrb	r3, [r3, #144]	@ zero_extendqisi2
11641
-	cbz	r3, .L1868
11642
-	mov	r0, r4
11993
+	cmp	r3, #1
11994
+	beq	.L1835
11995
+	ldr	r3, [sp, #24]
11996
+	cmp	r3, #0
11997
+	bge	.L1836
11998
+.L1835:
11999
+	ldrb	r3, [r4, #152]	@ zero_extendqisi2
12000
+	cbz	r3, .L1836
12001
+	mov	r0, r5
11643
12002
 	bl	flash_enter_slc_mode
11644
-.L1870:
11645
-	mov	fp, #0
11646
-	b	.L1869
11647
-.L1868:
11648
-	mov	r0, r4
11649
-	bl	flash_exit_slc_mode
11650
-	b	.L1870
11651
-.L1956:
11652
-	cmp	r4, #255
11653
-	beq	.L1903
11654
-.L1871:
11655
-	cbz	r6, .L1873
11656
-	ldr	r2, [r5, #4]
11657
-	mov	r0, r4
12003
+.L1843:
12004
+	ldr	r1, [sp, #44]
12005
+	adds	r0, r1, #1
12006
+	bne	.L1838
12007
+	cmp	r5, #255
12008
+	beq	.L1868
12009
+.L1838:
12010
+	cbz	r6, .L1840
12011
+	ldr	r2, [r4, #40]
12012
+	mov	r0, r5
11658
12013
 	add	r2, r2, r1
11659
12014
 	bl	FlashReadDpCmd
11660
-.L1874:
11661
-	mov	r0, r4
12015
+.L1841:
12016
+	mov	r0, r5
11662
12017
 	bl	NandcWaitFlashReady
11663
-	cbz	r6, .L1872
11664
-	mov	r0, r4
12018
+	cbz	r6, .L1839
11665
12019
 	ldr	r1, [sp, #44]
12020
+	mov	r0, r5
11666
12021
 	bl	FlashReadDpDataOutCmd
11667
-.L1872:
12022
+.L1839:
11668
12023
 	ldr	r3, [r7, #12]
11669
-	mov	r0, r4
11670
12024
 	movs	r1, #0
11671
-	ldr	r2, [sp, #24]
12025
+	ldr	r2, [sp, #28]
12026
+	mov	r0, r5
11672
12027
 	str	r3, [sp]
11673
12028
 	ldr	r3, [r7, #8]
11674
12029
 	bl	NandcXferData
11675
-	ldrb	r3, [r5, #8]	@ zero_extendqisi2
11676
-	mov	ip, r0
11677
-	cbz	r3, .L1905
12030
+	ldrb	r3, [r4, #44]	@ zero_extendqisi2
12031
+	mov	fp, r0
12032
+	cbz	r3, .L1842
11678
12033
 	cmp	r0, #-1
11679
-	bne	.L1905
12034
+	bne	.L1842
12035
+	mov	r3, #0
11680
12036
 	movs	r6, #0
11681
-	strb	fp, [r5, #8]
11682
-.L1869:
11683
-	ldr	r1, [sp, #44]
11684
-	adds	r0, r1, #1
11685
-	bne	.L1871
11686
-	b	.L1956
11687
-.L1873:
11688
-	mov	r0, r4
12037
+	strb	r3, [r4, #44]
12038
+	b	.L1843
12039
+.L1836:
12040
+	mov	r0, r5
12041
+	bl	flash_exit_slc_mode
12042
+	b	.L1843
12043
+.L1840:
12044
+	mov	r0, r5
11689
12045
 	bl	FlashReadCmd
11690
-	b	.L1874
11691
-.L1903:
12046
+	b	.L1841
12047
+.L1868:
11692
12048
 	movs	r6, #0
11693
-	b	.L1872
11694
-.L1905:
11695
-	mov	fp, ip
11696
-	cbz	r6, .L1876
11697
-	ldr	r3, .L1958+4
11698
-	mov	r0, r4
11699
-	str	ip, [sp, #36]
11700
-	ldr	r1, [r3, #4]
11701
-	ldr	r3, [sp, #44]
12049
+	b	.L1839
12050
+.L1842:
12051
+	cbz	r6, .L1844
12052
+	ldr	r3, [r4, #40]
12053
+	mov	r0, r5
12054
+	ldr	r1, [sp, #44]
11702
12055
 	add	r1, r1, r3
11703
12056
 	bl	FlashReadDpDataOutCmd
11704
-	add	r3, r9, #36
11705
-	add	r3, r3, r10
11706
-	mov	r0, r4
12057
+	ldr	r3, [sp, #16]
11707
12058
 	movs	r1, #0
12059
+	mov	r0, r5
12060
+	adds	r3, r3, #36
12061
+	add	r3, r3, r9
11708
12062
 	ldr	r2, [r3, #12]
11709
12063
 	str	r2, [sp]
11710
-	ldr	r2, [sp, #24]
12064
+	ldr	r2, [sp, #28]
11711
12065
 	ldr	r3, [r3, #8]
11712
12066
 	bl	NandcXferData
11713
12067
 	cmp	r0, #-1
11714
-	ldr	ip, [sp, #36]
12068
+	mov	r8, r0
11715
12069
 	it	eq
11716
12070
 	moveq	r6, #0
11717
-	mov	r8, r0
11718
-.L1876:
11719
-	mov	r0, r4
11720
-	str	ip, [sp, #36]
12071
+.L1844:
12072
+	mov	r0, r5
11721
12073
 	bl	NandcFlashDeCs
11722
-	ldr	ip, [sp, #36]
11723
-	ldrb	r3, [sp, #32]	@ zero_extendqisi2
11724
-	cmp	ip, #-1
11725
-	strb	r3, [r5, #8]
11726
-	bne	.L1883
11727
-	ldrb	r3, [r5, #2252]	@ zero_extendqisi2
11728
-	cbnz	r3, .L1878
11729
-.L1882:
11730
-	ldr	r3, .L1958+8
11731
-	ldr	r6, [r3, #1192]
11732
-	cbnz	r6, .L1879
11733
-	b	.L1957
11734
-.L1878:
11735
-	ldr	r3, [r5, #80]
11736
-	mov	r0, r4
12074
+	ldrb	r3, [sp, #36]	@ zero_extendqisi2
12075
+	cmp	fp, #-1
12076
+	strb	r3, [r4, #44]
12077
+	bne	.L1845
12078
+	ldrb	r3, [r4, #2256]	@ zero_extendqisi2
12079
+	cbnz	r3, .L1846
12080
+.L1850:
12081
+	ldr	r6, [r10, #1200]
12082
+	cmp	r6, #0
12083
+	bne	.L1847
12084
+	ldr	r3, [r7, #12]
12085
+	mov	r0, r5
12086
+	ldr	r2, [r7, #8]
12087
+	ldr	r1, [sp, #44]
12088
+	bl	FlashReadRawPage
12089
+	b	.L1916
12090
+.L1846:
12091
+	ldr	r3, [r4, #88]
12092
+	mov	r0, r5
11737
12093
 	ldr	r1, [sp, #44]
11738
12094
 	ldr	r6, [r3, #304]
11739
12095
 	movs	r3, #1
11740
12096
 	str	r3, [sp]
11741
-	ldr	r2, [r7, #8]
11742
12097
 	ldr	r3, [r7, #12]
12098
+	ldr	r2, [r7, #8]
11743
12099
 	bl	FlashDdrTunningRead
11744
12100
 	cmp	r0, #-1
11745
12101
 	mov	fp, r0
11746
-	beq	.L1881
11747
-	ldrb	r3, [r5, #2312]	@ zero_extendqisi2
12102
+	beq	.L1849
12103
+	ldrb	r3, [r4, #2316]	@ zero_extendqisi2
11748
12104
 	cmp	r0, r3, lsr #1
11749
-	bls	.L1907
11750
-.L1881:
12105
+	bls	.L1869
12106
+.L1849:
11751
12107
 	ubfx	r0, r6, #8, #8
11752
12108
 	bl	NandcSetDdrPara
11753
12109
 	cmp	fp, #-1
11754
-	beq	.L1882
11755
-	b	.L1907
11756
-.L1879:
11757
-	mov	r0, r4
11758
-	ldr	r1, [sp, #44]
11759
-	ldr	r2, [r7, #8]
12110
+	beq	.L1850
12111
+.L1869:
12112
+	movs	r6, #0
12113
+.L1845:
12114
+	ldrb	r3, [r4, #2316]	@ zero_extendqisi2
12115
+	add	r3, r3, r3, lsl #1
12116
+	cmp	fp, r3, asr #2
12117
+	bls	.L1858
12118
+	ldr	r3, [r10, #1200]
12119
+	cmp	r3, #0
12120
+	bne	.L1858
12121
+	mov	fp, #256
12122
+	b	.L1853
12123
+.L1918:
12124
+	.align	2
12125
+.L1917:
12126
+	.word	.LANCHOR0
12127
+	.word	.LANCHOR1
12128
+	.word	.LANCHOR0+1220
12129
+	.word	.LANCHOR4
12130
+.L1847:
11760
12131
 	ldr	r3, [r7, #12]
12132
+	mov	r0, r5
12133
+	ldr	r2, [r7, #8]
12134
+	ldr	r1, [sp, #44]
11761
12135
 	blx	r6
11762
12136
 	cmp	r0, #-1
11763
12137
 	mov	fp, r0
11764
-	bne	.L1884
11765
-	ldr	r3, [r5, #44]
12138
+	bne	.L1851
12139
+	ldr	r3, [r4, #48]
11766
12140
 	ldrb	r3, [r3, #19]	@ zero_extendqisi2
11767
12141
 	subs	r3, r3, #1
11768
12142
 	cmp	r3, #7
11769
-	bhi	.L1885
11770
-	mov	r0, r4
11771
-	ldrb	r1, [r5, #1211]	@ zero_extendqisi2
11772
-	ldr	r2, .L1958+12
12143
+	bhi	.L1852
11773
12144
 	movs	r3, #0
12145
+	ldr	r2, .L1919
12146
+	ldrb	r1, [r4, #1217]	@ zero_extendqisi2
12147
+	mov	r0, r5
11774
12148
 	bl	HynixSetRRPara
11775
-.L1885:
11776
-	ldr	r1, [sp, #44]
11777
-	mov	r0, r4
11778
-	ldr	r2, [r7, #8]
12149
+.L1852:
11779
12150
 	ldr	r3, [r7, #12]
12151
+	mov	r0, r5
12152
+	ldr	r2, [r7, #8]
12153
+	ldr	r1, [sp, #44]
11780
12154
 	bl	FlashReadRawPage
11781
-	ldr	r1, [r7, #4]
11782
-	ldrb	r2, [r5, #2312]	@ zero_extendqisi2
12155
+	ldrb	r2, [r4, #2316]	@ zero_extendqisi2
11783
12156
 	mov	fp, r0
11784
-	ldr	r0, .L1958+16
11785
-	mov	r3, fp
12157
+	mov	r3, r0
12158
+	ldr	r1, [r7, #4]
12159
+	ldr	r0, .L1919+4
11786
12160
 	bl	printk
11787
12161
 	cmp	fp, #-1
11788
-	bne	.L1884
11789
-	ldrb	r6, [r5, #144]	@ zero_extendqisi2
11790
-	cbz	r6, .L1886
11791
-	ldr	r3, [sp, #16]
11792
-	mov	r0, r4
11793
-	cmp	r3, #1
11794
-	beq	.L1887
12162
+	bne	.L1851
12163
+	ldrb	r6, [r4, #152]	@ zero_extendqisi2
12164
+	cbz	r6, .L1853
11795
12165
 	ldr	r3, [sp, #20]
11796
-	cbz	r3, .L1888
11797
-.L1887:
12166
+	mov	r0, r5
12167
+	cmp	r3, #1
12168
+	beq	.L1854
12169
+	ldr	r3, [sp, #24]
12170
+	cmp	r3, #0
12171
+	bge	.L1855
12172
+.L1854:
11798
12173
 	bl	flash_enter_slc_mode
11799
-	b	.L1889
11800
-.L1888:
11801
-	bl	flash_exit_slc_mode
11802
-.L1889:
11803
-	ldr	r3, .L1958+8
11804
-	mov	r0, r4
11805
-	ldr	r1, [sp, #44]
11806
-	ldr	r2, [r7, #8]
11807
-	ldr	r6, [r3, #1192]
12174
+.L1856:
12175
+	ldr	r6, [r10, #1200]
12176
+	mov	r0, r5
11808
12177
 	ldr	r3, [r7, #12]
12178
+	ldr	r2, [r7, #8]
12179
+	ldr	r1, [sp, #44]
11809
12180
 	blx	r6
11810
-	movs	r6, #0
12181
+.L1916:
12182
+	cmp	r0, #-1
11811
12183
 	mov	fp, r0
11812
-	b	.L1890
11813
-.L1957:
11814
-	mov	r0, r4
11815
-	ldr	r1, [sp, #44]
11816
-	ldr	r2, [r7, #8]
11817
-	ldr	r3, [r7, #12]
11818
-	bl	FlashReadRawPage
11819
-	mov	fp, r0
11820
-	b	.L1890
11821
-.L1907:
11822
-	movs	r6, #0
11823
-.L1883:
11824
-	ldrb	r3, [r5, #2312]	@ zero_extendqisi2
11825
-	add	r3, r3, r3, lsl #1
11826
-	cmp	fp, r3, asr #2
11827
-	bls	.L1892
11828
-	ldr	r3, .L1958+8
11829
-	ldr	r3, [r3, #1192]
11830
-	cbz	r3, .L1909
11831
-.L1890:
11832
-	cmp	fp, #-1
11833
-	beq	.L1886
11834
-	b	.L1892
11835
-.L1909:
11836
-	mov	fp, #256
11837
-.L1886:
11838
-	str	fp, [r10, r9]
11839
-	b	.L1893
11840
-.L1959:
11841
-	.align	2
11842
-.L1958:
11843
-	.word	.LANCHOR1
11844
-	.word	.LANCHOR0
11845
-	.word	.LANCHOR4
11846
-	.word	.LANCHOR0+1214
11847
-	.word	.LC102
11848
-.L1884:
11849
-	movs	r6, #0
11850
-.L1892:
11851
-	cmp	fp, #256
11852
-	beq	.L1886
11853
-	movs	r3, #0
11854
-	str	r3, [r10, r9]
11855
-.L1893:
11856
-	ldr	r3, [r10, r9]
12184
+	mov	r6, #0
12185
+	bne	.L1858
12186
+.L1853:
12187
+	ldr	r3, [sp, #16]
12188
+	str	fp, [r9, r3]
12189
+.L1859:
12190
+	ldr	r3, [sp, #16]
12191
+	ldr	r3, [r9, r3]
11857
12192
 	adds	r2, r3, #1
11858
-	bne	.L1895
12193
+	bne	.L1861
11859
12194
 	ldr	r1, [r7, #4]
11860
-	ldr	r0, .L1960
11861
-	ldrb	r2, [r5, #2312]	@ zero_extendqisi2
12195
+	ldrb	r2, [r4, #2316]	@ zero_extendqisi2
12196
+	ldr	r0, .L1919+8
11862
12197
 	bl	printk
11863
12198
 	ldr	r1, [r7, #12]
11864
-	cbz	r1, .L1895
11865
-	movs	r2, #4
11866
-	ldr	r0, .L1960+4
11867
-	mov	r3, r2
12199
+	cbz	r1, .L1861
12200
+	movs	r3, #4
12201
+	ldr	r0, .L1919+12
12202
+	mov	r2, r3
11868
12203
 	bl	rknand_print_hex
11869
-.L1895:
11870
-	cbz	r6, .L1897
11871
-	ldrb	r3, [r5, #2312]	@ zero_extendqisi2
12204
+.L1861:
12205
+	cbz	r6, .L1863
12206
+	ldrb	r3, [r4, #2316]	@ zero_extendqisi2
11872
12207
 	add	r3, r3, r3, lsl #1
11873
12208
 	cmp	r8, r3, asr #2
11874
-	bls	.L1898
11875
-	ldr	r3, .L1960+8
11876
-	ldr	r3, [r3, #1192]
12209
+	bls	.L1864
12210
+	ldr	r3, [r10, #1200]
11877
12211
 	cmp	r3, #0
11878
12212
 	it	eq
11879
12213
 	moveq	r8, #256
11880
-.L1898:
11881
-	add	r9, r9, #36
12214
+.L1864:
12215
+	ldr	r3, [sp, #16]
11882
12216
 	cmp	r8, #-1
11883
-	str	r8, [r10, r9]
11884
-	beq	.L1897
12217
+	add	r3, r3, #36
12218
+	str	r8, [r9, r3]
12219
+	beq	.L1863
11885
12220
 	cmp	r8, #256
11886
12221
 	itt	ne
11887
-	movne	r3, #0
11888
-	strne	r3, [r10, r9]
11889
-.L1897:
12222
+	movne	r2, #0
12223
+	strne	r2, [r9, r3]
12224
+.L1863:
11890
12225
 	ldr	r3, [sp, #12]
11891
12226
 	add	r3, r3, r6
11892
12227
 	str	r3, [sp, #12]
11893
-	ldr	r3, [sp, #16]
11894
-	cmp	r3, #1
11895
-	beq	.L1899
11896
12228
 	ldr	r3, [sp, #20]
11897
-	cbz	r3, .L1863
11898
-.L1899:
11899
-	ldrb	r3, [r5, #144]	@ zero_extendqisi2
11900
-	cbz	r3, .L1863
11901
-	mov	r0, r4
12229
+	cmp	r3, #1
12230
+	beq	.L1865
12231
+	ldr	r3, [sp, #24]
12232
+	cmp	r3, #0
12233
+	bge	.L1831
12234
+.L1865:
12235
+	ldrb	r3, [r4, #152]	@ zero_extendqisi2
12236
+	cmp	r3, #0
12237
+	beq	.L1831
12238
+	mov	r0, r5
11902
12239
 	bl	flash_exit_slc_mode
11903
-.L1863:
11904
-	ldr	r3, [sp, #12]
11905
-	adds	r3, r3, #1
11906
-	str	r3, [sp, #12]
11907
-	b	.L1860
11908
-.L1955:
11909
-	movs	r0, #0
11910
-.L1953:
11911
-	add	sp, sp, #52
11912
-	@ sp needed
11913
-	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
11914
-.L1961:
12240
+	b	.L1831
12241
+.L1855:
12242
+	bl	flash_exit_slc_mode
12243
+	b	.L1856
12244
+.L1851:
12245
+	movs	r6, #0
12246
+.L1858:
12247
+	cmp	fp, #256
12248
+	beq	.L1853
12249
+	ldr	r2, [sp, #16]
12250
+	movs	r3, #0
12251
+	str	r3, [r9, r2]
12252
+	b	.L1859
12253
+.L1920:
11915
12254
 	.align	2
11916
-.L1960:
12255
+.L1919:
12256
+	.word	.LANCHOR0+1220
12257
+	.word	.LC102
11917
12258
 	.word	.LC99
11918
12259
 	.word	.LC101
11919
-	.word	.LANCHOR4
11920
12260
 	.fnend
11921
12261
 	.size	FlashReadPages, .-FlashReadPages
11922
12262
 	.align	1
11923
12263
 	.global	FlashLoadFactorBbt
12264
+	.syntax unified
11924
12265
 	.thumb
11925
12266
 	.thumb_func
12267
+	.fpu softvfp
11926
12268
 	.type	FlashLoadFactorBbt, %function
11927
12269
 FlashLoadFactorBbt:
11928
12270
 	.fnstart
11929
-	@ args = 0, pretend = 0, frame = 48
12271
+	@ args = 0, pretend = 0, frame = 56
11930
12272
 	@ frame_needed = 0, uses_anonymous_args = 0
11931
12273
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
11932
12274
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
11933
-	movs	r1, #0
11934
-	ldr	r7, .L1974
11935
-	.pad #52
11936
-	sub	sp, sp, #52
11937
-	ldr	r4, .L1974+4
11938
12275
 	movs	r2, #16
11939
-	movs	r5, #0
12276
+	ldr	r7, .L1932
12277
+	.pad #60
12278
+	sub	sp, sp, #60
12279
+	movs	r1, #0
11940
12280
 	mov	fp, #-1
11941
-	ldrh	r3, [r7, #130]
11942
-	add	r0, r4, #1232
11943
-	ldrh	r6, [r7, #128]
12281
+	ldr	r4, .L1932+4
12282
+	movs	r5, #0
12283
+	ldrh	r3, [r7, #136]
11944
12284
 	mov	r10, r5
12285
+	ldrh	r6, [r7, #138]
11945
12286
 	mov	r8, r7
12287
+	addw	r0, r4, #1238
11946
12288
 	mov	r9, r4
11947
12289
 	smulbb	r6, r6, r3
11948
12290
 	bl	ftl_memset
11949
-	ldr	r3, [r4, #1216]
12291
+	ldr	r3, [r4, #1224]
11950
12292
 	uxth	r6, r6
11951
-	str	r5, [sp, #20]
11952
-	str	r3, [sp, #24]
11953
-.L1963:
11954
-	ldrb	r3, [r8, #2230]	@ zero_extendqisi2
12293
+	str	r5, [sp, #28]
12294
+	str	r3, [sp, #32]
12295
+	add	r3, r6, fp
12296
+	uxth	r3, r3
12297
+	str	r3, [sp, #8]
12298
+.L1922:
12299
+	ldrb	r3, [r8, #2234]	@ zero_extendqisi2
11955
12300
 	uxtb	r7, r5
11956
12301
 	cmp	r3, r7
11957
-	bls	.L1973
11958
-	mul	ip, r6, r7
11959
-	subs	r4, r6, #1
11960
-	sub	r3, r6, #12
11961
-	uxth	r4, r4
11962
-.L1964:
11963
-	cmp	r4, r3
11964
-	ble	.L1966
11965
-	add	r2, ip, r4
11966
-	movs	r1, #1
11967
-	add	r0, sp, #12
11968
-	str	r3, [sp, #4]
12302
+	bhi	.L1928
12303
+	mov	r0, fp
12304
+	add	sp, sp, #60
12305
+	@ sp needed
12306
+	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
12307
+.L1928:
12308
+	ldr	r4, [sp, #8]
12309
+	mul	r3, r7, r6
12310
+	sub	r2, r6, #12
12311
+	str	r2, [sp, #4]
12312
+.L1923:
12313
+	ldr	r2, [sp, #4]
12314
+	cmp	r4, r2
12315
+	ble	.L1925
12316
+	adds	r2, r4, r3
12317
+	add	r0, sp, #20
11969
12318
 	lsls	r2, r2, #10
11970
-	str	r2, [sp, #16]
11971
-	mov	r2, r1
11972
-	str	ip, [sp]
12319
+	str	r3, [sp, #12]
12320
+	str	r2, [sp, #24]
12321
+	movs	r2, #1
12322
+	mov	r1, r2
11973
12323
 	bl	FlashReadPages
11974
-	ldr	r2, [sp, #12]
11975
-	ldr	ip, [sp]
12324
+	ldr	r2, [sp, #20]
12325
+	ldr	r3, [sp, #12]
11976
12326
 	adds	r2, r2, #1
11977
-	ldr	r3, [sp, #4]
11978
-	beq	.L1965
11979
-	ldr	r2, [r9, #1216]
12327
+	beq	.L1924
12328
+	ldr	r2, [r9, #1224]
11980
12329
 	ldrh	r1, [r2]
11981
12330
 	movw	r2, #61664
11982
12331
 	cmp	r1, r2
11983
-	bne	.L1965
11984
-	mov	r1, r7
11985
-	ldr	r0, .L1974+8
11986
-	mov	r2, r4
12332
+	bne	.L1924
11987
12333
 	add	r10, r10, #1
11988
-	bl	printk
11989
-	ldr	r3, .L1974+4
12334
+	mov	r1, r7
11990
12335
 	uxth	r10, r10
11991
-	add	r7, r3, r7, lsl #1
11992
-	strh	r4, [r7, #1232]	@ movhi
11993
-	b	.L1966
11994
-.L1965:
11995
-	subs	r4, r4, #1
11996
-	uxth	r4, r4
11997
-	b	.L1964
11998
-.L1966:
11999
-	ldrb	r3, [r8, #2230]	@ zero_extendqisi2
12336
+	add	r7, r9, r7, lsl #1
12337
+	ldr	r0, .L1932+8
12338
+	mov	r2, r4
12339
+	bl	printk
12340
+	strh	r4, [r7, #1238]	@ movhi
12341
+.L1925:
12342
+	ldrb	r3, [r8, #2234]	@ zero_extendqisi2
12000
12343
 	adds	r5, r5, #1
12001
12344
 	cmp	r3, r10
12002
12345
 	it	eq
12003
12346
 	moveq	fp, #0
12004
-	b	.L1963
12005
-.L1973:
12006
-	mov	r0, fp
12007
-	add	sp, sp, #52
12008
-	@ sp needed
12009
-	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
12010
-.L1975:
12347
+	b	.L1922
12348
+.L1924:
12349
+	subs	r4, r4, #1
12350
+	uxth	r4, r4
12351
+	b	.L1923
12352
+.L1933:
12011
12353
 	.align	2
12012
-.L1974:
12354
+.L1932:
12013
12355
 	.word	.LANCHOR0
12014
12356
 	.word	.LANCHOR4
12015
12357
 	.word	.LC103
..
..
@@ -12017,1320 +12359,1276 @@
12017
12359
 	.size	FlashLoadFactorBbt, .-FlashLoadFactorBbt
12018
12360
 	.align	1
12019
12361
 	.global	FlashProgSlc2KPages
12362
+	.syntax unified
12020
12363
 	.thumb
12021
12364
 	.thumb_func
12365
+	.fpu softvfp
12022
12366
 	.type	FlashProgSlc2KPages, %function
12023
12367
 FlashProgSlc2KPages:
12024
12368
 	.fnstart
12025
-	@ args = 0, pretend = 0, frame = 56
12369
+	@ args = 0, pretend = 0, frame = 48
12026
12370
 	@ frame_needed = 0, uses_anonymous_args = 0
12027
-	ldr	r3, .L2005
12371
+	ldr	r3, .L1961
12028
12372
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
12029
12373
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
12030
-	movs	r6, #0
12031
-	ldr	r8, .L2005+24
12032
-	.pad #68
12033
-	sub	sp, sp, #68
12034
-	ldrb	r3, [r3, #481]	@ zero_extendqisi2
12035
-	mov	r7, r1
12374
+	mov	r10, r1
12375
+	ldr	r8, .L1961+20
12376
+	.pad #60
12377
+	sub	sp, sp, #60
12036
12378
 	mov	r9, r2
12037
12379
 	mov	r4, r0
12038
-	mov	r10, r0
12039
-	mov	fp, r8
12040
-	str	r3, [sp, #12]
12041
-.L1977:
12042
-	cmp	r6, r7
12043
-	beq	.L2003
12044
-	subs	r3, r7, r6
12045
-	add	r2, sp, #20
12046
-	mov	r0, r10
12047
-	mov	r1, r9
12380
+	ldrb	fp, [r3, #477]	@ zero_extendqisi2
12381
+	mov	r6, r0
12382
+	movs	r7, #0
12383
+.L1935:
12384
+	cmp	r7, r10
12385
+	bne	.L1941
12386
+	ldr	r8, .L1961+24
12387
+	mov	r10, #0
12388
+	ldr	fp, .L1961+28
12389
+.L1942:
12390
+	cmp	r7, r10
12391
+	bne	.L1949
12392
+	movs	r0, #0
12393
+	add	sp, sp, #60
12394
+	@ sp needed
12395
+	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
12396
+.L1941:
12397
+	sub	r3, r10, r7
12398
+	add	r2, sp, #12
12048
12399
 	uxtb	r3, r3
12400
+	mov	r1, r9
12401
+	mov	r0, r6
12049
12402
 	str	r3, [sp]
12050
-	add	r3, sp, #24
12403
+	add	r3, sp, #16
12051
12404
 	bl	LogAddr2PhyAddr
12052
-	ldrb	r2, [r8, #2230]	@ zero_extendqisi2
12053
-	ldr	r3, [sp, #24]
12054
-	cmp	r3, r2
12055
-	bcc	.L1978
12405
+	ldrb	r2, [r8, #2234]	@ zero_extendqisi2
12406
+	ldr	r3, [sp, #16]
12407
+	cmp	r2, r3
12408
+	bhi	.L1936
12056
12409
 	mov	r3, #-1
12057
-	str	r3, [r10]
12058
-	b	.L1979
12059
-.L1978:
12410
+	str	r3, [r6]
12411
+.L1937:
12412
+	adds	r7, r7, #1
12413
+	adds	r6, r6, #36
12414
+	b	.L1935
12415
+.L1936:
12060
12416
 	add	r3, r3, r8
12061
-	ldrb	r5, [r3, #2232]	@ zero_extendqisi2
12417
+	ldrb	r5, [r3, #2236]	@ zero_extendqisi2
12062
12418
 	mov	r0, r5
12063
12419
 	bl	NandcWaitFlashReady
12064
12420
 	mov	r0, r5
12065
12421
 	bl	NandcFlashCs
12066
12422
 	mov	r0, r5
12067
-	ldr	r1, [sp, #20]
12423
+	ldr	r1, [sp, #12]
12068
12424
 	bl	FlashProgFirstCmd
12069
-	ldr	r3, [r10, #12]
12425
+	ldr	r3, [r6, #12]
12426
+	mov	r2, fp
12070
12427
 	movs	r1, #1
12071
12428
 	mov	r0, r5
12072
-	ldr	r2, [sp, #12]
12073
12429
 	str	r3, [sp]
12074
-	ldr	r3, [r10, #8]
12430
+	ldr	r3, [r6, #8]
12075
12431
 	bl	NandcXferData
12076
12432
 	mov	r0, r5
12077
-	ldr	r1, [sp, #20]
12433
+	ldr	r1, [sp, #12]
12078
12434
 	bl	FlashProgSecondCmd
12079
12435
 	mov	r0, r5
12080
12436
 	bl	NandcWaitFlashReady
12081
12437
 	mov	r0, r5
12082
-	ldr	r1, [sp, #20]
12438
+	ldr	r1, [sp, #12]
12083
12439
 	bl	FlashReadStatus
12084
-	ldr	r3, [sp, #20]
12085
12440
 	sbfx	r0, r0, #0, #1
12086
-	str	r0, [r10]
12441
+	ldr	r1, [sp, #12]
12442
+	str	r0, [r6]
12087
12443
 	mov	r0, r5
12088
-	ldr	r1, [r8, #4]
12444
+	ldr	r3, [r8, #40]
12089
12445
 	add	r1, r1, r3
12090
12446
 	bl	FlashProgFirstCmd
12091
-	ldr	r3, [r10, #8]
12092
-	cbz	r3, .L1980
12447
+	ldr	r3, [r6, #8]
12448
+	cbz	r3, .L1938
12093
12449
 	add	r3, r3, #2048
12094
-.L1980:
12095
-	ldr	r2, [r10, #12]
12096
-	cbz	r2, .L1981
12450
+.L1938:
12451
+	ldr	r2, [r6, #12]
12452
+	cbz	r2, .L1939
12097
12453
 	adds	r2, r2, #8
12098
-.L1981:
12454
+.L1939:
12099
12455
 	str	r2, [sp]
12100
12456
 	movs	r1, #1
12101
-	ldr	r2, [sp, #12]
12457
+	mov	r2, fp
12102
12458
 	mov	r0, r5
12103
12459
 	bl	NandcXferData
12104
-	ldr	r1, [fp, #4]
12460
+	ldr	r3, [r8, #40]
12105
12461
 	mov	r0, r5
12106
-	ldr	r3, [sp, #20]
12462
+	ldr	r1, [sp, #12]
12107
12463
 	add	r1, r1, r3
12108
12464
 	bl	FlashProgSecondCmd
12109
12465
 	mov	r0, r5
12110
12466
 	bl	NandcWaitFlashReady
12111
12467
 	mov	r0, r5
12112
-	ldr	r1, [sp, #20]
12468
+	ldr	r1, [sp, #12]
12113
12469
 	bl	FlashReadStatus
12114
12470
 	lsls	r2, r0, #31
12115
12471
 	mov	r0, r5
12116
12472
 	itt	mi
12117
12473
 	movmi	r3, #-1
12118
-	strmi	r3, [r10]
12474
+	strmi	r3, [r6]
12119
12475
 	bl	NandcFlashDeCs
12120
-.L1979:
12121
-	adds	r6, r6, #1
12122
-	add	r10, r10, #36
12123
-	b	.L1977
12124
-.L2003:
12125
-	ldr	r8, .L2005+28
12126
-	mov	r10, #0
12127
-	mov	fp, r8
12128
-.L1984:
12129
-	cmp	r10, r7
12130
-	beq	.L2004
12476
+	b	.L1937
12477
+.L1949:
12131
12478
 	ldr	r3, [r4]
12132
12479
 	adds	r3, r3, #1
12133
-	bne	.L1985
12480
+	bne	.L1943
12134
12481
 	ldr	r1, [r4, #4]
12135
-	ldr	r0, .L2005+4
12482
+	ldr	r0, .L1961+4
12136
12483
 	bl	printk
12137
-	b	.L1986
12138
-.L1985:
12139
-	rsb	r3, r10, r7
12140
-	mov	r1, r9
12141
-	add	r2, sp, #20
12142
-	mov	r0, r4
12143
-	uxtb	r3, r3
12144
-	str	r3, [sp]
12145
-	add	r3, sp, #24
12146
-	mov	r6, r4
12147
-	bl	LogAddr2PhyAddr
12148
-	ldr	r2, [r8, #1220]
12149
-	movs	r3, #0
12150
-	str	r3, [r2]
12151
-	ldr	r2, [r8, #1224]
12152
-	str	r3, [r2]
12153
-	ldmia	r6!, {r0, r1, r2, r3}
12154
-	add	r5, sp, #28
12155
-	stmia	r5!, {r0, r1, r2, r3}
12156
-	ldmia	r6!, {r0, r1, r2, r3}
12157
-	stmia	r5!, {r0, r1, r2, r3}
12158
-	add	r0, sp, #28
12159
-	ldr	r3, [r6]
12160
-	movs	r1, #1
12161
-	mov	r2, r9
12162
-	str	r3, [r5]
12163
-	ldr	r3, [r8, #1220]
12164
-	str	r3, [sp, #36]
12165
-	ldr	r3, [r8, #1224]
12166
-	str	r3, [sp, #40]
12167
-	bl	FlashReadPages
12168
-	ldr	r5, [sp, #28]
12169
-	adds	r3, r5, #1
12170
-	bne	.L1987
12171
-	ldr	r0, .L2005+8
12172
-	ldr	r1, [r4, #4]
12173
-	bl	printk
12174
-	str	r5, [r4]
12175
-.L1987:
12176
-	ldr	r5, [sp, #28]
12177
-	cmp	r5, #256
12178
-	bne	.L1988
12179
-	ldr	r0, .L2005+12
12180
-	ldr	r1, [r4, #4]
12181
-	bl	printk
12182
-	str	r5, [r4]
12183
-.L1988:
12184
-	ldr	r3, [r4, #12]
12185
-	cbz	r3, .L1989
12186
-	ldr	r2, [r3]
12187
-	ldr	r3, [fp, #1224]
12188
-	ldr	r3, [r3]
12189
-	cmp	r2, r3
12190
-	beq	.L1989
12191
-	ldr	r0, .L2005+16
12192
-	ldr	r1, [r4, #4]
12193
-	bl	printk
12194
-	mov	r3, #-1
12195
-	str	r3, [r4]
12196
-.L1989:
12197
-	ldr	r3, [r4, #8]
12198
-	cbz	r3, .L1986
12199
-	ldr	r2, [r3]
12200
-	ldr	r3, [fp, #1220]
12201
-	ldr	r3, [r3]
12202
-	cmp	r2, r3
12203
-	beq	.L1986
12204
-	ldr	r0, .L2005+20
12205
-	ldr	r1, [r4, #4]
12206
-	bl	printk
12207
-	mov	r3, #-1
12208
-	str	r3, [r4]
12209
-.L1986:
12484
+.L1944:
12210
12485
 	add	r10, r10, #1
12211
12486
 	adds	r4, r4, #36
12212
-	b	.L1984
12213
-.L2004:
12214
-	movs	r0, #0
12215
-	add	sp, sp, #68
12216
-	@ sp needed
12217
-	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
12218
-.L2006:
12487
+	b	.L1942
12488
+.L1943:
12489
+	sub	r3, r7, r10
12490
+	add	r2, sp, #12
12491
+	uxtb	r3, r3
12492
+	mov	r1, r9
12493
+	mov	r0, r4
12494
+	str	r3, [sp]
12495
+	add	r3, sp, #16
12496
+	bl	LogAddr2PhyAddr
12497
+	ldr	r2, [r8, #1228]
12498
+	movs	r3, #0
12499
+	mov	r6, r4
12500
+	add	r5, sp, #20
12501
+	str	r3, [r2]
12502
+	ldr	r2, [r8, #1232]
12503
+	str	r3, [r2]
12504
+	ldmia	r6!, {r0, r1, r2, r3}
12505
+	stmia	r5!, {r0, r1, r2, r3}
12506
+	ldmia	r6!, {r0, r1, r2, r3}
12507
+	stmia	r5!, {r0, r1, r2, r3}
12508
+	mov	r2, r9
12509
+	ldr	r3, [r6]
12510
+	movs	r1, #1
12511
+	add	r0, sp, #20
12512
+	str	r3, [r5]
12513
+	ldr	r3, [r8, #1228]
12514
+	str	r3, [sp, #28]
12515
+	ldr	r3, [r8, #1232]
12516
+	str	r3, [sp, #32]
12517
+	bl	FlashReadPages
12518
+	ldr	r5, [sp, #20]
12519
+	adds	r3, r5, #1
12520
+	bne	.L1945
12521
+	ldr	r1, [r4, #4]
12522
+	ldr	r0, .L1961+8
12523
+	bl	printk
12524
+	str	r5, [r4]
12525
+.L1945:
12526
+	ldr	r5, [sp, #20]
12527
+	cmp	r5, #256
12528
+	bne	.L1946
12529
+	ldr	r1, [r4, #4]
12530
+	ldr	r0, .L1961+12
12531
+	bl	printk
12532
+	str	r5, [r4]
12533
+.L1946:
12534
+	ldr	r3, [r4, #12]
12535
+	cbz	r3, .L1947
12536
+	ldr	r2, [r3]
12537
+	ldr	r3, [r8, #1232]
12538
+	ldr	r3, [r3]
12539
+	cmp	r2, r3
12540
+	beq	.L1947
12541
+	ldr	r1, [r4, #4]
12542
+	ldr	r0, .L1961+16
12543
+	bl	printk
12544
+	mov	r3, #-1
12545
+	str	r3, [r4]
12546
+.L1947:
12547
+	ldr	r3, [r4, #8]
12548
+	cmp	r3, #0
12549
+	beq	.L1944
12550
+	ldr	r2, [r3]
12551
+	ldr	r3, [r8, #1228]
12552
+	ldr	r3, [r3]
12553
+	cmp	r2, r3
12554
+	beq	.L1944
12555
+	ldr	r1, [r4, #4]
12556
+	mov	r0, fp
12557
+	bl	printk
12558
+	mov	r3, #-1
12559
+	str	r3, [r4]
12560
+	b	.L1944
12561
+.L1962:
12219
12562
 	.align	2
12220
-.L2005:
12563
+.L1961:
12221
12564
 	.word	.LANCHOR1
12222
12565
 	.word	.LC104
12223
12566
 	.word	.LC105
12224
12567
 	.word	.LC106
12225
12568
 	.word	.LC107
12226
-	.word	.LC108
12227
12569
 	.word	.LANCHOR0
12228
12570
 	.word	.LANCHOR4
12571
+	.word	.LC108
12229
12572
 	.fnend
12230
12573
 	.size	FlashProgSlc2KPages, .-FlashProgSlc2KPages
12231
12574
 	.align	1
12232
12575
 	.global	FtlLoadFactoryBbt
12576
+	.syntax unified
12233
12577
 	.thumb
12234
12578
 	.thumb_func
12579
+	.fpu softvfp
12235
12580
 	.type	FtlLoadFactoryBbt, %function
12236
12581
 FtlLoadFactoryBbt:
12237
12582
 	.fnstart
12238
-	@ args = 0, pretend = 0, frame = 0
12583
+	@ args = 0, pretend = 0, frame = 8
12239
12584
 	@ frame_needed = 0, uses_anonymous_args = 0
12240
-	push	{r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
12241
-	.save {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
12585
+	push	{r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr}
12586
+	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
12587
+	.pad #12
12242
12588
 	movs	r6, #0
12243
-	ldr	r3, .L2018
12244
-	ldr	r7, .L2018+4
12245
-	ldr	r5, .L2018+8
12589
+	ldr	r3, .L1973
12590
+	ldr	r7, .L1973+4
12591
+	ldr	r5, .L1973+8
12246
12592
 	ldr	r2, [r3, #3316]
12247
-	subw	r8, r7, #2462
12248
12593
 	ldr	r9, [r3, #3340]
12594
+	subw	r8, r7, #2466
12249
12595
 	mov	r10, r8
12250
-	str	r2, [r5, #1256]
12251
-	str	r9, [r5, #1260]
12252
-.L2008:
12253
-	ldrh	r3, [r8, #2342]
12596
+	add	fp, r5, #1256
12597
+	str	r2, [r5, #1264]
12598
+	str	r9, [r5, #1268]
12599
+.L1964:
12600
+	ldrh	r3, [r8, #2346]
12254
12601
 	cmp	r6, r3
12255
-	bcs	.L2017
12256
-	ldrh	r4, [r8, #2386]
12257
-	movw	fp, #61664
12602
+	bcc	.L1969
12603
+	movs	r0, #0
12604
+	add	sp, sp, #12
12605
+	@ sp needed
12606
+	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
12607
+.L1969:
12608
+	ldrh	r4, [r8, #2388]
12258
12609
 	movw	r3, #65535
12259
12610
 	strh	r3, [r7, #2]!	@ movhi
12611
+	movw	r3, #61664
12260
12612
 	subs	r4, r4, #1
12261
12613
 	uxth	r4, r4
12262
-.L2009:
12263
-	ldrh	r3, [r10, #2386]
12264
-	sub	r2, r3, #16
12265
-	cmp	r4, r2
12266
-	ble	.L2011
12267
-	mla	r3, r3, r6, r4
12268
-	movs	r1, #1
12269
-	ldr	r0, .L2018+12
12270
-	mov	r2, r1
12271
-	lsls	r3, r3, #10
12272
-	str	r3, [r5, #1252]
12614
+.L1965:
12615
+	ldrh	r2, [r10, #2388]
12616
+	sub	r1, r2, #16
12617
+	cmp	r4, r1
12618
+	ble	.L1967
12619
+	mla	r2, r6, r2, r4
12620
+	str	r3, [sp, #4]
12621
+	mov	r0, fp
12622
+	lsls	r2, r2, #10
12623
+	str	r2, [r5, #1260]
12624
+	movs	r2, #1
12625
+	mov	r1, r2
12273
12626
 	bl	FlashReadPages
12274
-	ldr	r3, [r5, #1248]
12275
-	adds	r3, r3, #1
12276
-	beq	.L2010
12277
-	ldrh	r3, [r9]
12278
-	cmp	r3, fp
12279
-	bne	.L2010
12627
+	ldr	r2, [r5, #1256]
12628
+	ldr	r3, [sp, #4]
12629
+	adds	r2, r2, #1
12630
+	beq	.L1966
12631
+	ldrh	r2, [r9]
12632
+	cmp	r2, r3
12633
+	bne	.L1966
12280
12634
 	strh	r4, [r7]	@ movhi
12281
-	b	.L2011
12282
-.L2010:
12635
+.L1967:
12636
+	adds	r6, r6, #1
12637
+	b	.L1964
12638
+.L1966:
12283
12639
 	subs	r4, r4, #1
12284
12640
 	uxth	r4, r4
12285
-	b	.L2009
12286
-.L2011:
12287
-	adds	r6, r6, #1
12288
-	b	.L2008
12289
-.L2017:
12290
-	movs	r0, #0
12291
-	pop	{r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
12292
-.L2019:
12641
+	b	.L1965
12642
+.L1974:
12293
12643
 	.align	2
12294
-.L2018:
12644
+.L1973:
12295
12645
 	.word	.LANCHOR2
12296
-	.word	.LANCHOR0+2462
12646
+	.word	.LANCHOR0+2466
12297
12647
 	.word	.LANCHOR4
12298
-	.word	.LANCHOR4+1248
12299
12648
 	.fnend
12300
12649
 	.size	FtlLoadFactoryBbt, .-FtlLoadFactoryBbt
12301
12650
 	.align	1
12302
12651
 	.global	FtlGetLastWrittenPage
12652
+	.syntax unified
12303
12653
 	.thumb
12304
12654
 	.thumb_func
12655
+	.fpu softvfp
12305
12656
 	.type	FtlGetLastWrittenPage, %function
12306
12657
 FtlGetLastWrittenPage:
12307
12658
 	.fnstart
12308
12659
 	@ args = 0, pretend = 0, frame = 104
12309
12660
 	@ frame_needed = 0, uses_anonymous_args = 0
12310
-	ldr	r3, .L2031
12661
+	ldr	r3, .L1986
12311
12662
 	cmp	r1, #1
12312
12663
 	push	{r4, r5, r6, r7, r8, lr}
12313
12664
 	.save {r4, r5, r6, r7, r8, lr}
12665
+	lsl	r8, r0, #10
12314
12666
 	.pad #104
12315
12667
 	sub	sp, sp, #104
12668
+	mov	r2, r1
12669
+	mov	r7, r1
12316
12670
 	it	eq
12317
-	ldrheq	r4, [r3, #2390]
12318
-	mov	r8, r1
12671
+	ldrheq	r5, [r3, #2392]
12672
+	mov	r6, #0
12319
12673
 	it	ne
12320
-	ldrhne	r4, [r3, #2388]
12321
-	lsls	r6, r0, #10
12674
+	ldrhne	r5, [r3, #2390]
12322
12675
 	add	r3, sp, #40
12323
-	add	r0, sp, #4
12324
-	subs	r5, r4, #1
12325
12676
 	str	r3, [sp, #16]
12326
12677
 	movs	r1, #1
12327
-	mov	r2, r8
12328
-	uxth	r5, r5
12329
-	movs	r7, #0
12330
-	str	r7, [sp, #12]
12331
-	sxth	r3, r5
12332
-	orrs	r3, r3, r6
12333
-	str	r3, [sp, #8]
12334
-	bl	FlashReadPages
12335
-	ldr	r3, [sp, #40]
12336
-	adds	r3, r3, #1
12337
-	bne	.L2023
12338
-.L2024:
12339
-	sxth	r3, r7
12340
-	sxth	r4, r5
12341
-	cmp	r3, r4
12342
-	bgt	.L2023
12343
-	add	r4, r4, r3
12344
12678
 	add	r0, sp, #4
12345
-	movs	r1, #1
12346
-	mov	r2, r8
12347
-	add	r4, r4, r4, lsr #31
12348
-	asrs	r4, r4, #1
12349
-	sxth	r3, r4
12350
-	orrs	r3, r3, r6
12679
+	str	r6, [sp, #12]
12680
+	subs	r5, r5, #1
12681
+	sxth	r5, r5
12682
+	orr	r3, r5, r8
12351
12683
 	str	r3, [sp, #8]
12352
12684
 	bl	FlashReadPages
12353
12685
 	ldr	r3, [sp, #40]
12354
12686
 	adds	r3, r3, #1
12355
-	bne	.L2025
12356
-	ldr	r3, [sp, #44]
12357
-	adds	r3, r3, #1
12358
-	bne	.L2025
12359
-	ldr	r3, [sp, #4]
12360
-	adds	r3, r3, #1
12361
-	beq	.L2025
12362
-	subs	r4, r4, #1
12363
-	uxth	r5, r4
12364
-	b	.L2024
12365
-.L2025:
12366
-	adds	r3, r4, #1
12367
-	uxth	r7, r3
12368
-	b	.L2024
12369
-.L2023:
12370
-	sxth	r0, r5
12687
+	bne	.L1978
12688
+.L1979:
12689
+	cmp	r6, r5
12690
+	ble	.L1982
12691
+.L1978:
12692
+	mov	r0, r5
12371
12693
 	add	sp, sp, #104
12372
12694
 	@ sp needed
12373
12695
 	pop	{r4, r5, r6, r7, r8, pc}
12374
-.L2032:
12696
+.L1982:
12697
+	adds	r3, r6, r5
12698
+	mov	r2, r7
12699
+	add	r3, r3, r3, lsr #31
12700
+	movs	r1, #1
12701
+	add	r0, sp, #4
12702
+	asrs	r4, r3, #1
12703
+	sxth	r3, r4
12704
+	orr	r3, r3, r8
12705
+	str	r3, [sp, #8]
12706
+	bl	FlashReadPages
12707
+	ldr	r3, [sp, #40]
12708
+	adds	r3, r3, #1
12709
+	bne	.L1980
12710
+	ldr	r3, [sp, #44]
12711
+	adds	r3, r3, #1
12712
+	bne	.L1980
12713
+	ldr	r3, [sp, #4]
12714
+	adds	r3, r3, #1
12715
+	beq	.L1980
12716
+	subs	r4, r4, #1
12717
+	sxth	r5, r4
12718
+	b	.L1979
12719
+.L1980:
12720
+	adds	r4, r4, #1
12721
+	sxth	r6, r4
12722
+	b	.L1979
12723
+.L1987:
12375
12724
 	.align	2
12376
-.L2031:
12725
+.L1986:
12377
12726
 	.word	.LANCHOR0
12378
12727
 	.fnend
12379
12728
 	.size	FtlGetLastWrittenPage, .-FtlGetLastWrittenPage
12380
12729
 	.align	1
12381
12730
 	.global	FtlLoadBbt
12731
+	.syntax unified
12382
12732
 	.thumb
12383
12733
 	.thumb_func
12734
+	.fpu softvfp
12384
12735
 	.type	FtlLoadBbt, %function
12385
12736
 FtlLoadBbt:
12386
12737
 	.fnstart
12387
12738
 	@ args = 0, pretend = 0, frame = 0
12388
12739
 	@ frame_needed = 0, uses_anonymous_args = 0
12389
-	push	{r3, r4, r5, r6, r7, r8, r9, lr}
12390
-	.save {r3, r4, r5, r6, r7, r8, r9, lr}
12391
-	ldr	r8, .L2062+16
12392
-	ldr	r4, .L2062
12393
-	ldr	r5, .L2062+4
12740
+	push	{r4, r5, r6, r7, r8, r9, r10, lr}
12741
+	.save {r4, r5, r6, r7, r8, r9, r10, lr}
12742
+	movw	r10, #61649
12743
+	ldr	r8, .L2016+16
12744
+	ldr	r5, .L2016
12394
12745
 	ldr	r3, [r8, #3316]
12395
12746
 	ldr	r7, [r8, #3340]
12396
-	mov	r9, r4
12397
-	str	r3, [r4, #1256]
12398
-	str	r7, [r4, #1260]
12747
+	ldr	r4, .L2016+4
12748
+	add	r9, r5, #1256
12749
+	str	r3, [r5, #1264]
12750
+	str	r7, [r5, #1268]
12399
12751
 	bl	FtlBbtMemInit
12400
-	ldrh	r6, [r5, #2386]
12752
+	ldrh	r6, [r4, #2388]
12401
12753
 	subs	r6, r6, #1
12402
12754
 	uxth	r6, r6
12403
-.L2034:
12404
-	ldrh	r3, [r5, #2386]
12755
+.L1989:
12756
+	ldrh	r3, [r4, #2388]
12405
12757
 	subs	r3, r3, #48
12406
12758
 	cmp	r6, r3
12407
-	ble	.L2037
12408
-	movs	r1, #1
12409
-	ldr	r0, .L2062+8
12759
+	ble	.L1992
12410
12760
 	lsls	r3, r6, #10
12411
-	str	r3, [r4, #1252]
12412
-	mov	r2, r1
12761
+	movs	r2, #1
12762
+	mov	r1, r2
12763
+	mov	r0, r9
12764
+	str	r3, [r5, #1260]
12413
12765
 	bl	FlashReadPages
12414
-	ldr	r3, [r4, #1248]
12766
+	ldr	r3, [r5, #1256]
12415
12767
 	adds	r3, r3, #1
12416
-	bne	.L2035
12417
-	movs	r1, #1
12418
-	ldr	r3, [r9, #1252]
12419
-	ldr	r0, .L2062+8
12420
-	mov	r2, r1
12768
+	bne	.L1990
12769
+	ldr	r3, [r5, #1260]
12770
+	movs	r2, #1
12771
+	mov	r1, r2
12772
+	mov	r0, r9
12421
12773
 	adds	r3, r3, #1
12422
-	str	r3, [r9, #1252]
12774
+	str	r3, [r5, #1260]
12423
12775
 	bl	FlashReadPages
12424
-.L2035:
12425
-	ldr	r3, [r4, #1248]
12776
+.L1990:
12777
+	ldr	r3, [r5, #1256]
12426
12778
 	adds	r3, r3, #1
12427
-	beq	.L2036
12428
-	ldrh	r2, [r7]
12429
-	movw	r3, #61649
12430
-	cmp	r2, r3
12431
-	bne	.L2036
12432
-	ldr	r3, [r7, #4]
12433
-	strh	r6, [r5, #2452]	@ movhi
12434
-	str	r3, [r5, #2460]
12435
-	ldrh	r3, [r7, #8]
12436
-	strh	r3, [r5, #2456]	@ movhi
12437
-	b	.L2037
12438
-.L2036:
12439
-	subs	r6, r6, #1
12440
-	uxth	r6, r6
12441
-	b	.L2034
12442
-.L2037:
12443
-	ldrh	r3, [r5, #2452]
12444
-	movw	r2, #65535
12445
-	ldr	r6, .L2062+4
12446
-	cmp	r3, r2
12447
-	beq	.L2051
12448
-	ldrh	r3, [r6, #2456]
12449
-	cmp	r3, r2
12450
-	beq	.L2041
12451
-	movs	r1, #1
12452
-	ldr	r0, .L2062+8
12453
-	lsls	r3, r3, #10
12454
-	str	r3, [r4, #1252]
12455
-	mov	r2, r1
12456
-	bl	FlashReadPages
12457
-	ldr	r3, [r4, #1248]
12458
-	adds	r3, r3, #1
12459
-	beq	.L2041
12460
-	ldrh	r2, [r7]
12461
-	movw	r3, #61649
12462
-	cmp	r2, r3
12463
-	bne	.L2041
12464
-	ldr	r3, [r7, #4]
12465
-	ldr	r2, [r6, #2460]
12466
-	cmp	r3, r2
12467
-	itttt	hi
12468
-	strhi	r3, [r6, #2460]
12469
-	ldrhhi	r2, [r6, #2456]
12470
-	ldrhhi	r3, [r7, #8]
12471
-	strhhi	r2, [r6, #2452]	@ movhi
12472
-	it	hi
12473
-	strhhi	r3, [r6, #2456]	@ movhi
12474
-.L2041:
12475
-	ldrh	r0, [r5, #2452]
12476
-	movs	r1, #1
12477
-	bl	FtlGetLastWrittenPage
12478
-	movw	r9, #61649
12479
-	uxth	r6, r0
12480
-	adds	r0, r0, #1
12481
-	strh	r0, [r5, #2454]	@ movhi
12482
-.L2043:
12483
-	sxth	r3, r6
12484
-	cmp	r3, #0
12485
-	blt	.L2048
12486
-	ldrh	r2, [r5, #2452]
12487
-	movs	r1, #1
12488
-	ldr	r0, .L2062+8
12489
-	orr	r3, r3, r2, lsl #10
12490
-	str	r3, [r4, #1252]
12491
-	ldr	r3, [r8, #3316]
12492
-	mov	r2, r1
12493
-	str	r3, [r4, #1256]
12494
-	bl	FlashReadPages
12495
-	ldr	r3, [r4, #1248]
12496
-	adds	r3, r3, #1
12497
-	beq	.L2044
12779
+	beq	.L1991
12498
12780
 	ldrh	r3, [r7]
12499
-	cmp	r3, r9
12500
-	bne	.L2044
12501
-.L2048:
12502
-	ldrh	r2, [r7, #10]
12503
-	ldrh	r0, [r7, #12]
12504
-	ldr	r3, .L2062+4
12505
-	strh	r2, [r5, #2458]	@ movhi
12781
+	cmp	r3, r10
12782
+	bne	.L1991
12783
+	ldr	r3, [r7, #4]
12784
+	strh	r6, [r4, #2456]	@ movhi
12785
+	str	r3, [r4, #2464]
12786
+	ldrh	r3, [r7, #8]
12787
+	strh	r3, [r4, #2460]	@ movhi
12788
+.L1992:
12789
+	ldrh	r3, [r4, #2456]
12506
12790
 	movw	r2, #65535
12507
-	cmp	r0, r2
12508
-	bne	.L2045
12509
-	b	.L2046
12510
-.L2044:
12791
+	cmp	r3, r2
12792
+	beq	.L2006
12793
+	ldrh	r3, [r4, #2460]
12794
+	cmp	r3, r2
12795
+	beq	.L1996
12796
+	lsls	r3, r3, #10
12797
+	movs	r2, #1
12798
+	mov	r1, r2
12799
+	ldr	r0, .L2016+8
12800
+	str	r3, [r5, #1260]
12801
+	bl	FlashReadPages
12802
+	ldr	r3, [r5, #1256]
12803
+	adds	r3, r3, #1
12804
+	beq	.L1996
12805
+	ldrh	r2, [r7]
12806
+	movw	r3, #61649
12807
+	cmp	r2, r3
12808
+	bne	.L1996
12809
+	ldr	r3, [r7, #4]
12810
+	ldr	r2, [r4, #2464]
12811
+	cmp	r3, r2
12812
+	bls	.L1996
12813
+	ldrh	r2, [r4, #2460]
12814
+	str	r3, [r4, #2464]
12815
+	ldrh	r3, [r7, #8]
12816
+	strh	r2, [r4, #2456]	@ movhi
12817
+	strh	r3, [r4, #2460]	@ movhi
12818
+.L1996:
12819
+	ldr	r9, .L2016+8
12820
+	movs	r1, #1
12821
+	ldrh	r0, [r4, #2456]
12822
+	movw	r10, #61649
12823
+	bl	FtlGetLastWrittenPage
12824
+	sxth	r6, r0
12825
+	adds	r0, r0, #1
12826
+	strh	r0, [r4, #2458]	@ movhi
12827
+.L1998:
12828
+	cmp	r6, #0
12829
+	blt	.L2003
12830
+	ldrh	r3, [r4, #2456]
12831
+	movs	r2, #1
12832
+	mov	r1, r2
12833
+	mov	r0, r9
12834
+	orr	r3, r6, r3, lsl #10
12835
+	str	r3, [r5, #1260]
12836
+	ldr	r3, [r8, #3316]
12837
+	str	r3, [r5, #1264]
12838
+	bl	FlashReadPages
12839
+	ldr	r3, [r5, #1256]
12840
+	adds	r3, r3, #1
12841
+	beq	.L1999
12842
+	ldrh	r3, [r7]
12843
+	cmp	r3, r10
12844
+	bne	.L1999
12845
+.L2003:
12846
+	ldrh	r3, [r7, #10]
12847
+	ldrh	r0, [r7, #12]
12848
+	strh	r3, [r4, #2462]	@ movhi
12849
+	movw	r3, #65535
12850
+	cmp	r0, r3
12851
+	bne	.L2000
12852
+.L2001:
12853
+	ldr	r7, .L2016+12
12854
+	movs	r6, #0
12855
+.L2004:
12856
+	ldrh	r3, [r4, #2346]
12857
+	cmp	r6, r3
12858
+	bcc	.L2005
12859
+	movs	r0, #0
12860
+	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
12861
+.L1991:
12511
12862
 	subs	r6, r6, #1
12512
12863
 	uxth	r6, r6
12513
-	b	.L2043
12514
-.L2045:
12515
-	ldr	r2, [r3, #2316]
12864
+	b	.L1989
12865
+.L1999:
12866
+	subs	r6, r6, #1
12867
+	sxth	r6, r6
12868
+	b	.L1998
12869
+.L2000:
12870
+	ldr	r2, [r4, #2320]
12516
12871
 	cmp	r0, r2
12517
-	beq	.L2046
12518
-	ldrh	r3, [r3, #2330]
12872
+	beq	.L2001
12873
+	ldrh	r3, [r4, #2334]
12519
12874
 	lsrs	r3, r3, #2
12520
12875
 	cmp	r2, r3
12521
-	bcs	.L2046
12876
+	bcs	.L2001
12522
12877
 	cmp	r0, r3
12523
-	bcs	.L2046
12878
+	bcs	.L2001
12524
12879
 	bl	FtlSysBlkNumInit
12525
-.L2046:
12526
-	ldr	r7, .L2062+12
12527
-	movs	r6, #0
12528
-.L2049:
12529
-	ldrh	r3, [r5, #2342]
12530
-	cmp	r6, r3
12531
-	bcs	.L2061
12880
+	b	.L2001
12881
+.L2005:
12532
12882
 	ldrh	r2, [r8, #3404]
12533
-	ldr	r1, [r4, #1256]
12883
+	ldr	r1, [r5, #1264]
12534
12884
 	ldr	r0, [r7, #4]!
12535
12885
 	lsls	r2, r2, #2
12536
12886
 	mla	r1, r6, r2, r1
12537
-	bl	ftl_memcpy
12538
12887
 	adds	r6, r6, #1
12539
-	b	.L2049
12540
-.L2061:
12541
-	movs	r0, #0
12542
-	pop	{r3, r4, r5, r6, r7, r8, r9, pc}
12543
-.L2051:
12888
+	bl	ftl_memcpy
12889
+	b	.L2004
12890
+.L2006:
12544
12891
 	mov	r0, #-1
12545
-	pop	{r3, r4, r5, r6, r7, r8, r9, pc}
12546
-.L2063:
12892
+	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
12893
+.L2017:
12547
12894
 	.align	2
12548
-.L2062:
12895
+.L2016:
12549
12896
 	.word	.LANCHOR4
12550
12897
 	.word	.LANCHOR0
12551
-	.word	.LANCHOR4+1248
12552
-	.word	.LANCHOR0+2476
12898
+	.word	.LANCHOR4+1256
12899
+	.word	.LANCHOR0+2480
12553
12900
 	.word	.LANCHOR2
12554
12901
 	.fnend
12555
12902
 	.size	FtlLoadBbt, .-FtlLoadBbt
12556
12903
 	.align	1
12557
12904
 	.global	FtlScanSysBlk
12905
+	.syntax unified
12558
12906
 	.thumb
12559
12907
 	.thumb_func
12908
+	.fpu softvfp
12560
12909
 	.type	FtlScanSysBlk, %function
12561
12910
 FtlScanSysBlk:
12562
12911
 	.fnstart
12563
-	@ args = 0, pretend = 0, frame = 32
12912
+	@ args = 0, pretend = 0, frame = 24
12564
12913
 	@ frame_needed = 0, uses_anonymous_args = 0
12565
12914
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
12566
12915
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
12567
12916
 	movs	r6, #0
12568
-	ldr	r5, .L2149
12569
-	.pad #36
12570
-	sub	sp, sp, #36
12571
-	ldr	r4, .L2149+4
12917
+	ldr	r5, .L2098
12572
12918
 	mov	r1, r6
12573
-	ldr	r2, [r5, #2416]
12919
+	.pad #28
12920
+	sub	sp, sp, #28
12921
+	ldr	r4, .L2098+4
12922
+	ldr	r2, [r5, #2420]
12923
+	mov	fp, r5
12924
+	strh	r6, [r5, #2438]	@ movhi
12574
12925
 	ldr	r0, [r4, #3396]
12575
-	mov	r9, r4
12576
-	strh	r6, [r5, #2434]	@ movhi
12577
-	lsls	r2, r2, #2
12578
12926
 	strh	r6, [r4, #3452]	@ movhi
12927
+	lsls	r2, r2, #2
12579
12928
 	bl	ftl_memset
12580
-	ldr	r2, [r5, #2416]
12929
+	ldr	r2, [r5, #2420]
12581
12930
 	mov	r1, r6
12582
12931
 	ldr	r0, [r4, #3368]
12583
12932
 	lsls	r2, r2, #1
12584
12933
 	bl	ftl_memset
12585
-	ldrh	r2, [r5, #2408]
12934
+	ldrh	r2, [r5, #2412]
12586
12935
 	mov	r1, r6
12587
12936
 	ldr	r0, [r4, #3380]
12588
12937
 	lsls	r2, r2, #2
12589
12938
 	bl	ftl_memset
12590
-	ldrh	r2, [r5, #2408]
12591
-	ldr	r0, [r5, #2436]
12939
+	ldrh	r2, [r5, #2412]
12592
12940
 	mov	r1, r6
12941
+	ldr	r0, [r5, #2440]
12942
+	mov	r6, r5
12593
12943
 	lsls	r2, r2, #1
12594
12944
 	bl	ftl_memset
12595
-	add	r0, r4, #540
12596
-	movs	r1, #255
12597
12945
 	movs	r2, #16
12946
+	movs	r1, #255
12947
+	add	r0, r4, #540
12598
12948
 	bl	ftl_memset
12599
-	ldrh	r3, [r5, #2328]
12600
-	str	r5, [sp, #12]
12601
-	mov	r5, r4
12949
+	ldrh	r3, [r5, #2332]
12602
12950
 	str	r3, [sp, #4]
12603
-.L2065:
12604
-	ldr	r6, .L2149
12951
+.L2019:
12952
+	ldrh	r3, [r6, #2334]
12605
12953
 	ldr	r2, [sp, #4]
12606
-	ldrh	r3, [r6, #2330]
12607
-	mov	r0, r6
12608
12954
 	cmp	r3, r2
12609
-	bls	.L2107
12610
-	ldr	r1, [r4, #1148]
12611
-	mov	r10, #36
12612
-	ldrh	r8, [r6, #2320]
12955
+	bls	.L2060
12956
+	ldr	r2, [r4, #1148]
12613
12957
 	movs	r7, #0
12614
-	ldr	r2, [r4, #3304]
12615
-	str	r1, [sp, #8]
12958
+	ldrh	r8, [r6, #2324]
12959
+	mov	r10, #36
12960
+	ldr	r9, [r4, #3304]
12961
+	str	r2, [sp, #8]
12616
12962
 	ldr	r3, [r4, #1144]
12617
-	ldrh	r1, [r6, #2400]
12963
+	ldrh	r2, [r6, #2402]
12618
12964
 	str	r7, [sp]
12619
-	str	r1, [sp, #16]
12620
-	addw	r1, r6, #2348
12621
-	str	r1, [sp, #20]
12622
-.L2108:
12623
-	uxth	r1, r7
12624
-	cmp	r1, r8
12625
-	bcs	.L2144
12626
-	str	r3, [sp, #28]
12627
-	ldr	r3, [sp, #20]
12965
+	b	.L2061
12966
+.L2022:
12967
+	str	r3, [sp, #16]
12968
+	ldr	r3, .L2098+8
12628
12969
 	ldr	r1, [sp, #4]
12629
-	str	r2, [sp, #24]
12970
+	str	r2, [sp, #20]
12630
12971
 	ldrb	r0, [r3, r7]	@ zero_extendqisi2
12631
12972
 	bl	V2P_block
12632
-	mov	fp, r0
12973
+	str	r0, [sp, #12]
12633
12974
 	bl	FtlBbmIsBadBlock
12634
-	ldr	r2, [sp, #24]
12635
-	ldr	r3, [sp, #28]
12636
-	cbnz	r0, .L2066
12975
+	ldr	r3, [sp, #16]
12976
+	ldr	r2, [sp, #20]
12977
+	cbnz	r0, .L2020
12637
12978
 	ldr	r1, [sp]
12638
-	ldr	r6, [sp]
12639
-	mla	r0, r10, r1, r2
12640
-	lsl	r1, fp, #10
12979
+	mla	r0, r10, r1, r9
12980
+	ldr	r1, [sp, #12]
12981
+	lsls	r1, r1, #10
12982
+	str	r3, [r0, #8]
12641
12983
 	str	r1, [r0, #4]
12642
-	ldr	r1, [sp, #16]
12643
-	muls	r1, r6, r1
12644
-	ldr	r6, [sp, #8]
12984
+	ldr	r1, [sp]
12985
+	muls	r1, r2, r1
12645
12986
 	it	mi
12646
12987
 	addmi	r1, r1, #3
12647
-	bic	r1, r1, #3
12648
-	str	r3, [r0, #8]
12649
-	add	r1, r1, r6
12988
+	bic	ip, r1, #3
12989
+	ldr	r1, [sp, #8]
12990
+	add	r1, r1, ip
12650
12991
 	str	r1, [r0, #12]
12651
12992
 	ldr	r1, [sp]
12652
12993
 	adds	r1, r1, #1
12653
12994
 	uxth	r1, r1
12654
12995
 	str	r1, [sp]
12655
-.L2066:
12996
+.L2020:
12656
12997
 	adds	r7, r7, #1
12657
-	b	.L2108
12658
-.L2144:
12998
+.L2061:
12999
+	uxth	r1, r7
13000
+	cmp	r8, r1
13001
+	bhi	.L2022
12659
13002
 	ldr	r3, [sp]
12660
-	cmp	r3, #0
12661
-	beq	.L2070
12662
-	mov	r1, r3
12663
-	ldr	r0, [r4, #3304]
13003
+	cbnz	r3, .L2023
13004
+.L2059:
13005
+	ldr	r3, [sp, #4]
13006
+	adds	r3, r3, #1
13007
+	uxth	r3, r3
13008
+	str	r3, [sp, #4]
13009
+	b	.L2019
13010
+.L2023:
12664
13011
 	movs	r2, #1
12665
-	ldr	r8, .L2149
13012
+	ldr	r1, [sp]
13013
+	mov	r0, r9
12666
13014
 	bl	FlashReadPages
12667
13015
 	movs	r3, #0
13016
+.L2096:
12668
13017
 	str	r3, [sp, #8]
12669
-.L2071:
12670
-	ldrh	r3, [sp, #8]
12671
13018
 	ldr	r2, [sp]
12672
-	cmp	r3, r2
12673
-	bcs	.L2070
13019
+	ldrh	r3, [sp, #8]
13020
+	cmp	r2, r3
13021
+	bls	.L2059
12674
13022
 	ldr	r3, [sp, #8]
12675
-	mov	r10, #36
12676
-	mul	r10, r10, r3
13023
+	movs	r2, #36
13024
+	mul	r9, r2, r3
12677
13025
 	ldr	r3, [r4, #3304]
12678
-	add	r2, r3, r10
12679
-	ldr	r3, [r3, r10]
12680
-	ldr	r6, [r2, #4]
13026
+	add	r2, r3, r9
13027
+	ldr	r3, [r3, r9]
13028
+	ldr	r7, [r2, #4]
13029
+	ldr	r8, [r2, #12]
12681
13030
 	adds	r3, r3, #1
12682
-	ldr	r7, [r2, #12]
12683
-	ubfx	r6, r6, #10, #16
12684
-	bne	.L2073
12685
-	mov	fp, #16
12686
-	movw	r3, #65535
12687
-.L2072:
13031
+	ubfx	r7, r7, #10, #16
13032
+	bne	.L2027
13033
+	mov	r10, #16
13034
+.L2029:
12688
13035
 	ldr	r0, [r4, #3304]
12689
-	movs	r1, #1
12690
-	str	r3, [sp, #16]
12691
-	add	r0, r0, r10
12692
-	ldr	r2, [r0, #4]
12693
-	adds	r2, r2, #1
12694
-	str	r2, [r0, #4]
12695
-	mov	r2, r1
12696
-	bl	FlashReadPages
12697
-	ldrh	r2, [r7]
12698
-	ldr	r3, [sp, #16]
12699
-	cmp	r2, r3
12700
-	bne	.L2074
12701
-	ldr	r3, [r9, #3304]
12702
-	mov	r2, #-1
12703
-	str	r2, [r3, r10]
12704
-	b	.L2073
12705
-.L2074:
12706
-	ldr	r2, [r5, #3304]
12707
-	ldr	r2, [r2, r10]
12708
-	adds	r2, r2, #1
12709
-	bne	.L2073
12710
-	add	fp, fp, #-1
12711
-	uxth	fp, fp
12712
-	cmp	fp, #0
12713
-	bne	.L2072
12714
-.L2073:
12715
-	ldr	r3, [r5, #3304]
12716
-	ldr	r3, [r3, r10]
13036
+	movs	r2, #1
13037
+	mov	r1, r2
13038
+	add	r0, r0, r9
13039
+	ldr	r3, [r0, #4]
12717
13040
 	adds	r3, r3, #1
12718
-	beq	.L2076
12719
-	ldr	r2, [r5, #508]
12720
-	ldr	r3, [r7, #4]
13041
+	str	r3, [r0, #4]
13042
+	bl	FlashReadPages
13043
+	ldrh	r3, [r8]
13044
+	movw	r2, #65535
13045
+	cmp	r3, r2
13046
+	ldr	r3, [r4, #3304]
13047
+	bne	.L2026
13048
+	mov	r2, #-1
13049
+	str	r2, [r3, r9]
13050
+	ldr	r3, [r4, #3304]
13051
+	ldr	r3, [r3, r9]
13052
+	cmp	r3, r2
13053
+	beq	.L2028
13054
+.L2027:
13055
+	ldr	r2, [r4, #508]
13056
+	ldr	r3, [r8, #4]
12721
13057
 	adds	r1, r2, #1
12722
-	beq	.L2077
13058
+	beq	.L2030
12723
13059
 	cmp	r2, r3
12724
-	bhi	.L2078
12725
-.L2077:
13060
+	bhi	.L2031
13061
+.L2030:
12726
13062
 	adds	r2, r3, #1
12727
13063
 	itt	ne
12728
13064
 	addne	r2, r3, #1
12729
-	strne	r2, [r9, #508]
12730
-.L2078:
12731
-	ldrh	r2, [r7]
13065
+	strne	r2, [r4, #508]
13066
+.L2031:
13067
+	ldrh	r2, [r8]
12732
13068
 	movw	r1, #61604
12733
13069
 	cmp	r2, r1
12734
-	beq	.L2080
12735
-	bhi	.L2081
13070
+	beq	.L2033
13071
+	bhi	.L2034
12736
13072
 	movw	r3, #61574
12737
13073
 	cmp	r2, r3
12738
-	bne	.L2079
12739
-	ldr	r3, [sp, #12]
12740
-	ldr	r2, [sp, #12]
12741
-	ldrh	r10, [r3, #2408]
12742
-	ldrh	r0, [r2, #2434]
12743
-	ldr	r2, [r9, #3380]
12744
-	add	lr, r10, #-1
12745
-	uxth	r3, lr
12746
-	rsb	lr, r0, lr
12747
-	str	r2, [sp, #16]
12748
-	b	.L2094
12749
-.L2081:
13074
+	beq	.L2035
13075
+.L2032:
13076
+	ldr	r3, [sp, #8]
13077
+	adds	r3, r3, #1
13078
+	b	.L2096
13079
+.L2026:
13080
+	ldr	r3, [r3, r9]
13081
+	adds	r3, r3, #1
13082
+	bne	.L2027
13083
+	add	r10, r10, #-1
13084
+	uxth	r10, r10
13085
+	cmp	r10, #0
13086
+	bne	.L2029
13087
+.L2028:
13088
+	ldrb	r1, [r6, #152]	@ zero_extendqisi2
13089
+	cbnz	r1, .L2097
13090
+.L2057:
13091
+	mov	r0, r7
13092
+	bl	FtlFreeSysBlkQueueIn
13093
+	b	.L2032
13094
+.L2034:
12750
13095
 	movw	r3, #61634
12751
13096
 	cmp	r2, r3
12752
-	beq	.L2083
13097
+	beq	.L2036
12753
13098
 	movw	r3, #65535
12754
13099
 	cmp	r2, r3
12755
-	bne	.L2079
12756
-	mov	r0, r6
12757
-	b	.L2143
12758
-.L2083:
12759
-	ldr	r3, [sp, #12]
13100
+	bne	.L2032
13101
+.L2097:
13102
+	movs	r1, #0
13103
+	b	.L2057
13104
+.L2036:
13105
+	ldr	r1, [r5, #2420]
12760
13106
 	ldrh	r0, [r4, #3452]
12761
-	ldr	r2, [r4, #3396]
12762
-	ldr	r1, [r3, #2416]
12763
-	str	r2, [sp, #16]
12764
-	uxth	lr, r1
12765
-	add	r3, lr, #-1
12766
-	rsb	lr, r0, lr
12767
-	add	lr, lr, #-1
12768
-	uxth	r3, r3
12769
-	sxth	lr, lr
12770
-.L2085:
12771
-	sxth	ip, r3
12772
-	cmp	ip, lr
12773
-	ble	.L2145
12774
-	ldr	r2, [r7, #4]
12775
-	lsl	fp, ip, #2
12776
-	mov	r10, r2
12777
-	ldr	r2, [sp, #16]
12778
-	ldr	r2, [r2, ip, lsl #2]
12779
-	cmp	r10, r2
12780
-	bls	.L2086
12781
-	ldr	r2, [sp, #16]
12782
-	ldr	r2, [r2]
12783
-	cbnz	r2, .L2087
12784
-	cmp	r0, r1
13107
+	ldr	r9, [r4, #3396]
13108
+	uxth	ip, r1
13109
+	add	r3, ip, #-1
13110
+	sub	ip, ip, r0
13111
+	add	ip, ip, #-1
13112
+	sxth	r3, r3
13113
+	sxth	ip, ip
13114
+.L2038:
13115
+	cmp	r3, ip
13116
+	bgt	.L2044
13117
+	cmp	r3, #0
13118
+	bge	.L2074
13119
+	b	.L2032
13120
+.L2044:
13121
+	ldr	r2, [r8, #4]
13122
+	lsl	r10, r3, #2
13123
+	mov	lr, r2
13124
+	ldr	r2, [r9, r3, lsl #2]
13125
+	cmp	lr, r2
13126
+	bls	.L2039
13127
+	ldr	r2, [r9]
13128
+	cbnz	r2, .L2040
13129
+	cmp	r1, r0
12785
13130
 	itt	ne
12786
13131
 	addne	r0, r0, #1
12787
-	strhne	r0, [r9, #3452]	@ movhi
12788
-.L2087:
12789
-	movs	r1, #0
12790
-	uxth	lr, r3
12791
-.L2088:
12792
-	uxth	r2, r1
12793
-	cmp	r2, lr
12794
-	bcs	.L2146
12795
-	ldr	r0, [r5, #3396]
12796
-	sxth	r2, r2
12797
-	adds	r1, r1, #1
12798
-	add	r10, r0, r2, lsl #2
12799
-	ldr	r10, [r10, #4]
12800
-	str	r10, [r0, r2, lsl #2]
12801
-	ldr	r0, [r5, #3368]
12802
-	add	r10, r0, r2, lsl #1
12803
-	ldrh	r10, [r10, #2]
12804
-	strh	r10, [r0, r2, lsl #1]	@ movhi
12805
-	b	.L2088
12806
-.L2146:
12807
-	ldr	r1, [r7, #4]
13132
+	strhne	r0, [r4, #3452]	@ movhi
13133
+.L2040:
13134
+	uxth	ip, r3
13135
+	movs	r2, #0
13136
+.L2041:
13137
+	uxth	r0, r2
13138
+	sxth	r1, r2
13139
+	cmp	r0, ip
13140
+	bcc	.L2042
12808
13141
 	ldr	r2, [r4, #3396]
12809
-	str	r1, [r2, fp]
12810
-	sxth	r1, r3
13142
+	cmp	r3, #0
13143
+	ldr	r1, [r8, #4]
13144
+	str	r1, [r2, r10]
12811
13145
 	ldr	r2, [r4, #3368]
12812
-	cmp	r1, #0
12813
-	strh	r6, [r2, ip, lsl #1]	@ movhi
12814
-	bge	.L2090
12815
-	b	.L2079
12816
-.L2086:
12817
-	subs	r3, r3, #1
12818
-	uxth	r3, r3
12819
-	b	.L2085
12820
-.L2145:
12821
-	cmp	ip, #0
12822
-	bge	.L2121
12823
-	b	.L2079
12824
-.L2090:
12825
-	ldrh	r0, [r5, #3452]
12826
-	ldr	r2, [r8, #2416]
13146
+	strh	r7, [r2, r3, lsl #1]	@ movhi
13147
+	blt	.L2032
13148
+	ldrh	r0, [r4, #3452]
13149
+	ldr	r2, [r5, #2420]
12827
13150
 	subs	r2, r2, r0
12828
13151
 	subs	r2, r2, #1
12829
13152
 	sxth	r2, r2
12830
-	cmp	r1, r2
12831
-	bgt	.L2079
12832
-.L2121:
13153
+	cmp	r3, r2
13154
+	bgt	.L2032
13155
+.L2074:
12833
13156
 	ldr	r2, [r4, #3396]
12834
-	sxth	r3, r3
12835
-	ldr	r1, [r7, #4]
12836
13157
 	adds	r0, r0, #1
13158
+	ldr	r1, [r8, #4]
12837
13159
 	strh	r0, [r4, #3452]	@ movhi
12838
13160
 	str	r1, [r2, r3, lsl #2]
12839
13161
 	ldr	r2, [r4, #3368]
12840
-	b	.L2141
12841
-.L2100:
12842
-	ldr	r1, [sp, #16]
12843
-	lsl	fp, ip, #2
12844
-	ldr	r2, [r7, #4]
12845
-	ldr	r1, [r1, ip, lsl #2]
12846
-	cmp	r2, r1
12847
-	bhi	.L2147
12848
-	subs	r3, r3, #1
12849
-	uxth	r3, r3
12850
13162
 .L2094:
12851
-	sxth	ip, r3
12852
-	cmp	ip, lr
12853
-	bgt	.L2100
12854
-	b	.L2099
12855
-.L2150:
13163
+	strh	r7, [r2, r3, lsl #1]	@ movhi
13164
+	b	.L2032
13165
+.L2042:
13166
+	ldr	r0, [r4, #3396]
13167
+	adds	r2, r2, #1
13168
+	add	lr, r0, r1, lsl #2
13169
+	ldr	lr, [lr, #4]
13170
+	str	lr, [r0, r1, lsl #2]
13171
+	ldr	r0, [r4, #3368]
13172
+	add	lr, r0, r1, lsl #1
13173
+	ldrh	lr, [lr, #2]
13174
+	strh	lr, [r0, r1, lsl #1]	@ movhi
13175
+	b	.L2041
13176
+.L2039:
13177
+	subs	r3, r3, #1
13178
+	sxth	r3, r3
13179
+	b	.L2038
13180
+.L2099:
12856
13181
 	.align	2
12857
-.L2149:
13182
+.L2098:
12858
13183
 	.word	.LANCHOR0
12859
13184
 	.word	.LANCHOR2
12860
-.L2147:
12861
-	ldr	r2, [sp, #16]
12862
-	ldr	r2, [r2]
12863
-	cbnz	r2, .L2096
12864
-	cmp	r0, r10
13185
+	.word	.LANCHOR0+2350
13186
+.L2035:
13187
+	ldrh	lr, [r5, #2412]
13188
+	ldrh	r0, [r5, #2438]
13189
+	ldr	r9, [r4, #3380]
13190
+	add	ip, lr, #-1
13191
+	sxth	r3, ip
13192
+	sub	ip, ip, r0
13193
+.L2047:
13194
+	cmp	r3, ip
13195
+	ble	.L2052
13196
+	ldr	r2, [r8, #4]
13197
+	lsl	r10, r3, #2
13198
+	ldr	r1, [r9, r3, lsl #2]
13199
+	cmp	r2, r1
13200
+	bls	.L2048
13201
+	ldr	r2, [r9]
13202
+	cbnz	r2, .L2049
13203
+	cmp	lr, r0
12865
13204
 	itt	ne
12866
13205
 	addne	r0, r0, #1
12867
-	strhne	r0, [r8, #2434]	@ movhi
12868
-.L2096:
12869
-	movs	r1, #0
12870
-	uxth	lr, r3
12871
-.L2097:
12872
-	uxth	r2, r1
12873
-	cmp	r2, lr
12874
-	bcs	.L2148
12875
-	ldr	r0, [r4, #3380]
12876
-	sxth	r2, r2
12877
-	adds	r1, r1, #1
12878
-	add	r10, r0, r2, lsl #2
12879
-	ldr	r10, [r10, #4]
12880
-	str	r10, [r0, r2, lsl #2]
12881
-	ldr	r0, [r8, #2436]
12882
-	add	r10, r0, r2, lsl #1
12883
-	ldrh	r10, [r10, #2]
12884
-	strh	r10, [r0, r2, lsl #1]	@ movhi
12885
-	b	.L2097
12886
-.L2148:
12887
-	ldr	r2, [r5, #3380]
12888
-	ldr	r1, [r7, #4]
12889
-	str	r1, [r2, fp]
12890
-	ldr	r2, .L2151
12891
-	ldr	r2, [r2, #2436]
12892
-	strh	r6, [r2, ip, lsl #1]	@ movhi
12893
-.L2099:
12894
-	sxth	r3, r3
13206
+	strhne	r0, [r6, #2438]	@ movhi
13207
+.L2049:
13208
+	uxth	ip, r3
13209
+	movs	r2, #0
13210
+.L2050:
13211
+	uxth	r0, r2
13212
+	sxth	r1, r2
13213
+	cmp	r0, ip
13214
+	bcc	.L2051
13215
+	ldr	r2, [r4, #3380]
13216
+	ldr	r1, [r8, #4]
13217
+	str	r1, [r2, r10]
13218
+	ldr	r2, [r6, #2440]
13219
+	strh	r7, [r2, r3, lsl #1]	@ movhi
13220
+.L2052:
12895
13221
 	cmp	r3, #0
12896
-	blt	.L2079
12897
-	ldrh	r2, [r8, #2408]
12898
-	ldrh	r1, [r8, #2434]
13222
+	blt	.L2032
13223
+	ldrh	r2, [r6, #2412]
13224
+	ldrh	r1, [r6, #2438]
12899
13225
 	subs	r2, r2, #1
12900
13226
 	subs	r2, r2, r1
12901
13227
 	sxth	r2, r2
12902
13228
 	cmp	r3, r2
12903
-	bgt	.L2079
13229
+	bgt	.L2032
12904
13230
 	adds	r1, r1, #1
12905
-	ldr	r2, [r9, #3380]
12906
-	strh	r1, [r8, #2434]	@ movhi
12907
-	ldr	r1, [r7, #4]
13231
+	ldr	r2, [r4, #3380]
13232
+	strh	r1, [r6, #2438]	@ movhi
13233
+	ldr	r1, [r8, #4]
12908
13234
 	str	r1, [r2, r3, lsl #2]
12909
-	ldr	r2, [r8, #2436]
12910
-.L2141:
12911
-	strh	r6, [r2, r3, lsl #1]	@ movhi
12912
-	b	.L2079
12913
-.L2080:
12914
-	ldrh	r1, [r9, #540]
13235
+	ldr	r2, [r6, #2440]
13236
+	b	.L2094
13237
+.L2051:
13238
+	ldr	r0, [r4, #3380]
13239
+	adds	r2, r2, #1
13240
+	add	lr, r0, r1, lsl #2
13241
+	ldr	lr, [lr, #4]
13242
+	str	lr, [r0, r1, lsl #2]
13243
+	ldr	r0, [r6, #2440]
13244
+	add	lr, r0, r1, lsl #1
13245
+	ldrh	lr, [lr, #2]
13246
+	strh	lr, [r0, r1, lsl #1]	@ movhi
13247
+	b	.L2050
13248
+.L2048:
13249
+	subs	r3, r3, #1
13250
+	sxth	r3, r3
13251
+	b	.L2047
13252
+.L2033:
13253
+	ldrh	r1, [r4, #540]
12915
13254
 	movw	r2, #65535
12916
13255
 	cmp	r1, r2
12917
-	bne	.L2101
12918
-	strh	r6, [r5, #540]	@ movhi
12919
-	b	.L2142
12920
-.L2101:
12921
-	ldrh	r0, [r5, #544]
13256
+	bne	.L2054
13257
+	strh	r7, [r4, #540]	@ movhi
13258
+.L2095:
13259
+	str	r3, [r4, #548]
13260
+	b	.L2032
13261
+.L2054:
13262
+	ldrh	r0, [r4, #544]
12922
13263
 	cmp	r0, r2
12923
-	beq	.L2102
13264
+	beq	.L2055
12924
13265
 	movs	r1, #1
12925
13266
 	bl	FtlFreeSysBlkQueueIn
12926
-.L2102:
12927
-	ldr	r2, [r9, #548]
12928
-	ldr	r3, [r7, #4]
13267
+.L2055:
13268
+	ldr	r2, [r4, #548]
13269
+	ldr	r3, [r8, #4]
12929
13270
 	cmp	r2, r3
12930
-	bcs	.L2103
12931
-	ldrh	r3, [r5, #540]
12932
-	strh	r6, [r5, #540]	@ movhi
12933
-	strh	r3, [r5, #544]	@ movhi
12934
-	ldr	r3, [r7, #4]
12935
-.L2142:
12936
-	str	r3, [r5, #548]
12937
-	b	.L2079
12938
-.L2103:
12939
-	strh	r6, [r5, #544]	@ movhi
12940
-	b	.L2079
12941
-.L2076:
12942
-	ldrb	r1, [r8, #144]	@ zero_extendqisi2
12943
-	mov	r0, r6
12944
-	cbz	r1, .L2104
12945
-.L2143:
12946
-	movs	r1, #0
12947
-.L2104:
12948
-	bl	FtlFreeSysBlkQueueIn
12949
-.L2079:
12950
-	ldr	r3, [sp, #8]
12951
-	adds	r3, r3, #1
12952
-	str	r3, [sp, #8]
12953
-	b	.L2071
12954
-.L2070:
12955
-	ldr	r6, [sp, #4]
12956
-	adds	r6, r6, #1
12957
-	uxth	r3, r6
12958
-	str	r3, [sp, #4]
12959
-	b	.L2065
12960
-.L2107:
12961
-	ldr	r3, .L2151+4
12962
-	ldr	r5, [r3, #3368]
12963
-	ldrh	r2, [r5]
12964
-	cbz	r2, .L2109
12965
-.L2112:
12966
-	ldr	r5, [r0, #2436]
12967
-	ldr	r3, .L2151
12968
-	ldrh	r2, [r5]
12969
-	cbz	r2, .L2110
12970
-	b	.L2133
12971
-.L2109:
12972
-	ldrh	r3, [r3, #3452]
12973
-	cmp	r3, #0
12974
-	beq	.L2112
12975
-	ldr	r6, [r6, #2416]
12976
-.L2113:
12977
-	uxth	r3, r2
12978
-	sxth	r1, r3
12979
-	cmp	r1, r6
12980
-	bcs	.L2112
12981
-	ldrh	r7, [r5, r1, lsl #1]
12982
-	adds	r2, r2, #1
12983
-	cmp	r7, #0
12984
-	beq	.L2113
12985
-	mov	lr, #0
12986
-.L2114:
12987
-	ldr	r5, [r0, #2416]
12988
-	sxth	r2, r3
12989
-	cmp	r2, r5
12990
-	bcs	.L2112
12991
-	ldr	r5, [r4, #3368]
12992
-	subs	r6, r2, r1
12993
-	adds	r3, r3, #1
12994
-	ldrh	r7, [r5, r2, lsl #1]
12995
-	uxth	r3, r3
12996
-	strh	r7, [r5, r6, lsl #1]	@ movhi
12997
-	ldr	r5, [r4, #3396]
12998
-	ldr	r7, [r5, r2, lsl #2]
12999
-	str	r7, [r5, r6, lsl #2]
13000
-	ldr	r5, [r4, #3368]
13001
-	strh	lr, [r5, r2, lsl #1]	@ movhi
13002
-	b	.L2114
13003
-.L2110:
13004
-	ldrh	r1, [r3, #2434]
13005
-	cbz	r1, .L2133
13006
-	ldrh	r6, [r3, #2408]
13007
-.L2117:
13008
-	uxth	r3, r2
13009
-	sxth	r1, r3
13010
-	cmp	r1, r6
13011
-	bge	.L2133
13012
-	ldrh	r7, [r5, r1, lsl #1]
13013
-	adds	r2, r2, #1
13014
-	cmp	r7, #0
13015
-	beq	.L2117
13016
-	ldr	r5, .L2151
13017
-	mov	ip, #0
13018
-.L2118:
13019
-	ldrh	r6, [r0, #2408]
13020
-	sxth	r2, r3
13021
-	cmp	r2, r6
13022
-	bge	.L2133
13023
-	ldr	r6, [r5, #2436]
13024
-	rsb	lr, r1, r2
13025
-	adds	r3, r3, #1
13026
-	ldrh	r7, [r6, r2, lsl #1]
13027
-	uxth	r3, r3
13028
-	strh	r7, [r6, lr, lsl #1]	@ movhi
13029
-	ldr	r6, [r4, #3380]
13030
-	ldr	r7, [r6, r2, lsl #2]
13031
-	str	r7, [r6, lr, lsl #2]
13032
-	ldr	r6, [r5, #2436]
13033
-	strh	ip, [r6, r2, lsl #1]	@ movhi
13034
-	b	.L2118
13035
-.L2133:
13271
+	bcs	.L2056
13272
+	ldrh	r3, [r4, #540]
13273
+	strh	r7, [r4, #540]	@ movhi
13274
+	strh	r3, [r4, #544]	@ movhi
13275
+	ldr	r3, [r8, #4]
13276
+	b	.L2095
13277
+.L2056:
13278
+	strh	r7, [r4, #544]	@ movhi
13279
+	b	.L2032
13280
+.L2060:
13281
+	ldr	r1, [r4, #3368]
13282
+	ldrh	r3, [r1]
13283
+	cbz	r3, .L2062
13284
+.L2065:
13285
+	ldr	r1, [r5, #2440]
13286
+	ldrh	r2, [r1]
13287
+	cbz	r2, .L2063
13288
+.L2085:
13036
13289
 	movs	r0, #0
13037
-	add	sp, sp, #36
13290
+	add	sp, sp, #28
13038
13291
 	@ sp needed
13039
13292
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
13040
-.L2152:
13041
-	.align	2
13042
-.L2151:
13043
-	.word	.LANCHOR0
13044
-	.word	.LANCHOR2
13293
+.L2062:
13294
+	ldrh	r2, [r4, #3452]
13295
+	cmp	r2, #0
13296
+	beq	.L2065
13297
+	ldr	r0, [r6, #2420]
13298
+.L2066:
13299
+	sxth	r2, r3
13300
+	cmp	r2, r0
13301
+	bcs	.L2065
13302
+	ldrh	r6, [r1, r2, lsl #1]
13303
+	adds	r3, r3, #1
13304
+	cmp	r6, #0
13305
+	beq	.L2066
13306
+	mov	r3, r2
13307
+	movs	r7, #0
13308
+.L2067:
13309
+	ldr	r1, [fp, #2420]
13310
+	cmp	r3, r1
13311
+	bcs	.L2065
13312
+	ldr	r1, [r4, #3368]
13313
+	subs	r0, r3, r2
13314
+	ldrh	r6, [r1, r3, lsl #1]
13315
+	strh	r6, [r1, r0, lsl #1]	@ movhi
13316
+	ldr	r1, [r4, #3396]
13317
+	ldr	r6, [r1, r3, lsl #2]
13318
+	str	r6, [r1, r0, lsl #2]
13319
+	ldr	r1, [r4, #3368]
13320
+	strh	r7, [r1, r3, lsl #1]	@ movhi
13321
+	adds	r3, r3, #1
13322
+	sxth	r3, r3
13323
+	b	.L2067
13324
+.L2063:
13325
+	ldrh	r3, [r5, #2438]
13326
+	cmp	r3, #0
13327
+	beq	.L2085
13328
+	ldrh	r0, [r5, #2412]
13329
+.L2070:
13330
+	sxth	r3, r2
13331
+	cmp	r3, r0
13332
+	mov	r5, r3
13333
+	bge	.L2085
13334
+	ldrh	r6, [r1, r3, lsl #1]
13335
+	adds	r2, r2, #1
13336
+	cmp	r6, #0
13337
+	beq	.L2070
13338
+	movs	r0, #0
13339
+.L2071:
13340
+	ldrh	r2, [fp, #2412]
13341
+	cmp	r3, r2
13342
+	bge	.L2085
13343
+	ldr	r2, [fp, #2440]
13344
+	subs	r1, r3, r5
13345
+	ldrh	r6, [r2, r3, lsl #1]
13346
+	strh	r6, [r2, r1, lsl #1]	@ movhi
13347
+	ldr	r2, [r4, #3380]
13348
+	ldr	r6, [r2, r3, lsl #2]
13349
+	str	r6, [r2, r1, lsl #2]
13350
+	ldr	r2, [fp, #2440]
13351
+	strh	r0, [r2, r3, lsl #1]	@ movhi
13352
+	adds	r3, r3, #1
13353
+	sxth	r3, r3
13354
+	b	.L2071
13045
13355
 	.fnend
13046
13356
 	.size	FtlScanSysBlk, .-FtlScanSysBlk
13047
13357
 	.align	1
13048
13358
 	.global	FtlLoadSysInfo
13359
+	.syntax unified
13049
13360
 	.thumb
13050
13361
 	.thumb_func
13362
+	.fpu softvfp
13051
13363
 	.type	FtlLoadSysInfo, %function
13052
13364
 FtlLoadSysInfo:
13053
13365
 	.fnstart
13054
-	@ args = 0, pretend = 0, frame = 16
13366
+	@ args = 0, pretend = 0, frame = 8
13055
13367
 	@ frame_needed = 0, uses_anonymous_args = 0
13056
13368
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
13057
13369
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
13058
13370
 	movs	r1, #0
13059
-	ldr	r4, .L2181
13060
-	.pad #44
13061
-	sub	sp, sp, #44
13062
-	ldr	r7, .L2181+4
13063
-	ldr	r5, .L2181+8
13371
+	ldr	r4, .L2128
13372
+	.pad #36
13373
+	sub	sp, sp, #36
13374
+	ldr	r5, .L2128+4
13064
13375
 	ldr	r3, [r4, #3316]
13065
-	ldrh	r2, [r7, #2328]
13066
-	ldr	r0, [r4, #296]
13067
-	str	r3, [r5, #1256]
13376
+	ldr	r6, .L2128+8
13377
+	ldrh	r2, [r5, #2332]
13378
+	ldr	r0, [r4, #300]
13379
+	str	r3, [r6, #1264]
13068
13380
 	ldr	r3, [r4, #3340]
13069
13381
 	lsls	r2, r2, #1
13070
-	str	r3, [r5, #1260]
13382
+	str	r3, [r6, #1268]
13071
13383
 	bl	ftl_memset
13072
13384
 	ldrh	r0, [r4, #540]
13073
13385
 	movw	r3, #65535
13074
13386
 	cmp	r0, r3
13075
-	bne	.L2154
13076
-.L2165:
13387
+	bne	.L2101
13388
+.L2112:
13077
13389
 	mov	r0, #-1
13078
-	b	.L2155
13079
-.L2154:
13390
+.L2100:
13391
+	add	sp, sp, #36
13392
+	@ sp needed
13393
+	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
13394
+.L2101:
13080
13395
 	movs	r1, #1
13081
-	mov	r8, r5
13396
+	ldr	fp, .L2128+36
13082
13397
 	bl	FtlGetLastWrittenPage
13083
-	ldrh	r10, [r4, #540]
13084
-	uxth	r6, r0
13398
+	ldrsh	r9, [r4, #540]
13399
+	add	r10, r6, #1256
13400
+	sxth	r7, r0
13085
13401
 	adds	r0, r0, #1
13086
13402
 	strh	r0, [r4, #542]	@ movhi
13087
-.L2156:
13088
-	sxth	r3, r6
13089
-	cmp	r3, #0
13090
-	blt	.L2164
13091
-	sxth	fp, r10
13092
-	movs	r1, #1
13093
-	ldr	r0, .L2181+12
13094
-	orr	r3, r3, fp, lsl #10
13095
-	str	r3, [r5, #1252]
13403
+.L2103:
13404
+	cmp	r7, #0
13405
+	blt	.L2111
13406
+	orr	r3, r7, r9, lsl #10
13407
+	movs	r2, #1
13408
+	mov	r1, r2
13409
+	str	r3, [r6, #1260]
13410
+	mov	r0, r10
13096
13411
 	ldr	r3, [r4, #3316]
13097
-	mov	r2, r1
13098
-	ldr	r9, .L2181
13099
-	str	r3, [r5, #1256]
13412
+	str	r3, [r6, #1264]
13100
13413
 	bl	FlashReadPages
13101
-	ldrb	r3, [r7]	@ zero_extendqisi2
13414
+	ldrb	r3, [r5, #36]	@ zero_extendqisi2
13102
13415
 	cmp	r3, #0
13103
-	beq	.L2157
13104
-	ldr	r3, [r8, #1260]
13105
-	ldr	r2, [r3, #12]
13106
-	cmp	r2, #0
13107
-	beq	.L2157
13108
-	ldr	ip, [r8, #1256]
13109
-	str	r3, [sp, #32]
13110
-	ldr	r3, .L2181+4
13111
-	mov	r0, ip
13112
-	str	r2, [sp, #36]
13113
-	str	ip, [sp, #28]
13114
-	ldrh	r1, [r3, #2398]
13416
+	beq	.L2104
13417
+	ldr	r8, [r6, #1268]
13418
+	ldr	r3, [r8, #12]
13419
+	str	r3, [sp, #28]
13420
+	cbz	r3, .L2104
13421
+	ldr	r2, [r6, #1264]
13422
+	ldrh	r1, [r5, #2400]
13423
+	mov	r0, r2
13424
+	str	r2, [sp, #24]
13115
13425
 	bl	js_hash
13116
-	ldr	r2, [sp, #36]
13117
-	cmp	r2, r0
13118
-	beq	.L2157
13119
-	ldr	ip, [sp, #28]
13120
-	ldr	r3, [sp, #32]
13121
-	cbnz	r6, .L2158
13122
-	ldrh	r1, [r9, #544]
13123
-	cmp	fp, r1
13124
-	beq	.L2158
13125
-	ldr	r0, [r3]
13126
-	ldrh	r1, [r9, #540]
13127
-	str	r0, [sp]
13128
-	ldr	r0, [r3, #4]
13129
-	str	r0, [sp, #4]
13130
-	ldr	r3, [r3, #8]
13131
-	str	r2, [sp, #12]
13132
-	ldr	r0, .L2181+16
13426
+	ldr	r3, [sp, #28]
13427
+	cmp	r3, r0
13428
+	beq	.L2104
13429
+	cbnz	r7, .L2105
13430
+	ldrh	r1, [r4, #544]
13431
+	ldr	r2, [sp, #24]
13432
+	cmp	r9, r1
13433
+	beq	.L2105
13434
+	ldr	r2, [r2]
13435
+	mov	r0, fp
13436
+	str	r3, [sp, #12]
13437
+	ldrh	r1, [r4, #540]
13438
+	str	r2, [sp, #16]
13439
+	ldr	r3, [r8, #8]
13440
+	ldr	r2, [r6, #1256]
13133
13441
 	str	r3, [sp, #8]
13134
-	ldr	r3, [ip]
13135
-	str	r3, [sp, #16]
13136
-	ldr	r3, [r8, #1252]
13137
-	ldr	r2, [r8, #1248]
13442
+	ldr	r3, [r8, #4]
13443
+	str	r3, [sp, #4]
13444
+	ldr	r3, [r8]
13445
+	str	r3, [sp]
13446
+	ldr	r3, [r6, #1260]
13138
13447
 	bl	printk
13139
-	ldr	r3, .L2181+4
13140
-	ldrh	r10, [r9, #544]
13141
-	ldrh	r6, [r3, #2390]
13142
-	b	.L2160
13143
-.L2158:
13448
+	ldrsh	r9, [r4, #544]
13449
+	ldrh	r7, [r5, #2392]
13450
+.L2107:
13451
+	subs	r7, r7, #1
13452
+	sxth	r7, r7
13453
+	b	.L2103
13454
+.L2105:
13144
13455
 	mov	r3, #-1
13145
-	str	r3, [r5, #1248]
13146
-.L2157:
13147
-	ldr	r3, [r5, #1248]
13456
+	str	r3, [r6, #1256]
13457
+.L2104:
13458
+	ldr	r3, [r6, #1256]
13148
13459
 	adds	r3, r3, #1
13149
-	beq	.L2160
13460
+	beq	.L2107
13150
13461
 	ldr	r3, [r4, #3316]
13151
-	ldr	r2, .L2181+20
13462
+	ldr	r2, .L2128+12
13152
13463
 	ldr	r3, [r3]
13153
13464
 	cmp	r3, r2
13154
-	bne	.L2160
13155
-	ldr	r3, .L2181
13156
-	ldr	r3, [r3, #3340]
13465
+	bne	.L2107
13466
+	ldr	r3, [r4, #3340]
13157
13467
 	ldrh	r2, [r3]
13158
13468
 	movw	r3, #61604
13159
13469
 	cmp	r2, r3
13160
-	bne	.L2160
13161
-.L2164:
13162
-	ldr	r6, .L2181
13470
+	bne	.L2107
13471
+.L2111:
13163
13472
 	movs	r2, #48
13164
-	ldr	r1, [r5, #1256]
13165
-	add	r0, r6, #240
13166
-	ldr	r8, .L2181+4
13473
+	ldr	r1, [r6, #1264]
13474
+	ldr	r0, .L2128+16
13167
13475
 	bl	ftl_memcpy
13168
-	ldrh	r2, [r7, #2328]
13169
-	ldr	r1, [r5, #1256]
13170
-	ldr	r0, [r4, #296]
13171
-	adds	r1, r1, #48
13476
+	ldrh	r2, [r5, #2332]
13477
+	ldr	r1, [r6, #1264]
13478
+	ldr	r0, [r4, #300]
13172
13479
 	lsls	r2, r2, #1
13480
+	adds	r1, r1, #48
13173
13481
 	bl	ftl_memcpy
13174
-	ldrh	r2, [r7, #2328]
13175
-	ldr	r1, [r5, #1256]
13176
-	ldr	r0, [r4, #472]
13177
-	lsls	r3, r2, #1
13178
-	lsrs	r2, r2, #3
13179
-	adds	r3, r3, #51
13482
+	ldrh	r1, [r5, #2332]
13483
+	ldr	r3, [r6, #1264]
13484
+	ldr	r0, [r5, #32]
13485
+	lsrs	r2, r1, #3
13486
+	lsls	r1, r1, #1
13487
+	adds	r1, r1, #51
13180
13488
 	adds	r2, r2, #4
13181
-	bic	r3, r3, #3
13489
+	bic	r1, r1, #3
13182
13490
 	add	r1, r1, r3
13183
13491
 	bl	ftl_memcpy
13184
-	ldrh	r3, [r7, #2432]
13185
-	cbz	r3, .L2162
13186
-	ldrh	r2, [r8, #2328]
13187
-	ldr	r0, [r6, #3392]
13188
-	lsrs	r3, r2, #3
13189
-	add	r3, r3, r2, lsl #1
13190
-	ldr	r2, .L2181+8
13492
+	ldrh	r3, [r5, #2436]
13493
+	cbz	r3, .L2109
13494
+	ldrh	r1, [r5, #2332]
13495
+	ldrh	r2, [r5, #2428]
13496
+	ldr	r0, [r4, #3392]
13497
+	lsrs	r3, r1, #3
13498
+	lsls	r2, r2, #2
13499
+	add	r3, r3, r1, lsl #1
13500
+	ldr	r1, [r6, #1264]
13191
13501
 	adds	r3, r3, #52
13192
13502
 	ubfx	r3, r3, #2, #14
13193
-	ldr	r1, [r2, #1256]
13194
-	ldrh	r2, [r8, #2424]
13195
13503
 	add	r1, r1, r3, lsl #2
13196
-	lsls	r2, r2, #2
13197
13504
 	bl	ftl_memcpy
13198
-	b	.L2162
13199
-.L2160:
13200
-	subs	r6, r6, #1
13201
-	uxth	r6, r6
13202
-	b	.L2156
13203
-.L2162:
13204
-	ldr	r2, [r4, #240]
13205
-	ldr	r3, .L2181+20
13206
-	ldr	r6, .L2181
13505
+.L2109:
13506
+	ldr	r2, [r4, #244]
13507
+	ldr	r3, .L2128+12
13207
13508
 	cmp	r2, r3
13208
-	bne	.L2165
13209
-	ldrb	r0, [r6, #250]	@ zero_extendqisi2
13210
-	ldrh	r1, [r7, #2342]
13211
-	ldrh	r2, [r6, #248]
13212
-	cmp	r0, r1
13213
-	ldr	r3, .L2181+4
13214
-	strh	r2, [r6, #546]	@ movhi
13215
-	bne	.L2165
13216
-	ldrh	r1, [r3, #2388]
13217
-	ldrh	r0, [r3, #2394]
13218
-	str	r2, [r5, #1284]
13219
-	muls	r1, r2, r1
13220
-	str	r1, [r3, #2448]
13221
-	muls	r1, r0, r1
13222
-	ldrh	r0, [r3, #2458]
13223
-	str	r1, [r3, #2428]
13224
-	ldr	r1, [r3, #2332]
13225
-	subs	r0, r1, r0
13226
-	ldrh	r1, [r3, #2320]
13509
+	bne	.L2112
13510
+	ldrb	r1, [r4, #254]	@ zero_extendqisi2
13511
+	ldrh	r3, [r5, #2346]
13512
+	ldrh	r2, [r4, #252]
13513
+	cmp	r1, r3
13514
+	strh	r2, [r4, #546]	@ movhi
13515
+	bne	.L2112
13516
+	ldrh	r3, [r5, #2390]
13517
+	ldrh	r1, [r5, #2396]
13518
+	ldr	r0, [r5, #2336]
13519
+	str	r2, [r6, #1292]
13520
+	muls	r3, r2, r3
13521
+	str	r3, [r5, #2452]
13522
+	muls	r3, r1, r3
13523
+	ldrh	r1, [r5, #2324]
13524
+	str	r3, [r5, #2432]
13525
+	ldrh	r3, [r5, #2462]
13526
+	subs	r0, r0, r3
13227
13527
 	subs	r0, r0, r2
13228
13528
 	bl	__aeabi_uidiv
13229
-	ldrh	r3, [r6, #256]
13230
-	ldrh	r1, [r6, #254]
13529
+	ldrh	r3, [r4, #260]
13530
+	strh	r0, [r4, #536]	@ movhi
13531
+	ldrh	r1, [r4, #258]
13231
13532
 	lsrs	r2, r3, #6
13232
-	strh	r2, [r6, #318]	@ movhi
13233
-	ldrh	r2, [r6, #258]
13234
13533
 	and	r3, r3, #63
13235
-	strb	r3, [r6, #322]
13236
-	ldrb	r3, [r6, #251]	@ zero_extendqisi2
13237
-	strh	r2, [r6, #364]	@ movhi
13238
-	ldrh	r2, [r6, #260]
13239
-	strb	r3, [r6, #324]
13534
+	strb	r3, [r4, #326]
13535
+	strh	r2, [r4, #322]	@ movhi
13536
+	ldrh	r2, [r4, #262]
13537
+	ldrb	r3, [r4, #255]	@ zero_extendqisi2
13538
+	strh	r1, [r4, #320]	@ movhi
13539
+	strh	r2, [r4, #368]	@ movhi
13540
+	ldrh	r2, [r4, #264]
13541
+	strb	r3, [r4, #328]
13240
13542
 	movw	r3, #65535
13241
-	strh	r1, [r6, #316]	@ movhi
13242
-	strh	r3, [r6, #556]	@ movhi
13543
+	strh	r3, [r4, #556]	@ movhi
13243
13544
 	movs	r3, #0
13244
-	strh	r3, [r6, #558]	@ movhi
13245
-	strb	r3, [r6, #562]
13246
-	strb	r3, [r6, #564]
13247
-	str	r3, [r6, #496]
13248
-	strh	r0, [r6, #536]	@ movhi
13545
+	strh	r3, [r4, #558]	@ movhi
13249
13546
 	lsrs	r0, r2, #6
13250
13547
 	and	r2, r2, #63
13251
-	strb	r2, [r6, #370]
13252
-	ldrb	r2, [r6, #252]	@ zero_extendqisi2
13253
-	strh	r0, [r6, #366]	@ movhi
13254
-	strb	r2, [r6, #372]
13255
-	ldrh	r2, [r6, #262]
13256
-	strh	r2, [r6, #412]	@ movhi
13257
-	ldrh	r2, [r6, #264]
13548
+	strb	r2, [r4, #374]
13549
+	ldrb	r2, [r4, #256]	@ zero_extendqisi2
13550
+	strh	r0, [r4, #370]	@ movhi
13551
+	strb	r3, [r4, #562]
13552
+	strb	r2, [r4, #376]
13553
+	ldrh	r2, [r4, #266]
13554
+	strb	r3, [r4, #564]
13555
+	strh	r2, [r4, #416]	@ movhi
13556
+	ldrh	r2, [r4, #268]
13258
13557
 	lsrs	r0, r2, #6
13259
13558
 	and	r2, r2, #63
13260
-	strb	r2, [r6, #418]
13261
-	ldrb	r2, [r6, #253]	@ zero_extendqisi2
13262
-	strh	r0, [r6, #414]	@ movhi
13263
-	strb	r2, [r6, #420]
13264
-	str	r3, [r6, #484]
13265
-	ldr	r2, [r6, #272]
13266
-	str	r3, [r6, #476]
13267
-	str	r3, [r6, #492]
13268
-	str	r3, [r6, #520]
13269
-	str	r3, [r6, #528]
13270
-	str	r3, [r6, #488]
13271
-	ldr	r3, [r6, #280]
13272
-	str	r2, [r6, #516]
13273
-	ldr	r2, [r6, #508]
13559
+	strb	r2, [r4, #422]
13560
+	ldrb	r2, [r4, #257]	@ zero_extendqisi2
13561
+	strh	r0, [r4, #418]	@ movhi
13562
+	strb	r2, [r4, #424]
13563
+	str	r3, [r4, #496]
13564
+	ldr	r2, [r4, #276]
13565
+	str	r3, [r4, #484]
13566
+	str	r3, [r4, #476]
13567
+	str	r3, [r4, #492]
13568
+	str	r2, [r4, #516]
13569
+	str	r3, [r4, #520]
13570
+	ldr	r2, [r4, #508]
13571
+	str	r3, [r4, #528]
13572
+	str	r3, [r4, #488]
13573
+	ldr	r3, [r4, #284]
13274
13574
 	cmp	r3, r2
13275
13575
 	ldr	r2, [r4, #512]
13276
13576
 	it	hi
13277
-	strhi	r3, [r6, #508]
13278
-	ldr	r3, [r4, #276]
13577
+	strhi	r3, [r4, #508]
13578
+	ldr	r3, [r4, #280]
13279
13579
 	cmp	r3, r2
13280
-	itt	hi
13281
-	ldrhi	r2, .L2181
13282
-	strhi	r3, [r2, #512]
13580
+	it	hi
13581
+	strhi	r3, [r4, #512]
13283
13582
 	movw	r3, #65535
13284
13583
 	cmp	r1, r3
13285
-	beq	.L2168
13286
-	ldr	r0, .L2181+24
13584
+	beq	.L2115
13585
+	ldr	r0, .L2128+20
13287
13586
 	bl	make_superblock
13288
-.L2168:
13289
-	ldrh	r2, [r4, #364]
13587
+.L2115:
13588
+	ldrh	r2, [r4, #368]
13290
13589
 	movw	r3, #65535
13291
13590
 	cmp	r2, r3
13292
-	beq	.L2169
13293
-	ldr	r0, .L2181+28
13591
+	beq	.L2116
13592
+	ldr	r0, .L2128+24
13294
13593
 	bl	make_superblock
13295
-.L2169:
13296
-	ldrh	r2, [r4, #412]
13594
+.L2116:
13595
+	ldrh	r2, [r4, #416]
13297
13596
 	movw	r3, #65535
13298
13597
 	cmp	r2, r3
13299
-	beq	.L2170
13300
-	ldr	r0, .L2181+32
13598
+	beq	.L2117
13599
+	ldr	r0, .L2128+28
13301
13600
 	bl	make_superblock
13302
-.L2170:
13601
+.L2117:
13303
13602
 	ldrh	r2, [r4, #556]
13304
13603
 	movw	r3, #65535
13305
13604
 	cmp	r2, r3
13306
-	beq	.L2171
13307
-	ldr	r0, .L2181+36
13605
+	beq	.L2118
13606
+	ldr	r0, .L2128+32
13308
13607
 	bl	make_superblock
13309
-.L2171:
13608
+.L2118:
13310
13609
 	movs	r0, #0
13311
-.L2155:
13312
-	add	sp, sp, #44
13313
-	@ sp needed
13314
-	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
13315
-.L2182:
13610
+	b	.L2100
13611
+.L2129:
13316
13612
 	.align	2
13317
-.L2181:
13613
+.L2128:
13318
13614
 	.word	.LANCHOR2
13319
13615
 	.word	.LANCHOR0
13320
13616
 	.word	.LANCHOR4
13321
-	.word	.LANCHOR4+1248
13322
-	.word	.LC109
13323
13617
 	.word	1179929683
13324
-	.word	.LANCHOR2+316
13325
-	.word	.LANCHOR2+364
13326
-	.word	.LANCHOR2+412
13618
+	.word	.LANCHOR2+244
13619
+	.word	.LANCHOR2+320
13620
+	.word	.LANCHOR2+368
13621
+	.word	.LANCHOR2+416
13327
13622
 	.word	.LANCHOR2+556
13623
+	.word	.LC109
13328
13624
 	.fnend
13329
13625
 	.size	FtlLoadSysInfo, .-FtlLoadSysInfo
13330
13626
 	.align	1
13331
13627
 	.global	FtlDumpBlockInfo
13628
+	.syntax unified
13332
13629
 	.thumb
13333
13630
 	.thumb_func
13631
+	.fpu softvfp
13334
13632
 	.type	FtlDumpBlockInfo, %function
13335
13633
 FtlDumpBlockInfo:
13336
13634
 	.fnstart
..
..
@@ -13339,151 +13637,149 @@
13339
13637
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
13340
13638
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
13341
13639
 	ubfx	r0, r0, #10, #16
13640
+	ldr	r4, .L2144
13342
13641
 	.pad #100
13343
13642
 	sub	sp, sp, #100
13344
-	mov	r8, r1
13643
+	mov	r9, r1
13644
+	ldr	r7, .L2144+4
13345
13645
 	bl	P2V_block_in_plane
13346
-	ldr	r4, .L2199
13347
-	ldr	r7, .L2199+4
13348
-	ldr	r1, .L2199+8
13349
-	ldrh	r9, [r4, #2388]
13646
+	ldr	r1, .L2144+8
13350
13647
 	mov	r6, r0
13351
-	ldr	r0, .L2199+12
13648
+	ldr	r0, .L2144+12
13649
+	ldrh	r8, [r4, #2390]
13352
13650
 	bl	printk
13353
-	ldr	r3, [r7, #296]
13651
+	ldr	r3, [r7, #300]
13354
13652
 	mov	r1, r6
13355
-	ldr	r0, .L2199+16
13653
+	ldr	r0, .L2144+16
13356
13654
 	ldrh	r2, [r3, r6, lsl #1]
13357
13655
 	bl	printk
13358
13656
 	add	r0, sp, #96
13359
13657
 	strh	r6, [r0, #-48]!	@ movhi
13360
13658
 	bl	make_superblock
13361
-	ldrb	r5, [r4, #144]	@ zero_extendqisi2
13659
+	ldrb	r5, [r4, #152]	@ zero_extendqisi2
13362
13660
 	str	r7, [sp, #44]
13363
-	cbz	r5, .L2184
13364
-	cmp	r8, #0
13365
-	bne	.L2195
13661
+	cbz	r5, .L2131
13662
+	cmp	r9, #0
13663
+	bne	.L2142
13366
13664
 	mov	r0, r6
13367
13665
 	bl	ftl_get_blk_mode
13368
13666
 	cmp	r0, #1
13369
13667
 	mov	r5, r0
13370
-	bne	.L2184
13371
-	ldrh	r9, [r4, #2390]
13372
-	b	.L2184
13373
-.L2195:
13374
-	movs	r5, #0
13375
-.L2184:
13376
-	ldr	r0, .L2199+20
13668
+	bne	.L2131
13669
+	ldrh	r8, [r4, #2392]
13670
+.L2131:
13671
+	ldr	r9, .L2144
13672
+	mov	r2, r8
13673
+	ldrh	r3, [r4, #2390]
13377
13674
 	mov	r1, r5
13378
-	mov	r2, r9
13379
-	ldrh	r3, [r4, #2388]
13675
+	ldr	r0, .L2144+20
13676
+	mov	r10, #36
13380
13677
 	bl	printk
13381
-	ldr	r10, .L2199
13382
-	movs	r6, #0
13383
-.L2185:
13384
-	ldr	r3, .L2199+4
13385
-	movs	r2, #0
13386
-	ldrh	fp, [r10, #2320]
13387
-	add	lr, sp, #62
13388
-	ldrh	r0, [r10, #2400]
13389
-	mov	r8, #36
13390
-	ldr	r3, [r3, #3304]
13391
-	mov	r4, r2
13392
-	movw	ip, #65535
13678
+	movs	r3, #0
13393
13679
 	str	r3, [sp, #28]
13394
-	ldr	r3, .L2199+4
13395
-	ldr	r3, [r3, #1144]
13396
-	str	r3, [sp, #32]
13397
-	ldrh	r3, [r10, #2398]
13398
-	str	r3, [sp, #36]
13399
-	ldr	r3, .L2199+4
13680
+.L2132:
13681
+	ldr	r3, .L2144+4
13682
+	add	ip, sp, #62
13683
+	ldrh	fp, [r9, #2324]
13684
+	movw	lr, #65535
13685
+	ldrh	r7, [r9, #2402]
13686
+	ldr	r2, [r3, #1144]
13687
+	ldr	r0, [r3, #3304]
13400
13688
 	ldr	r3, [r3, #1148]
13689
+	str	r2, [sp, #32]
13690
+	ldrh	r2, [r9, #2400]
13401
13691
 	str	r3, [sp, #40]
13402
-.L2186:
13692
+	str	r2, [sp, #36]
13693
+	movs	r2, #0
13694
+	mov	r4, r2
13695
+.L2133:
13403
13696
 	uxth	r3, r2
13404
-	cmp	r3, fp
13405
-	bcs	.L2197
13406
-	ldrh	r3, [lr, #2]!
13407
-	cmp	r3, ip
13408
-	beq	.L2187
13409
-	ldr	r1, [sp, #28]
13697
+	cmp	fp, r3
13698
+	bhi	.L2137
13699
+	ldr	fp, .L2144+24
13700
+	movs	r7, #0
13701
+	mov	r2, r5
13702
+	mov	r1, r4
13703
+	bl	FlashReadPages
13704
+.L2138:
13705
+	uxth	r3, r7
13706
+	cmp	r4, r3
13707
+	bhi	.L2139
13708
+	ldr	r6, [sp, #28]
13709
+	adds	r6, r6, #1
13710
+	uxth	r3, r6
13711
+	cmp	r8, r3
13712
+	str	r3, [sp, #28]
13713
+	bne	.L2132
13714
+.L2140:
13715
+	movs	r0, #0
13716
+	add	sp, sp, #100
13717
+	@ sp needed
13718
+	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
13719
+.L2142:
13720
+	movs	r5, #0
13721
+	b	.L2131
13722
+.L2137:
13723
+	ldrh	r3, [ip, #2]!
13724
+	cmp	r3, lr
13725
+	beq	.L2134
13726
+	ldr	r6, [sp, #28]
13727
+	mla	r1, r10, r4, r0
13410
13728
 	orr	r3, r6, r3, lsl #10
13411
-	ldr	r7, [sp, #32]
13412
-	mla	r1, r8, r4, r1
13729
+	ldr	r6, [sp, #32]
13413
13730
 	str	r3, [r1, #4]
13414
13731
 	ldr	r3, [sp, #36]
13415
13732
 	muls	r3, r4, r3
13416
13733
 	it	mi
13417
13734
 	addmi	r3, r3, #3
13418
13735
 	bic	r3, r3, #3
13419
-	add	r3, r3, r7
13736
+	add	r3, r3, r6
13737
+	ldr	r6, [sp, #40]
13420
13738
 	str	r3, [r1, #8]
13421
-	mov	r3, r0
13739
+	mov	r3, r7
13422
13740
 	muls	r3, r4, r3
13423
13741
 	add	r4, r4, #1
13424
13742
 	it	mi
13425
13743
 	addmi	r3, r3, #3
13426
-	ldr	r7, [sp, #40]
13427
-	bic	r3, r3, #3
13428
13744
 	uxth	r4, r4
13429
-	add	r3, r3, r7
13745
+	bic	r3, r3, #3
13746
+	add	r3, r3, r6
13430
13747
 	str	r3, [r1, #12]
13431
-.L2187:
13748
+.L2134:
13432
13749
 	adds	r2, r2, #1
13433
-	b	.L2186
13434
-.L2197:
13435
-	ldr	r3, .L2199+4
13436
-	mov	r1, r4
13437
-	mov	r2, r5
13438
-	mov	r8, #0
13439
-	mov	fp, #36
13440
-	ldr	r0, [r3, #3304]
13441
-	bl	FlashReadPages
13442
-.L2191:
13443
-	uxth	r3, r8
13444
-	cmp	r3, r4
13445
-	bcs	.L2198
13750
+	b	.L2133
13751
+.L2139:
13446
13752
 	ldr	r3, [sp, #44]
13447
-	mul	r2, fp, r8
13753
+	mul	r0, r10, r7
13448
13754
 	ldrh	r1, [sp, #48]
13755
+	adds	r7, r7, #1
13449
13756
 	ldr	ip, [r3, #3304]
13450
-	add	r8, r8, #1
13451
-	add	lr, ip, r2
13452
-	ldr	r3, [lr, #12]
13453
-	ldr	r0, [lr, #8]
13454
-	ldr	r7, [r3]
13455
-	str	r7, [sp]
13456
-	ldr	r7, [r3, #4]
13457
-	str	r7, [sp, #4]
13458
-	ldr	r7, [r3, #8]
13459
-	str	r7, [sp, #8]
13460
-	ldr	r3, [r3, #12]
13461
-	str	r3, [sp, #12]
13462
-	ldr	r3, [r0]
13463
-	str	r3, [sp, #16]
13464
-	ldr	r3, [r0, #4]
13465
-	ldr	r0, .L2199+24
13466
-	str	r3, [sp, #20]
13467
-	ldr	r2, [ip, r2]
13468
-	ldr	r3, [lr, #4]
13757
+	add	r2, ip, r0
13758
+	ldr	lr, [r2, #8]
13759
+	ldr	r3, [r2, #12]
13760
+	ldr	r6, [lr, #4]
13761
+	str	r6, [sp, #20]
13762
+	ldr	r6, [lr]
13763
+	str	r6, [sp, #16]
13764
+	ldr	r6, [r3, #12]
13765
+	str	r6, [sp, #12]
13766
+	ldr	r6, [r3, #8]
13767
+	str	r6, [sp, #8]
13768
+	ldr	r6, [r3, #4]
13769
+	str	r6, [sp, #4]
13770
+	ldr	r3, [r3]
13771
+	str	r3, [sp]
13772
+	ldr	r3, [r2, #4]
13773
+	ldr	r2, [ip, r0]
13774
+	mov	r0, fp
13469
13775
 	bl	printk
13470
-	b	.L2191
13471
-.L2198:
13472
-	adds	r6, r6, #1
13473
-	uxth	r6, r6
13474
-	cmp	r6, r9
13475
-	bne	.L2185
13476
-.L2193:
13477
-	movs	r0, #0
13478
-	add	sp, sp, #100
13479
-	@ sp needed
13480
-	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
13481
-.L2200:
13776
+	b	.L2138
13777
+.L2145:
13482
13778
 	.align	2
13483
-.L2199:
13779
+.L2144:
13484
13780
 	.word	.LANCHOR0
13485
13781
 	.word	.LANCHOR2
13486
-	.word	.LANCHOR3+148
13782
+	.word	.LANCHOR3+141
13487
13783
 	.word	.LC110
13488
13784
 	.word	.LC111
13489
13785
 	.word	.LC112
..
..
@@ -13492,172 +13788,172 @@
13492
13788
 	.size	FtlDumpBlockInfo, .-FtlDumpBlockInfo
13493
13789
 	.align	1
13494
13790
 	.global	FtlScanAllBlock
13791
+	.syntax unified
13495
13792
 	.thumb
13496
13793
 	.thumb_func
13794
+	.fpu softvfp
13497
13795
 	.type	FtlScanAllBlock, %function
13498
13796
 FtlScanAllBlock:
13499
13797
 	.fnstart
13500
-	@ args = 0, pretend = 0, frame = 64
13798
+	@ args = 0, pretend = 0, frame = 56
13501
13799
 	@ frame_needed = 0, uses_anonymous_args = 0
13502
13800
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
13503
13801
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
13504
-	.pad #92
13505
-	sub	sp, sp, #92
13506
-	ldr	r0, .L2217
13507
-	mov	r8, #0
13508
-	ldr	r1, .L2217+4
13802
+	movs	r7, #0
13803
+	ldr	r5, .L2158
13804
+	.pad #84
13805
+	sub	sp, sp, #84
13806
+	ldr	r1, .L2158+4
13807
+	ldr	r0, .L2158+8
13509
13808
 	bl	printk
13510
-	ldr	r5, .L2217+8
13511
-	mov	r7, r5
13512
-.L2202:
13513
-	ldr	r3, .L2217+12
13514
-	uxth	r4, r8
13515
-	ldrh	r3, [r3, #2330]
13516
-	cmp	r3, r4
13517
-	bls	.L2213
13518
-	add	r9, sp, #88
13519
-	mov	r0, r4
13520
-	mov	fp, #36
13809
+.L2147:
13810
+	ldr	r3, .L2158+12
13811
+	uxth	r0, r7
13812
+	ldrh	r3, [r3, #2334]
13813
+	cmp	r3, r0
13814
+	bhi	.L2157
13815
+	movs	r0, #0
13816
+	add	sp, sp, #84
13817
+	@ sp needed
13818
+	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
13819
+.L2157:
13820
+	add	r4, sp, #80
13521
13821
 	movw	r10, #65535
13522
-	strh	r4, [r9, #-48]!	@ movhi
13822
+	strh	r0, [r4, #-48]!	@ movhi
13823
+	mov	fp, #36
13523
13824
 	bl	ftl_get_blk_mode
13524
-	ldr	r2, [r5, #296]
13525
-	mov	r1, r4
13526
-	ldrh	r2, [r2, r4, lsl #1]
13825
+	ldr	r2, [r5, #300]
13826
+	uxth	r1, r7
13527
13827
 	mov	r3, r0
13528
-	ldr	r0, .L2217+16
13828
+	ldr	r0, .L2158+16
13829
+	ldrh	r2, [r2, r1, lsl #1]
13529
13830
 	bl	printk
13530
-	mov	r0, r9
13831
+	mov	r0, r4
13531
13832
 	bl	make_superblock
13532
-	ldr	r3, .L2217+12
13833
+	ldr	r3, .L2158+12
13533
13834
 	movs	r2, #0
13835
+	ldr	r0, [r5, #3304]
13836
+	add	r8, sp, #46
13534
13837
 	ldr	r9, [r5, #1148]
13535
-	ldrh	lr, [r3, #2320]
13536
13838
 	mov	r4, r2
13537
-	ldr	r3, [r5, #3304]
13538
-	str	r3, [sp, #28]
13539
-	add	ip, sp, #54
13839
+	ldrh	ip, [r3, #2324]
13540
13840
 	ldr	r3, [r5, #1144]
13541
-	str	r3, [sp, #32]
13542
-	ldr	r3, .L2217+12
13543
-	ldrh	r0, [r3, #2398]
13841
+	str	r3, [sp, #24]
13842
+	ldr	r3, .L2158+12
13544
13843
 	ldrh	r3, [r3, #2400]
13545
-	str	r3, [sp, #36]
13546
-.L2203:
13844
+	str	r3, [sp, #28]
13845
+	ldr	r3, .L2158+12
13846
+	ldrh	lr, [r3, #2402]
13847
+.L2148:
13547
13848
 	uxth	r3, r2
13548
-	cmp	r3, lr
13549
-	bcs	.L2214
13550
-	ldrh	r3, [ip, #2]!
13849
+	cmp	ip, r3
13850
+	bhi	.L2152
13851
+	ldr	r10, .L2158+20
13852
+	mov	r8, #0
13853
+	mov	r9, #36
13854
+	movs	r2, #0
13855
+	mov	r1, r4
13856
+	bl	FlashReadPages
13857
+.L2153:
13858
+	uxth	r3, r8
13859
+	cmp	r4, r3
13860
+	bhi	.L2154
13861
+	ldr	r10, .L2158+24
13862
+	mov	r8, #0
13863
+	mov	r9, #36
13864
+	movs	r2, #1
13865
+	mov	r1, r4
13866
+	ldr	r0, [r5, #3304]
13867
+	bl	FlashReadPages
13868
+.L2155:
13869
+	uxth	r3, r8
13870
+	cmp	r4, r3
13871
+	bhi	.L2156
13872
+	adds	r7, r7, #1
13873
+	b	.L2147
13874
+.L2152:
13875
+	ldrh	r3, [r8, #2]!
13551
13876
 	cmp	r3, r10
13552
-	beq	.L2204
13553
-	ldr	r1, [sp, #28]
13877
+	beq	.L2149
13878
+	mla	r1, fp, r4, r0
13879
+	ldr	r6, [sp, #24]
13554
13880
 	lsls	r3, r3, #10
13555
-	ldr	r6, [sp, #32]
13556
-	mla	r1, fp, r4, r1
13557
13881
 	str	r3, [r1, #4]
13558
-	mov	r3, r0
13882
+	ldr	r3, [sp, #28]
13559
13883
 	muls	r3, r4, r3
13560
13884
 	it	mi
13561
13885
 	addmi	r3, r3, #3
13562
13886
 	bic	r3, r3, #3
13563
13887
 	add	r3, r3, r6
13564
13888
 	str	r3, [r1, #8]
13565
-	ldr	r3, [sp, #36]
13889
+	mov	r3, lr
13566
13890
 	muls	r3, r4, r3
13567
13891
 	add	r4, r4, #1
13568
13892
 	it	mi
13569
13893
 	addmi	r3, r3, #3
13570
-	bic	r3, r3, #3
13571
13894
 	uxth	r4, r4
13895
+	bic	r3, r3, #3
13572
13896
 	add	r3, r3, r9
13573
13897
 	str	r3, [r1, #12]
13574
-.L2204:
13898
+.L2149:
13575
13899
 	adds	r2, r2, #1
13576
-	b	.L2203
13577
-.L2214:
13578
-	ldr	r0, [r7, #3304]
13579
-	mov	r1, r4
13580
-	movs	r2, #0
13581
-	mov	r9, #0
13582
-	bl	FlashReadPages
13583
-	mov	r10, #36
13584
-.L2208:
13585
-	uxth	r3, r9
13586
-	cmp	r3, r4
13587
-	bcs	.L2215
13588
-	mul	r2, r10, r9
13589
-	ldr	ip, [r7, #3304]
13590
-	ldrh	r1, [sp, #40]
13591
-	add	r9, r9, #1
13592
-	add	lr, ip, r2
13593
-	ldr	r3, [lr, #12]
13594
-	ldr	r0, [lr, #8]
13595
-	ldr	r6, [r3]
13596
-	str	r6, [sp]
13597
-	ldr	r6, [r3, #4]
13598
-	str	r6, [sp, #4]
13599
-	ldr	r6, [r3, #8]
13600
-	str	r6, [sp, #8]
13601
-	ldr	r3, [r3, #12]
13602
-	str	r3, [sp, #12]
13603
-	ldr	r3, [r0]
13604
-	str	r3, [sp, #16]
13605
-	ldr	r3, [r0, #4]
13606
-	ldr	r0, .L2217+20
13607
-	str	r3, [sp, #20]
13608
-	ldr	r2, [ip, r2]
13609
-	ldr	r3, [lr, #4]
13610
-	bl	printk
13611
-	b	.L2208
13612
-.L2215:
13613
-	ldr	r0, [r7, #3304]
13614
-	mov	r1, r4
13615
-	movs	r2, #1
13616
-	mov	r9, #0
13617
-	bl	FlashReadPages
13618
-	mov	r10, #36
13619
-.L2210:
13620
-	uxth	r3, r9
13621
-	cmp	r3, r4
13622
-	bcs	.L2216
13623
-	mul	r2, r10, r9
13624
-	ldr	ip, [r7, #3304]
13625
-	ldrh	r1, [sp, #40]
13626
-	add	r9, r9, #1
13627
-	add	lr, ip, r2
13628
-	ldr	r3, [lr, #12]
13629
-	ldr	r0, [lr, #8]
13630
-	ldr	r6, [r3]
13631
-	str	r6, [sp]
13632
-	ldr	r6, [r3, #4]
13633
-	str	r6, [sp, #4]
13634
-	ldr	r6, [r3, #8]
13635
-	str	r6, [sp, #8]
13636
-	ldr	r3, [r3, #12]
13637
-	str	r3, [sp, #12]
13638
-	ldr	r3, [r0]
13639
-	str	r3, [sp, #16]
13640
-	ldr	r3, [r0, #4]
13641
-	ldr	r0, .L2217+24
13642
-	str	r3, [sp, #20]
13643
-	ldr	r2, [ip, r2]
13644
-	ldr	r3, [lr, #4]
13645
-	bl	printk
13646
-	b	.L2210
13647
-.L2216:
13900
+	b	.L2148
13901
+.L2154:
13902
+	mul	r2, r9, r8
13903
+	ldr	r0, [r5, #3304]
13904
+	ldrh	r1, [sp, #32]
13648
13905
 	add	r8, r8, #1
13649
-	b	.L2202
13650
-.L2213:
13651
-	movs	r0, #0
13652
-	add	sp, sp, #92
13653
-	@ sp needed
13654
-	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
13655
-.L2218:
13906
+	add	lr, r0, r2
13907
+	ldr	fp, [lr, #8]
13908
+	ldr	r3, [lr, #12]
13909
+	ldr	r6, [fp, #4]
13910
+	str	r6, [sp, #20]
13911
+	ldr	r6, [fp]
13912
+	str	r6, [sp, #16]
13913
+	ldr	r6, [r3, #12]
13914
+	str	r6, [sp, #12]
13915
+	ldr	r6, [r3, #8]
13916
+	str	r6, [sp, #8]
13917
+	ldr	r6, [r3, #4]
13918
+	str	r6, [sp, #4]
13919
+	ldr	r3, [r3]
13920
+	str	r3, [sp]
13921
+	ldr	r2, [r0, r2]
13922
+	mov	r0, r10
13923
+	ldr	r3, [lr, #4]
13924
+	bl	printk
13925
+	b	.L2153
13926
+.L2156:
13927
+	mul	r2, r9, r8
13928
+	ldr	r0, [r5, #3304]
13929
+	ldrh	r1, [sp, #32]
13930
+	add	r8, r8, #1
13931
+	add	lr, r0, r2
13932
+	ldr	fp, [lr, #8]
13933
+	ldr	r3, [lr, #12]
13934
+	ldr	r6, [fp, #4]
13935
+	str	r6, [sp, #20]
13936
+	ldr	r6, [fp]
13937
+	str	r6, [sp, #16]
13938
+	ldr	r6, [r3, #12]
13939
+	str	r6, [sp, #12]
13940
+	ldr	r6, [r3, #8]
13941
+	str	r6, [sp, #8]
13942
+	ldr	r6, [r3, #4]
13943
+	str	r6, [sp, #4]
13944
+	ldr	r3, [r3]
13945
+	str	r3, [sp]
13946
+	ldr	r2, [r0, r2]
13947
+	mov	r0, r10
13948
+	ldr	r3, [lr, #4]
13949
+	bl	printk
13950
+	b	.L2155
13951
+.L2159:
13656
13952
 	.align	2
13657
-.L2217:
13658
-	.word	.LC110
13659
-	.word	.LANCHOR3+168
13953
+.L2158:
13660
13954
 	.word	.LANCHOR2
13955
+	.word	.LANCHOR3+158
13956
+	.word	.LC110
13661
13957
 	.word	.LANCHOR0
13662
13958
 	.word	.LC114
13663
13959
 	.word	.LC115
..
..
@@ -13666,129 +13962,131 @@
13666
13962
 	.size	FtlScanAllBlock, .-FtlScanAllBlock
13667
13963
 	.align	1
13668
13964
 	.global	ftl_scan_all_ppa
13965
+	.syntax unified
13669
13966
 	.thumb
13670
13967
 	.thumb_func
13968
+	.fpu softvfp
13671
13969
 	.type	ftl_scan_all_ppa, %function
13672
13970
 ftl_scan_all_ppa:
13673
13971
 	.fnstart
13674
-	@ args = 0, pretend = 0, frame = 8
13972
+	@ args = 0, pretend = 0, frame = 0
13675
13973
 	@ frame_needed = 0, uses_anonymous_args = 0
13676
13974
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
13677
13975
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
13678
-	.pad #36
13679
-	sub	sp, sp, #36
13680
-	ldr	r6, .L2237
13681
-	ldr	r5, .L2237+4
13682
-	ldrh	r4, [r6, #2386]
13683
-	mov	r10, r6
13976
+	.pad #28
13977
+	sub	sp, sp, #28
13978
+	ldr	r5, .L2176
13979
+	ldr	r6, .L2176+4
13980
+	ldrh	r4, [r5, #2388]
13684
13981
 	subs	r4, r4, #16
13685
-.L2220:
13686
-	ldrh	r3, [r6, #2386]
13982
+	lsl	r10, r4, #10
13983
+.L2161:
13984
+	ldrh	r3, [r5, #2388]
13687
13985
 	cmp	r4, r3
13688
-	bge	.L2235
13689
-	uxth	r8, r4
13690
-	mov	r0, r8
13691
-	bl	ftl_get_blk_mode
13692
-	ldrb	r3, [r10, #144]	@ zero_extendqisi2
13693
-	cbz	r3, .L2221
13694
-	ldrh	r3, [r10, #2328]
13695
-	cmp	r4, r3
13696
-	bge	.L2222
13697
-	ldrh	r3, [r10, #2402]
13698
-	cmp	r4, r3
13699
-	blt	.L2222
13700
-.L2221:
13701
-	cmp	r0, #1
13702
-	bne	.L2223
13703
-.L2222:
13704
-	ldrh	r7, [r6, #2390]
13705
-	mov	r9, #-2147483648
13706
-	b	.L2224
13707
-.L2223:
13708
-	ldrh	r7, [r6, #2388]
13709
-	mov	r9, #0
13710
-.L2224:
13711
-	ldr	r0, .L2237+8
13712
-	mov	r1, r4
13713
-	mov	r2, r7
13714
-	mov	r3, r9
13715
-	bl	printk
13716
-	mov	r0, r8
13717
-	bl	FtlBbmIsBadBlock
13718
-	cbz	r0, .L2225
13719
-	ldr	r0, .L2237+12
13720
-	mov	r1, r4
13721
-	mov	r2, r7
13722
-	mov	r3, r9
13723
-	bl	printk
13724
-.L2225:
13725
-	ldr	fp, .L2237+32
13726
-	lsl	ip, r4, #10
13727
-	mov	r8, #0
13728
-.L2226:
13729
-	cmp	r8, r7
13730
-	beq	.L2236
13731
-	add	r3, r9, ip
13732
-	movs	r2, #0
13733
-	add	r3, r3, r8
13734
-	str	r3, [r5, #1252]
13735
-	ldr	r3, [fp, #3316]
13736
-	movs	r1, #1
13737
-	ldr	r0, .L2237+16
13738
-	add	r8, r8, #1
13739
-	str	ip, [sp, #28]
13740
-	str	r3, [r5, #1256]
13741
-	ldr	r3, [fp, #3340]
13742
-	str	r2, [r5, #1248]
13743
-	str	r3, [r5, #1260]
13744
-	bl	FlashReadPages
13745
-	ldr	r3, [r5, #1260]
13746
-	ldr	r2, [r5, #1256]
13747
-	ldr	r0, .L2237+20
13748
-	ldr	r1, [r3, #4]
13749
-	str	r1, [sp]
13750
-	ldr	r1, [r3, #8]
13751
-	str	r1, [sp, #4]
13752
-	ldr	r1, [r3, #12]
13753
-	str	r1, [sp, #8]
13754
-	ldr	r1, [r2]
13755
-	str	r1, [sp, #12]
13756
-	ldr	r2, [r2, #4]
13757
-	ldr	r1, [r5, #1252]
13758
-	str	r2, [sp, #16]
13759
-	ldr	r2, [r5, #1248]
13760
-	ldr	r3, [r3]
13761
-	bl	printk
13762
-	ldr	ip, [sp, #28]
13763
-	b	.L2226
13764
-.L2236:
13765
-	adds	r4, r4, #1
13766
-	b	.L2220
13767
-.L2235:
13768
-	ldr	r0, .L2237+24
13769
-	ldr	r1, .L2237+28
13770
-	add	sp, sp, #36
13986
+	blt	.L2169
13987
+	ldr	r1, .L2176+8
13988
+	ldr	r0, .L2176+12
13989
+	add	sp, sp, #28
13771
13990
 	@ sp needed
13772
13991
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
13773
13992
 	b	printk
13774
-.L2238:
13993
+.L2169:
13994
+	uxth	r8, r4
13995
+	mov	r0, r8
13996
+	bl	ftl_get_blk_mode
13997
+	ldrb	r3, [r5, #152]	@ zero_extendqisi2
13998
+	cbz	r3, .L2162
13999
+	ldrh	r3, [r5, #2332]
14000
+	cmp	r4, r3
14001
+	bge	.L2163
14002
+	ldrh	r3, [r5, #2404]
14003
+	cmp	r4, r3
14004
+	blt	.L2163
14005
+.L2162:
14006
+	cmp	r0, #1
14007
+	bne	.L2164
14008
+.L2163:
14009
+	ldrh	r7, [r5, #2392]
14010
+	mov	r9, #-2147483648
14011
+.L2165:
14012
+	mov	r3, r9
14013
+	mov	r2, r7
14014
+	mov	r1, r4
14015
+	ldr	r0, .L2176+16
14016
+	bl	printk
14017
+	mov	r0, r8
14018
+	bl	FtlBbmIsBadBlock
14019
+	cbz	r0, .L2166
14020
+	mov	r3, r9
14021
+	mov	r2, r7
14022
+	mov	r1, r4
14023
+	ldr	r0, .L2176+20
14024
+	bl	printk
14025
+.L2166:
14026
+	ldr	fp, .L2176+32
14027
+	mov	r8, #0
14028
+.L2167:
14029
+	cmp	r8, r7
14030
+	bne	.L2168
14031
+	adds	r4, r4, #1
14032
+	add	r10, r10, #1024
14033
+	b	.L2161
14034
+.L2164:
14035
+	ldrh	r7, [r5, #2390]
14036
+	mov	r9, #0
14037
+	b	.L2165
14038
+.L2168:
14039
+	add	r3, r9, r10
14040
+	movs	r2, #0
14041
+	add	r3, r3, r8
14042
+	movs	r1, #1
14043
+	str	r3, [r6, #1260]
14044
+	add	r8, r8, #1
14045
+	ldr	r3, [fp, #3316]
14046
+	ldr	r0, .L2176+24
14047
+	str	r2, [r6, #1256]
14048
+	str	r3, [r6, #1264]
14049
+	ldr	r3, [fp, #3340]
14050
+	str	r3, [r6, #1268]
14051
+	bl	FlashReadPages
14052
+	ldr	r2, [r6, #1264]
14053
+	ldr	r3, [r6, #1268]
14054
+	ldr	r0, .L2176+28
14055
+	ldr	r1, [r2, #4]
14056
+	str	r1, [sp, #16]
14057
+	ldr	r2, [r2]
14058
+	ldr	r1, [r6, #1260]
14059
+	str	r2, [sp, #12]
14060
+	ldr	r2, [r3, #12]
14061
+	str	r2, [sp, #8]
14062
+	ldr	r2, [r3, #8]
14063
+	str	r2, [sp, #4]
14064
+	ldr	r2, [r3, #4]
14065
+	str	r2, [sp]
14066
+	ldr	r2, [r6, #1256]
14067
+	ldr	r3, [r3]
14068
+	bl	printk
14069
+	b	.L2167
14070
+.L2177:
13775
14071
 	.align	2
13776
-.L2237:
14072
+.L2176:
13777
14073
 	.word	.LANCHOR0
13778
14074
 	.word	.LANCHOR4
14075
+	.word	.LANCHOR3+174
14076
+	.word	.LC120
13779
14077
 	.word	.LC117
13780
14078
 	.word	.LC118
13781
-	.word	.LANCHOR4+1248
14079
+	.word	.LANCHOR4+1256
13782
14080
 	.word	.LC119
13783
-	.word	.LC120
13784
-	.word	.LANCHOR3+184
13785
14081
 	.word	.LANCHOR2
13786
14082
 	.fnend
13787
14083
 	.size	ftl_scan_all_ppa, .-ftl_scan_all_ppa
13788
14084
 	.align	1
13789
14085
 	.global	FlashProgPages
14086
+	.syntax unified
13790
14087
 	.thumb
13791
14088
 	.thumb_func
14089
+	.fpu softvfp
13792
14090
 	.type	FlashProgPages, %function
13793
14091
 FlashProgPages:
13794
14092
 	.fnstart
..
..
@@ -13798,288 +14096,288 @@
13798
14096
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
13799
14097
 	.pad #76
13800
14098
 	sub	sp, sp, #76
13801
-	ldr	r6, .L2293
14099
+	ldr	r5, .L2230
13802
14100
 	mov	r4, r0
13803
-	str	r1, [sp, #8]
13804
14101
 	mov	r9, r2
14102
+	str	r1, [sp, #8]
14103
+	ldr	r6, [r5, #48]
14104
+	ldrb	r7, [r5, #36]	@ zero_extendqisi2
13805
14105
 	str	r3, [sp, #20]
13806
-	ldr	r5, [r6, #44]
13807
-	ldrb	r7, [r6]	@ zero_extendqisi2
13808
-	ldrb	r5, [r5, #19]	@ zero_extendqisi2
13809
-	str	r5, [sp, #16]
13810
-	ldr	r5, .L2293+4
13811
-	ldrb	r5, [r5, #481]	@ zero_extendqisi2
13812
-	str	r5, [sp, #12]
13813
-	cbz	r7, .L2240
14106
+	ldrb	r6, [r6, #19]	@ zero_extendqisi2
14107
+	str	r6, [sp, #16]
14108
+	cbnz	r7, .L2179
14109
+	ldr	r3, .L2230+4
14110
+	ldrb	r3, [r3, #477]	@ zero_extendqisi2
14111
+	str	r3, [sp, #12]
14112
+.L2180:
14113
+	ldr	r3, [sp, #8]
14114
+	cmp	r7, r3
14115
+	bcc	.L2193
14116
+	ldr	r7, .L2230+8
14117
+	movs	r6, #0
14118
+.L2194:
14119
+	ldrb	r3, [r5, #2234]	@ zero_extendqisi2
14120
+	cmp	r6, r3
14121
+	bcc	.L2196
14122
+	ldr	r3, [sp, #20]
14123
+	cmp	r3, #0
14124
+	bne	.L2197
14125
+.L2205:
14126
+	movs	r0, #0
14127
+	b	.L2178
14128
+.L2179:
13814
14129
 	bl	FlashProgSlc2KPages
13815
-	b	.L2241
13816
-.L2253:
14130
+.L2178:
14131
+	add	sp, sp, #76
14132
+	@ sp needed
14133
+	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
14134
+.L2193:
13817
14135
 	movs	r3, #36
13818
-	mov	r1, r9
13819
14136
 	add	r2, sp, #28
13820
14137
 	mul	r8, r3, r7
13821
14138
 	ldr	r3, [sp, #8]
14139
+	mov	r1, r9
13822
14140
 	subs	r3, r3, r7
13823
-	add	fp, r4, r8
13824
14141
 	uxtb	r3, r3
13825
-	str	r3, [sp]
14142
+	add	fp, r4, r8
13826
14143
 	mov	r0, fp
14144
+	str	r3, [sp]
13827
14145
 	add	r3, sp, #32
13828
14146
 	bl	LogAddr2PhyAddr
13829
-	ldrb	r3, [r6, #2230]	@ zero_extendqisi2
14147
+	ldrb	r3, [r5, #2234]	@ zero_extendqisi2
13830
14148
 	mov	r10, r0
13831
14149
 	ldr	r0, [sp, #32]
13832
-	cmp	r0, r3
13833
-	bcc	.L2242
14150
+	cmp	r3, r0
14151
+	bhi	.L2182
13834
14152
 	mov	r3, #-1
13835
14153
 	str	r3, [r4, r8]
13836
-.L2243:
14154
+.L2183:
13837
14155
 	adds	r7, r7, #1
13838
-.L2240:
13839
-	ldr	r3, [sp, #8]
13840
-	ldr	r8, .L2293
13841
-	cmp	r7, r3
13842
-	bcc	.L2253
13843
-	b	.L2291
13844
-.L2242:
13845
-	ldrb	r3, [r6, #2240]	@ zero_extendqisi2
14156
+	b	.L2180
14157
+.L2182:
14158
+	ldrb	r3, [r5, #2244]	@ zero_extendqisi2
13846
14159
 	cmp	r3, #0
13847
-	add	r3, r6, r0, lsl #4
14160
+	add	r3, r5, r0, lsl #4
13848
14161
 	it	eq
13849
14162
 	moveq	r10, #0
13850
-	ldr	r3, [r3, #2108]
13851
-	cbz	r3, .L2245
14163
+	ldr	r3, [r3, #2112]
14164
+	cbz	r3, .L2185
13852
14165
 	uxtb	r0, r0
13853
14166
 	bl	FlashWaitCmdDone
13854
-.L2245:
14167
+.L2185:
13855
14168
 	ldr	r3, [sp, #32]
13856
-	movs	r0, #0
13857
-	add	r2, r6, r3, lsl #4
13858
-	addw	r1, r2, #2108
13859
-	str	r0, [r2, #2112]
13860
-	ldr	r0, [sp, #28]
13861
-	str	fp, [r2, #2108]
13862
-	str	r0, [r2, #2104]
13863
-	cmp	r10, #0
13864
-	beq	.L2246
13865
-	add	r2, r8, #36
13866
-	add	r2, r2, r4
13867
-	str	r2, [r1, #4]
13868
-.L2246:
13869
-	adds	r2, r6, r3
13870
-	add	r3, r6, r3, lsl #4
13871
-	ldrb	r5, [r2, #2232]	@ zero_extendqisi2
13872
-	strb	r5, [r3, #2100]
13873
-	mov	r0, r5
13874
-	ldrb	r3, [r6, #2230]	@ zero_extendqisi2
13875
-	cmp	r3, #1
13876
-	bne	.L2247
13877
-	bl	NandcWaitFlashReady
13878
-	b	.L2248
13879
-.L2247:
13880
-	bl	NandcFlashCs
13881
-	mov	r0, r5
13882
-	ldr	r3, [sp, #32]
14169
+	movs	r1, #0
14170
+	add	r2, r5, r3, lsl #4
14171
+	str	r1, [r2, #2116]
13883
14172
 	ldr	r1, [sp, #28]
13884
-	add	r3, r6, r3, lsl #2
13885
-	ldr	r2, [r3, #1172]
13886
-	adds	r2, r2, #0
13887
-	it	ne
13888
-	movne	r2, #1
13889
-	bl	FlashWaitReadyEN
13890
-	mov	r0, r5
13891
-	bl	NandcFlashDeCs
13892
-.L2248:
14173
+	str	fp, [r2, #2112]
14174
+	str	r1, [r2, #2108]
14175
+	cmp	r10, #0
14176
+	beq	.L2186
14177
+	add	r1, r8, #36
14178
+	add	r1, r1, r4
14179
+	str	r1, [r2, #2116]
14180
+.L2186:
14181
+	adds	r2, r5, r3
14182
+	add	r3, r5, r3, lsl #4
14183
+	ldrb	r6, [r2, #2236]	@ zero_extendqisi2
14184
+	strb	r6, [r3, #2104]
14185
+	mov	r0, r6
14186
+	ldrb	r3, [r5, #2234]	@ zero_extendqisi2
14187
+	cmp	r3, #1
14188
+	bne	.L2187
14189
+	bl	NandcWaitFlashReady
14190
+.L2188:
13893
14191
 	ldr	r3, [sp, #16]
13894
14192
 	subs	r3, r3, #1
13895
14193
 	cmp	r3, #7
13896
-	bhi	.L2249
13897
-	adds	r3, r6, r5
13898
-	ldrb	r3, [r3, #2064]	@ zero_extendqisi2
13899
-	cbz	r3, .L2249
13900
-	mov	r0, r5
13901
-	ldrb	r1, [r6, #1211]	@ zero_extendqisi2
13902
-	ldr	r2, .L2293+8
14194
+	bhi	.L2189
14195
+	adds	r3, r5, r6
14196
+	ldrb	r3, [r3, #2068]	@ zero_extendqisi2
14197
+	cbz	r3, .L2189
13903
14198
 	movs	r3, #0
14199
+	ldr	r2, .L2230+12
14200
+	ldrb	r1, [r5, #1217]	@ zero_extendqisi2
14201
+	mov	r0, r6
13904
14202
 	bl	HynixSetRRPara
13905
-.L2249:
13906
-	mov	r0, r5
14203
+.L2189:
14204
+	mov	r0, r6
13907
14205
 	bl	NandcFlashCs
13908
14206
 	cmp	r9, #1
13909
-	mov	r0, r5
13910
-	bne	.L2250
13911
-	ldrb	r3, [r6, #144]	@ zero_extendqisi2
13912
-	cbz	r3, .L2250
14207
+	mov	r0, r6
14208
+	bne	.L2190
14209
+	ldrb	r3, [r5, #152]	@ zero_extendqisi2
14210
+	cmp	r3, #0
14211
+	beq	.L2190
13913
14212
 	bl	flash_enter_slc_mode
13914
-	b	.L2251
13915
-.L2250:
13916
-	bl	flash_exit_slc_mode
13917
-.L2251:
13918
-	mov	r0, r5
14213
+.L2191:
13919
14214
 	ldr	r1, [sp, #28]
14215
+	mov	r0, r6
13920
14216
 	bl	FlashProgFirstCmd
13921
14217
 	ldr	r3, [fp, #12]
13922
-	mov	r0, r5
13923
14218
 	movs	r1, #1
13924
-	str	r3, [sp]
13925
14219
 	ldr	r2, [sp, #12]
14220
+	mov	r0, r6
14221
+	str	r3, [sp]
13926
14222
 	ldr	r3, [fp, #8]
13927
14223
 	bl	NandcXferData
13928
14224
 	cmp	r10, #0
13929
-	beq	.L2252
13930
-	mov	r0, r5
14225
+	beq	.L2192
13931
14226
 	ldr	r1, [sp, #28]
14227
+	mov	r0, r6
13932
14228
 	bl	FlashProgDpFirstCmd
13933
-	mov	r0, r5
14229
+	ldr	r3, [sp, #32]
14230
+	mov	r0, r6
14231
+	ldr	r1, [sp, #28]
13934
14232
 	add	r8, r8, #36
13935
14233
 	add	r8, r8, r4
13936
-	ldr	r3, [sp, #32]
13937
-	ldr	r1, [sp, #28]
13938
-	add	r3, r6, r3, lsl #2
13939
-	ldr	r2, [r3, #1172]
14234
+	add	r3, r5, r3, lsl #2
14235
+	ldr	r2, [r3, #1180]
13940
14236
 	adds	r2, r2, #0
13941
14237
 	it	ne
13942
14238
 	movne	r2, #1
13943
14239
 	bl	FlashWaitReadyEN
13944
-	ldr	r1, [r6, #4]
13945
-	mov	r0, r5
13946
-	ldr	r3, [sp, #28]
14240
+	ldr	r3, [r5, #40]
14241
+	mov	r0, r6
14242
+	ldr	r1, [sp, #28]
13947
14243
 	add	r1, r1, r3
13948
14244
 	bl	FlashProgDpSecondCmd
13949
14245
 	ldr	r3, [r8, #12]
13950
-	mov	r0, r5
13951
14246
 	movs	r1, #1
13952
-	str	r3, [sp]
13953
14247
 	ldr	r2, [sp, #12]
14248
+	mov	r0, r6
14249
+	str	r3, [sp]
13954
14250
 	ldr	r3, [r8, #8]
13955
14251
 	bl	NandcXferData
13956
-.L2252:
13957
-	mov	r0, r5
14252
+.L2192:
13958
14253
 	ldr	r1, [sp, #28]
14254
+	mov	r0, r6
13959
14255
 	bl	FlashProgSecondCmd
13960
-	mov	r0, r5
13961
-	bl	NandcFlashDeCs
14256
+	mov	r0, r6
13962
14257
 	add	r7, r7, r10
13963
-	b	.L2243
13964
-.L2291:
13965
-	movs	r5, #0
13966
-	addw	r7, r8, #2100
13967
-	mov	r6, r8
13968
-.L2254:
13969
-	ldrb	r3, [r8, #2230]	@ zero_extendqisi2
13970
-	cmp	r5, r3
13971
-	bcs	.L2292
13972
-	uxtb	r0, r5
14258
+	bl	NandcFlashDeCs
14259
+	b	.L2183
14260
+.L2187:
14261
+	bl	NandcFlashCs
14262
+	ldr	r3, [sp, #32]
14263
+	mov	r0, r6
14264
+	ldr	r1, [sp, #28]
14265
+	add	r3, r5, r3, lsl #2
14266
+	ldr	r2, [r3, #1180]
14267
+	adds	r2, r2, #0
14268
+	it	ne
14269
+	movne	r2, #1
14270
+	bl	FlashWaitReadyEN
14271
+	mov	r0, r6
14272
+	bl	NandcFlashDeCs
14273
+	b	.L2188
14274
+.L2190:
14275
+	bl	flash_exit_slc_mode
14276
+	b	.L2191
14277
+.L2196:
14278
+	uxtb	r0, r6
13973
14279
 	bl	FlashWaitCmdDone
13974
14280
 	cmp	r9, #1
13975
-	bne	.L2255
13976
-	ldrb	r3, [r6, #144]	@ zero_extendqisi2
13977
-	cbz	r3, .L2255
13978
-	lsls	r3, r5, #4
14281
+	bne	.L2195
14282
+	ldrb	r3, [r5, #152]	@ zero_extendqisi2
14283
+	cbz	r3, .L2195
14284
+	lsls	r3, r6, #4
13979
14285
 	ldrb	r0, [r7, r3]	@ zero_extendqisi2
13980
14286
 	bl	flash_exit_slc_mode
13981
-.L2255:
13982
-	adds	r5, r5, #1
13983
-	b	.L2254
13984
-.L2292:
13985
-	ldr	r3, [sp, #20]
13986
-	cbnz	r3, .L2257
13987
-.L2265:
13988
-	movs	r0, #0
13989
-	b	.L2241
13990
-.L2257:
13991
-	ldr	r7, .L2293+12
14287
+.L2195:
14288
+	adds	r6, r6, #1
14289
+	b	.L2194
14290
+.L2197:
14291
+	ldr	r7, .L2230+16
13992
14292
 	mov	r8, #0
13993
-	mov	r10, r7
13994
-.L2258:
14293
+	ldr	r10, .L2230+32
14294
+.L2198:
13995
14295
 	ldr	r3, [sp, #8]
13996
14296
 	cmp	r8, r3
13997
-	beq	.L2265
14297
+	beq	.L2205
13998
14298
 	ldr	r3, [r4]
13999
14299
 	adds	r3, r3, #1
14000
-	bne	.L2259
14300
+	bne	.L2199
14001
14301
 	ldr	r1, [r4, #4]
14002
-	ldr	r0, .L2293+16
14302
+	ldr	r0, .L2230+20
14003
14303
 	bl	printk
14004
-	b	.L2260
14005
-.L2259:
14304
+.L2200:
14305
+	add	r8, r8, #1
14306
+	adds	r4, r4, #36
14307
+	b	.L2198
14308
+.L2199:
14006
14309
 	ldr	r3, [sp, #8]
14007
-	mov	r1, r9
14008
14310
 	add	r2, sp, #28
14311
+	mov	r1, r9
14009
14312
 	mov	r0, r4
14010
-	rsb	r3, r8, r3
14011
14313
 	mov	r6, r4
14314
+	sub	r3, r3, r8
14012
14315
 	uxtb	r3, r3
14013
14316
 	str	r3, [sp]
14014
14317
 	add	r3, sp, #32
14015
14318
 	bl	LogAddr2PhyAddr
14016
-	ldr	r2, [r7, #1220]
14319
+	ldr	r2, [r7, #1228]
14017
14320
 	movs	r3, #0
14018
-	str	r3, [r2]
14019
-	ldr	r2, [r7, #1224]
14020
-	str	r3, [r2]
14021
-	ldmia	r6!, {r0, r1, r2, r3}
14022
14321
 	add	r5, sp, #36
14322
+	str	r3, [r2]
14323
+	ldr	r2, [r7, #1232]
14324
+	str	r3, [r2]
14325
+	ldmia	r6!, {r0, r1, r2, r3}
14023
14326
 	stmia	r5!, {r0, r1, r2, r3}
14024
14327
 	ldmia	r6!, {r0, r1, r2, r3}
14025
14328
 	stmia	r5!, {r0, r1, r2, r3}
14026
-	add	r0, sp, #36
14329
+	mov	r2, r9
14027
14330
 	ldr	r3, [r6]
14028
14331
 	movs	r1, #1
14029
-	mov	r2, r9
14332
+	add	r0, sp, #36
14030
14333
 	str	r3, [r5]
14031
-	ldr	r3, [r7, #1220]
14334
+	ldr	r3, [r7, #1228]
14032
14335
 	str	r3, [sp, #44]
14033
-	ldr	r3, [r7, #1224]
14336
+	ldr	r3, [r7, #1232]
14034
14337
 	str	r3, [sp, #48]
14035
14338
 	bl	FlashReadPages
14036
14339
 	ldr	r5, [sp, #36]
14037
14340
 	adds	r3, r5, #1
14038
-	bne	.L2261
14039
-	ldr	r0, .L2293+20
14341
+	bne	.L2201
14040
14342
 	ldr	r1, [r4, #4]
14343
+	ldr	r0, .L2230+24
14041
14344
 	bl	printk
14042
14345
 	str	r5, [r4]
14043
-.L2261:
14346
+.L2201:
14044
14347
 	ldr	r3, [r4, #12]
14045
-	cbz	r3, .L2262
14348
+	cbz	r3, .L2202
14046
14349
 	ldr	r2, [r3]
14047
-	ldr	r3, [r10, #1224]
14350
+	ldr	r3, [r7, #1232]
14048
14351
 	ldr	r3, [r3]
14049
14352
 	cmp	r2, r3
14050
-	beq	.L2262
14051
-	ldr	r0, .L2293+24
14353
+	beq	.L2202
14052
14354
 	ldr	r1, [r4, #4]
14355
+	ldr	r0, .L2230+28
14053
14356
 	bl	printk
14054
14357
 	mov	r3, #-1
14055
14358
 	str	r3, [r4]
14056
-.L2262:
14359
+.L2202:
14057
14360
 	ldr	r3, [r4, #8]
14058
-	cbz	r3, .L2260
14361
+	cmp	r3, #0
14362
+	beq	.L2200
14059
14363
 	ldr	r2, [r3]
14060
-	ldr	r3, [r10, #1220]
14364
+	ldr	r3, [r7, #1228]
14061
14365
 	ldr	r3, [r3]
14062
14366
 	cmp	r2, r3
14063
-	beq	.L2260
14064
-	ldr	r0, .L2293+28
14367
+	beq	.L2200
14065
14368
 	ldr	r1, [r4, #4]
14369
+	mov	r0, r10
14066
14370
 	bl	printk
14067
14371
 	mov	r3, #-1
14068
14372
 	str	r3, [r4]
14069
-.L2260:
14070
-	add	r8, r8, #1
14071
-	adds	r4, r4, #36
14072
-	b	.L2258
14073
-.L2241:
14074
-	add	sp, sp, #76
14075
-	@ sp needed
14076
-	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
14077
-.L2294:
14373
+	b	.L2200
14374
+.L2231:
14078
14375
 	.align	2
14079
-.L2293:
14376
+.L2230:
14080
14377
 	.word	.LANCHOR0
14081
14378
 	.word	.LANCHOR1
14082
-	.word	.LANCHOR0+1214
14379
+	.word	.LANCHOR0+2104
14380
+	.word	.LANCHOR0+1220
14083
14381
 	.word	.LANCHOR4
14084
14382
 	.word	.LC104
14085
14383
 	.word	.LC105
..
..
@@ -14089,8 +14387,10 @@
14089
14387
 	.size	FlashProgPages, .-FlashProgPages
14090
14388
 	.align	1
14091
14389
 	.global	FlashTestBlk
14390
+	.syntax unified
14092
14391
 	.thumb
14093
14392
 	.thumb_func
14393
+	.fpu softvfp
14094
14394
 	.type	FlashTestBlk, %function
14095
14395
 FlashTestBlk:
14096
14396
 	.fnstart
..
..
@@ -14099,61 +14399,63 @@
14099
14399
 	push	{r4, r5, lr}
14100
14400
 	.save {r4, r5, lr}
14101
14401
 	mov	r4, r0
14102
-	ldr	r5, .L2298
14402
+	ldr	r5, .L2235
14103
14403
 	.pad #108
14104
14404
 	sub	sp, sp, #108
14105
-	ldr	r3, [r5, #1204]
14106
-	cmp	r0, r3
14107
-	bcc	.L2297
14108
14405
 	ldr	r3, [r5, #1212]
14406
+	cmp	r0, r3
14407
+	bcc	.L2234
14408
+	ldr	r3, [r5, #1220]
14109
14409
 	add	r0, sp, #40
14110
-	movs	r1, #165
14111
14410
 	movs	r2, #32
14411
+	movs	r1, #165
14112
14412
 	str	r0, [sp, #16]
14113
14413
 	lsls	r4, r4, #10
14114
14414
 	str	r3, [sp, #12]
14115
14415
 	bl	ftl_memset
14116
-	ldr	r0, [r5, #1212]
14117
-	movs	r1, #90
14118
14416
 	movs	r2, #8
14417
+	movs	r1, #90
14418
+	ldr	r0, [r5, #1220]
14119
14419
 	bl	ftl_memset
14120
-	movs	r1, #1
14121
-	mov	r2, r1
14420
+	movs	r2, #1
14122
14421
 	add	r0, sp, #4
14422
+	mov	r1, r2
14123
14423
 	str	r4, [sp, #8]
14124
14424
 	bl	FlashEraseBlocks
14125
-	movs	r1, #1
14126
-	mov	r2, r1
14127
-	mov	r3, r1
14425
+	movs	r3, #1
14128
14426
 	add	r0, sp, #4
14427
+	mov	r2, r3
14428
+	mov	r1, r3
14129
14429
 	bl	FlashProgPages
14130
-	movs	r1, #0
14131
-	movs	r2, #1
14132
14430
 	ldr	r4, [sp, #4]
14431
+	movs	r2, #1
14432
+	movs	r1, #0
14133
14433
 	add	r0, sp, #4
14134
14434
 	adds	r4, r4, #0
14135
14435
 	it	ne
14136
14436
 	movne	r4, #1
14137
14437
 	negs	r4, r4
14138
14438
 	bl	FlashEraseBlocks
14139
-	b	.L2296
14140
-.L2297:
14141
-	movs	r4, #0
14142
-.L2296:
14439
+.L2232:
14143
14440
 	mov	r0, r4
14144
14441
 	add	sp, sp, #108
14145
14442
 	@ sp needed
14146
14443
 	pop	{r4, r5, pc}
14147
-.L2299:
14444
+.L2234:
14445
+	movs	r4, #0
14446
+	b	.L2232
14447
+.L2236:
14148
14448
 	.align	2
14149
-.L2298:
14449
+.L2235:
14150
14450
 	.word	.LANCHOR4
14151
14451
 	.fnend
14152
14452
 	.size	FlashTestBlk, .-FlashTestBlk
14153
14453
 	.align	1
14154
14454
 	.global	FlashMakeFactorBbt
14455
+	.syntax unified
14155
14456
 	.thumb
14156
14457
 	.thumb_func
14458
+	.fpu softvfp
14157
14459
 	.type	FlashMakeFactorBbt, %function
14158
14460
 FlashMakeFactorBbt:
14159
14461
 	.fnstart
..
..
@@ -14163,757 +14465,747 @@
14163
14465
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
14164
14466
 	.pad #84
14165
14467
 	sub	sp, sp, #84
14166
-	ldr	r5, .L2361
14167
-	movs	r1, #1
14168
-	ldr	r4, .L2361+4
14169
-	ldr	r0, .L2361+8
14170
-	ldr	r3, [r5, #1216]
14171
-	ldrh	r8, [r4, #128]
14172
-	str	r3, [sp, #20]
14173
-	ldrh	r3, [r4, #130]
14174
-	smulbb	r8, r8, r3
14175
-	ldr	r3, [r4, #44]
14176
-	ldrb	r3, [r3, #24]	@ zero_extendqisi2
14177
-	uxth	r8, r8
14468
+	ldr	r4, .L2293
14469
+	ldr	r0, .L2293+4
14470
+	ldr	r3, [r4, #1224]
14471
+	ldr	r5, .L2293
14178
14472
 	str	r3, [sp, #24]
14179
-	ldrh	r3, [r4, #4]
14180
-	str	r3, [sp, #16]
14181
-	ldrb	r3, [r4]	@ zero_extendqisi2
14182
-	ldr	r4, .L2361+4
14473
+	ldr	r3, .L2293+8
14474
+	ldrh	r1, [r3, #136]
14475
+	ldrh	r6, [r3, #138]
14476
+	smulbb	r6, r6, r1
14477
+	ldr	r1, [r3, #48]
14478
+	ldrb	r2, [r1, #24]	@ zero_extendqisi2
14479
+	uxth	r6, r6
14480
+	movs	r1, #1
14481
+	str	r2, [sp, #28]
14482
+	ldrh	r2, [r3, #40]
14483
+	ldrb	r3, [r3, #36]	@ zero_extendqisi2
14484
+	str	r2, [sp, #20]
14183
14485
 	cmp	r3, #1
14184
14486
 	itttt	eq
14185
-	ldreq	r3, [sp, #16]
14487
+	moveq	r3, r2
14186
14488
 	lsleq	r3, r3, #1
14187
14489
 	uxtheq	r3, r3
14188
-	streq	r3, [sp, #16]
14490
+	streq	r3, [sp, #20]
14189
14491
 	bl	printk
14190
-	ldr	r0, [r5, #1216]
14191
-	movs	r1, #0
14492
+	ldr	r0, [r4, #1224]
14192
14493
 	mov	r2, #4096
14494
+	movs	r1, #0
14495
+	ldr	r4, .L2293+8
14193
14496
 	bl	ftl_memset
14194
-	ldr	r5, .L2361
14195
-	lsr	r3, r8, #4
14196
-	str	r3, [sp, #28]
14497
+	lsrs	r3, r6, #4
14498
+	str	r3, [sp, #32]
14197
14499
 	movs	r3, #0
14198
-	str	r3, [sp, #8]
14199
-.L2302:
14200
-	ldrb	r7, [sp, #8]	@ zero_extendqisi2
14201
-	ldrb	r3, [r4, #2230]	@ zero_extendqisi2
14202
-	cmp	r3, r7
14203
-	bls	.L2357
14204
-	add	r3, r5, r7, lsl #1
14205
-	ldrh	r6, [r3, #1232]
14206
-	cmp	r6, #0
14207
-	bne	.L2332
14208
-	ldrh	r2, [r4, #136]
14209
-	mov	r1, r6
14210
-	ldr	r0, [r5, #1184]
14211
-	mov	r9, r6
14500
+	str	r3, [sp, #12]
14501
+.L2239:
14502
+	ldrb	r8, [sp, #12]	@ zero_extendqisi2
14503
+	ldrb	r3, [r4, #2234]	@ zero_extendqisi2
14504
+	cmp	r3, r8
14505
+	bhi	.L2266
14506
+	add	sp, sp, #84
14507
+	@ sp needed
14508
+	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
14509
+.L2266:
14510
+	add	r3, r5, r8, lsl #1
14511
+	ldrh	r7, [r3, #1238]
14512
+	cmp	r7, #0
14513
+	bne	.L2240
14514
+	ldrh	r2, [r4, #144]
14515
+	mov	r1, r7
14516
+	ldr	r0, [r5, #1192]
14517
+	add	fp, r4, r8, lsl #2
14518
+	mov	r9, r7
14519
+	mov	r10, r7
14212
14520
 	lsls	r2, r2, #9
14213
14521
 	bl	ftl_memset
14214
-	adds	r3, r4, r7
14215
-	ldrb	r10, [r3, #2232]	@ zero_extendqisi2
14216
-	lsls	r3, r7, #2
14217
-	add	fp, r4, r3
14218
-	str	r6, [sp, #4]
14219
-	str	r3, [sp, #32]
14220
-.L2304:
14522
+	add	r3, r4, r8
14523
+	str	r7, [sp, #4]
14524
+	ldrb	r3, [r3, #2236]	@ zero_extendqisi2
14525
+	str	r3, [sp, #8]
14526
+.L2241:
14221
14527
 	ldrh	r3, [sp, #4]
14222
-	cmp	r3, r8
14223
-	str	r3, [sp, #12]
14224
-	bcs	.L2314
14528
+	cmp	r3, r6
14529
+	str	r3, [sp, #16]
14530
+	bcc	.L2252
14531
+.L2251:
14532
+	mov	r2, r9
14533
+	mov	r1, r8
14534
+	ldr	r0, .L2293+12
14535
+	bl	printk
14536
+	ldrb	r3, [r4, #2234]	@ zero_extendqisi2
14537
+	ldr	r2, [sp, #32]
14538
+	muls	r3, r2, r3
14539
+	cmp	r9, r3
14540
+	blt	.L2253
14541
+	ldrh	r2, [r4, #144]
14542
+	movs	r1, #0
14543
+	ldr	r0, [r5, #1192]
14544
+	lsls	r2, r2, #9
14545
+	bl	ftl_memset
14546
+.L2253:
14547
+	cmp	r8, #0
14548
+	bne	.L2255
14549
+	ldrh	fp, [r5, #1212]
14550
+	mov	r10, #1
14551
+	ldr	r9, .L2293+20
14552
+.L2256:
14553
+	ldrb	r3, [r4, #37]	@ zero_extendqisi2
14554
+	cmp	r3, fp
14555
+	bhi	.L2258
14556
+	subs	r3, r6, #1
14557
+	sub	r9, r6, #50
14558
+	uxth	r10, r3
14559
+	mov	fp, #1
14560
+.L2259:
14561
+	cmp	r10, r9
14562
+	bgt	.L2261
14563
+	ldrb	r3, [r4, #37]	@ zero_extendqisi2
14564
+	ldr	r2, [r5, #1212]
14565
+	subs	r3, r3, r2
14566
+	cmp	r7, r3
14567
+	bcc	.L2255
14568
+	ldrh	r2, [r4, #144]
14569
+	movs	r1, #0
14570
+	ldr	r0, [r5, #1192]
14571
+	lsls	r2, r2, #9
14572
+	bl	ftl_memset
14573
+.L2255:
14574
+	ldrb	r9, [sp, #12]	@ zero_extendqisi2
14575
+	subs	r7, r6, #1
14576
+	ldr	fp, .L2293+24
14577
+	uxth	r7, r7
14578
+	add	r10, r5, r8, lsl #1
14579
+	mul	r9, r6, r9
14580
+.L2263:
14581
+	mov	r1, r8
14582
+	mov	r2, r7
14583
+	mov	r0, fp
14584
+	bl	printk
14585
+	ldr	r1, [r5, #1192]
14586
+.L2264:
14587
+	lsrs	r2, r7, #5
14588
+	and	r3, r7, #31
14589
+	ldr	r2, [r1, r2, lsl #2]
14590
+	lsr	r3, r2, r3
14591
+	ands	r3, r3, #1
14592
+	bne	.L2265
14593
+	ldr	r1, [sp, #24]
14594
+	movw	r2, #61664
14595
+	strh	r7, [r10, #1238]	@ movhi
14596
+	add	r0, sp, #44
14597
+	strh	r2, [r1]	@ movhi
14598
+	movs	r2, #1
14599
+	strh	r7, [r1, #2]	@ movhi
14600
+	strh	r3, [r1, #8]	@ movhi
14601
+	mov	r1, r2
14602
+	ldr	r3, [r5, #1192]
14603
+	str	r3, [sp, #52]
14604
+	ldr	r3, [r5, #1224]
14605
+	str	r3, [sp, #56]
14606
+	add	r3, r7, r9
14607
+	lsls	r3, r3, #10
14608
+	str	r3, [sp, #48]
14609
+	bl	FlashEraseBlocks
14610
+	movs	r3, #1
14611
+	add	r0, sp, #44
14612
+	mov	r2, r3
14613
+	mov	r1, r3
14614
+	bl	FlashProgPages
14615
+	ldr	r3, [sp, #44]
14616
+	cmp	r3, #0
14617
+	beq	.L2240
14618
+	subs	r7, r7, #1
14619
+	uxth	r7, r7
14620
+	b	.L2263
14621
+.L2252:
14225
14622
 	movs	r3, #255
14226
14623
 	strb	r3, [sp, #42]
14227
14624
 	strb	r3, [sp, #43]
14228
-	ldr	r3, [sp, #24]
14625
+	ldr	r3, [sp, #28]
14229
14626
 	lsls	r1, r3, #31
14230
-	bpl	.L2306
14231
-	ldr	r3, [fp, #1172]
14627
+	bpl	.L2243
14628
+	ldr	r3, [fp, #1180]
14232
14629
 	add	r2, sp, #42
14233
-	mov	r0, r10
14234
-	add	r3, r3, r6
14235
-	str	r3, [sp, #36]
14630
+	ldr	r0, [sp, #8]
14631
+	add	r3, r3, r10
14236
14632
 	mov	r1, r3
14633
+	str	r3, [sp, #36]
14237
14634
 	bl	FlashReadSpare
14238
-	ldrb	r2, [r4]	@ zero_extendqisi2
14239
-	cmp	r2, #1
14635
+	ldrb	r2, [r4, #36]	@ zero_extendqisi2
14240
14636
 	ldr	r3, [sp, #36]
14241
-	bne	.L2306
14242
-	ldr	r1, [r4, #4]
14637
+	cmp	r2, #1
14638
+	bne	.L2243
14639
+	ldr	r1, [r4, #40]
14243
14640
 	add	r2, sp, #43
14244
-	mov	r0, r10
14641
+	ldr	r0, [sp, #8]
14245
14642
 	add	r1, r1, r3
14246
14643
 	bl	FlashReadSpare
14247
14644
 	ldrb	r3, [sp, #42]	@ zero_extendqisi2
14248
14645
 	ldrb	r2, [sp, #43]	@ zero_extendqisi2
14249
14646
 	ands	r3, r3, r2
14250
14647
 	strb	r3, [sp, #42]
14251
-.L2306:
14252
-	ldr	r3, [sp, #24]
14648
+.L2243:
14649
+	ldr	r3, [sp, #28]
14253
14650
 	lsls	r2, r3, #30
14254
-	bpl	.L2308
14255
-	ldr	r3, [r4, #44]
14256
-	mov	r0, r10
14651
+	bpl	.L2245
14652
+	ldr	r3, [r4, #48]
14257
14653
 	add	r2, sp, #43
14654
+	ldr	r0, [sp, #8]
14258
14655
 	ldrh	r1, [r3, #10]
14259
-	ldr	r3, [fp, #1172]
14656
+	ldr	r3, [fp, #1180]
14260
14657
 	subs	r1, r1, #1
14261
14658
 	add	r1, r1, r3
14262
-	add	r1, r1, r6
14659
+	add	r1, r1, r10
14263
14660
 	bl	FlashReadSpare
14264
-.L2308:
14265
-	ldr	r3, [r4, #44]
14661
+.L2245:
14662
+	ldr	r3, [r4, #48]
14266
14663
 	ldrb	r2, [r3, #7]	@ zero_extendqisi2
14267
14664
 	cmp	r2, #1
14268
-	beq	.L2309
14665
+	beq	.L2246
14269
14666
 	cmp	r2, #8
14270
-	beq	.L2309
14667
+	beq	.L2246
14271
14668
 	ldrb	r3, [r3, #18]	@ zero_extendqisi2
14272
14669
 	cmp	r3, #12
14273
-	bne	.L2310
14274
-.L2309:
14670
+	bne	.L2247
14671
+.L2246:
14275
14672
 	ldrb	r3, [sp, #42]	@ zero_extendqisi2
14276
-	cbz	r3, .L2331
14673
+	cmp	r3, #0
14674
+	beq	.L2268
14277
14675
 	ldrb	r0, [sp, #43]	@ zero_extendqisi2
14278
14676
 	clz	r0, r0
14279
14677
 	lsrs	r0, r0, #5
14280
-	b	.L2311
14281
-.L2310:
14678
+.L2248:
14679
+	ldr	r3, [sp, #28]
14680
+	lsls	r3, r3, #29
14681
+	bpl	.L2249
14682
+	ldr	r1, [fp, #1180]
14683
+	ldr	r0, [sp, #8]
14684
+	add	r1, r1, r10
14685
+	bl	SandiskProgTestBadBlock
14686
+.L2249:
14687
+	cbz	r0, .L2250
14688
+	ldr	r2, [sp, #4]
14689
+	mov	r1, r8
14690
+	ldr	r0, .L2293+16
14691
+	add	r9, r9, #1
14692
+	bl	printk
14693
+	ldr	r3, [sp, #16]
14694
+	uxth	r9, r9
14695
+	ldr	r1, [r5, #1192]
14696
+	and	r2, r3, #31
14697
+	lsrs	r0, r3, #5
14698
+	movs	r3, #1
14699
+	lsl	r2, r3, r2
14700
+	ldr	r3, [r1, r0, lsl #2]
14701
+	orrs	r3, r3, r2
14702
+	ldr	r2, [sp, #32]
14703
+	str	r3, [r1, r0, lsl #2]
14704
+	ldrb	r3, [r4, #2234]	@ zero_extendqisi2
14705
+	muls	r3, r2, r3
14706
+	cmp	r9, r3
14707
+	bgt	.L2251
14708
+.L2250:
14709
+	ldr	r3, [sp, #4]
14710
+	adds	r3, r3, #1
14711
+	str	r3, [sp, #4]
14712
+	ldr	r3, [sp, #20]
14713
+	add	r10, r10, r3
14714
+	b	.L2241
14715
+.L2247:
14282
14716
 	ldrb	r3, [sp, #42]	@ zero_extendqisi2
14283
14717
 	cmp	r3, #255
14284
-	bne	.L2331
14718
+	bne	.L2268
14285
14719
 	ldrb	r0, [sp, #43]	@ zero_extendqisi2
14286
14720
 	subs	r0, r0, #255
14287
14721
 	it	ne
14288
14722
 	movne	r0, #1
14289
-	b	.L2311
14290
-.L2331:
14723
+	b	.L2248
14724
+.L2268:
14291
14725
 	movs	r0, #1
14292
-.L2311:
14293
-	ldr	r3, [sp, #24]
14294
-	lsls	r3, r3, #29
14295
-	bpl	.L2312
14296
-	ldr	r3, .L2361+4
14297
-	mov	r0, r10
14298
-	ldr	r2, [sp, #32]
14299
-	add	r3, r3, r2
14300
-	ldr	r1, [r3, #1172]
14301
-	add	r1, r1, r6
14302
-	bl	SandiskProgTestBadBlock
14303
-.L2312:
14304
-	cbz	r0, .L2313
14305
-	mov	r1, r7
14306
-	ldr	r2, [sp, #4]
14307
-	ldr	r0, .L2361+12
14308
-	add	r9, r9, #1
14309
-	bl	printk
14310
-	ldr	r2, [r5, #1184]
14311
-	uxth	r9, r9
14312
-	ldr	r3, [sp, #12]
14313
-	and	r0, r3, #31
14314
-	lsrs	r1, r3, #5
14315
-	movs	r3, #1
14316
-	lsls	r3, r3, r0
14317
-	ldr	r0, [r2, r1, lsl #2]
14318
-	orrs	r3, r3, r0
14319
-	str	r3, [r2, r1, lsl #2]
14320
-	ldr	r2, [sp, #28]
14321
-	ldrb	r3, [r4, #2230]	@ zero_extendqisi2
14322
-	muls	r3, r2, r3
14323
-	cmp	r9, r3
14324
-	bgt	.L2314
14325
-.L2313:
14326
-	ldr	r3, [sp, #4]
14327
-	adds	r3, r3, #1
14328
-	str	r3, [sp, #4]
14329
-	ldr	r3, [sp, #16]
14330
-	add	r6, r6, r3
14331
-	b	.L2304
14332
-.L2314:
14333
-	mov	r2, r9
14334
-	ldr	r0, .L2361+16
14335
-	mov	r1, r7
14336
-	bl	printk
14337
-	ldrb	r3, [r4, #2230]	@ zero_extendqisi2
14338
-	ldr	r2, [sp, #28]
14339
-	muls	r3, r2, r3
14340
-	cmp	r9, r3
14341
-	blt	.L2316
14342
-	ldrh	r2, [r4, #136]
14343
-	movs	r1, #0
14344
-	ldr	r0, [r5, #1184]
14345
-	lsls	r2, r2, #9
14346
-	bl	ftl_memset
14347
-.L2316:
14348
-	cmp	r7, #0
14349
-	bne	.L2318
14350
-	ldrh	r10, [r5, #1204]
14351
-	mov	r9, #1
14352
-	mov	r6, r7
14353
-.L2319:
14354
-	ldr	r3, .L2361+4
14355
-	ldrb	r3, [r3, #1]	@ zero_extendqisi2
14356
-	cmp	r3, r10
14357
-	bls	.L2358
14358
-	mov	r0, r10
14359
-	bl	FlashTestBlk
14360
-	cbz	r0, .L2320
14361
-	mov	r1, r10
14362
-	ldr	r0, .L2361+20
14363
-	bl	printk
14364
-	ldr	r2, [r5, #1184]
14365
-	lsr	r0, r10, #5
14366
-	adds	r6, r6, #1
14367
-	and	r3, r10, #31
14368
-	ldr	r1, [r2, r0, lsl #2]
14369
-	uxth	r6, r6
14370
-	lsl	r3, r9, r3
14371
-	orrs	r3, r3, r1
14372
-	str	r3, [r2, r0, lsl #2]
14373
-.L2320:
14374
-	add	r10, r10, #1
14375
-	uxth	r10, r10
14376
-	b	.L2319
14377
-.L2358:
14378
-	add	fp, r8, #-1
14379
-	sub	r9, r8, #50
14380
-	mov	r10, #1
14381
-	uxth	fp, fp
14382
-.L2322:
14383
-	cmp	fp, r9
14384
-	ble	.L2359
14726
+	b	.L2248
14727
+.L2258:
14385
14728
 	mov	r0, fp
14386
14729
 	bl	FlashTestBlk
14387
-	cbz	r0, .L2323
14730
+	cbz	r0, .L2257
14388
14731
 	mov	r1, fp
14389
-	ldr	r0, .L2361+20
14732
+	mov	r0, r9
14390
14733
 	bl	printk
14391
-	ldr	r2, [r5, #1184]
14734
+	ldr	r1, [r5, #1192]
14392
14735
 	lsr	r0, fp, #5
14393
14736
 	and	r3, fp, #31
14394
-	lsl	r3, r10, r3
14395
-	ldr	r1, [r2, r0, lsl #2]
14396
-	orrs	r3, r3, r1
14397
-	str	r3, [r2, r0, lsl #2]
14398
-.L2323:
14399
-	add	fp, fp, #-1
14737
+	lsl	r2, r10, r3
14738
+	adds	r7, r7, #1
14739
+	ldr	r3, [r1, r0, lsl #2]
14740
+	uxth	r7, r7
14741
+	orrs	r3, r3, r2
14742
+	str	r3, [r1, r0, lsl #2]
14743
+.L2257:
14744
+	add	fp, fp, #1
14400
14745
 	uxth	fp, fp
14401
-	b	.L2322
14402
-.L2359:
14403
-	ldr	r3, .L2361+4
14404
-	ldr	r2, [r5, #1204]
14405
-	ldrb	r3, [r3, #1]	@ zero_extendqisi2
14406
-	subs	r3, r3, r2
14407
-	cmp	r6, r3
14408
-	bcc	.L2318
14409
-	ldrh	r2, [r4, #136]
14410
-	movs	r1, #0
14411
-	ldr	r0, [r5, #1184]
14412
-	lsls	r2, r2, #9
14413
-	bl	ftl_memset
14414
-.L2318:
14415
-	ldrb	r6, [sp, #8]	@ zero_extendqisi2
14416
-	add	r10, r8, #-1
14417
-	add	r9, r5, r7, lsl #1
14418
-	uxth	r10, r10
14419
-	mul	r6, r8, r6
14420
-.L2326:
14421
-	mov	r1, r7
14422
-	ldr	r0, .L2361+24
14423
-	mov	r2, r10
14746
+	b	.L2256
14747
+.L2261:
14748
+	mov	r0, r10
14749
+	bl	FlashTestBlk
14750
+	cbz	r0, .L2260
14751
+	mov	r1, r10
14752
+	ldr	r0, .L2293+20
14424
14753
 	bl	printk
14425
-	ldr	r1, [r5, #1184]
14426
-.L2327:
14427
-	lsr	r3, r10, #5
14754
+	ldr	r0, [r5, #1192]
14755
+	lsr	ip, r10, #5
14428
14756
 	and	r2, r10, #31
14429
-	ldr	r3, [r1, r3, lsl #2]
14430
-	lsrs	r3, r3, r2
14431
-	ands	r3, r3, #1
14432
-	beq	.L2360
14433
-	add	r10, r10, #-1
14434
-	uxth	r10, r10
14435
-	b	.L2327
14436
-.L2360:
14437
-	ldr	r1, [sp, #20]
14438
-	movw	r2, #61664
14439
-	strh	r10, [r9, #1232]	@ movhi
14440
-	add	r0, sp, #44
14441
-	strh	r2, [r1]	@ movhi
14442
-	strh	r10, [r1, #2]	@ movhi
14443
-	strh	r3, [r1, #8]	@ movhi
14444
-	movs	r1, #1
14445
-	ldr	r3, [r5, #1184]
14446
-	mov	r2, r1
14447
-	str	r3, [sp, #52]
14448
-	ldr	r3, [r5, #1216]
14449
-	str	r3, [sp, #56]
14450
-	add	r3, r10, r6
14451
-	lsls	r3, r3, #10
14452
-	str	r3, [sp, #48]
14453
-	bl	FlashEraseBlocks
14454
-	movs	r1, #1
14455
-	mov	r3, r1
14456
-	mov	r2, r1
14457
-	add	r0, sp, #44
14458
-	bl	FlashProgPages
14459
-	ldr	r3, [sp, #44]
14460
-	cbz	r3, .L2332
14461
-	add	r10, r10, #-1
14462
-	uxth	r10, r10
14463
-	b	.L2326
14464
-.L2332:
14465
-	ldr	r3, [sp, #8]
14757
+	lsl	r1, fp, r2
14758
+	ldr	r2, [r0, ip, lsl #2]
14759
+	orrs	r2, r2, r1
14760
+	str	r2, [r0, ip, lsl #2]
14761
+.L2260:
14762
+	add	r3, r10, #-1
14763
+	uxth	r10, r3
14764
+	b	.L2259
14765
+.L2265:
14766
+	subs	r7, r7, #1
14767
+	uxth	r7, r7
14768
+	b	.L2264
14769
+.L2240:
14770
+	ldr	r3, [sp, #12]
14466
14771
 	adds	r3, r3, #1
14467
-	str	r3, [sp, #8]
14468
-	b	.L2302
14469
-.L2357:
14470
-	add	sp, sp, #84
14471
-	@ sp needed
14472
-	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
14473
-.L2362:
14772
+	str	r3, [sp, #12]
14773
+	b	.L2239
14774
+.L2294:
14474
14775
 	.align	2
14475
-.L2361:
14776
+.L2293:
14476
14777
 	.word	.LANCHOR4
14477
-	.word	.LANCHOR0
14478
14778
 	.word	.LC121
14479
-	.word	.LC122
14779
+	.word	.LANCHOR0
14480
14780
 	.word	.LC123
14781
+	.word	.LC122
14481
14782
 	.word	.LC124
14482
14783
 	.word	.LC125
14483
14784
 	.fnend
14484
14785
 	.size	FlashMakeFactorBbt, .-FlashMakeFactorBbt
14485
14786
 	.align	1
14486
14787
 	.global	FtlLowFormatEraseBlock
14788
+	.syntax unified
14487
14789
 	.thumb
14488
14790
 	.thumb_func
14791
+	.fpu softvfp
14489
14792
 	.type	FtlLowFormatEraseBlock, %function
14490
14793
 FtlLowFormatEraseBlock:
14491
14794
 	.fnstart
14492
14795
 	@ args = 0, pretend = 0, frame = 24
14493
14796
 	@ frame_needed = 0, uses_anonymous_args = 0
14797
+	ldr	r3, .L2342
14494
14798
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
14495
14799
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
14496
14800
 	.pad #28
14497
14801
 	sub	sp, sp, #28
14498
-	ldr	r7, .L2415
14499
-	str	r0, [sp, #4]
14500
-	str	r1, [sp]
14501
-	ldrb	r3, [r7, #2240]	@ zero_extendqisi2
14502
-	str	r3, [sp, #16]
14503
-	ldr	r3, .L2415+4
14504
-	ldr	r2, [r3, #224]
14505
-	mov	fp, r3
14506
-	cmp	r2, #0
14507
-	bne	.L2392
14508
-	ldrb	r3, [r7, #144]	@ zero_extendqisi2
14509
-	mov	r8, #36
14510
-	mov	r9, r2
14511
-	mov	r5, r2
14512
-	mov	r4, r2
14513
-	mov	r10, fp
14514
-	str	r3, [sp, #8]
14515
-	str	r0, [fp, #3292]
14516
-.L2365:
14517
-	ldrh	r0, [r7, #2320]
14518
-	uxth	r1, r9
14519
-	ldr	r3, .L2415
14520
-	cmp	r0, r1
14521
-	bls	.L2410
14522
-	mul	r6, r8, r1
14523
-	ldr	r0, [fp, #228]
14524
-	movs	r3, #0
14525
-	str	r3, [r0, r6]
14526
-	ldr	r3, .L2415
14527
-	add	r1, r1, r3
14528
-	ldrb	r0, [r1, #2348]	@ zero_extendqisi2
14529
-	ldr	r1, [sp, #4]
14530
-	bl	V2P_block
14531
-	ldr	r3, [sp]
14532
-	mov	r6, r0
14533
-	cbz	r3, .L2366
14534
-	bl	IsBlkInVendorPart
14535
-	cbnz	r0, .L2367
14536
-.L2366:
14537
-	mov	r0, r6
14538
-	bl	FtlBbmIsBadBlock
14539
-	cbnz	r0, .L2368
14540
-	ldr	r3, [fp, #228]
14541
-	lsls	r6, r6, #10
14542
-	ldrh	r1, [r7, #2400]
14543
-	muls	r1, r5, r1
14544
-	it	mi
14545
-	addmi	r1, r1, #3
14546
-	mla	lr, r8, r5, r3
14547
-	adds	r5, r5, #1
14548
-	bic	r1, r1, #3
14549
-	uxth	r5, r5
14550
-	str	r0, [lr, #8]
14551
-	ldr	r0, [r10, #3344]
14552
-	str	r6, [lr, #4]
14553
-	add	r1, r1, r0
14554
-	str	r1, [lr, #12]
14555
-	b	.L2367
14556
-.L2368:
14557
-	adds	r4, r4, #1
14558
-	uxth	r4, r4
14559
-.L2367:
14560
-	add	r9, r9, #1
14561
-	b	.L2365
14562
-.L2410:
14563
-	cmp	r5, #0
14564
-	beq	.L2391
14565
-	ldr	r2, [sp, #8]
14566
-	mov	r8, #0
14567
-	ldr	r0, [fp, #228]
14802
+	str	r0, [sp, #8]
14803
+	mov	r10, r3
14804
+	ldr	r6, [r3, #228]
14805
+	str	r1, [sp, #4]
14806
+	cmp	r6, #0
14807
+	bne	.L2324
14808
+	ldr	r5, .L2342+4
14809
+	mov	r7, r6
14810
+	mov	r4, r6
14568
14811
 	mov	r9, #36
14569
-	adds	r6, r2, #0
14570
-	mov	r2, r5
14812
+	mov	fp, r10
14813
+	str	r0, [r10, #3292]
14814
+	ldrb	r3, [r5, #2244]	@ zero_extendqisi2
14815
+	str	r3, [sp, #16]
14816
+	ldrb	r3, [r5, #152]	@ zero_extendqisi2
14817
+	str	r3, [sp, #12]
14818
+.L2297:
14819
+	ldrh	r0, [r5, #2324]
14820
+	uxth	r1, r6
14821
+	cmp	r0, r1
14822
+	bhi	.L2302
14823
+	cmp	r7, #0
14824
+	beq	.L2295
14825
+	ldr	r3, [sp, #12]
14826
+	mov	r8, #0
14827
+	mov	r2, r7
14828
+	ldr	r0, [r10, #232]
14829
+	strb	r8, [r5, #2244]
14830
+	mov	r9, #36
14831
+	adds	r6, r3, #0
14571
14832
 	it	ne
14572
14833
 	movne	r6, #1
14573
-	strb	r8, [r3, #2240]
14574
-	str	r3, [sp, #8]
14575
14834
 	mov	r1, r6
14576
14835
 	bl	FlashEraseBlocks
14577
-	ldrb	r2, [sp, #16]	@ zero_extendqisi2
14578
-	ldr	r3, [sp, #8]
14579
-	strb	r2, [r3, #2240]
14580
-.L2372:
14836
+	ldrb	r3, [sp, #16]	@ zero_extendqisi2
14837
+	strb	r3, [r5, #2244]
14838
+.L2304:
14581
14839
 	uxth	r2, r8
14582
-	cmp	r2, r5
14583
-	bcs	.L2411
14840
+	cmp	r7, r2
14841
+	bhi	.L2306
14842
+	ldr	r3, [sp, #4]
14843
+	cmp	r3, #0
14844
+	bne	.L2307
14845
+	uxth	r6, r6
14846
+	mov	fp, #6
14847
+	movs	r3, #1
14848
+	str	r3, [sp, #12]
14849
+.L2308:
14850
+	ldr	r7, .L2342
14851
+	mov	r9, #0
14852
+.L2318:
14853
+	ldr	r10, .L2342+4
14854
+	mov	r8, #0
14855
+	mov	r5, r8
14856
+.L2309:
14857
+	ldrh	r1, [r10, #2324]
14858
+	uxth	r3, r8
14859
+	cmp	r1, r3
14860
+	bhi	.L2313
14861
+	cbz	r5, .L2295
14862
+	movs	r3, #1
14863
+	mov	r8, #0
14864
+	mov	r2, r6
14865
+	mov	r1, r5
14866
+	ldr	r0, [r7, #232]
14867
+	strb	r8, [r10, #2244]
14868
+	bl	FlashProgPages
14869
+	ldrb	r3, [sp, #16]	@ zero_extendqisi2
14870
+	strb	r3, [r10, #2244]
14871
+	mov	r10, #36
14872
+.L2315:
14873
+	uxth	r3, r8
14874
+	cmp	r5, r3
14875
+	bhi	.L2317
14876
+	add	r9, r9, fp
14877
+	ldr	r3, [sp, #12]
14878
+	uxth	r9, r9
14879
+	cmp	r3, r9
14880
+	bhi	.L2318
14881
+	mov	r8, #0
14882
+	mov	r9, #36
14883
+.L2319:
14884
+	uxth	r3, r8
14885
+	cmp	r5, r3
14886
+	bhi	.L2321
14887
+	ldr	r3, [sp, #8]
14888
+	cmp	r3, #63
14889
+	bls	.L2322
14890
+	ldr	r3, [sp, #4]
14891
+	cbz	r3, .L2295
14892
+.L2322:
14893
+	mov	r2, r5
14894
+	mov	r1, r6
14895
+	ldr	r0, [r7, #232]
14896
+	bl	FlashEraseBlocks
14897
+.L2295:
14898
+	mov	r0, r4
14899
+	add	sp, sp, #28
14900
+	@ sp needed
14901
+	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
14902
+.L2302:
14903
+	uxth	r1, r6
14904
+	ldr	r0, [r10, #232]
14905
+	movs	r3, #0
14906
+	mul	ip, r9, r1
14907
+	str	r3, [r0, ip]
14908
+	adds	r0, r5, r1
14909
+	ldrb	r0, [r0, #2350]	@ zero_extendqisi2
14910
+	ldr	r1, [sp, #8]
14911
+	bl	V2P_block
14912
+	ldr	r3, [sp, #4]
14913
+	mov	r8, r0
14914
+	cbz	r3, .L2298
14915
+	bl	IsBlkInVendorPart
14916
+	cbnz	r0, .L2299
14917
+.L2298:
14918
+	mov	r0, r8
14919
+	bl	FtlBbmIsBadBlock
14920
+	cbnz	r0, .L2300
14921
+	ldr	r1, [r10, #232]
14922
+	mla	ip, r9, r7, r1
14923
+	lsl	r1, r8, #10
14924
+	str	r0, [ip, #8]
14925
+	str	r1, [ip, #4]
14926
+	ldr	r0, [fp, #3344]
14927
+	ldrh	r1, [r5, #2402]
14928
+	muls	r1, r7, r1
14929
+	add	r7, r7, #1
14930
+	it	mi
14931
+	addmi	r1, r1, #3
14932
+	uxth	r7, r7
14933
+	bic	r1, r1, #3
14934
+	add	r1, r1, r0
14935
+	str	r1, [ip, #12]
14936
+.L2299:
14937
+	adds	r6, r6, #1
14938
+	b	.L2297
14939
+.L2300:
14940
+	adds	r4, r4, #1
14941
+	uxth	r4, r4
14942
+	b	.L2299
14943
+.L2306:
14584
14944
 	mul	r2, r9, r8
14585
-	ldr	r1, [fp, #228]
14586
-	adds	r0, r1, r2
14945
+	ldr	r1, [r10, #232]
14946
+	add	ip, r1, r2
14587
14947
 	ldr	r2, [r1, r2]
14588
14948
 	adds	r2, r2, #1
14589
-	bne	.L2373
14590
-	ldr	r0, [r0, #4]
14949
+	bne	.L2305
14950
+	ldr	r0, [ip, #4]
14591
14951
 	adds	r4, r4, #1
14592
-	ubfx	r0, r0, #10, #16
14593
14952
 	uxth	r4, r4
14953
+	ubfx	r0, r0, #10, #16
14594
14954
 	bl	FtlBbmMapBadBlock
14595
-.L2373:
14955
+.L2305:
14596
14956
 	add	r8, r8, #1
14597
-	b	.L2372
14598
-.L2411:
14599
-	ldr	r3, [sp]
14600
-	cbnz	r3, .L2375
14601
-	movs	r3, #6
14602
-	uxth	r6, r6
14957
+	b	.L2304
14958
+.L2307:
14959
+	ldrh	r3, [r5, #2392]
14603
14960
 	str	r3, [sp, #12]
14604
-	movs	r3, #1
14605
-	str	r3, [sp, #8]
14606
-	b	.L2376
14607
-.L2375:
14608
-	ldrh	r3, [r7, #2390]
14609
-	str	r3, [sp, #8]
14610
-	ldrb	r3, [r7, #144]	@ zero_extendqisi2
14611
-	cbnz	r3, .L2393
14612
-	ldr	r3, [sp, #8]
14961
+	ldrb	r3, [r5, #152]	@ zero_extendqisi2
14962
+	cbnz	r3, .L2325
14963
+	ldr	r3, [sp, #12]
14613
14964
 	movs	r6, #1
14614
-	lsrs	r3, r3, #2
14615
-	str	r3, [sp, #12]
14616
-	b	.L2376
14617
-.L2393:
14965
+	lsr	fp, r3, #2
14966
+	b	.L2308
14967
+.L2325:
14618
14968
 	movs	r6, #1
14619
-	str	r6, [sp, #12]
14620
-.L2376:
14621
-	ldr	r8, .L2415+4
14622
-	movs	r7, #0
14623
-	mov	r10, r8
14624
-.L2386:
14625
-	mov	fp, #0
14626
-	mov	r5, fp
14627
-.L2377:
14628
-	ldr	r9, .L2415
14629
-	uxth	r3, fp
14630
-	ldrh	r1, [r9, #2320]
14631
-	cmp	r1, r3
14632
-	bls	.L2412
14969
+	mov	fp, r6
14970
+	b	.L2308
14971
+.L2313:
14972
+	uxth	r3, r8
14633
14973
 	movs	r2, #36
14634
-	ldr	r0, [r8, #228]
14974
+	ldr	r0, [r7, #232]
14635
14975
 	mul	r1, r2, r3
14976
+	add	r3, r3, r10
14636
14977
 	movs	r2, #0
14637
14978
 	str	r2, [r0, r1]
14638
-	ldr	r2, .L2415
14639
-	ldr	r1, [sp, #4]
14640
-	add	r3, r3, r2
14641
-	ldrb	r0, [r3, #2348]	@ zero_extendqisi2
14979
+	ldr	r1, [sp, #8]
14980
+	ldrb	r0, [r3, #2350]	@ zero_extendqisi2
14642
14981
 	bl	V2P_block
14643
-	ldr	r3, [sp]
14644
-	mov	r9, r0
14645
-	cbz	r3, .L2378
14982
+	ldr	r3, [sp, #4]
14983
+	str	r0, [sp, #20]
14984
+	cbz	r3, .L2310
14646
14985
 	bl	IsBlkInVendorPart
14647
-	cbnz	r0, .L2379
14648
-.L2378:
14649
-	mov	r0, r9
14986
+	cbnz	r0, .L2311
14987
+.L2310:
14988
+	ldr	r0, [sp, #20]
14650
14989
 	bl	FtlBbmIsBadBlock
14651
-	cbnz	r0, .L2379
14652
-	ldr	r1, [r10, #228]
14990
+	cbnz	r0, .L2311
14991
+	ldr	r1, [r7, #232]
14653
14992
 	movs	r3, #36
14654
-	ldr	r0, [r8, #3336]
14993
+	ldr	r0, [r7, #3336]
14655
14994
 	mla	r1, r3, r5, r1
14656
-	add	r3, r7, r9, lsl #10
14995
+	ldr	r3, [sp, #20]
14996
+	add	r3, r9, r3, lsl #10
14657
14997
 	str	r3, [r1, #4]
14658
-	ldr	r3, [r10, #3332]
14998
+	ldr	r3, [r7, #3332]
14659
14999
 	str	r3, [r1, #8]
14660
-	ldr	r3, .L2415
14661
-	ldrh	r3, [r3, #2400]
15000
+	ldrh	r3, [r10, #2402]
14662
15001
 	muls	r3, r5, r3
14663
15002
 	add	r5, r5, #1
14664
15003
 	it	mi
14665
15004
 	addmi	r3, r3, #3
14666
-	bic	r3, r3, #3
14667
15005
 	uxth	r5, r5
15006
+	bic	r3, r3, #3
14668
15007
 	add	r3, r3, r0
14669
15008
 	str	r3, [r1, #12]
14670
-.L2379:
14671
-	add	fp, fp, #1
14672
-	b	.L2377
14673
-.L2412:
14674
-	cmp	r5, #0
14675
-	beq	.L2391
14676
-	mov	r2, r6
14677
-	movs	r3, #1
14678
-	ldr	r0, [r8, #228]
14679
-	mov	r1, r5
14680
-	mov	fp, #0
14681
-	strb	fp, [r9, #2240]
14682
-	bl	FlashProgPages
14683
-	movs	r2, #36
14684
-	ldrb	r3, [sp, #16]	@ zero_extendqisi2
14685
-	strb	r3, [r9, #2240]
14686
-	ldr	r9, .L2415+4
14687
-.L2383:
14688
-	uxth	r3, fp
14689
-	cmp	r3, r5
14690
-	bcs	.L2413
14691
-	mul	r3, r2, fp
14692
-	ldr	r1, [r10, #228]
14693
-	adds	r0, r1, r3
14694
-	ldr	r3, [r1, r3]
14695
-	cbz	r3, .L2384
14696
-	ldr	r0, [r0, #4]
14697
-	adds	r4, r4, #1
14698
-	str	r2, [sp, #20]
14699
-	ubfx	r0, r0, #10, #16
14700
-	uxth	r4, r4
14701
-	bl	FtlBbmMapBadBlock
14702
-	ldr	r2, [sp, #20]
14703
-.L2384:
14704
-	add	fp, fp, #1
14705
-	b	.L2383
14706
-.L2413:
14707
-	ldr	r3, [sp, #12]
14708
-	add	r7, r7, r3
14709
-	ldr	r3, [sp, #8]
14710
-	uxth	r7, r7
14711
-	cmp	r7, r3
14712
-	bcc	.L2386
14713
-	movs	r7, #0
14714
-	mov	r8, #36
14715
-.L2387:
14716
-	uxth	r3, r7
14717
-	cmp	r3, r5
14718
-	bcs	.L2414
14719
-	ldr	r3, [sp]
14720
-	cbz	r3, .L2388
14721
-	mul	r3, r8, r7
14722
-	ldr	r2, [r9, #228]
15009
+.L2311:
15010
+	add	r8, r8, #1
15011
+	b	.L2309
15012
+.L2317:
15013
+	mul	r3, r10, r8
15014
+	ldr	r2, [r7, #232]
14723
15015
 	adds	r1, r2, r3
14724
15016
 	ldr	r3, [r2, r3]
14725
-	cbnz	r3, .L2388
15017
+	cbz	r3, .L2316
15018
+	ldr	r0, [r1, #4]
15019
+	adds	r4, r4, #1
15020
+	uxth	r4, r4
15021
+	ubfx	r0, r0, #10, #16
15022
+	bl	FtlBbmMapBadBlock
15023
+.L2316:
15024
+	add	r8, r8, #1
15025
+	b	.L2315
15026
+.L2321:
15027
+	ldr	r3, [sp, #4]
15028
+	cbz	r3, .L2320
15029
+	mul	r3, r9, r8
15030
+	ldr	r2, [r7, #232]
15031
+	adds	r1, r2, r3
15032
+	ldr	r3, [r2, r3]
15033
+	cbnz	r3, .L2320
14726
15034
 	ldr	r0, [r1, #4]
14727
15035
 	movs	r1, #1
14728
15036
 	ubfx	r0, r0, #10, #16
14729
15037
 	bl	FtlFreeSysBlkQueueIn
14730
-.L2388:
14731
-	adds	r7, r7, #1
14732
-	b	.L2387
14733
-.L2414:
14734
-	ldr	r3, [sp, #4]
14735
-	cmp	r3, #63
14736
-	bls	.L2390
14737
-	ldr	r3, [sp]
14738
-	cbz	r3, .L2391
14739
-.L2390:
14740
-	ldr	r0, [r9, #228]
14741
-	mov	r1, r6
14742
-	mov	r2, r5
14743
-	bl	FlashEraseBlocks
14744
-.L2391:
14745
-	mov	r0, r4
14746
-	b	.L2364
14747
-.L2392:
14748
-	movs	r0, #0
14749
-.L2364:
14750
-	add	sp, sp, #28
14751
-	@ sp needed
14752
-	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
14753
-.L2416:
15038
+.L2320:
15039
+	add	r8, r8, #1
15040
+	b	.L2319
15041
+.L2324:
15042
+	movs	r4, #0
15043
+	b	.L2295
15044
+.L2343:
14754
15045
 	.align	2
14755
-.L2415:
14756
-	.word	.LANCHOR0
15046
+.L2342:
14757
15047
 	.word	.LANCHOR2
15048
+	.word	.LANCHOR0
14758
15049
 	.fnend
14759
15050
 	.size	FtlLowFormatEraseBlock, .-FtlLowFormatEraseBlock
14760
15051
 	.align	1
14761
15052
 	.global	FtlBbmTblFlush
15053
+	.syntax unified
14762
15054
 	.thumb
14763
15055
 	.thumb_func
15056
+	.fpu softvfp
14764
15057
 	.type	FtlBbmTblFlush, %function
14765
15058
 FtlBbmTblFlush:
14766
15059
 	.fnstart
14767
-	@ args = 0, pretend = 0, frame = 8
15060
+	@ args = 0, pretend = 0, frame = 0
14768
15061
 	@ frame_needed = 0, uses_anonymous_args = 0
14769
-	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
15062
+	push	{r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr}
14770
15063
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
14771
-	.pad #20
14772
-	sub	sp, sp, #20
14773
-	ldr	r7, .L2434
14774
-	ldr	r6, [r7, #224]
15064
+	.pad #12
15065
+	ldr	r7, .L2358
15066
+	ldr	r6, [r7, #228]
14775
15067
 	cmp	r6, #0
14776
-	bne	.L2419
14777
-	ldr	r4, .L2434+4
15068
+	bne	.L2346
15069
+	ldr	r4, .L2358+4
14778
15070
 	mov	r1, r6
14779
15071
 	ldr	r0, [r7, #3316]
14780
-	ldr	r5, .L2434+8
14781
-	addw	r9, r4, #2476
15072
+	ldr	r5, .L2358+8
14782
15073
 	ldr	r3, [r7, #3340]
14783
-	ldrh	r2, [r4, #2398]
14784
-	str	r0, [r5, #1256]
14785
-	str	r3, [r5, #1260]
15074
+	add	r8, r4, #2480
15075
+	ldrh	r2, [r4, #2400]
15076
+	str	r0, [r5, #1264]
15077
+	str	r3, [r5, #1268]
14786
15078
 	bl	ftl_memset
14787
-.L2420:
14788
-	ldrh	r3, [r4, #2342]
14789
-	ldr	r8, .L2434+4
15079
+.L2347:
15080
+	ldrh	r3, [r4, #2346]
14790
15081
 	cmp	r6, r3
14791
-	bge	.L2433
14792
-	ldrh	r2, [r7, #3404]
15082
+	blt	.L2348
15083
+	ldr	r6, [r5, #1268]
15084
+	movs	r2, #16
15085
+	movs	r1, #255
15086
+	ldr	fp, .L2358+24
15087
+	mov	r8, #0
15088
+	mov	r0, r6
15089
+	mov	r9, r8
15090
+	bl	ftl_memset
15091
+	movw	r3, #61649
15092
+	strh	r3, [r6]	@ movhi
15093
+	ldr	r3, [r4, #2464]
15094
+	str	r3, [r6, #4]
15095
+	ldrh	r3, [r4, #2456]
15096
+	strh	r3, [r6, #2]	@ movhi
15097
+	ldrh	r3, [r4, #2460]
15098
+	strh	r3, [r6, #8]	@ movhi
15099
+	ldrh	r3, [r4, #2462]
15100
+	strh	r3, [r6, #10]	@ movhi
15101
+	ldr	r3, [r4, #2320]
15102
+	strh	r3, [r6, #12]	@ movhi
15103
+.L2349:
15104
+	ldr	r3, [r7, #3316]
15105
+	mov	r10, #0
15106
+	ldrh	r2, [r4, #2458]
15107
+	ldrh	r1, [r4, #2456]
15108
+	str	r3, [r5, #1264]
15109
+	ldr	r3, [r7, #3340]
15110
+	str	r10, [r5, #1256]
15111
+	str	r3, [r5, #1268]
15112
+	orr	r3, r2, r1, lsl #10
15113
+	ldrh	r0, [r6, #10]
15114
+	str	r3, [r5, #1260]
15115
+	ldrh	r3, [r4, #2460]
15116
+	str	r0, [sp]
15117
+	ldr	r0, .L2358+12
15118
+	bl	printk
15119
+	ldrh	r3, [r4, #2392]
15120
+	ldrh	r2, [r4, #2458]
15121
+	subs	r3, r3, #1
15122
+	cmp	r2, r3
15123
+	blt	.L2350
15124
+	ldr	r3, [r4, #2464]
15125
+	ldrh	r2, [r4, #2456]
15126
+	ldr	r0, [r7, #232]
15127
+	adds	r3, r3, #1
15128
+	strh	r10, [r4, #2458]	@ movhi
15129
+	str	r3, [r4, #2464]
15130
+	str	r3, [r6, #4]
15131
+	ldrh	r3, [r4, #2460]
15132
+	strh	r2, [r6, #8]	@ movhi
15133
+	strh	r2, [r4, #2460]	@ movhi
15134
+	movs	r2, #1
15135
+	strh	r3, [r4, #2456]	@ movhi
15136
+	mov	r1, r2
15137
+	lsls	r3, r3, #10
15138
+	str	r3, [r5, #1260]
15139
+	str	r3, [r0, #4]
15140
+	bl	FlashEraseBlocks
15141
+.L2350:
15142
+	movs	r3, #1
15143
+	mov	r0, fp
15144
+	mov	r2, r3
15145
+	mov	r1, r3
15146
+	bl	FlashProgPages
15147
+	ldrh	r3, [r4, #2458]
15148
+	adds	r3, r3, #1
15149
+	strh	r3, [r4, #2458]	@ movhi
14793
15150
 	ldr	r3, [r5, #1256]
14794
-	ldr	r1, [r9, #4]!
14795
-	mul	r0, r2, r6
15151
+	adds	r2, r3, #1
15152
+	bne	.L2351
15153
+	add	r8, r8, #1
15154
+	ldr	r1, [r5, #1260]
15155
+	uxth	r8, r8
15156
+	ldr	r0, .L2358+16
15157
+	bl	printk
15158
+	cmp	r8, #3
15159
+	bls	.L2349
15160
+	mov	r2, r8
15161
+	ldr	r1, [r5, #1260]
15162
+	ldr	r0, .L2358+20
15163
+	bl	printk
15164
+	movs	r3, #1
15165
+	str	r3, [r7, #228]
15166
+.L2346:
15167
+	movs	r0, #0
15168
+	add	sp, sp, #12
15169
+	@ sp needed
15170
+	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
15171
+.L2348:
15172
+	ldrh	r2, [r7, #3404]
15173
+	ldr	r3, [r5, #1264]
15174
+	ldr	r1, [r8, #4]!
15175
+	mul	r0, r6, r2
14796
15176
 	lsls	r2, r2, #2
14797
15177
 	adds	r6, r6, #1
14798
15178
 	add	r0, r3, r0, lsl #2
14799
15179
 	bl	ftl_memcpy
14800
-	b	.L2420
14801
-.L2433:
14802
-	ldr	r6, [r5, #1260]
14803
-	movs	r1, #255
14804
-	movs	r2, #16
14805
-	ldr	fp, .L2434
14806
-	mov	r0, r6
14807
-	bl	ftl_memset
14808
-	movw	r3, #61649
14809
-	strh	r3, [r6]	@ movhi
14810
-	ldr	r3, [r8, #2460]
14811
-	str	r3, [r6, #4]
14812
-	ldrh	r3, [r8, #2452]
14813
-	strh	r3, [r6, #2]	@ movhi
14814
-	ldrh	r3, [r8, #2456]
14815
-	strh	r3, [r6, #8]	@ movhi
14816
-	ldrh	r3, [r8, #2458]
14817
-	strh	r3, [r6, #10]	@ movhi
14818
-	ldr	r3, [r8, #2316]
14819
-	mov	r8, #0
14820
-	mov	r10, r8
14821
-	strh	r3, [r6, #12]	@ movhi
14822
-.L2422:
14823
-	ldr	r3, [r7, #3316]
14824
-	mov	ip, #0
14825
-	ldrh	r1, [r4, #2452]
14826
-	ldrh	r2, [r4, #2454]
14827
-	str	r3, [r5, #1256]
14828
-	ldr	r3, [r7, #3340]
14829
-	str	ip, [r5, #1248]
14830
-	str	ip, [sp, #12]
14831
-	str	r3, [r5, #1260]
14832
-	orr	r3, r2, r1, lsl #10
14833
-	ldrh	r0, [r6, #10]
14834
-	str	r3, [r5, #1252]
14835
-	ldrh	r3, [r4, #2456]
14836
-	str	r0, [sp]
14837
-	ldr	r0, .L2434+12
14838
-	bl	printk
14839
-	ldrh	r3, [r4, #2390]
14840
-	ldrh	r2, [r4, #2454]
14841
-	subs	r3, r3, #1
14842
-	ldr	r9, .L2434+4
14843
-	cmp	r2, r3
14844
-	ldr	ip, [sp, #12]
14845
-	blt	.L2423
14846
-	ldrh	r2, [r9, #2452]
14847
-	movs	r1, #1
14848
-	ldr	r3, [r9, #2460]
14849
-	ldr	r0, [fp, #228]
14850
-	adds	r3, r3, #1
14851
-	str	r3, [r9, #2460]
14852
-	str	r3, [r6, #4]
14853
-	strh	r2, [r6, #8]	@ movhi
14854
-	ldrh	r3, [r9, #2456]
14855
-	strh	r2, [r9, #2456]	@ movhi
14856
-	ldr	r2, .L2434+8
14857
-	strh	r3, [r9, #2452]	@ movhi
14858
-	lsls	r3, r3, #10
14859
-	strh	ip, [r9, #2454]	@ movhi
14860
-	str	r3, [r2, #1252]
14861
-	mov	r2, r1
14862
-	str	r3, [r0, #4]
14863
-	bl	FlashEraseBlocks
14864
-.L2423:
14865
-	movs	r1, #1
14866
-	ldr	r9, .L2434+8
14867
-	mov	r2, r1
14868
-	mov	r3, r1
14869
-	add	r0, r9, #1248
14870
-	bl	FlashProgPages
14871
-	ldrh	r3, [r4, #2454]
14872
-	adds	r3, r3, #1
14873
-	strh	r3, [r4, #2454]	@ movhi
14874
-	ldr	r3, [r5, #1248]
14875
-	adds	r2, r3, #1
14876
-	bne	.L2424
14877
-	add	r8, r8, #1
14878
-	ldr	r0, .L2434+16
14879
-	ldr	r1, [r9, #1252]
14880
-	uxth	r8, r8
14881
-	bl	printk
14882
-	cmp	r8, #3
14883
-	bls	.L2422
14884
-	ldr	r0, .L2434+20
14885
-	mov	r2, r8
14886
-	ldr	r1, [r9, #1252]
14887
-	bl	printk
14888
-	movs	r3, #1
14889
-	str	r3, [r7, #224]
14890
-	b	.L2419
14891
-.L2424:
14892
-	add	r10, r10, #1
14893
-	cmp	r10, #1
14894
-	beq	.L2422
15180
+	b	.L2347
15181
+.L2354:
15182
+	mov	r9, #1
15183
+	b	.L2349
15184
+.L2351:
15185
+	add	r9, r9, #1
15186
+	cmp	r9, #1
15187
+	ble	.L2354
14895
15188
 	cmp	r3, #256
14896
-	beq	.L2422
14897
-.L2419:
14898
-	movs	r0, #0
14899
-	add	sp, sp, #20
14900
-	@ sp needed
14901
-	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
14902
-.L2435:
15189
+	bne	.L2346
15190
+	b	.L2349
15191
+.L2359:
14903
15192
 	.align	2
14904
-.L2434:
15193
+.L2358:
14905
15194
 	.word	.LANCHOR2
14906
15195
 	.word	.LANCHOR0
14907
15196
 	.word	.LANCHOR4
14908
15197
 	.word	.LC126
14909
15198
 	.word	.LC127
14910
15199
 	.word	.LC128
15200
+	.word	.LANCHOR4+1256
14911
15201
 	.fnend
14912
15202
 	.size	FtlBbmTblFlush, .-FtlBbmTblFlush
14913
15203
 	.align	1
14914
15204
 	.global	allocate_data_superblock
15205
+	.syntax unified
14915
15206
 	.thumb
14916
15207
 	.thumb_func
15208
+	.fpu softvfp
14917
15209
 	.type	allocate_data_superblock, %function
14918
15210
 allocate_data_superblock:
14919
15211
 	.fnstart
..
..
@@ -14922,263 +15214,258 @@
14922
15214
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
14923
15215
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
14924
15216
 	mov	r5, r0
14925
-	ldr	r4, .L2492
15217
+	ldr	r4, .L2409
14926
15218
 	.pad #20
14927
15219
 	sub	sp, sp, #20
14928
-	ldr	r3, [r4, #224]
15220
+	ldr	r3, [r4, #228]
14929
15221
 	cmp	r3, #0
14930
-	bne	.L2437
14931
-	ldr	r9, .L2492+16
14932
-	mov	r8, r4
14933
-.L2438:
14934
-	ldr	r3, .L2492+4
15222
+	bne	.L2361
15223
+.L2362:
15224
+	ldr	r3, .L2409+4
15225
+	ldr	r7, .L2409+8
14935
15226
 	ldrb	r2, [r5, #8]	@ zero_extendqisi2
14936
15227
 	cmp	r5, r3
14937
-	bne	.L2439
14938
-	ldrh	r7, [r8, #312]
14939
-	ldr	r6, [r8, #1132]
14940
-	lsrs	r1, r7, #1
14941
-	mul	r0, r6, r7
14942
-	adds	r3, r1, #1
14943
-	add	r3, r3, r0, lsr #2
14944
-	ldr	r0, [r9, #2244]
14945
-	uxth	r3, r3
14946
-	cbz	r0, .L2462
14947
-	ldr	r0, [r8, #532]
15228
+	bne	.L2363
15229
+	ldrh	ip, [r4, #316]
15230
+	ldr	r3, [r4, #1132]
15231
+	lsr	r6, ip, #1
15232
+	mul	r0, r3, ip
15233
+	adds	r1, r6, #1
15234
+	add	r1, r1, r0, lsr #2
15235
+	ldr	r0, [r7, #2248]
15236
+	uxth	r1, r1
15237
+	cbz	r0, .L2364
15238
+	ldr	r0, [r4, #532]
14948
15239
 	cmp	r0, #39
14949
-	bhi	.L2462
15240
+	bhi	.L2364
14950
15241
 	cmp	r0, #2
14951
-	bls	.L2467
14952
-	lsls	r0, r7, #31
14953
-	bpl	.L2440
14954
-	cbz	r6, .L2464
14955
-	b	.L2440
14956
-.L2439:
15242
+	bls	.L2391
15243
+	tst	ip, #1
15244
+	beq	.L2387
15245
+	cmp	r3, #0
15246
+	beq	.L2391
15247
+.L2387:
15248
+	mov	r1, r6
15249
+	b	.L2364
15250
+.L2363:
14957
15251
 	cmp	r2, #1
14958
-	bne	.L2467
14959
-	ldrh	r3, [r9, #2340]
15252
+	bne	.L2391
15253
+	ldrh	r3, [r7, #2344]
14960
15254
 	cmp	r3, #1
14961
-	beq	.L2467
14962
-	ldrb	r3, [r9, #144]	@ zero_extendqisi2
14963
-	cbnz	r3, .L2467
14964
-	ldrh	r0, [r8, #312]
14965
-	ldr	r3, [r9, #2244]
14966
-	lsrs	r1, r0, #3
14967
-	cbz	r3, .L2440
14968
-	ldr	r3, [r8, #532]
14969
-	cmp	r3, #1
14970
-	bhi	.L2440
14971
-	rsb	r0, r0, r0, lsl #3
14972
-	ubfx	r1, r0, #3, #16
14973
-	b	.L2440
14974
-.L2462:
14975
-	mov	r1, r3
14976
-.L2440:
14977
-	cbz	r1, .L2441
15255
+	beq	.L2391
15256
+	ldrb	r3, [r7, #152]	@ zero_extendqisi2
15257
+	cmp	r3, #0
15258
+	bne	.L2391
15259
+	ldrh	r3, [r4, #316]
15260
+	ldr	r0, [r7, #2248]
15261
+	lsrs	r1, r3, #3
15262
+	cbz	r0, .L2364
15263
+	ldr	r0, [r4, #532]
15264
+	cmp	r0, #1
15265
+	bhi	.L2364
15266
+	rsb	r3, r3, r3, lsl #3
15267
+	ubfx	r1, r3, #3, #16
15268
+.L2364:
15269
+	cbz	r1, .L2365
14978
15270
 	subs	r1, r1, #1
14979
15271
 	uxth	r1, r1
14980
-	b	.L2441
14981
-.L2464:
14982
-	mov	r1, r6
14983
-	b	.L2441
14984
-.L2467:
14985
-	movs	r1, #0
14986
-.L2441:
14987
-	ldr	r0, .L2492+8
15272
+.L2365:
15273
+	ldr	r0, .L2409+12
14988
15274
 	bl	List_pop_index_node
14989
-	ldrh	r3, [r4, #312]
15275
+	ldrh	r3, [r4, #316]
15276
+	uxth	r9, r0
14990
15277
 	subs	r3, r3, #1
14991
-	strh	r3, [r4, #312]	@ movhi
14992
-	ldrh	r3, [r9, #2328]
14993
-	uxth	r6, r0
14994
-	cmp	r3, r6
14995
-	bls	.L2438
14996
-	ldr	r3, [r8, #296]
14997
-	ldrh	r7, [r3, r6, lsl #1]
14998
-	cmp	r7, #0
14999
-	bne	.L2438
15000
-	strh	r6, [r5]	@ movhi
15278
+	strh	r3, [r4, #316]	@ movhi
15279
+	ldrh	r3, [r7, #2332]
15280
+	cmp	r3, r9
15281
+	bls	.L2362
15282
+	ldr	r3, [r4, #300]
15283
+	movw	fp, #65535
15284
+	mov	r6, r9
15285
+	ldrh	r8, [r3, r9, lsl #1]
15286
+	cmp	r8, #0
15287
+	bne	.L2362
15288
+	strh	r9, [r5]	@ movhi
15001
15289
 	mov	r0, r5
15002
15290
 	bl	make_superblock
15003
15291
 	ldrb	r3, [r5, #7]	@ zero_extendqisi2
15004
-	cbz	r3, .L2443
15005
-	ldr	r0, [r8, #228]
15292
+	cmp	r3, #0
15293
+	beq	.L2367
15294
+	ldr	r0, [r4, #232]
15006
15295
 	movs	r2, #36
15007
-	ldrh	ip, [r9, #2320]
15008
-	add	lr, r5, #14
15009
-	movw	r10, #65535
15296
+	ldrh	r1, [r7, #2324]
15297
+	add	r10, r5, #16
15298
+	mov	ip, r10
15299
+	mov	lr, r8
15010
15300
 	mov	r3, r0
15011
-	mla	r1, r2, ip, r0
15012
-	mov	ip, r7
15301
+	str	r2, [sp, #8]
15302
+	mla	r1, r2, r1, r0
15013
15303
 	str	r1, [sp, #4]
15014
-	b	.L2444
15015
-.L2443:
15016
-	ldr	r3, [r8, #296]
15017
-	b	.L2487
15018
-.L2444:
15019
-	ldr	r1, [sp, #4]
15020
-	cmp	r3, r1
15021
-	beq	.L2489
15022
-	str	ip, [r3, #8]
15023
-	adds	r3, r3, #36
15024
-	str	ip, [r3, #-24]
15025
-	ldrh	r1, [lr, #2]!
15026
-	cmp	r1, r10
15027
-	itttt	ne
15028
-	lslne	r1, r1, #10
15029
-	mlane	fp, r2, r7, r0
15030
-	addne	r7, r7, #1
15031
-	uxthne	r7, r7
15032
-	it	ne
15033
-	strne	r1, [fp, #4]
15034
-	b	.L2444
15035
-.L2489:
15036
-	ldr	r3, [r9, #2244]
15037
-	cbz	r3, .L2447
15038
-	ldr	r3, .L2492+12
15304
+.L2368:
15305
+	ldr	r2, [sp, #4]
15306
+	cmp	r2, r3
15307
+	bne	.L2370
15308
+	ldr	r3, [r7, #2248]
15309
+	cbz	r3, .L2371
15310
+	ldr	r3, .L2409+16
15039
15311
 	cmp	r5, r3
15040
-	bne	.L2447
15041
-	ldr	r3, [r8, #232]
15312
+	bne	.L2371
15313
+	ldr	r3, [r4, #236]
15042
15314
 	ldrh	r3, [r3, r6, lsl #1]
15043
15315
 	cmp	r3, #40
15044
15316
 	itt	hi
15045
15317
 	movhi	r3, #0
15046
-	strbhi	r3, [r8, #324]
15047
-.L2447:
15318
+	strbhi	r3, [r4, #328]
15319
+.L2371:
15048
15320
 	ldrb	r3, [r5, #8]	@ zero_extendqisi2
15049
-	ldr	r2, [r4, #232]
15050
-	cbnz	r3, .L2448
15051
-	ldrh	r1, [r2, r6, lsl #1]
15052
-	cbz	r1, .L2468
15053
-	ldrh	r3, [r9, #2380]
15321
+	ldr	r2, [r4, #236]
15322
+	cmp	r3, #0
15323
+	bne	.L2372
15324
+	ldrh	r3, [r2, r6, lsl #1]
15325
+	cmp	r3, #0
15326
+	beq	.L2373
15327
+	ldrh	r1, [r7, #2382]
15054
15328
 	add	r3, r3, r1
15055
-	uxth	r3, r3
15056
-	b	.L2449
15057
-.L2468:
15058
-	movs	r3, #2
15059
-.L2449:
15329
+.L2407:
15060
15330
 	strh	r3, [r2, r6, lsl #1]	@ movhi
15061
-	mov	r0, r6
15062
-	ldr	r3, [r4, #516]
15063
15331
 	movs	r1, #0
15332
+	ldr	r3, [r4, #516]
15333
+	mov	r0, r9
15064
15334
 	adds	r3, r3, #1
15065
15335
 	str	r3, [r4, #516]
15066
15336
 	bl	ftl_set_blk_mode
15067
-	b	.L2450
15068
-.L2448:
15069
-	ldrh	r3, [r2, r6, lsl #1]
15070
-	lsrs	r0, r6, #5
15071
-	and	r1, r6, #31
15072
-	adds	r3, r3, #1
15073
-	strh	r3, [r2, r6, lsl #1]	@ movhi
15074
-	ldr	r3, [r4, #520]
15075
-	ldr	r2, [r4, #472]
15076
-	adds	r3, r3, #1
15077
-	str	r3, [r4, #520]
15078
-	movs	r3, #1
15079
-	lsls	r3, r3, r1
15080
-	ldr	r1, [r2, r0, lsl #2]
15081
-	orrs	r3, r3, r1
15082
-	str	r3, [r2, r0, lsl #2]
15083
-.L2450:
15084
-	ldr	r3, [r4, #232]
15337
+.L2375:
15338
+	ldr	r3, [r4, #236]
15085
15339
 	ldr	r2, [r4, #528]
15086
-	ldr	r0, [r4, #516]
15340
+	ldrh	r0, [r7, #2382]
15087
15341
 	ldrh	r3, [r3, r6, lsl #1]
15088
-	ldrh	r1, [r9, #2328]
15342
+	ldrh	r1, [r7, #2332]
15089
15343
 	cmp	r3, r2
15090
-	ldrh	r2, [r9, #2380]
15344
+	ldr	r2, [r4, #516]
15091
15345
 	it	hi
15092
-	strhi	r3, [r8, #528]
15346
+	strhi	r3, [r4, #528]
15093
15347
 	ldr	r3, [r4, #520]
15094
-	mla	r0, r0, r2, r3
15348
+	mla	r0, r2, r0, r3
15095
15349
 	bl	__aeabi_uidiv
15096
15350
 	ldr	r2, [r4, #3360]
15097
-	ldr	r1, [r4, #228]
15351
+	ldr	r1, [r4, #232]
15352
+	str	r0, [r4, #524]
15098
15353
 	ldr	r3, [r2, #16]
15099
15354
 	adds	r3, r3, #1
15100
15355
 	str	r3, [r2, #16]
15101
-	movs	r3, #36
15102
-	adds	r2, r1, #4
15103
-	mla	r3, r3, r7, r1
15104
-	adds	r3, r3, #40
15105
-	str	r0, [r4, #524]
15106
-.L2452:
15107
-	adds	r2, r2, #36
15356
+	movs	r2, #36
15357
+	mla	r2, r2, r8, r1
15358
+	adds	r3, r1, #4
15359
+	adds	r2, r2, #40
15360
+.L2377:
15361
+	adds	r3, r3, #36
15108
15362
 	cmp	r2, r3
15109
-	beq	.L2490
15110
-	ldr	r1, [r2, #-36]
15111
-	bic	r1, r1, #1020
15112
-	bic	r1, r1, #3
15113
-	str	r1, [r2, #-36]
15114
-	b	.L2452
15115
-.L2490:
15116
-	ldrb	r3, [r9, #144]	@ zero_extendqisi2
15117
-	cbz	r3, .L2454
15363
+	bne	.L2378
15364
+	ldrb	r3, [r7, #152]	@ zero_extendqisi2
15365
+	cbz	r3, .L2379
15118
15366
 	ldrb	r3, [r5, #8]	@ zero_extendqisi2
15119
-	mov	r2, r7
15120
-	ldr	r0, [r4, #228]
15367
+	mov	r2, r8
15368
+	ldr	r0, [r4, #232]
15121
15369
 	cmp	r3, #1
15122
15370
 	ite	eq
15123
15371
 	moveq	r1, #0
15124
15372
 	movne	r1, #1
15125
15373
 	bl	FlashEraseBlocks
15126
-.L2454:
15127
-	mov	r2, r7
15128
-	ldr	r0, [r4, #228]
15374
+.L2379:
15129
15375
 	ldrb	r1, [r5, #8]	@ zero_extendqisi2
15130
-	mov	r10, #0
15376
+	mov	r2, r8
15377
+	ldr	r0, [r4, #232]
15378
+	mov	fp, #0
15131
15379
 	bl	FlashEraseBlocks
15132
-	add	r2, r5, #16
15133
-	mov	ip, #36
15134
-	mov	fp, r10
15135
-.L2456:
15136
-	uxth	r3, r10
15137
-	cmp	r3, r7
15138
-	bcs	.L2491
15139
-	mul	r3, ip, r10
15140
-	ldr	r1, [r4, #228]
15141
-	adds	r0, r1, r3
15142
-	ldr	r3, [r1, r3]
15143
-	adds	r1, r3, #1
15144
-	bne	.L2457
15145
-	ldr	r0, [r0, #4]
15146
-	add	fp, fp, #1
15147
-	str	ip, [sp, #12]
15148
-	ubfx	r0, r0, #10, #16
15149
-	str	r3, [sp, #8]
15150
-	str	r2, [sp, #4]
15151
-	bl	FtlBbmMapBadBlock
15152
-	ldr	r3, [sp, #8]
15153
-	ldr	r2, [sp, #4]
15154
-	ldr	ip, [sp, #12]
15155
-	strh	r3, [r2]	@ movhi
15156
-	ldrb	r3, [r5, #7]	@ zero_extendqisi2
15157
-	subs	r3, r3, #1
15158
-	strb	r3, [r5, #7]
15159
-.L2457:
15160
-	add	r10, r10, #1
15161
-	adds	r2, r2, #2
15162
-	b	.L2456
15163
-.L2491:
15164
-	cmp	fp, #0
15165
-	beq	.L2459
15166
-	mov	r0, r6
15380
+	mov	r3, fp
15381
+	movs	r1, #36
15382
+.L2381:
15383
+	uxth	r2, fp
15384
+	cmp	r8, r2
15385
+	bhi	.L2383
15386
+	cmp	r3, #0
15387
+	ble	.L2384
15388
+	mov	r0, r9
15167
15389
 	bl	update_multiplier_value
15168
15390
 	bl	FtlBbmTblFlush
15169
-.L2459:
15170
-	ldrb	r3, [r5, #7]	@ zero_extendqisi2
15171
-	cbnz	r3, .L2460
15172
-	ldr	r3, [r4, #296]
15173
-.L2487:
15391
+.L2384:
15392
+	ldrb	r2, [r5, #7]	@ zero_extendqisi2
15393
+	cmp	r2, #0
15394
+	bne	.L2385
15395
+	ldr	r3, [r4, #300]
15174
15396
 	movw	r2, #65535
15175
15397
 	strh	r2, [r3, r6, lsl #1]	@ movhi
15176
-	b	.L2438
15177
-.L2460:
15178
-	ldr	r2, .L2492+16
15179
-	ldrh	r2, [r2, #2388]
15180
-	strh	r6, [r5]	@ movhi
15181
-	smulbb	r3, r2, r3
15398
+	b	.L2362
15399
+.L2391:
15400
+	movs	r1, #0
15401
+	b	.L2365
15402
+.L2367:
15403
+	ldr	r3, [r4, #300]
15404
+	strh	fp, [r3, r9, lsl #1]	@ movhi
15405
+	b	.L2362
15406
+.L2370:
15407
+	str	lr, [r3, #8]
15408
+	str	lr, [r3, #12]
15409
+	ldrh	r1, [ip], #2
15410
+	cmp	r1, fp
15411
+	beq	.L2369
15412
+	ldr	r2, [sp, #8]
15413
+	lsls	r1, r1, #10
15414
+	mla	r2, r2, r8, r0
15415
+	add	r8, r8, #1
15416
+	uxth	r8, r8
15417
+	str	r1, [r2, #4]
15418
+.L2369:
15419
+	adds	r3, r3, #36
15420
+	b	.L2368
15421
+.L2373:
15422
+	movs	r3, #2
15423
+	b	.L2407
15424
+.L2372:
15425
+	ldrh	r3, [r2, r6, lsl #1]
15426
+	mov	r0, r9
15427
+	adds	r3, r3, #1
15428
+	strh	r3, [r2, r6, lsl #1]	@ movhi
15429
+	ldr	r3, [r4, #520]
15430
+	adds	r3, r3, #1
15431
+	str	r3, [r4, #520]
15432
+	bl	ftl_set_blk_mode.part.9
15433
+	b	.L2375
15434
+.L2378:
15435
+	ldr	r1, [r3, #-36]
15436
+	bic	r1, r1, #1020
15437
+	bic	r1, r1, #3
15438
+	str	r1, [r3, #-36]
15439
+	b	.L2377
15440
+.L2383:
15441
+	mul	r2, r1, fp
15442
+	ldr	r0, [r4, #232]
15443
+	add	ip, r0, r2
15444
+	ldr	r2, [r0, r2]
15445
+	adds	r0, r2, #1
15446
+	bne	.L2382
15447
+	ldr	r0, [ip, #4]
15448
+	adds	r3, r3, #1
15449
+	str	r1, [sp, #12]
15450
+	str	r2, [sp, #8]
15451
+	ubfx	r0, r0, #10, #16
15452
+	str	r3, [sp, #4]
15453
+	bl	FtlBbmMapBadBlock
15454
+	ldr	r2, [sp, #8]
15455
+	ldr	r1, [sp, #12]
15456
+	ldr	r3, [sp, #4]
15457
+	strh	r2, [r10]	@ movhi
15458
+	ldrb	r2, [r5, #7]	@ zero_extendqisi2
15459
+	subs	r2, r2, #1
15460
+	strb	r2, [r5, #7]
15461
+.L2382:
15462
+	add	fp, fp, #1
15463
+	add	r10, r10, #2
15464
+	b	.L2381
15465
+.L2385:
15466
+	ldrh	r3, [r7, #2390]
15467
+	strh	r9, [r5]	@ movhi
15468
+	smulbb	r3, r3, r2
15182
15469
 	movs	r2, #0
15183
15470
 	strh	r2, [r5, #2]	@ movhi
15184
15471
 	strb	r2, [r5, #6]
..
..
@@ -15188,28 +15475,30 @@
15188
15475
 	str	r2, [r5, #12]
15189
15476
 	adds	r2, r2, #1
15190
15477
 	str	r2, [r4, #508]
15191
-	ldr	r2, [r4, #296]
15478
+	ldr	r2, [r4, #300]
15192
15479
 	ldrh	r1, [r5]
15193
15480
 	strh	r3, [r2, r1, lsl #1]	@ movhi
15194
-.L2437:
15481
+.L2361:
15195
15482
 	movs	r0, #0
15196
15483
 	add	sp, sp, #20
15197
15484
 	@ sp needed
15198
15485
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
15199
-.L2493:
15486
+.L2410:
15200
15487
 	.align	2
15201
-.L2492:
15488
+.L2409:
15202
15489
 	.word	.LANCHOR2
15203
-	.word	.LANCHOR2+412
15204
-	.word	.LANCHOR2+308
15205
-	.word	.LANCHOR2+316
15490
+	.word	.LANCHOR2+416
15206
15491
 	.word	.LANCHOR0
15492
+	.word	.LANCHOR2+312
15493
+	.word	.LANCHOR2+320
15207
15494
 	.fnend
15208
15495
 	.size	allocate_data_superblock, .-allocate_data_superblock
15209
15496
 	.align	1
15210
15497
 	.global	FtlGcFreeBadSuperBlk
15498
+	.syntax unified
15211
15499
 	.thumb
15212
15500
 	.thumb_func
15501
+	.fpu softvfp
15213
15502
 	.type	FtlGcFreeBadSuperBlk, %function
15214
15503
 FtlGcFreeBadSuperBlk:
15215
15504
 	.fnstart
..
..
@@ -15218,209 +15507,212 @@
15218
15507
 	push	{r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr}
15219
15508
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
15220
15509
 	.pad #12
15221
-	ldr	r5, .L2507
15222
-	str	r0, [sp]
15223
-	ldrh	r3, [r5, #1182]
15224
-	cmp	r3, #0
15225
-	beq	.L2496
15226
-	ldr	r7, .L2507+4
15227
-	mov	r10, #0
15228
-	mov	r8, r5
15229
-.L2495:
15230
-	ldrh	r2, [r7, #2320]
15231
-	uxth	r3, r10
15232
-	cmp	r2, r3
15233
-	bls	.L2504
15234
-	add	r3, r3, r7
15235
-	ldr	r1, [sp]
15236
-	mov	fp, #0
15237
-	ldrb	r0, [r3, #2348]	@ zero_extendqisi2
15238
-	bl	V2P_block
15239
-	ldr	r2, .L2507+8
15240
15510
 	mov	r9, r0
15241
-.L2497:
15242
-	ldrh	r3, [r5, #1182]
15243
-	uxth	r4, fp
15244
-	cmp	r3, r4
15245
-	bls	.L2505
15246
-	lsls	r6, r4, #1
15247
-	add	r3, r8, r6
15248
-	ldrh	r3, [r3, #1184]
15249
-	cmp	r3, r9
15250
-	bne	.L2498
15251
-	mov	r1, r9
15252
-	ldr	r0, .L2507+12
15253
-	str	r2, [sp, #4]
15254
-	bl	printk
15255
-	mov	r0, r9
15256
-	bl	FtlBbmMapBadBlock
15257
-	bl	FtlBbmTblFlush
15258
-	ldrh	r1, [r8, #1182]
15259
-	ldr	r2, [sp, #4]
15260
-	adds	r3, r2, r6
15261
-.L2499:
15262
-	cmp	r4, r1
15263
-	bcs	.L2506
15264
-	ldrh	r0, [r3, #2]
15265
-	adds	r4, r4, #1
15266
-	uxth	r4, r4
15267
-	strh	r0, [r3], #2	@ movhi
15268
-	b	.L2499
15269
-.L2506:
15270
-	subs	r1, r1, #1
15271
-	strh	r1, [r5, #1182]	@ movhi
15272
-.L2498:
15273
-	add	fp, fp, #1
15274
-	b	.L2497
15275
-.L2505:
15276
-	add	r10, r10, #1
15277
-	b	.L2495
15278
-.L2504:
15511
+	ldr	r4, .L2423
15512
+	ldrh	r3, [r4, #1182]
15513
+	cbz	r3, .L2412
15514
+	ldr	r8, .L2423+8
15515
+	movs	r6, #0
15516
+	add	r10, r4, #1184
15517
+.L2413:
15518
+	ldrh	r2, [r8, #2324]
15519
+	uxth	r3, r6
15520
+	cmp	r2, r3
15521
+	bhi	.L2419
15279
15522
 	bl	FtlGcReFreshBadBlk
15280
-.L2496:
15523
+.L2412:
15281
15524
 	movs	r0, #0
15282
15525
 	add	sp, sp, #12
15283
15526
 	@ sp needed
15284
15527
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
15285
-.L2508:
15528
+.L2419:
15529
+	uxtah	r3, r8, r6
15530
+	mov	r1, r9
15531
+	movs	r7, #0
15532
+	ldrb	r0, [r3, #2350]	@ zero_extendqisi2
15533
+	bl	V2P_block
15534
+	ldr	r2, .L2423+4
15535
+	mov	fp, r0
15536
+.L2414:
15537
+	ldrh	r3, [r4, #1182]
15538
+	uxth	r5, r7
15539
+	cmp	r3, r5
15540
+	bhi	.L2418
15541
+	adds	r6, r6, #1
15542
+	b	.L2413
15543
+.L2418:
15544
+	uxth	r3, r7
15545
+	add	r1, r4, r3, lsl #1
15546
+	ldrh	r1, [r1, #1184]
15547
+	cmp	r1, fp
15548
+	bne	.L2415
15549
+	mov	r1, fp
15550
+	mov	r0, r2
15551
+	str	r3, [sp, #4]
15552
+	str	r2, [sp]
15553
+	bl	printk
15554
+	mov	r0, fp
15555
+	bl	FtlBbmMapBadBlock
15556
+	bl	FtlBbmTblFlush
15557
+	ldr	r3, [sp, #4]
15558
+	ldrh	r1, [r4, #1182]
15559
+	ldr	r2, [sp]
15560
+	add	r3, r10, r3, lsl #1
15561
+.L2416:
15562
+	cmp	r5, r1
15563
+	bcc	.L2417
15564
+	subs	r1, r1, #1
15565
+	strh	r1, [r4, #1182]	@ movhi
15566
+.L2415:
15567
+	adds	r7, r7, #1
15568
+	b	.L2414
15569
+.L2417:
15570
+	ldrh	r0, [r3, #2]!
15571
+	adds	r5, r5, #1
15572
+	uxth	r5, r5
15573
+	strh	r0, [r3, #-2]	@ movhi
15574
+	b	.L2416
15575
+.L2424:
15286
15576
 	.align	2
15287
-.L2507:
15577
+.L2423:
15288
15578
 	.word	.LANCHOR2
15289
-	.word	.LANCHOR0
15290
-	.word	.LANCHOR2+1184
15291
15579
 	.word	.LC129
15580
+	.word	.LANCHOR0
15292
15581
 	.fnend
15293
15582
 	.size	FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk
15294
15583
 	.align	1
15295
15584
 	.global	update_vpc_list
15585
+	.syntax unified
15296
15586
 	.thumb
15297
15587
 	.thumb_func
15588
+	.fpu softvfp
15298
15589
 	.type	update_vpc_list, %function
15299
15590
 update_vpc_list:
15300
15591
 	.fnstart
15301
15592
 	@ args = 0, pretend = 0, frame = 0
15302
15593
 	@ frame_needed = 0, uses_anonymous_args = 0
15303
-	ldr	r2, .L2518
15594
+	ldr	r2, .L2433
15304
15595
 	push	{r3, r4, r5, lr}
15305
15596
 	.save {r3, r4, r5, lr}
15306
15597
 	mov	r4, r0
15307
-	ldr	r3, [r2, #296]
15308
15598
 	mov	r5, r2
15599
+	ldr	r3, [r2, #300]
15309
15600
 	ldrh	r3, [r3, r0, lsl #1]
15310
-	cbnz	r3, .L2510
15601
+	cbnz	r3, .L2426
15311
15602
 	ldrh	r1, [r2, #556]
15312
15603
 	cmp	r1, r0
15313
-	bne	.L2511
15604
+	bne	.L2427
15314
15605
 	movw	r3, #65535
15315
15606
 	strh	r3, [r2, #556]	@ movhi
15316
-	b	.L2512
15317
-.L2511:
15318
-	ldrh	r1, [r2, #316]
15319
-	cmp	r1, r0
15320
-	beq	.L2517
15321
-	ldrh	r1, [r2, #364]
15322
-	cmp	r1, r0
15323
-	beq	.L2517
15324
-	ldrh	r2, [r2, #412]
15325
-	cmp	r2, r0
15326
-	beq	.L2517
15327
-.L2512:
15607
+.L2428:
15328
15608
 	mov	r1, r4
15329
-	ldr	r0, .L2518+4
15609
+	ldr	r0, .L2433+4
15330
15610
 	bl	List_remove_node
15331
-	ldrh	r3, [r5, #304]
15611
+	ldrh	r3, [r5, #308]
15332
15612
 	mov	r0, r4
15333
15613
 	subs	r3, r3, #1
15334
-	strh	r3, [r5, #304]	@ movhi
15614
+	strh	r3, [r5, #308]	@ movhi
15335
15615
 	bl	free_data_superblock
15336
15616
 	mov	r0, r4
15337
15617
 	bl	FtlGcFreeBadSuperBlk
15338
-	movs	r0, #1
15618
+	movs	r3, #1
15619
+	b	.L2425
15620
+.L2427:
15621
+	ldrh	r1, [r2, #320]
15622
+	cmp	r1, r0
15623
+	beq	.L2425
15624
+	ldrh	r1, [r2, #368]
15625
+	cmp	r1, r0
15626
+	beq	.L2425
15627
+	ldrh	r2, [r2, #416]
15628
+	cmp	r2, r0
15629
+	bne	.L2428
15630
+.L2425:
15631
+	mov	r0, r3
15339
15632
 	pop	{r3, r4, r5, pc}
15340
-.L2510:
15633
+.L2426:
15341
15634
 	bl	List_update_data_list
15342
-.L2517:
15343
-	movs	r0, #0
15344
-	pop	{r3, r4, r5, pc}
15345
-.L2519:
15635
+	movs	r3, #0
15636
+	b	.L2425
15637
+.L2434:
15346
15638
 	.align	2
15347
-.L2518:
15639
+.L2433:
15348
15640
 	.word	.LANCHOR2
15349
-	.word	.LANCHOR2+292
15641
+	.word	.LANCHOR2+296
15350
15642
 	.fnend
15351
15643
 	.size	update_vpc_list, .-update_vpc_list
15352
15644
 	.align	1
15353
15645
 	.global	decrement_vpc_count
15646
+	.syntax unified
15354
15647
 	.thumb
15355
15648
 	.thumb_func
15649
+	.fpu softvfp
15356
15650
 	.type	decrement_vpc_count, %function
15357
15651
 decrement_vpc_count:
15358
15652
 	.fnstart
15359
15653
 	@ args = 0, pretend = 0, frame = 0
15360
15654
 	@ frame_needed = 0, uses_anonymous_args = 0
15655
+	push	{r3, r4, r5, lr}
15656
+	.save {r3, r4, r5, lr}
15361
15657
 	movw	r3, #65535
15362
15658
 	cmp	r0, r3
15363
-	push	{r4, r5, r6, lr}
15364
-	.save {r4, r5, r6, lr}
15365
15659
 	mov	r4, r0
15366
-	ldr	r5, .L2530
15367
-	beq	.L2521
15368
-	ldr	r3, [r5, #296]
15660
+	ldr	r5, .L2445
15661
+	beq	.L2436
15662
+	ldr	r3, [r5, #300]
15369
15663
 	ldrh	r2, [r3, r0, lsl #1]
15370
-	cbnz	r2, .L2522
15371
-	mov	r1, r4
15372
-	ldr	r0, .L2530+4
15664
+	cbnz	r2, .L2437
15665
+	mov	r1, r0
15666
+	ldr	r0, .L2445+4
15373
15667
 	bl	printk
15374
-	ldr	r3, [r5, #296]
15668
+	ldr	r3, [r5, #300]
15375
15669
 	movs	r2, #32
15376
-	add	r0, r5, #308
15377
15670
 	mov	r1, r4
15671
+	add	r0, r5, #312
15378
15672
 	strh	r2, [r3, r4, lsl #1]	@ movhi
15379
15673
 	bl	test_node_in_list
15380
-	cbz	r0, .L2523
15674
+	cbz	r0, .L2438
15381
15675
 	mov	r1, r4
15382
-	add	r0, r5, #308
15676
+	add	r0, r5, #312
15383
15677
 	bl	List_remove_node
15384
-	ldrh	r3, [r5, #312]
15678
+	ldrh	r3, [r5, #316]
15385
15679
 	mov	r0, r4
15386
15680
 	subs	r3, r3, #1
15387
-	strh	r3, [r5, #312]	@ movhi
15681
+	strh	r3, [r5, #316]	@ movhi
15388
15682
 	bl	INSERT_DATA_LIST
15389
-	ldr	r3, [r5, #296]
15390
-	ldr	r0, .L2530+8
15683
+	ldr	r3, [r5, #300]
15391
15684
 	mov	r1, r4
15685
+	ldr	r0, .L2445+8
15392
15686
 	ldrh	r2, [r3, r4, lsl #1]
15393
15687
 	bl	printk
15394
-.L2523:
15688
+.L2438:
15395
15689
 	mov	r0, r4
15396
15690
 	bl	FtlGcRefreshBlock
15397
-	b	.L2526
15398
-.L2522:
15691
+.L2441:
15692
+	movs	r0, #0
15693
+	pop	{r3, r4, r5, pc}
15694
+.L2437:
15399
15695
 	subs	r2, r2, #1
15400
15696
 	strh	r2, [r3, r0, lsl #1]	@ movhi
15401
-.L2521:
15697
+.L2436:
15402
15698
 	ldrh	r0, [r5, #3460]
15403
15699
 	movw	r3, #65535
15404
-	ldr	r6, .L2530
15405
15700
 	cmp	r0, r3
15406
-	bne	.L2525
15407
-	strh	r4, [r6, #3460]	@ movhi
15408
-	b	.L2526
15409
-.L2525:
15410
-	cmp	r0, r4
15411
-	beq	.L2526
15701
+	bne	.L2440
15702
+	strh	r4, [r5, #3460]	@ movhi
15703
+	b	.L2441
15704
+.L2440:
15705
+	cmp	r4, r0
15706
+	beq	.L2441
15412
15707
 	bl	update_vpc_list
15413
-	strh	r4, [r6, #3460]	@ movhi
15414
15708
 	adds	r0, r0, #0
15709
+	strh	r4, [r5, #3460]	@ movhi
15415
15710
 	it	ne
15416
15711
 	movne	r0, #1
15417
-	pop	{r4, r5, r6, pc}
15418
-.L2526:
15419
-	movs	r0, #0
15420
-	pop	{r4, r5, r6, pc}
15421
-.L2531:
15712
+	pop	{r3, r4, r5, pc}
15713
+.L2446:
15422
15714
 	.align	2
15423
-.L2530:
15715
+.L2445:
15424
15716
 	.word	.LANCHOR2
15425
15717
 	.word	.LC130
15426
15718
 	.word	.LC131
..
..
@@ -15428,8 +15720,10 @@
15428
15720
 	.size	decrement_vpc_count, .-decrement_vpc_count
15429
15721
 	.align	1
15430
15722
 	.global	FtlSlcSuperblockCheck
15723
+	.syntax unified
15431
15724
 	.thumb
15432
15725
 	.thumb_func
15726
+	.fpu softvfp
15433
15727
 	.type	FtlSlcSuperblockCheck, %function
15434
15728
 FtlSlcSuperblockCheck:
15435
15729
 	.fnstart
..
..
@@ -15440,161 +15734,157 @@
15440
15734
 	mov	r4, r0
15441
15735
 	ldrh	r3, [r0, #4]
15442
15736
 	cmp	r3, #0
15443
-	beq	.L2532
15737
+	beq	.L2447
15444
15738
 	ldrh	r3, [r0]
15445
-	movw	r5, #65535
15446
-	cmp	r3, r5
15447
-	beq	.L2532
15739
+	movw	r6, #65535
15740
+	cmp	r3, r6
15741
+	beq	.L2447
15448
15742
 	ldrb	r3, [r0, #6]	@ zero_extendqisi2
15449
-	ldr	r7, .L2544
15743
+	ldr	r5, .L2458
15744
+	ldr	r7, .L2458+4
15450
15745
 	adds	r3, r3, #8
15451
-	ldr	r6, .L2544+4
15452
15746
 	ldrh	r3, [r0, r3, lsl #1]
15453
-.L2536:
15454
-	cmp	r3, r5
15455
-	bne	.L2543
15456
-.L2538:
15457
-	ldrb	r3, [r4, #6]	@ zero_extendqisi2
15458
-	ldrh	r2, [r7, #2320]
15459
-	adds	r3, r3, #1
15460
-	uxtb	r3, r3
15461
-	strb	r3, [r4, #6]
15462
-	cmp	r2, r3
15463
-	itttt	eq
15464
-	ldrheq	r3, [r4, #2]
15465
-	addeq	r3, r3, #1
15466
-	strheq	r3, [r4, #2]	@ movhi
15467
-	moveq	r3, #0
15468
-	it	eq
15469
-	strbeq	r3, [r4, #6]
15470
-	ldrb	r3, [r4, #6]	@ zero_extendqisi2
15471
-	adds	r3, r3, #8
15472
-	ldrh	r3, [r4, r3, lsl #1]
15473
-	b	.L2536
15474
-.L2543:
15475
-	ldrb	r1, [r4, #8]	@ zero_extendqisi2
15476
-	cmp	r1, #1
15477
-	bne	.L2539
15478
-	ldrb	r3, [r7, #144]	@ zero_extendqisi2
15479
-	cbnz	r3, .L2539
15747
+.L2451:
15748
+	cmp	r3, r6
15749
+	beq	.L2453
15750
+	ldrb	r2, [r4, #8]	@ zero_extendqisi2
15751
+	cmp	r2, #1
15752
+	bne	.L2454
15753
+	ldrb	r3, [r5, #152]	@ zero_extendqisi2
15754
+	cbnz	r3, .L2454
15480
15755
 	ldrh	r3, [r4, #2]
15481
-	add	r3, r6, r3, lsl #1
15756
+	add	r3, r7, r3, lsl #1
15482
15757
 	ldrh	r3, [r3, #1220]
15483
-	cmp	r3, r5
15484
-	bne	.L2539
15758
+	cmp	r3, r6
15759
+	bne	.L2454
15485
15760
 	ldrh	r3, [r4, #4]
15486
15761
 	ldrh	r0, [r4]
15487
15762
 	subs	r3, r3, #1
15488
15763
 	strh	r3, [r4, #4]	@ movhi
15489
15764
 	bl	decrement_vpc_count
15490
15765
 	ldrh	r2, [r4, #4]
15491
-	cmp	r2, #0
15492
-	bne	.L2538
15766
+	cbnz	r2, .L2453
15493
15767
 	ldrh	r3, [r4, #2]
15494
15768
 	strb	r2, [r4, #6]
15495
15769
 	adds	r3, r3, #1
15496
15770
 	strh	r3, [r4, #2]	@ movhi
15497
15771
 	pop	{r3, r4, r5, r6, r7, pc}
15498
-.L2539:
15499
-	ldr	r2, .L2544
15500
-	ldrb	r3, [r2, #144]	@ zero_extendqisi2
15501
-	cbz	r3, .L2532
15502
-	cmp	r1, #1
15503
-	bne	.L2532
15504
-	ldrh	r1, [r4, #2]
15505
-	ldrh	r3, [r2, #2390]
15506
-	cmp	r1, r3
15507
-	bcc	.L2532
15508
-	ldr	r3, .L2544+4
15509
-	ldrh	r0, [r4]
15510
-	ldrh	r5, [r4, #4]
15511
-	ldr	r1, [r3, #296]
15512
-	ldrh	r3, [r1, r0, lsl #1]
15513
-	subs	r3, r3, r5
15514
-	strh	r3, [r1, r0, lsl #1]	@ movhi
15515
-	ldrh	r2, [r2, #2388]
15772
+.L2453:
15773
+	ldrb	r3, [r4, #6]	@ zero_extendqisi2
15774
+	ldrh	r2, [r5, #2324]
15775
+	adds	r3, r3, #1
15776
+	uxtb	r3, r3
15777
+	cmp	r2, r3
15778
+	strb	r3, [r4, #6]
15779
+	bne	.L2452
15780
+	ldrh	r3, [r4, #2]
15781
+	adds	r3, r3, #1
15782
+	strh	r3, [r4, #2]	@ movhi
15516
15783
 	movs	r3, #0
15784
+	strb	r3, [r4, #6]
15785
+.L2452:
15786
+	ldrb	r3, [r4, #6]	@ zero_extendqisi2
15787
+	adds	r3, r3, #8
15788
+	ldrh	r3, [r4, r3, lsl #1]
15789
+	b	.L2451
15790
+.L2454:
15791
+	ldrb	r3, [r5, #152]	@ zero_extendqisi2
15792
+	cbz	r3, .L2447
15793
+	cmp	r2, #1
15794
+	bne	.L2447
15795
+	ldrh	r2, [r4, #2]
15796
+	ldrh	r3, [r5, #2392]
15797
+	cmp	r2, r3
15798
+	bcc	.L2447
15799
+	ldr	r3, .L2458+4
15800
+	ldrh	r1, [r4]
15801
+	ldrh	r0, [r4, #4]
15802
+	ldr	r2, [r3, #300]
15803
+	ldrh	r3, [r2, r1, lsl #1]
15804
+	subs	r3, r3, r0
15805
+	strh	r3, [r2, r1, lsl #1]	@ movhi
15806
+	movs	r3, #0
15807
+	ldrh	r2, [r5, #2390]
15517
15808
 	strh	r3, [r4, #4]	@ movhi
15518
15809
 	strb	r3, [r4, #6]
15519
15810
 	strh	r2, [r4, #2]	@ movhi
15520
-.L2532:
15811
+.L2447:
15521
15812
 	pop	{r3, r4, r5, r6, r7, pc}
15522
-.L2545:
15813
+.L2459:
15523
15814
 	.align	2
15524
-.L2544:
15815
+.L2458:
15525
15816
 	.word	.LANCHOR0
15526
15817
 	.word	.LANCHOR2
15527
15818
 	.fnend
15528
15819
 	.size	FtlSlcSuperblockCheck, .-FtlSlcSuperblockCheck
15529
15820
 	.align	1
15530
15821
 	.global	get_new_active_ppa
15822
+	.syntax unified
15531
15823
 	.thumb
15532
15824
 	.thumb_func
15825
+	.fpu softvfp
15533
15826
 	.type	get_new_active_ppa, %function
15534
15827
 get_new_active_ppa:
15535
15828
 	.fnstart
15536
15829
 	@ args = 0, pretend = 0, frame = 0
15537
15830
 	@ frame_needed = 0, uses_anonymous_args = 0
15831
+	movs	r3, #0
15538
15832
 	push	{r4, r5, r6, r7, r8, lr}
15539
15833
 	.save {r4, r5, r6, r7, r8, lr}
15540
-	movs	r3, #0
15541
15834
 	strb	r3, [r0, #10]
15542
15835
 	mov	r4, r0
15543
-	ldrb	r3, [r0, #6]	@ zero_extendqisi2
15544
15836
 	movw	r7, #65535
15545
-	ldr	r8, .L2563+4
15837
+	ldrb	r3, [r0, #6]	@ zero_extendqisi2
15838
+	ldr	r5, .L2475
15839
+	ldr	r6, .L2475+4
15546
15840
 	adds	r3, r3, #8
15547
-	ldr	r5, .L2563
15548
15841
 	ldrh	r2, [r0, r3, lsl #1]
15549
-.L2547:
15842
+.L2461:
15550
15843
 	cmp	r2, r7
15551
-	ldr	r6, .L2563+4
15552
-	bne	.L2562
15553
-.L2548:
15554
-	ldrb	r3, [r4, #6]	@ zero_extendqisi2
15555
-	ldrh	r2, [r8, #2320]
15556
-	adds	r3, r3, #1
15557
-	uxtb	r3, r3
15558
-	strb	r3, [r4, #6]
15559
-	cmp	r2, r3
15560
-	itttt	eq
15561
-	ldrheq	r3, [r4, #2]
15562
-	addeq	r3, r3, #1
15563
-	strheq	r3, [r4, #2]	@ movhi
15564
-	moveq	r3, #0
15565
-	it	eq
15566
-	strbeq	r3, [r4, #6]
15567
-	ldrb	r3, [r4, #6]	@ zero_extendqisi2
15568
-	adds	r3, r3, #8
15569
-	ldrh	r2, [r4, r3, lsl #1]
15570
-	b	.L2547
15571
-.L2562:
15844
+	beq	.L2462
15572
15845
 	ldrb	r3, [r4, #8]	@ zero_extendqisi2
15573
15846
 	ldrh	r1, [r4, #2]
15574
15847
 	cmp	r3, #1
15575
15848
 	ldrh	r3, [r4, #4]
15576
-	bne	.L2550
15577
-	ldrb	r0, [r8, #144]	@ zero_extendqisi2
15578
-	cbnz	r0, .L2550
15579
-	add	r0, r5, r1, lsl #1
15849
+	bne	.L2464
15850
+	ldrb	r0, [r5, #152]	@ zero_extendqisi2
15851
+	cbnz	r0, .L2464
15852
+	add	r0, r6, r1, lsl #1
15580
15853
 	ldrh	r0, [r0, #1220]
15581
15854
 	cmp	r0, r7
15582
-	bne	.L2550
15855
+	bne	.L2464
15583
15856
 	subs	r3, r3, #1
15584
15857
 	ldrh	r0, [r4]
15585
15858
 	strh	r3, [r4, #4]	@ movhi
15586
15859
 	bl	decrement_vpc_count
15587
-	b	.L2548
15588
-.L2550:
15860
+.L2462:
15861
+	ldrb	r3, [r4, #6]	@ zero_extendqisi2
15862
+	ldrh	r2, [r5, #2324]
15863
+	adds	r3, r3, #1
15864
+	uxtb	r3, r3
15865
+	cmp	r2, r3
15866
+	strb	r3, [r4, #6]
15867
+	bne	.L2463
15868
+	ldrh	r3, [r4, #2]
15869
+	adds	r3, r3, #1
15870
+	strh	r3, [r4, #2]	@ movhi
15871
+	movs	r3, #0
15872
+	strb	r3, [r4, #6]
15873
+.L2463:
15874
+	ldrb	r3, [r4, #6]	@ zero_extendqisi2
15875
+	adds	r3, r3, #8
15876
+	ldrh	r2, [r4, r3, lsl #1]
15877
+	b	.L2461
15878
+.L2464:
15879
+	ldr	r8, .L2475+4
15880
+	orr	r6, r1, r2, lsl #10
15589
15881
 	movw	r7, #65535
15590
-	orr	r5, r1, r2, lsl #10
15591
-	mov	r8, r7
15592
15882
 	subs	r3, r3, #1
15593
15883
 	strh	r3, [r4, #4]	@ movhi
15594
-.L2551:
15884
+.L2465:
15595
15885
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
15596
-	ldrh	r1, [r6, #2320]
15597
-.L2553:
15886
+	ldrh	r1, [r5, #2324]
15887
+.L2467:
15598
15888
 	adds	r3, r3, #1
15599
15889
 	uxtb	r3, r3
15600
15890
 	cmp	r3, r1
..
..
@@ -15606,60 +15896,57 @@
15606
15896
 	add	r2, r3, #8
15607
15897
 	ldrh	r2, [r4, r2, lsl #1]
15608
15898
 	cmp	r2, r7
15609
-	beq	.L2553
15899
+	beq	.L2467
15610
15900
 	strb	r3, [r4, #6]
15611
15901
 	ldrb	r3, [r4, #8]	@ zero_extendqisi2
15612
15902
 	cmp	r3, #1
15613
-	bne	.L2558
15614
-	ldrb	r3, [r6, #144]	@ zero_extendqisi2
15615
-	cbnz	r3, .L2555
15616
-	ldrh	r2, [r4, #2]
15617
-	ldr	r3, .L2563
15618
-	add	r3, r3, r2, lsl #1
15903
+	bne	.L2460
15904
+	ldrb	r2, [r5, #152]	@ zero_extendqisi2
15905
+	ldrh	r3, [r4, #2]
15906
+	cbnz	r2, .L2469
15907
+	add	r3, r8, r3, lsl #1
15619
15908
 	ldrh	r3, [r3, #1220]
15620
-	cmp	r3, r8
15621
-	bne	.L2555
15909
+	cmp	r3, r7
15910
+	bne	.L2460
15622
15911
 	ldrh	r3, [r4, #4]
15623
-	cbz	r3, .L2555
15912
+	cbz	r3, .L2460
15624
15913
 	subs	r3, r3, #1
15625
15914
 	ldrh	r0, [r4]
15626
15915
 	strh	r3, [r4, #4]	@ movhi
15627
15916
 	bl	decrement_vpc_count
15628
-	b	.L2551
15629
-.L2555:
15630
-	ldrb	r3, [r6, #144]	@ zero_extendqisi2
15631
-	ldr	r2, .L2563+4
15632
-	cbz	r3, .L2558
15633
-	ldrh	r1, [r4, #2]
15634
-	ldrh	r3, [r2, #2390]
15635
-	cmp	r1, r3
15636
-	bcc	.L2558
15637
-	ldr	r3, .L2563
15638
-	ldrh	r0, [r4]
15639
-	ldrh	r6, [r4, #4]
15640
-	ldr	r1, [r3, #296]
15641
-	ldrh	r3, [r1, r0, lsl #1]
15642
-	subs	r3, r3, r6
15643
-	strh	r3, [r1, r0, lsl #1]	@ movhi
15644
-	ldrh	r2, [r2, #2388]
15917
+	b	.L2465
15918
+.L2469:
15919
+	ldrh	r2, [r5, #2392]
15920
+	cmp	r3, r2
15921
+	bcc	.L2460
15922
+	ldr	r3, .L2475+4
15923
+	ldrh	r1, [r4]
15924
+	ldrh	r0, [r4, #4]
15925
+	ldr	r2, [r3, #300]
15926
+	ldrh	r3, [r2, r1, lsl #1]
15927
+	subs	r3, r3, r0
15928
+	strh	r3, [r2, r1, lsl #1]	@ movhi
15645
15929
 	movs	r3, #0
15930
+	ldrh	r2, [r5, #2390]
15646
15931
 	strh	r3, [r4, #4]	@ movhi
15647
15932
 	strb	r3, [r4, #6]
15648
15933
 	strh	r2, [r4, #2]	@ movhi
15649
-.L2558:
15650
-	mov	r0, r5
15934
+.L2460:
15935
+	mov	r0, r6
15651
15936
 	pop	{r4, r5, r6, r7, r8, pc}
15652
-.L2564:
15937
+.L2476:
15653
15938
 	.align	2
15654
-.L2563:
15655
-	.word	.LANCHOR2
15939
+.L2475:
15656
15940
 	.word	.LANCHOR0
15941
+	.word	.LANCHOR2
15657
15942
 	.fnend
15658
15943
 	.size	get_new_active_ppa, .-get_new_active_ppa
15659
15944
 	.align	1
15660
15945
 	.global	FtlVpcTblFlush
15946
+	.syntax unified
15661
15947
 	.thumb
15662
15948
 	.thumb_func
15949
+	.fpu softvfp
15663
15950
 	.type	FtlVpcTblFlush, %function
15664
15951
 FtlVpcTblFlush:
15665
15952
 	.fnstart
..
..
@@ -15667,249 +15954,245 @@
15667
15954
 	@ frame_needed = 0, uses_anonymous_args = 0
15668
15955
 	push	{r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
15669
15956
 	.save {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
15670
-	ldr	r4, .L2588
15671
-	ldr	r3, [r4, #224]
15957
+	ldr	r4, .L2500
15958
+	ldr	r3, [r4, #228]
15672
15959
 	cmp	r3, #0
15673
-	bne	.L2567
15674
-	ldr	r5, .L2588+4
15960
+	bne	.L2479
15961
+	ldr	r5, .L2500+4
15675
15962
 	movs	r1, #255
15676
15963
 	ldr	r2, [r4, #3316]
15677
15964
 	ldr	r7, [r4, #3340]
15678
-	ldr	r6, .L2588+8
15679
-	str	r2, [r5, #1256]
15965
+	ldr	r6, .L2500+8
15966
+	str	r2, [r5, #1264]
15680
15967
 	ldrh	r2, [r4, #540]
15681
-	str	r7, [r5, #1260]
15968
+	str	r7, [r5, #1268]
15682
15969
 	str	r3, [r7, #12]
15683
15970
 	strh	r2, [r7, #2]	@ movhi
15684
15971
 	movw	r2, #61604
15685
15972
 	strh	r2, [r7]	@ movhi
15686
15973
 	ldr	r2, [r4, #548]
15687
15974
 	str	r3, [r7, #8]
15688
-	ldr	r3, .L2588+12
15975
+	ldr	r3, .L2500+12
15689
15976
 	str	r2, [r7, #4]
15690
-	ldrh	r2, [r4, #318]
15691
-	str	r3, [r4, #240]
15692
-	ldr	r3, .L2588+16
15977
+	ldrh	r2, [r4, #322]
15693
15978
 	str	r3, [r4, #244]
15979
+	ldr	r3, .L2500+16
15980
+	str	r3, [r4, #248]
15694
15981
 	ldrh	r3, [r4, #546]
15695
-	strh	r3, [r4, #248]	@ movhi
15696
-	ldrh	r3, [r6, #2342]
15697
-	strb	r3, [r4, #250]
15698
-	ldrh	r3, [r4, #316]
15699
-	strh	r3, [r4, #254]	@ movhi
15700
-	ldrb	r3, [r4, #322]	@ zero_extendqisi2
15701
-	orr	r3, r3, r2, lsl #6
15702
-	strh	r3, [r4, #256]	@ movhi
15703
-	ldrb	r3, [r4, #324]	@ zero_extendqisi2
15704
-	ldrh	r2, [r4, #366]
15705
-	strb	r3, [r4, #251]
15706
-	ldrh	r3, [r4, #364]
15982
+	strh	r3, [r4, #252]	@ movhi
15983
+	ldrh	r3, [r6, #2346]
15984
+	strb	r3, [r4, #254]
15985
+	ldrh	r3, [r4, #320]
15707
15986
 	strh	r3, [r4, #258]	@ movhi
15708
-	ldrb	r3, [r4, #370]	@ zero_extendqisi2
15987
+	ldrb	r3, [r4, #326]	@ zero_extendqisi2
15709
15988
 	orr	r3, r3, r2, lsl #6
15989
+	ldrh	r2, [r4, #370]
15710
15990
 	strh	r3, [r4, #260]	@ movhi
15711
-	ldrb	r3, [r4, #372]	@ zero_extendqisi2
15712
-	strb	r3, [r4, #252]
15713
-	ldrh	r3, [r4, #412]
15991
+	ldrb	r3, [r4, #328]	@ zero_extendqisi2
15992
+	strb	r3, [r4, #255]
15993
+	ldrh	r3, [r4, #368]
15714
15994
 	strh	r3, [r4, #262]	@ movhi
15715
-	ldrh	r2, [r4, #414]
15716
-	ldrb	r3, [r4, #418]	@ zero_extendqisi2
15717
-	ldr	r0, [r5, #1256]
15995
+	ldrb	r3, [r4, #374]	@ zero_extendqisi2
15718
15996
 	orr	r3, r3, r2, lsl #6
15719
15997
 	strh	r3, [r4, #264]	@ movhi
15720
-	ldrb	r3, [r4, #420]	@ zero_extendqisi2
15721
-	ldrh	r2, [r6, #2398]
15722
-	strb	r3, [r4, #253]
15998
+	ldrb	r3, [r4, #376]	@ zero_extendqisi2
15999
+	strb	r3, [r4, #256]
16000
+	ldrh	r3, [r4, #416]
16001
+	strh	r3, [r4, #266]	@ movhi
16002
+	ldrh	r2, [r4, #418]
16003
+	ldrb	r3, [r4, #422]	@ zero_extendqisi2
16004
+	ldr	r0, [r5, #1264]
16005
+	orr	r3, r3, r2, lsl #6
16006
+	ldrh	r2, [r6, #2400]
16007
+	strh	r3, [r4, #268]	@ movhi
16008
+	ldrb	r3, [r4, #424]	@ zero_extendqisi2
16009
+	strb	r3, [r4, #257]
15723
16010
 	ldr	r3, [r4, #516]
15724
-	str	r3, [r4, #272]
15725
-	ldr	r3, [r4, #508]
15726
-	str	r3, [r4, #280]
15727
-	ldr	r3, [r4, #512]
15728
16011
 	str	r3, [r4, #276]
16012
+	ldr	r3, [r4, #508]
16013
+	str	r3, [r4, #284]
16014
+	ldr	r3, [r4, #512]
16015
+	str	r3, [r4, #280]
15729
16016
 	ldrh	r3, [r4, #1174]
15730
-	strh	r3, [r4, #284]	@ movhi
16017
+	strh	r3, [r4, #288]	@ movhi
15731
16018
 	ldrh	r3, [r4, #1176]
15732
-	strh	r3, [r4, #286]	@ movhi
16019
+	strh	r3, [r4, #290]	@ movhi
15733
16020
 	bl	ftl_memset
15734
-	add	r1, r4, #240
15735
16021
 	movs	r2, #48
15736
-	ldr	r0, [r5, #1256]
16022
+	add	r1, r4, #244
16023
+	ldr	r0, [r5, #1264]
15737
16024
 	bl	ftl_memcpy
15738
-	ldrh	r2, [r6, #2328]
15739
-	ldr	r0, [r5, #1256]
15740
-	ldr	r1, [r4, #296]
16025
+	ldrh	r2, [r6, #2332]
16026
+	ldr	r0, [r5, #1264]
16027
+	ldr	r1, [r4, #300]
15741
16028
 	lsls	r2, r2, #1
15742
16029
 	adds	r0, r0, #48
15743
16030
 	bl	ftl_memcpy
15744
-	ldrh	r2, [r6, #2328]
15745
-	ldr	r0, [r5, #1256]
15746
-	ldr	r1, [r4, #472]
15747
-	lsls	r3, r2, #1
15748
-	lsrs	r2, r2, #3
15749
-	adds	r3, r3, #51
16031
+	ldrh	r0, [r6, #2332]
16032
+	ldr	r3, [r5, #1264]
16033
+	ldr	r1, [r6, #32]
16034
+	lsrs	r2, r0, #3
16035
+	lsls	r0, r0, #1
16036
+	adds	r0, r0, #51
15750
16037
 	adds	r2, r2, #4
15751
-	bic	r3, r3, #3
16038
+	bic	r0, r0, #3
15752
16039
 	add	r0, r0, r3
15753
16040
 	bl	ftl_memcpy
15754
-	ldrh	r3, [r6, #2432]
15755
-	cbz	r3, .L2568
15756
-	ldrh	r2, [r6, #2328]
15757
-	ldr	r0, [r5, #1256]
16041
+	ldrh	r3, [r6, #2436]
16042
+	cbz	r3, .L2480
16043
+	ldrh	r0, [r6, #2332]
16044
+	ldrh	r2, [r6, #2428]
15758
16045
 	ldr	r1, [r4, #3388]
15759
-	lsrs	r3, r2, #3
15760
-	add	r3, r3, r2, lsl #1
15761
-	ldrh	r2, [r6, #2424]
16046
+	lsrs	r3, r0, #3
16047
+	lsls	r2, r2, #2
16048
+	add	r3, r3, r0, lsl #1
16049
+	ldr	r0, [r5, #1264]
15762
16050
 	adds	r3, r3, #52
15763
16051
 	ubfx	r3, r3, #2, #14
15764
-	lsls	r2, r2, #2
15765
16052
 	add	r0, r0, r3, lsl #2
15766
16053
 	bl	ftl_memcpy
15767
-.L2568:
15768
-	movs	r0, #0
15769
-	ldr	r10, .L2588
15770
-	bl	FtlUpdateVaildLpn
15771
-	ldr	fp, .L2588+8
16054
+.L2480:
16055
+	ldr	fp, .L2500+24
15772
16056
 	mov	r8, #0
15773
16057
 	movw	r9, #65535
15774
-.L2569:
16058
+	mov	r10, r8
16059
+	movs	r0, #0
16060
+	bl	FtlUpdateVaildLpn
16061
+.L2481:
15775
16062
 	ldr	r3, [r4, #3316]
15776
-	ldrh	r2, [r4, #540]
15777
16063
 	ldrh	r1, [r4, #542]
15778
-	str	r3, [r5, #1256]
16064
+	ldrh	r2, [r4, #540]
16065
+	str	r3, [r5, #1264]
15779
16066
 	ldr	r3, [r4, #3340]
15780
-	str	r3, [r5, #1260]
16067
+	str	r3, [r5, #1268]
15781
16068
 	orr	r3, r1, r2, lsl #10
15782
-	str	r3, [r5, #1252]
15783
-	ldrh	r3, [r6, #2390]
16069
+	str	r3, [r5, #1260]
16070
+	ldrh	r3, [r6, #2392]
15784
16071
 	subs	r3, r3, #1
15785
16072
 	cmp	r1, r3
15786
-	blt	.L2570
15787
-	movs	r3, #0
15788
-	ldrh	r9, [r10, #544]
15789
-	strh	r3, [r10, #542]	@ movhi
15790
-	strh	r2, [r10, #544]	@ movhi
16073
+	blt	.L2482
16074
+	ldrh	r9, [r4, #544]
16075
+	strh	r10, [r4, #542]	@ movhi
16076
+	strh	r2, [r4, #544]	@ movhi
15791
16077
 	bl	FtlFreeSysBlkQueueOut
15792
-	ldr	r3, [r10, #508]
15793
-	ldr	r1, .L2588+4
16078
+	ldr	r3, [r4, #508]
16079
+	strh	r0, [r4, #540]	@ movhi
15794
16080
 	adds	r2, r3, #1
15795
-	str	r2, [r10, #508]
15796
-	str	r3, [r10, #548]
16081
+	str	r3, [r4, #548]
16082
+	str	r2, [r4, #508]
15797
16083
 	lsls	r2, r0, #10
15798
-	strh	r0, [r10, #540]	@ movhi
15799
-	str	r2, [r1, #1252]
16084
+	str	r2, [r5, #1260]
15800
16085
 	str	r3, [r7, #4]
15801
16086
 	strh	r0, [r7, #2]	@ movhi
15802
-.L2570:
15803
-	ldrb	r3, [r6]	@ zero_extendqisi2
15804
-	cbz	r3, .L2571
16087
+.L2482:
16088
+	ldrb	r3, [r6, #36]	@ zero_extendqisi2
16089
+	cbz	r3, .L2483
16090
+	ldrh	r1, [r6, #2400]
15805
16091
 	ldr	r0, [r4, #3316]
15806
-	ldrh	r1, [fp, #2398]
15807
16092
 	bl	js_hash
15808
16093
 	str	r0, [r7, #12]
15809
-.L2571:
15810
-	movs	r1, #1
15811
-	ldr	r0, .L2588+20
15812
-	mov	r2, r1
15813
-	mov	r3, r1
16094
+.L2483:
16095
+	movs	r3, #1
16096
+	mov	r0, fp
16097
+	mov	r2, r3
16098
+	mov	r1, r3
15814
16099
 	bl	FlashProgPages
15815
16100
 	ldrh	r3, [r4, #542]
15816
-	ldr	r2, [r5, #1248]
16101
+	ldr	r2, [r5, #1256]
15817
16102
 	adds	r3, r3, #1
15818
-	adds	r1, r2, #1
15819
16103
 	uxth	r3, r3
16104
+	adds	r1, r2, #1
15820
16105
 	strh	r3, [r4, #542]	@ movhi
15821
-	bne	.L2572
16106
+	bne	.L2484
15822
16107
 	cmp	r3, #1
15823
16108
 	add	r8, r8, #1
15824
16109
 	it	eq
15825
-	ldrheq	r3, [r6, #2390]
16110
+	ldrheq	r3, [r6, #2392]
15826
16111
 	uxth	r8, r8
15827
16112
 	itt	eq
15828
16113
 	addeq	r3, r3, #-1
15829
-	strheq	r3, [r10, #542]	@ movhi
16114
+	strheq	r3, [r4, #542]	@ movhi
15830
16115
 	cmp	r8, #3
15831
-	bls	.L2569
15832
-	ldr	r0, .L2588+24
16116
+	bls	.L2481
15833
16117
 	mov	r2, r8
15834
-	ldr	r1, [r5, #1252]
16118
+	ldr	r1, [r5, #1260]
16119
+	ldr	r0, .L2500+20
15835
16120
 	bl	printk
15836
16121
 	movs	r3, #1
15837
-	str	r3, [r4, #224]
15838
-	b	.L2567
15839
-.L2572:
15840
-	cmp	r3, #1
15841
-	beq	.L2569
15842
-	cmp	r2, #256
15843
-	beq	.L2569
15844
-	movw	r3, #65535
15845
-	cmp	r9, r3
15846
-	beq	.L2567
15847
-	mov	r0, r9
15848
-	movs	r1, #1
15849
-	bl	FtlFreeSysBlkQueueIn
15850
-.L2567:
16122
+	str	r3, [r4, #228]
16123
+.L2479:
15851
16124
 	movs	r0, #0
15852
16125
 	pop	{r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
15853
-.L2589:
16126
+.L2484:
16127
+	cmp	r3, #1
16128
+	beq	.L2481
16129
+	cmp	r2, #256
16130
+	beq	.L2481
16131
+	movw	r3, #65535
16132
+	cmp	r9, r3
16133
+	beq	.L2479
16134
+	movs	r1, #1
16135
+	mov	r0, r9
16136
+	bl	FtlFreeSysBlkQueueIn
16137
+	b	.L2479
16138
+.L2501:
15854
16139
 	.align	2
15855
-.L2588:
16140
+.L2500:
15856
16141
 	.word	.LANCHOR2
15857
16142
 	.word	.LANCHOR4
15858
16143
 	.word	.LANCHOR0
15859
16144
 	.word	1179929683
15860
16145
 	.word	1342177379
15861
-	.word	.LANCHOR4+1248
15862
16146
 	.word	.LC132
16147
+	.word	.LANCHOR4+1256
15863
16148
 	.fnend
15864
16149
 	.size	FtlVpcTblFlush, .-FtlVpcTblFlush
15865
16150
 	.align	1
15866
16151
 	.global	FtlSuperblockPowerLostFix
16152
+	.syntax unified
15867
16153
 	.thumb
15868
16154
 	.thumb_func
16155
+	.fpu softvfp
15869
16156
 	.type	FtlSuperblockPowerLostFix, %function
15870
16157
 FtlSuperblockPowerLostFix:
15871
16158
 	.fnstart
15872
16159
 	@ args = 0, pretend = 0, frame = 40
15873
16160
 	@ frame_needed = 0, uses_anonymous_args = 0
15874
-	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
15875
-	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
16161
+	push	{r4, r5, r6, r7, r8, r9, r10, lr}
16162
+	.save {r4, r5, r6, r7, r8, r9, r10, lr}
15876
16163
 	mov	r4, r0
15877
-	ldr	r5, .L2606
15878
-	.pad #44
15879
-	sub	sp, sp, #44
15880
-	ldr	r3, [r5, #224]
15881
-	cmp	r3, #0
15882
-	bne	.L2590
15883
-	ldr	r2, .L2606+4
15884
-	ldrb	r6, [r2, #144]	@ zero_extendqisi2
15885
-	mov	r8, r2
15886
-	cbz	r6, .L2605
15887
-	ldrb	r6, [r0, #8]	@ zero_extendqisi2
15888
-	cmp	r6, #1
15889
-	bne	.L2601
15890
-	ldrh	fp, [r0, #4]
15891
-	b	.L2592
15892
-.L2601:
15893
-	mov	r6, r3
15894
-.L2605:
15895
-	mov	fp, #12
15896
-.L2592:
15897
-	ldr	r7, [r5, #3340]
16164
+	ldr	r5, .L2517
16165
+	.pad #40
16166
+	sub	sp, sp, #40
16167
+	ldr	r10, [r5, #228]
16168
+	cmp	r10, #0
16169
+	bne	.L2502
16170
+	ldr	r3, .L2517+4
16171
+	ldrb	r2, [r3, #152]	@ zero_extendqisi2
16172
+	mov	r8, r3
16173
+	cmp	r2, #0
16174
+	beq	.L2513
16175
+	ldrb	r3, [r0, #8]	@ zero_extendqisi2
16176
+	cmp	r3, #1
16177
+	bne	.L2513
16178
+	ldrh	r7, [r0, #4]
16179
+	mov	r10, r3
16180
+.L2504:
15898
16181
 	mov	r3, #-1
16182
+	ldr	r6, [r5, #3340]
15899
16183
 	str	r3, [sp, #20]
15900
16184
 	mov	r9, #0
15901
16185
 	ldr	r3, [r5, #3316]
15902
16186
 	movw	r2, #61589
15903
-	str	r7, [sp, #16]
15904
-	ldr	r10, .L2606
16187
+	str	r6, [sp, #16]
15905
16188
 	str	r3, [sp, #12]
15906
16189
 	mvn	r3, #2
15907
-	str	r3, [r7, #8]
16190
+	str	r3, [r6, #8]
15908
16191
 	mvn	r3, #1
15909
-	str	r3, [r7, #12]
16192
+	str	r3, [r6, #12]
15910
16193
 	ldrh	r3, [r4]
15911
-	strh	r9, [r7]	@ movhi
15912
-	strh	r3, [r7, #2]	@ movhi
16194
+	strh	r9, [r6]	@ movhi
16195
+	strh	r3, [r6, #2]	@ movhi
15913
16196
 	ldr	r3, [r5, #3316]
15914
16197
 	str	r2, [r3]
15915
16198
 	add	r2, r2, #304087040
..
..
@@ -15917,60 +16200,64 @@
15917
16200
 	add	r2, r2, #1269760
15918
16201
 	addw	r2, r2, #1507
15919
16202
 	str	r2, [r3, #4]
15920
-.L2593:
15921
-	adds	fp, fp, #-1
15922
-	bcc	.L2596
16203
+.L2505:
16204
+	adds	r7, r7, #-1
16205
+	bcc	.L2508
15923
16206
 	ldrh	r3, [r4, #4]
15924
-	cbnz	r3, .L2594
15925
-.L2596:
15926
-	ldr	r2, [r5, #296]
16207
+	cbnz	r3, .L2506
16208
+.L2508:
16209
+	ldr	r2, [r5, #300]
15927
16210
 	ldrh	r1, [r4]
15928
16211
 	ldrh	r0, [r4, #4]
15929
16212
 	ldrh	r3, [r2, r1, lsl #1]
15930
16213
 	subs	r3, r3, r0
15931
16214
 	strh	r3, [r2, r1, lsl #1]	@ movhi
15932
-	ldrh	r3, [r8, #2388]
16215
+	ldrh	r3, [r8, #2390]
15933
16216
 	strh	r3, [r4, #2]	@ movhi
15934
16217
 	movs	r3, #0
15935
16218
 	strb	r3, [r4, #6]
15936
16219
 	strh	r3, [r4, #4]	@ movhi
15937
-	b	.L2590
15938
-.L2594:
16220
+.L2502:
16221
+	add	sp, sp, #40
16222
+	@ sp needed
16223
+	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
16224
+.L2513:
16225
+	movs	r7, #12
16226
+	b	.L2504
16227
+.L2506:
15939
16228
 	mov	r0, r4
15940
16229
 	bl	get_new_active_ppa
15941
16230
 	str	r0, [sp, #8]
15942
16231
 	adds	r0, r0, #1
15943
-	beq	.L2596
16232
+	beq	.L2508
15944
16233
 	ldr	r3, [r5, #512]
15945
16234
 	movs	r1, #1
15946
16235
 	add	r0, sp, #4
15947
-	str	r3, [r7, #4]
16236
+	str	r3, [r6, #4]
15948
16237
 	adds	r3, r3, #1
15949
16238
 	adds	r2, r3, #1
15950
-	mov	r2, r6
16239
+	mov	r2, r10
15951
16240
 	it	eq
15952
16241
 	moveq	r3, r9
15953
-	str	r3, [r10, #512]
16242
+	str	r3, [r5, #512]
15954
16243
 	movs	r3, #0
15955
16244
 	bl	FlashProgPages
15956
16245
 	ldrh	r0, [r4]
15957
16246
 	bl	decrement_vpc_count
15958
-	b	.L2593
15959
-.L2590:
15960
-	add	sp, sp, #44
15961
-	@ sp needed
15962
-	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
15963
-.L2607:
16247
+	b	.L2505
16248
+.L2518:
15964
16249
 	.align	2
15965
-.L2606:
16250
+.L2517:
15966
16251
 	.word	.LANCHOR2
15967
16252
 	.word	.LANCHOR0
15968
16253
 	.fnend
15969
16254
 	.size	FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix
15970
16255
 	.align	1
15971
16256
 	.global	ftl_map_blk_gc
16257
+	.syntax unified
15972
16258
 	.thumb
15973
16259
 	.thumb_func
16260
+	.fpu softvfp
15974
16261
 	.type	ftl_map_blk_gc, %function
15975
16262
 ftl_map_blk_gc:
15976
16263
 	.fnstart
..
..
@@ -15981,20 +16268,19 @@
15981
16268
 	.pad #12
15982
16269
 	mov	r4, r0
15983
16270
 	ldr	r5, [r0, #12]
15984
-	ldr	r8, [r0, #24]
16271
+	ldr	r10, [r0, #24]
15985
16272
 	bl	ftl_free_no_use_map_blk
15986
16273
 	ldrh	r3, [r4, #10]
15987
16274
 	ldrh	r2, [r4, #8]
15988
16275
 	subs	r3, r3, #4
15989
16276
 	cmp	r2, r3
15990
-	blt	.L2609
16277
+	blt	.L2520
15991
16278
 	uxth	r0, r0
15992
-	ldrh	r10, [r5, r0, lsl #1]
15993
-	cmp	r10, #0
15994
-	beq	.L2609
16279
+	ldrh	r9, [r5, r0, lsl #1]
16280
+	cmp	r9, #0
16281
+	beq	.L2520
15995
16282
 	ldr	r3, [r4, #32]
15996
-	cmp	r3, #0
15997
-	bne	.L2609
16283
+	cbnz	r3, .L2520
15998
16284
 	movs	r2, #1
15999
16285
 	str	r2, [r4, #32]
16000
16286
 	strh	r3, [r5, r0, lsl #1]	@ movhi
..
..
@@ -16002,99 +16288,103 @@
16002
16288
 	ldrh	r2, [r4, #2]
16003
16289
 	subs	r3, r3, #1
16004
16290
 	strh	r3, [r4, #8]	@ movhi
16005
-	ldr	r3, .L2621
16006
-	ldrh	r3, [r3, #2390]
16291
+	ldr	r3, .L2531
16292
+	ldrh	r3, [r3, #2392]
16007
16293
 	cmp	r2, r3
16008
-	bcc	.L2610
16294
+	bcc	.L2521
16009
16295
 	mov	r0, r4
16010
16296
 	bl	ftl_map_blk_alloc_new_blk
16011
-.L2610:
16012
-	ldr	r6, .L2621+4
16013
-	mov	fp, #0
16014
-	ldr	r9, .L2621+16
16015
-.L2611:
16297
+.L2521:
16298
+	ldr	r5, .L2531+4
16299
+	movs	r6, #0
16300
+	ldr	fp, .L2531+16
16301
+.L2522:
16016
16302
 	ldrh	r2, [r4, #6]
16017
-	uxth	r5, fp
16018
-	cmp	r2, r5
16019
-	bls	.L2620
16020
-	ldr	r2, [r8, r5, lsl #2]
16021
-	add	ip, r8, r5, lsl #2
16022
-	cmp	r10, r2, lsr #10
16023
-	bne	.L2612
16024
-	ldr	r2, [r9, #3320]
16303
+	uxth	r3, r6
16304
+	cmp	r2, r3
16305
+	bhi	.L2527
16025
16306
 	movs	r1, #1
16026
-	ldr	r7, [r9, #3340]
16027
-	ldr	r0, .L2621+8
16028
-	str	r2, [r6, #1256]
16029
-	str	r7, [r6, #1260]
16030
-	ldr	r2, [r8, r5, lsl #2]
16031
-	str	ip, [sp, #4]
16032
-	str	r2, [r6, #1252]
16033
-	mov	r2, r1
16034
-	bl	FlashReadPages
16035
-	ldr	r2, [r6, #1248]
16036
-	adds	r2, r2, #1
16037
-	ldr	ip, [sp, #4]
16038
-	bne	.L2613
16039
-.L2615:
16040
-	movs	r3, #0
16041
-	str	r3, [ip]
16042
-	ldr	r3, .L2621+4
16043
-	ldrh	r2, [r7, #8]
16044
-	ldr	r0, .L2621+12
16045
-	ldr	r1, [r3, #1252]
16046
-	bl	printk
16047
-	ldr	r3, .L2621+16
16048
-	movs	r2, #1
16049
-	str	r2, [r3, #224]
16050
-	b	.L2614
16051
-.L2613:
16052
-	ldrh	r1, [r7, #8]
16053
-	cmp	r1, r5
16054
-	bne	.L2615
16055
-	ldrh	r0, [r7]
16056
-	ldrh	r2, [r4, #4]
16057
-	cmp	r0, r2
16058
-	bne	.L2615
16059
-	mov	r0, r4
16060
-	ldr	r2, [r6, #1256]
16061
-	bl	FtlMapWritePage
16062
-.L2612:
16063
-	add	fp, fp, #1
16064
-	b	.L2611
16065
-.L2620:
16066
-	mov	r0, r10
16067
-	movs	r1, #1
16307
+	mov	r0, r9
16068
16308
 	bl	FtlFreeSysBlkQueueIn
16069
16309
 	movs	r3, #0
16070
16310
 	str	r3, [r4, #32]
16071
-.L2609:
16072
-	ldr	r3, .L2621
16311
+.L2520:
16312
+	ldr	r3, .L2531
16073
16313
 	ldrh	r2, [r4, #2]
16074
-	ldrh	r3, [r3, #2390]
16314
+	ldrh	r3, [r3, #2392]
16075
16315
 	cmp	r2, r3
16076
-	bcc	.L2614
16316
+	bcc	.L2525
16077
16317
 	mov	r0, r4
16078
16318
 	bl	ftl_map_blk_alloc_new_blk
16079
-.L2614:
16319
+	b	.L2525
16320
+.L2527:
16321
+	uxth	r7, r6
16322
+	add	r2, r10, r7, lsl #2
16323
+	str	r2, [sp]
16324
+	ldr	r2, [r10, r7, lsl #2]
16325
+	cmp	r9, r2, lsr #10
16326
+	bne	.L2523
16327
+	ldr	r2, [fp, #3320]
16328
+	ldr	r8, [fp, #3340]
16329
+	ldr	r0, .L2531+8
16330
+	str	r2, [r5, #1264]
16331
+	str	r8, [r5, #1268]
16332
+	ldr	r2, [r10, r7, lsl #2]
16333
+	str	r3, [sp, #4]
16334
+	str	r2, [r5, #1260]
16335
+	movs	r2, #1
16336
+	mov	r1, r2
16337
+	bl	FlashReadPages
16338
+	ldr	r2, [r5, #1256]
16339
+	ldr	r3, [sp, #4]
16340
+	adds	r2, r2, #1
16341
+	bne	.L2524
16342
+.L2526:
16343
+	ldr	r2, [sp]
16344
+	movs	r3, #0
16345
+	ldr	r0, .L2531+12
16346
+	str	r3, [r2]
16347
+	ldrh	r2, [r8, #8]
16348
+	ldr	r1, [r5, #1260]
16349
+	bl	printk
16350
+	movs	r3, #1
16351
+	str	r3, [fp, #228]
16352
+.L2525:
16080
16353
 	movs	r0, #0
16081
16354
 	add	sp, sp, #12
16082
16355
 	@ sp needed
16083
16356
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
16084
-.L2622:
16357
+.L2524:
16358
+	ldrh	r2, [r8, #8]
16359
+	cmp	r2, r3
16360
+	bne	.L2526
16361
+	ldrh	r2, [r8]
16362
+	ldrh	r3, [r4, #4]
16363
+	cmp	r2, r3
16364
+	bne	.L2526
16365
+	ldr	r2, [r5, #1264]
16366
+	mov	r1, r7
16367
+	mov	r0, r4
16368
+	bl	FtlMapWritePage
16369
+.L2523:
16370
+	adds	r6, r6, #1
16371
+	b	.L2522
16372
+.L2532:
16085
16373
 	.align	2
16086
-.L2621:
16374
+.L2531:
16087
16375
 	.word	.LANCHOR0
16088
16376
 	.word	.LANCHOR4
16089
-	.word	.LANCHOR4+1248
16377
+	.word	.LANCHOR4+1256
16090
16378
 	.word	.LC133
16091
16379
 	.word	.LANCHOR2
16092
16380
 	.fnend
16093
16381
 	.size	ftl_map_blk_gc, .-ftl_map_blk_gc
16094
16382
 	.align	1
16095
16383
 	.global	Ftl_write_map_blk_to_last_page
16384
+	.syntax unified
16096
16385
 	.thumb
16097
16386
 	.thumb_func
16387
+	.fpu softvfp
16098
16388
 	.type	Ftl_write_map_blk_to_last_page, %function
16099
16389
 Ftl_write_map_blk_to_last_page:
16100
16390
 	.fnstart
..
..
@@ -16103,16 +16393,14 @@
16103
16393
 	push	{r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
16104
16394
 	.save {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
16105
16395
 	mov	r4, r0
16106
-	ldr	r6, .L2634
16107
-	ldr	r7, [r0, #12]
16108
-	ldr	r10, [r0, #24]
16109
-	ldr	r5, [r6, #224]
16110
-	cmp	r5, #0
16111
-	bne	.L2624
16396
+	ldr	r6, .L2543
16397
+	ldr	r5, [r6, #228]
16398
+	cbnz	r5, .L2534
16112
16399
 	ldrh	r3, [r0]
16113
16400
 	movw	r2, #65535
16401
+	ldr	r7, [r0, #12]
16114
16402
 	cmp	r3, r2
16115
-	bne	.L2625
16403
+	bne	.L2535
16116
16404
 	ldrh	r3, [r0, #8]
16117
16405
 	adds	r3, r3, #1
16118
16406
 	strh	r3, [r0, #8]	@ movhi
..
..
@@ -16120,88 +16408,92 @@
16120
16408
 	strh	r0, [r7]	@ movhi
16121
16409
 	ldr	r3, [r4, #28]
16122
16410
 	strh	r5, [r4, #2]	@ movhi
16123
-	adds	r3, r3, #1
16124
16411
 	strh	r5, [r4]	@ movhi
16412
+	adds	r3, r3, #1
16125
16413
 	str	r3, [r4, #28]
16126
-	b	.L2624
16127
-.L2625:
16128
-	ldrh	r9, [r7, r3, lsl #1]
16414
+.L2534:
16415
+	movs	r0, #0
16416
+	pop	{r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
16417
+.L2535:
16418
+	ldrh	r10, [r7, r3, lsl #1]
16129
16419
 	movs	r1, #255
16130
-	ldr	fp, .L2634+12
16131
16420
 	ldrh	r3, [r0, #2]
16421
+	ldr	r8, .L2543+8
16132
16422
 	ldr	r7, [r6, #3340]
16133
-	orr	r3, r3, r9, lsl #10
16134
-	str	r3, [fp, #1252]
16423
+	ldr	fp, [r0, #24]
16424
+	orr	r3, r3, r10, lsl #10
16425
+	ldr	r9, .L2543+12
16426
+	str	r7, [r8, #1268]
16427
+	str	r3, [r8, #1260]
16135
16428
 	ldr	r3, [r6, #3316]
16136
-	str	r7, [fp, #1260]
16137
-	ldr	r8, .L2634+4
16138
-	str	r3, [fp, #1256]
16429
+	str	r3, [r8, #1264]
16139
16430
 	ldr	r3, [r0, #28]
16140
16431
 	str	r3, [r7, #4]
16141
16432
 	movw	r3, #64245
16142
16433
 	strh	r3, [r7, #8]	@ movhi
16143
16434
 	ldrh	r3, [r0, #4]
16144
-	strh	r9, [r7, #2]	@ movhi
16435
+	strh	r10, [r7, #2]	@ movhi
16145
16436
 	strh	r3, [r7]	@ movhi
16146
-	ldrh	r2, [r8, #2390]
16437
+	ldrh	r2, [r9, #2392]
16147
16438
 	ldr	r0, [r6, #3316]
16148
16439
 	lsls	r2, r2, #3
16149
16440
 	bl	ftl_memset
16150
-	mov	r1, r5
16151
-.L2626:
16152
-	ldrh	r2, [r4, #6]
16153
-	uxth	r3, r1
16154
-	cmp	r2, r3
16155
-	bls	.L2633
16156
-	ldr	r2, [r10, r3, lsl #2]
16157
-	cmp	r9, r2, lsr #10
16158
-	bne	.L2627
16159
-	adds	r5, r5, #1
16160
-	ldr	r2, [r6, #3316]
16161
-	uxth	r5, r5
16162
-	str	r3, [r2, r5, lsl #3]
16163
-	ldr	r2, [r10, r3, lsl #2]
16164
-	ldr	r3, [r6, #3316]
16165
-	add	r3, r3, r5, lsl #3
16166
-	str	r2, [r3, #4]
16167
-.L2627:
16168
-	adds	r1, r1, #1
16169
-	b	.L2626
16170
-.L2633:
16171
-	ldrb	r3, [r8]	@ zero_extendqisi2
16172
-	cbz	r3, .L2629
16173
-	ldr	r3, .L2634+4
16174
-	ldr	r0, [fp, #1256]
16175
-	ldrh	r1, [r3, #2398]
16441
+	mov	r3, r5
16442
+	mov	r2, r5
16443
+.L2536:
16444
+	ldrh	r0, [r4, #6]
16445
+	uxth	r1, r3
16446
+	cmp	r0, r1
16447
+	bhi	.L2538
16448
+	ldrb	r3, [r9, #36]	@ zero_extendqisi2
16449
+	cbz	r3, .L2539
16450
+	ldrh	r1, [r9, #2400]
16451
+	ldr	r0, [r8, #1264]
16176
16452
 	bl	js_hash
16177
16453
 	str	r0, [r7, #12]
16178
-.L2629:
16179
-	movs	r1, #1
16454
+.L2539:
16455
+	movs	r2, #1
16180
16456
 	movs	r3, #0
16181
-	ldr	r0, .L2634+8
16182
-	mov	r2, r1
16457
+	mov	r1, r2
16458
+	ldr	r0, .L2543+4
16183
16459
 	bl	FlashProgPages
16184
16460
 	ldrh	r3, [r4, #2]
16185
16461
 	mov	r0, r4
16186
16462
 	adds	r3, r3, #1
16187
16463
 	strh	r3, [r4, #2]	@ movhi
16188
16464
 	bl	ftl_map_blk_gc
16189
-.L2624:
16190
-	movs	r0, #0
16191
-	pop	{r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
16192
-.L2635:
16465
+	b	.L2534
16466
+.L2538:
16467
+	uxth	r0, r3
16468
+	ldr	r1, [fp, r0, lsl #2]
16469
+	cmp	r10, r1, lsr #10
16470
+	bne	.L2537
16471
+	ldr	r1, [r6, #3316]
16472
+	adds	r2, r2, #1
16473
+	uxth	r2, r2
16474
+	str	r0, [r1, r2, lsl #3]
16475
+	ldr	r1, [r6, #3316]
16476
+	ldr	r0, [fp, r0, lsl #2]
16477
+	add	r1, r1, r2, lsl #3
16478
+	str	r0, [r1, #4]
16479
+.L2537:
16480
+	adds	r3, r3, #1
16481
+	b	.L2536
16482
+.L2544:
16193
16483
 	.align	2
16194
-.L2634:
16484
+.L2543:
16195
16485
 	.word	.LANCHOR2
16196
-	.word	.LANCHOR0
16197
-	.word	.LANCHOR4+1248
16486
+	.word	.LANCHOR4+1256
16198
16487
 	.word	.LANCHOR4
16488
+	.word	.LANCHOR0
16199
16489
 	.fnend
16200
16490
 	.size	Ftl_write_map_blk_to_last_page, .-Ftl_write_map_blk_to_last_page
16201
16491
 	.align	1
16202
16492
 	.global	FtlMapWritePage
16493
+	.syntax unified
16203
16494
 	.thumb
16204
16495
 	.thumb_func
16496
+	.fpu softvfp
16205
16497
 	.type	FtlMapWritePage, %function
16206
16498
 FtlMapWritePage:
16207
16499
 	.fnstart
..
..
@@ -16210,142 +16502,140 @@
16210
16502
 	push	{r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr}
16211
16503
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
16212
16504
 	.pad #12
16213
-	movs	r6, #0
16214
-	ldr	r7, .L2660
16215
16505
 	mov	r4, r0
16216
-	mov	r9, r1
16506
+	ldr	r8, .L2569+20
16507
+	mov	fp, r1
16508
+	movs	r6, #0
16509
+	ldr	r7, .L2569
16510
+	mov	r9, r8
16217
16511
 	str	r2, [sp]
16218
-.L2637:
16219
-	ldr	r3, [r7, #492]
16220
-	ldr	fp, .L2660+4
16512
+.L2546:
16513
+	ldr	r3, [r8, #492]
16221
16514
 	adds	r3, r3, #1
16222
-	str	r3, [r7, #492]
16223
-	ldr	r3, .L2660+4
16515
+	str	r3, [r8, #492]
16516
+	ldrh	r3, [r7, #2392]
16224
16517
 	ldrh	r2, [r4, #2]
16225
-	ldrh	r3, [r3, #2390]
16226
16518
 	subs	r3, r3, #1
16227
16519
 	cmp	r2, r3
16228
-	bge	.L2638
16520
+	bge	.L2547
16229
16521
 	ldrh	r2, [r4]
16230
16522
 	movw	r3, #65535
16231
16523
 	cmp	r2, r3
16232
-	bne	.L2639
16233
-.L2638:
16524
+	bne	.L2548
16525
+.L2547:
16234
16526
 	mov	r0, r4
16235
16527
 	bl	Ftl_write_map_blk_to_last_page
16236
-.L2639:
16237
-	ldr	r3, .L2660
16238
-	ldr	r1, [r3, #224]
16528
+.L2548:
16529
+	ldr	r1, [r9, #228]
16239
16530
 	cmp	r1, #0
16240
-	bne	.L2655
16531
+	bne	.L2564
16241
16532
 	ldrh	r2, [r4]
16242
16533
 	ldr	r3, [r4, #12]
16243
-	ldr	r5, .L2660+8
16244
-	ldr	r0, [r7, #3340]
16245
-	ldrh	r8, [r3, r2, lsl #1]
16534
+	ldr	r5, .L2569+4
16535
+	ldr	r0, [r9, #3340]
16536
+	ldrh	r10, [r3, r2, lsl #1]
16246
16537
 	movs	r2, #16
16247
16538
 	ldrh	r3, [r4, #2]
16248
-	mov	r10, r5
16249
-	str	r0, [r5, #1260]
16250
-	orr	r3, r3, r8, lsl #10
16251
-	str	r3, [r5, #1252]
16539
+	str	r0, [r5, #1268]
16540
+	orr	r3, r3, r10, lsl #10
16541
+	str	r3, [r5, #1260]
16252
16542
 	ldr	r3, [sp]
16253
-	str	r3, [r5, #1256]
16543
+	str	r3, [r5, #1264]
16254
16544
 	bl	ftl_memset
16545
+	ldr	r3, [r5, #1268]
16255
16546
 	ldr	r2, [r4, #28]
16256
-	ldr	r3, [r5, #1260]
16547
+	strh	fp, [r3, #8]	@ movhi
16257
16548
 	str	r2, [r3, #4]
16258
-	strh	r9, [r3, #8]	@ movhi
16259
16549
 	ldrh	r2, [r4, #4]
16260
-	strh	r8, [r3, #2]	@ movhi
16261
-	strh	r2, [r3]	@ movhi
16262
-	ldrb	r2, [fp]	@ zero_extendqisi2
16263
-	cbz	r2, .L2641
16264
16550
 	str	r3, [sp, #4]
16265
-	ldr	r3, .L2660+4
16266
-	ldr	r0, [r5, #1256]
16267
-	ldrh	r1, [r3, #2398]
16551
+	strh	r10, [r3, #2]	@ movhi
16552
+	strh	r2, [r3]	@ movhi
16553
+	ldrb	r2, [r7, #36]	@ zero_extendqisi2
16554
+	cbz	r2, .L2550
16555
+	ldrh	r1, [r7, #2400]
16556
+	ldr	r0, [r5, #1264]
16268
16557
 	bl	js_hash
16269
16558
 	ldr	r3, [sp, #4]
16270
16559
 	str	r0, [r3, #12]
16271
-.L2641:
16272
-	ldr	ip, .L2660+8
16273
-	movs	r1, #1
16274
-	add	r0, ip, #1248
16275
-	mov	r2, r1
16276
-	mov	r3, r1
16277
-	str	ip, [sp, #4]
16560
+.L2550:
16561
+	movs	r3, #1
16562
+	ldr	r0, .L2569+8
16563
+	mov	r2, r3
16564
+	mov	r1, r3
16278
16565
 	bl	FlashProgPages
16279
16566
 	ldrh	r3, [r4, #2]
16280
16567
 	adds	r3, r3, #1
16281
16568
 	uxth	r3, r3
16282
16569
 	strh	r3, [r4, #2]	@ movhi
16283
-	ldr	r2, [r5, #1248]
16570
+	ldr	r2, [r5, #1256]
16284
16571
 	adds	r1, r2, #1
16285
-	ldr	ip, [sp, #4]
16286
-	bne	.L2642
16287
-	ldr	r0, .L2660+12
16572
+	bne	.L2551
16573
+	ldr	r1, [r5, #1260]
16288
16574
 	adds	r6, r6, #1
16289
-	ldr	r1, [ip, #1252]
16575
+	ldr	r0, .L2569+12
16576
+	uxth	r6, r6
16290
16577
 	bl	printk
16291
16578
 	ldrh	r3, [r4, #2]
16292
-	uxth	r6, r6
16293
16579
 	cmp	r3, #2
16294
16580
 	ittt	ls
16295
-	ldrhls	r3, [fp, #2390]
16581
+	ldrhls	r3, [r7, #2392]
16296
16582
 	addls	r3, r3, #-1
16297
16583
 	strhls	r3, [r4, #2]	@ movhi
16298
16584
 	cmp	r6, #3
16299
-	bls	.L2637
16585
+	bls	.L2546
16586
+	ldr	r3, .L2569+4
16300
16587
 	mov	r2, r6
16301
-	ldr	r0, .L2660+16
16302
-	ldr	r1, [r10, #1252]
16588
+	ldr	r0, .L2569+16
16589
+	ldr	r1, [r3, #1260]
16303
16590
 	bl	printk
16304
-	ldr	r3, .L2660
16305
-	movs	r2, #1
16306
-	str	r2, [r3, #224]
16307
-	b	.L2655
16308
-.L2642:
16309
-	cbz	r2, .L2645
16310
-	cmp	r3, #1
16311
-	strh	r8, [r4, #40]	@ movhi
16312
-	bne	.L2646
16313
-.L2647:
16314
-	movs	r3, #0
16315
-	str	r3, [r4, #36]
16316
-	b	.L2637
16317
-.L2646:
16318
-	cmp	r2, #256
16319
-	b	.L2659
16320
-.L2645:
16321
-	cmp	r3, #1
16322
-.L2659:
16323
-	beq	.L2647
16324
-	ldr	r3, [r4, #36]
16325
-	cmp	r3, #0
16326
-	bne	.L2647
16327
-	ldr	r2, [r10, #1252]
16328
-	ldr	r3, [r4, #24]
16329
-	str	r2, [r3, r9, lsl #2]
16330
-.L2655:
16591
+	movs	r3, #1
16592
+	str	r3, [r9, #228]
16593
+.L2564:
16331
16594
 	movs	r0, #0
16332
16595
 	add	sp, sp, #12
16333
16596
 	@ sp needed
16334
16597
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
16335
-.L2661:
16598
+.L2551:
16599
+	cbz	r2, .L2554
16600
+	cmp	r3, #1
16601
+	strh	r10, [r4, #40]	@ movhi
16602
+	bne	.L2555
16603
+.L2556:
16604
+	movs	r3, #0
16605
+	str	r3, [r4, #36]
16606
+	b	.L2546
16607
+.L2555:
16608
+	cmp	r2, #256
16609
+.L2568:
16610
+	beq	.L2556
16611
+	ldr	r3, [r4, #36]
16612
+	cmp	r3, #0
16613
+	bne	.L2556
16614
+	ldr	r3, .L2569+4
16615
+	ldr	r2, [r3, #1260]
16616
+	ldr	r3, [r4, #24]
16617
+	str	r2, [r3, fp, lsl #2]
16618
+	b	.L2564
16619
+.L2554:
16620
+	cmp	r3, #1
16621
+	b	.L2568
16622
+.L2570:
16336
16623
 	.align	2
16337
-.L2660:
16338
-	.word	.LANCHOR2
16624
+.L2569:
16339
16625
 	.word	.LANCHOR0
16340
16626
 	.word	.LANCHOR4
16627
+	.word	.LANCHOR4+1256
16341
16628
 	.word	.LC134
16342
16629
 	.word	.LC135
16630
+	.word	.LANCHOR2
16343
16631
 	.fnend
16344
16632
 	.size	FtlMapWritePage, .-FtlMapWritePage
16345
16633
 	.align	1
16346
16634
 	.global	flush_l2p_region
16635
+	.syntax unified
16347
16636
 	.thumb
16348
16637
 	.thumb_func
16638
+	.fpu softvfp
16349
16639
 	.type	flush_l2p_region, %function
16350
16640
 flush_l2p_region:
16351
16641
 	.fnstart
..
..
@@ -16354,31 +16644,33 @@
16354
16644
 	push	{r3, r4, r5, lr}
16355
16645
 	.save {r3, r4, r5, lr}
16356
16646
 	movs	r4, #12
16357
-	ldr	r5, .L2663
16647
+	ldr	r5, .L2572
16358
16648
 	muls	r4, r0, r4
16649
+	ldr	r3, [r5, #464]
16359
16650
 	add	r0, r5, #3408
16360
-	ldr	r3, [r5, #460]
16361
16651
 	adds	r2, r3, r4
16362
16652
 	ldrh	r1, [r3, r4]
16363
16653
 	ldr	r2, [r2, #8]
16364
16654
 	bl	FtlMapWritePage
16365
-	ldr	r3, [r5, #460]
16655
+	ldr	r3, [r5, #464]
16366
16656
 	movs	r0, #0
16367
16657
 	add	r4, r4, r3
16368
16658
 	ldr	r3, [r4, #4]
16369
16659
 	bic	r3, r3, #-2147483648
16370
16660
 	str	r3, [r4, #4]
16371
16661
 	pop	{r3, r4, r5, pc}
16372
-.L2664:
16662
+.L2573:
16373
16663
 	.align	2
16374
-.L2663:
16664
+.L2572:
16375
16665
 	.word	.LANCHOR2
16376
16666
 	.fnend
16377
16667
 	.size	flush_l2p_region, .-flush_l2p_region
16378
16668
 	.align	1
16379
16669
 	.global	FtlMapTblRecovery
16670
+	.syntax unified
16380
16671
 	.thumb
16381
16672
 	.thumb_func
16673
+	.fpu softvfp
16382
16674
 	.type	FtlMapTblRecovery, %function
16383
16675
 FtlMapTblRecovery:
16384
16676
 	.fnstart
..
..
@@ -16388,225 +16680,79 @@
16388
16680
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
16389
16681
 	.pad #36
16390
16682
 	sub	sp, sp, #36
16391
-	ldr	r3, [r0, #16]
16683
+	ldr	r3, [r0, #24]
16392
16684
 	mov	r4, r0
16393
-	ldrh	r9, [r0, #6]
16394
16685
 	movs	r1, #0
16395
-	ldr	r7, [r0, #24]
16686
+	movs	r7, #0
16687
+	ldr	fp, .L2615+8
16688
+	str	r3, [sp, #4]
16689
+	ldr	r3, [r0, #12]
16690
+	ldr	r5, .L2615
16691
+	ldr	r6, .L2615+4
16692
+	str	r3, [sp, #8]
16693
+	ldr	r3, [r0, #16]
16694
+	str	r3, [sp, #20]
16695
+	ldrh	r3, [r0, #6]
16396
16696
 	str	r3, [sp, #12]
16397
16697
 	ldrh	r3, [r0, #8]
16398
-	lsl	r2, r9, #2
16399
-	ldr	r8, [r0, #12]
16400
-	mov	r0, r7
16401
-	ldr	r10, .L2707+12
16402
-	str	r3, [sp, #8]
16403
-	bl	ftl_memset
16404
-	ldr	r3, .L2707
16405
-	movs	r0, #1
16406
-	ldr	r2, .L2707+4
16407
-	str	r0, [r4, #36]
16408
-	ldr	r1, [r3, #3316]
16409
-	ldr	r6, [r3, #3340]
16410
-	mov	r5, r2
16411
-	str	r1, [r2, #1256]
16412
-	movw	r1, #65535
16413
-	str	r6, [r2, #1260]
16414
-	strh	r1, [r4]	@ movhi
16415
-	strh	r1, [r4, #2]	@ movhi
16416
-	movs	r1, #0
16417
-	str	r1, [r4, #32]
16418
-	str	r1, [r4, #28]
16419
-	str	r1, [sp, #4]
16420
-	str	r3, [sp, #20]
16421
-.L2666:
16422
-	ldrh	r2, [sp, #4]
16423
-	ldr	r1, [sp, #8]
16424
-	ldr	fp, .L2707+12
16425
-	sxth	r3, r2
16426
-	cmp	r3, r1
16427
-	bge	.L2684
16428
-	ldr	r1, [sp, #8]
16429
-	subs	r1, r1, #1
16430
-	cmp	r3, r1
16431
-	lsl	r1, r3, #1
16432
-	bne	.L2667
16433
-	ldrh	r0, [r8, r3, lsl #1]
16434
-	str	r2, [sp, #16]
16435
-	add	r2, r8, r1
16436
-	movs	r1, #1
16437
-	str	r2, [sp, #4]
16438
-	str	r3, [sp, #8]
16439
-	bl	FtlGetLastWrittenPage
16440
-	ldr	r10, .L2707+4
16441
-	mov	r8, #0
16442
-	ldr	r2, [sp, #16]
16443
-	adds	r1, r0, #1
16698
+	ldr	r0, [sp, #4]
16699
+	str	r3, [sp, #16]
16444
16700
 	ldr	r3, [sp, #12]
16445
-	sxth	r0, r0
16446
-	strh	r1, [r4, #2]	@ movhi
16701
+	lsls	r2, r3, #2
16702
+	bl	ftl_memset
16703
+	ldr	r2, [fp, #3316]
16704
+	ldr	r8, [fp, #3340]
16705
+	str	r7, [r4, #32]
16706
+	str	r2, [r5, #1264]
16707
+	movw	r2, #65535
16708
+	str	r8, [r5, #1268]
16447
16709
 	strh	r2, [r4]	@ movhi
16448
-	mov	r2, r3
16710
+	strh	r2, [r4, #2]	@ movhi
16711
+	movs	r2, #1
16712
+	str	r7, [r4, #28]
16713
+	str	r2, [r4, #36]
16714
+.L2575:
16715
+	ldr	r3, [sp, #16]
16716
+	sxth	r10, r7
16717
+	cmp	r10, r3
16718
+	bge	.L2594
16719
+	ldr	r3, [sp, #16]
16720
+	lsl	r9, r10, #1
16721
+	subs	r2, r3, #1
16722
+	cmp	r10, r2
16723
+	bne	.L2576
16449
16724
 	ldr	r3, [sp, #8]
16450
-	ldr	r3, [r2, r3, lsl #2]
16451
-	str	r3, [r4, #28]
16452
-	adds	r3, r0, #1
16453
-	str	r3, [sp, #8]
16454
-.L2668:
16455
-	ldr	r3, [sp, #8]
16456
-	sxth	r2, r8
16457
-	cmp	r2, r3
16458
-	bge	.L2684
16459
-	ldr	r3, [sp, #4]
16460
-	ldr	r0, .L2707+8
16461
-	ldrh	r1, [r3]
16462
-	orr	r2, r2, r1, lsl #10
16463
16725
 	movs	r1, #1
16464
-	str	r2, [r5, #1252]
16465
-	mov	r2, r1
16466
-	bl	FlashReadPages
16467
-	ldrb	r2, [fp]	@ zero_extendqisi2
16468
-	cbz	r2, .L2669
16469
-	ldr	r2, [r10, #1260]
16470
-	ldr	r2, [r2, #12]
16471
-	cbz	r2, .L2669
16472
-	ldr	r1, .L2707+12
16473
-	ldr	r0, [r10, #1256]
16474
-	str	r2, [sp, #12]
16475
-	ldrh	r1, [r1, #2398]
16476
-	bl	js_hash
16477
-	ldr	r2, [sp, #12]
16478
-	cmp	r2, r0
16479
-	itt	ne
16480
-	movne	r2, #-1
16481
-	strne	r2, [r10, #1248]
16482
-.L2669:
16483
-	ldr	r2, [r10, #1248]
16484
-	adds	r2, r2, #1
16485
-	beq	.L2670
16486
-	ldrh	r2, [r6, #8]
16487
-	cmp	r2, r9
16488
-	bcs	.L2670
16489
-	ldrh	r1, [r4, #4]
16490
-	ldrh	r0, [r6]
16491
-	cmp	r0, r1
16492
-	itt	eq
16493
-	ldreq	r1, [r10, #1252]
16494
-	streq	r1, [r7, r2, lsl #2]
16495
-.L2670:
16496
-	add	r8, r8, #1
16497
-	b	.L2668
16498
-.L2684:
16726
+	ldr	fp, .L2615+12
16727
+	ldrh	r0, [r3, r10, lsl #1]
16728
+	add	r9, r9, r3
16729
+	bl	FtlGetLastWrittenPage
16730
+	ldr	r2, [sp, #20]
16731
+	sxth	r3, r0
16732
+	adds	r0, r0, #1
16733
+	strh	r7, [r4]	@ movhi
16734
+	strh	r0, [r4, #2]	@ movhi
16735
+	sub	r7, fp, #1256
16736
+	ldr	r2, [r2, r10, lsl #2]
16737
+	mov	r10, #0
16738
+	adds	r3, r3, #1
16739
+	str	r3, [sp, #8]
16740
+	str	r2, [r4, #28]
16741
+.L2577:
16742
+	ldr	r3, [sp, #8]
16743
+	sxth	r2, r10
16744
+	cmp	r2, r3
16745
+	blt	.L2580
16746
+.L2594:
16499
16747
 	mov	r0, r4
16500
16748
 	bl	ftl_free_no_use_map_blk
16501
16749
 	ldrh	r2, [r4, #2]
16502
-	ldrh	r3, [fp, #2390]
16750
+	ldrh	r3, [r6, #2392]
16503
16751
 	cmp	r2, r3
16504
-	bne	.L2673
16752
+	bne	.L2582
16505
16753
 	mov	r0, r4
16506
16754
 	bl	ftl_map_blk_alloc_new_blk
16507
-	b	.L2673
16508
-.L2667:
16509
-	ldr	r2, [sp, #20]
16510
-	ldr	r0, .L2707+8
16511
-	ldr	r2, [r2, #3316]
16512
-	str	r2, [r5, #1256]
16513
-	add	r2, r8, r1
16514
-	str	r2, [sp, #16]
16515
-	movs	r1, #1
16516
-	ldrh	r2, [r8, r3, lsl #1]
16517
-	ldrh	r3, [r10, #2390]
16518
-	subs	r3, r3, #1
16519
-	orr	r3, r3, r2, lsl #10
16520
-	mov	r2, r1
16521
-	str	r3, [r5, #1252]
16522
-	bl	FlashReadPages
16523
-	ldr	r3, [r5, #1248]
16524
-	adds	r3, r3, #1
16525
-	beq	.L2686
16526
-	ldrh	r2, [r6]
16527
-	ldrh	r3, [r4, #4]
16528
-	cmp	r2, r3
16529
-	bne	.L2686
16530
-	ldrh	r2, [r6, #8]
16531
-	movw	r3, #64245
16532
-	cmp	r2, r3
16533
-	bne	.L2686
16534
-	movs	r1, #0
16535
-	mov	lr, #8
16536
-	mov	ip, #4
16537
-.L2675:
16538
-	uxth	r3, r1
16539
-	ldrh	r2, [r10, #2390]
16540
-	sxth	r0, r3
16541
-	subs	r2, r2, #1
16542
-	cmp	r0, r2
16543
-	bge	.L2678
16544
-	ldr	r2, .L2707
16545
-	adds	r1, r1, #1
16546
-	ldr	r2, [r2, #3316]
16547
-	ldrh	r0, [r2, r0, lsl #3]
16548
-	cmp	r0, r9
16549
-	ittt	cc
16550
-	smlabbcc	r3, r3, lr, ip
16551
-	ldrcc	r3, [r2, r3]
16552
-	strcc	r3, [r7, r0, lsl #2]
16553
-	b	.L2675
16554
-.L2686:
16555
-	ldr	r3, .L2707+4
16556
-	mov	fp, #0
16557
-.L2706:
16558
-	ldrh	r1, [r10, #2390]
16559
-	sxth	r2, fp
16560
-	cmp	r2, r1
16561
-	bge	.L2678
16562
-	ldr	r1, [sp, #16]
16563
-	ldr	r0, .L2707+8
16564
-	str	r3, [sp, #24]
16565
-	ldrh	r1, [r1]
16566
-	orr	r2, r2, r1, lsl #10
16567
-	movs	r1, #1
16568
-	str	r2, [r3, #1252]
16569
-	mov	r2, r1
16570
-	bl	FlashReadPages
16571
-	ldrb	r2, [r10]	@ zero_extendqisi2
16572
-	ldr	r3, [sp, #24]
16573
-	cbz	r2, .L2679
16574
-	ldr	r2, [r3, #1260]
16575
-	ldr	r2, [r2, #12]
16576
-	cbz	r2, .L2679
16577
-	ldr	r0, [r3, #1256]
16578
-	ldrh	r1, [r10, #2398]
16579
-	str	r2, [sp, #28]
16580
-	bl	js_hash
16581
-	ldr	r2, [sp, #28]
16582
-	ldr	r3, [sp, #24]
16583
-	cmp	r2, r0
16584
-	itt	ne
16585
-	movne	r2, #-1
16586
-	strne	r2, [r3, #1248]
16587
-.L2679:
16588
-	ldr	r2, .L2707+4
16589
-	ldr	r2, [r2, #1248]
16590
-	adds	r2, r2, #1
16591
-	beq	.L2680
16592
-	ldrh	r2, [r6, #8]
16593
-	cmp	r2, r9
16594
-	bcs	.L2680
16595
-	ldrh	r1, [r4, #4]
16596
-	ldrh	r0, [r6]
16597
-	cmp	r0, r1
16598
-	itt	eq
16599
-	ldreq	r1, [r3, #1252]
16600
-	streq	r1, [r7, r2, lsl #2]
16601
-.L2680:
16602
-	add	fp, fp, #1
16603
-	b	.L2706
16604
-.L2678:
16605
-	ldr	r3, [sp, #4]
16606
-	adds	r3, r3, #1
16607
-	str	r3, [sp, #4]
16608
-	b	.L2666
16609
-.L2673:
16755
+.L2582:
16610
16756
 	mov	r0, r4
16611
16757
 	bl	ftl_map_blk_gc
16612
16758
 	mov	r0, r4
..
..
@@ -16615,19 +16761,163 @@
16615
16761
 	add	sp, sp, #36
16616
16762
 	@ sp needed
16617
16763
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
16618
-.L2708:
16764
+.L2580:
16765
+	ldrh	r1, [r9]
16766
+	mov	r0, fp
16767
+	orr	r2, r2, r1, lsl #10
16768
+	str	r2, [r5, #1260]
16769
+	movs	r2, #1
16770
+	mov	r1, r2
16771
+	bl	FlashReadPages
16772
+	ldrb	r2, [r6, #36]	@ zero_extendqisi2
16773
+	cbz	r2, .L2578
16774
+	ldr	r2, [r5, #1268]
16775
+	ldr	r2, [r2, #12]
16776
+	str	r2, [sp, #16]
16777
+	cbz	r2, .L2578
16778
+	ldrh	r1, [r6, #2400]
16779
+	ldr	r0, [r5, #1264]
16780
+	bl	js_hash
16781
+	ldr	r2, [sp, #16]
16782
+	cmp	r2, r0
16783
+	itt	ne
16784
+	movne	r2, #-1
16785
+	strne	r2, [r5, #1256]
16786
+.L2578:
16787
+	ldr	r2, [r7, #1256]
16788
+	adds	r2, r2, #1
16789
+	beq	.L2579
16790
+	ldrh	r2, [r8, #8]
16791
+	ldr	r3, [sp, #12]
16792
+	cmp	r3, r2
16793
+	bls	.L2579
16794
+	ldrh	r1, [r4, #4]
16795
+	ldrh	r0, [r8]
16796
+	cmp	r0, r1
16797
+	ittt	eq
16798
+	ldreq	r1, [r7, #1260]
16799
+	ldreq	r3, [sp, #4]
16800
+	streq	r1, [r3, r2, lsl #2]
16801
+.L2579:
16802
+	add	r10, r10, #1
16803
+	b	.L2577
16804
+.L2576:
16805
+	ldr	r3, .L2615+8
16806
+	ldr	r0, .L2615+12
16807
+	ldr	r2, [r3, #3316]
16808
+	ldr	r3, [sp, #8]
16809
+	str	r2, [r5, #1264]
16810
+	add	r3, r3, r9
16811
+	ldrh	r2, [r6, #2392]
16812
+	str	r3, [sp, #24]
16813
+	ldr	r3, [sp, #8]
16814
+	subs	r2, r2, #1
16815
+	ldrh	r1, [r3, r10, lsl #1]
16816
+	orr	r2, r2, r1, lsl #10
16817
+	str	r2, [r5, #1260]
16818
+	movs	r2, #1
16819
+	mov	r1, r2
16820
+	bl	FlashReadPages
16821
+	ldr	r2, [r5, #1256]
16822
+	adds	r2, r2, #1
16823
+	beq	.L2596
16824
+	ldrh	r1, [r8]
16825
+	ldrh	r2, [r4, #4]
16826
+	cmp	r1, r2
16827
+	bne	.L2596
16828
+	ldrh	r1, [r8, #8]
16829
+	movw	r2, #64245
16830
+	cmp	r1, r2
16831
+	beq	.L2584
16832
+.L2596:
16833
+	ldr	r9, .L2615
16834
+	mov	r10, #0
16835
+.L2585:
16836
+	ldrh	r1, [r6, #2392]
16837
+	sxth	r2, r10
16838
+	cmp	r2, r1
16839
+	bge	.L2592
16840
+	ldr	r3, [sp, #24]
16841
+	ldr	r0, .L2615+12
16842
+	ldrh	r1, [r3]
16843
+	orr	r2, r2, r1, lsl #10
16844
+	str	r2, [r9, #1260]
16845
+	movs	r2, #1
16846
+	mov	r1, r2
16847
+	bl	FlashReadPages
16848
+	ldrb	r2, [r6, #36]	@ zero_extendqisi2
16849
+	cbz	r2, .L2589
16850
+	ldr	r2, [r9, #1268]
16851
+	ldr	r2, [r2, #12]
16852
+	str	r2, [sp, #28]
16853
+	cbz	r2, .L2589
16854
+	ldrh	r1, [r6, #2400]
16855
+	ldr	r0, [r9, #1264]
16856
+	bl	js_hash
16857
+	ldr	r2, [sp, #28]
16858
+	cmp	r2, r0
16859
+	itt	ne
16860
+	movne	r2, #-1
16861
+	strne	r2, [r9, #1256]
16862
+.L2589:
16863
+	ldr	r2, [r9, #1256]
16864
+	adds	r2, r2, #1
16865
+	beq	.L2590
16866
+	ldrh	r2, [r8, #8]
16867
+	ldr	r3, [sp, #12]
16868
+	cmp	r3, r2
16869
+	bls	.L2590
16870
+	ldrh	r1, [r4, #4]
16871
+	ldrh	r0, [r8]
16872
+	cmp	r0, r1
16873
+	ittt	eq
16874
+	ldreq	r1, [r9, #1260]
16875
+	ldreq	r3, [sp, #4]
16876
+	streq	r1, [r3, r2, lsl #2]
16877
+.L2590:
16878
+	add	r10, r10, #1
16879
+	b	.L2585
16880
+.L2584:
16881
+	movs	r0, #0
16882
+	mov	lr, #4
16883
+.L2586:
16884
+	ldrh	r1, [r6, #2392]
16885
+	sxth	r2, r0
16886
+	subs	r1, r1, #1
16887
+	cmp	r2, r1
16888
+	blt	.L2588
16889
+.L2592:
16890
+	adds	r7, r7, #1
16891
+	b	.L2575
16892
+.L2588:
16893
+	ldr	ip, [fp, #3316]
16894
+	ldr	r3, [sp, #12]
16895
+	ldr	r1, [ip, r2, lsl #3]
16896
+	uxth	r9, r1
16897
+	cmp	r3, r9
16898
+	bls	.L2587
16899
+	add	r2, lr, r2, lsl #3
16900
+	ldr	r3, [sp, #4]
16901
+	ldr	r2, [ip, r2]
16902
+	str	r2, [r3, r9, lsl #2]
16903
+.L2587:
16904
+	adds	r0, r0, #1
16905
+	b	.L2586
16906
+.L2616:
16619
16907
 	.align	2
16620
-.L2707:
16621
-	.word	.LANCHOR2
16908
+.L2615:
16622
16909
 	.word	.LANCHOR4
16623
-	.word	.LANCHOR4+1248
16624
16910
 	.word	.LANCHOR0
16911
+	.word	.LANCHOR2
16912
+	.word	.LANCHOR4+1256
16625
16913
 	.fnend
16626
16914
 	.size	FtlMapTblRecovery, .-FtlMapTblRecovery
16627
16915
 	.align	1
16628
16916
 	.global	FtlLoadVonderInfo
16917
+	.syntax unified
16629
16918
 	.thumb
16630
16919
 	.thumb_func
16920
+	.fpu softvfp
16631
16921
 	.type	FtlLoadVonderInfo, %function
16632
16922
 FtlLoadVonderInfo:
16633
16923
 	.fnstart
..
..
@@ -16635,20 +16925,20 @@
16635
16925
 	@ frame_needed = 0, uses_anonymous_args = 0
16636
16926
 	push	{r3, lr}
16637
16927
 	.save {r3, lr}
16638
-	ldr	r3, .L2710
16639
-	ldr	r0, .L2710+4
16640
-	ldrh	r2, [r3, #2408]
16641
-	add	r0, r0, #1288
16928
+	ldr	r3, .L2618
16929
+	ldr	r0, .L2618+4
16930
+	ldrh	r2, [r3, #2412]
16931
+	add	r0, r0, #1296
16642
16932
 	strh	r2, [r0, #10]	@ movhi
16643
16933
 	movw	r2, #61574
16644
16934
 	strh	r2, [r0, #4]	@ movhi
16645
-	ldrh	r2, [r3, #2434]
16935
+	ldrh	r2, [r3, #2438]
16646
16936
 	strh	r2, [r0, #8]	@ movhi
16647
-	ldrh	r2, [r3, #2410]
16648
-	ldr	r3, [r3, #2436]
16937
+	ldrh	r2, [r3, #2414]
16938
+	ldr	r3, [r3, #2440]
16649
16939
 	strh	r2, [r0, #6]	@ movhi
16650
16940
 	str	r3, [r0, #12]
16651
-	ldr	r3, .L2710+8
16941
+	ldr	r3, .L2618+8
16652
16942
 	ldr	r2, [r3, #3380]
16653
16943
 	str	r2, [r0, #16]
16654
16944
 	ldr	r2, [r3, #3376]
..
..
@@ -16658,9 +16948,9 @@
16658
16948
 	bl	FtlMapTblRecovery
16659
16949
 	movs	r0, #0
16660
16950
 	pop	{r3, pc}
16661
-.L2711:
16951
+.L2619:
16662
16952
 	.align	2
16663
-.L2710:
16953
+.L2618:
16664
16954
 	.word	.LANCHOR0
16665
16955
 	.word	.LANCHOR4
16666
16956
 	.word	.LANCHOR2
..
..
@@ -16668,8 +16958,10 @@
16668
16958
 	.size	FtlLoadVonderInfo, .-FtlLoadVonderInfo
16669
16959
 	.align	1
16670
16960
 	.global	FtlLoadMapInfo
16961
+	.syntax unified
16671
16962
 	.thumb
16672
16963
 	.thumb_func
16964
+	.fpu softvfp
16673
16965
 	.type	FtlLoadMapInfo, %function
16674
16966
 FtlLoadMapInfo:
16675
16967
 	.fnstart
..
..
@@ -16678,182 +16970,179 @@
16678
16970
 	push	{r3, lr}
16679
16971
 	.save {r3, lr}
16680
16972
 	bl	FtlL2PDataInit
16681
-	ldr	r0, .L2713
16973
+	ldr	r0, .L2621
16682
16974
 	bl	FtlMapTblRecovery
16683
16975
 	movs	r0, #0
16684
16976
 	pop	{r3, pc}
16685
-.L2714:
16977
+.L2622:
16686
16978
 	.align	2
16687
-.L2713:
16979
+.L2621:
16688
16980
 	.word	.LANCHOR2+3408
16689
16981
 	.fnend
16690
16982
 	.size	FtlLoadMapInfo, .-FtlLoadMapInfo
16691
16983
 	.align	1
16692
16984
 	.global	FtlVendorPartWrite
16985
+	.syntax unified
16693
16986
 	.thumb
16694
16987
 	.thumb_func
16988
+	.fpu softvfp
16695
16989
 	.type	FtlVendorPartWrite, %function
16696
16990
 FtlVendorPartWrite:
16697
16991
 	.fnstart
16698
16992
 	@ args = 0, pretend = 0, frame = 56
16699
16993
 	@ frame_needed = 0, uses_anonymous_args = 0
16700
-	ldr	r3, .L2728
16994
+	ldr	r3, .L2635
16701
16995
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
16702
16996
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
16703
-	mov	r5, r0
16704
-	mov	r4, r1
16705
-	add	r0, r0, r1
16706
-	ldrh	r1, [r3, #2384]
16997
+	mov	r10, r2
16998
+	mov	r5, r1
16999
+	adds	r1, r0, r1
16707
17000
 	.pad #60
16708
17001
 	sub	sp, sp, #60
16709
-	mov	r10, r2
16710
-	ldrh	r2, [r3, #2396]
16711
-	cmp	r0, r1
16712
-	str	r3, [sp, #4]
16713
-	bhi	.L2723
16714
-	ldr	r7, .L2728+4
16715
-	lsr	r6, r5, r2
16716
-	mov	fp, #0
16717
-	lsls	r3, r6, #2
17002
+	mov	r7, r0
17003
+	ldrh	r2, [r3, #2386]
16718
17004
 	str	r3, [sp]
16719
-.L2717:
16720
-	cmp	r4, #0
16721
-	beq	.L2727
16722
-	ldr	r3, .L2728+4
16723
-	mov	r0, r5
16724
-	ldr	r2, [sp]
16725
-	ldr	r3, [r3, #3384]
16726
-	ldr	ip, [r3, r2]
16727
-	ldr	r3, [sp, #4]
16728
-	str	ip, [sp, #12]
16729
-	ldrh	r2, [r3, #2394]
16730
-	mov	r1, r2
16731
-	str	r2, [sp, #8]
16732
-	bl	__aeabi_uidivmod
16733
-	ldr	r2, [sp, #8]
16734
-	mov	r8, r1
16735
-	ldr	ip, [sp, #12]
16736
-	subs	r3, r2, r1
16737
-	uxth	r9, r3
16738
-	cmp	r9, r4
16739
-	it	hi
16740
-	uxthhi	r9, r4
16741
-	cmp	ip, #0
16742
-	beq	.L2719
16743
-	cmp	r9, r2
16744
-	beq	.L2719
16745
-	ldr	r2, [r7, #3324]
16746
-	movs	r1, #1
16747
-	add	r0, sp, #20
16748
-	str	ip, [sp, #24]
16749
-	str	r2, [sp, #28]
16750
-	movs	r2, #0
16751
-	str	r2, [sp, #32]
16752
-	mov	r2, r1
16753
-	bl	FlashReadPages
16754
-	b	.L2720
16755
-.L2719:
16756
-	ldr	r3, [sp, #4]
16757
-	movs	r1, #0
16758
-	ldr	r0, [r7, #3324]
16759
-	ldrh	r2, [r3, #2398]
16760
-	bl	ftl_memset
16761
-.L2720:
16762
-	lsl	ip, r9, #9
16763
-	ldr	r0, [r7, #3324]
16764
-	uxth	r8, r8
16765
-	mov	r1, r10
16766
-	mov	r2, ip
16767
-	str	ip, [sp, #8]
16768
-	add	r0, r0, r8, lsl #9
16769
-	rsb	r4, r9, r4
16770
-	bl	ftl_memcpy
16771
-	mov	r1, r6
16772
-	ldr	r0, .L2728+8
16773
-	adds	r6, r6, #1
16774
-	ldr	r2, [r7, #3324]
16775
-	add	r5, r5, r9
16776
-	bl	FtlMapWritePage
16777
-	ldr	r3, [sp]
16778
-	adds	r0, r0, #1
16779
-	ldr	ip, [sp, #8]
16780
-	it	eq
16781
-	moveq	fp, #-1
16782
-	adds	r3, r3, #4
16783
-	str	r3, [sp]
16784
-	add	r10, r10, ip
16785
-	b	.L2717
16786
-.L2727:
16787
-	mov	r0, fp
16788
-	b	.L2716
16789
-.L2723:
16790
-	mov	r0, #-1
16791
-.L2716:
17005
+	cmp	r1, r2
17006
+	bhi	.L2631
17007
+	ldrh	r6, [r3, #2398]
17008
+	mov	r9, #0
17009
+	ldr	r8, .L2635+8
17010
+	lsr	r6, r0, r6
17011
+	lsl	fp, r6, #2
17012
+.L2625:
17013
+	cbnz	r5, .L2630
17014
+.L2623:
17015
+	mov	r0, r9
16792
17016
 	add	sp, sp, #60
16793
17017
 	@ sp needed
16794
17018
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
16795
-.L2729:
17019
+.L2630:
17020
+	ldr	r3, [r8, #3384]
17021
+	mov	r0, r7
17022
+	ldr	r2, [r3, fp]
17023
+	ldr	r3, [sp]
17024
+	str	r2, [sp, #12]
17025
+	ldrh	r3, [r3, #2396]
17026
+	mov	r1, r3
17027
+	str	r3, [sp, #8]
17028
+	bl	__aeabi_uidivmod
17029
+	ldr	r3, [sp, #8]
17030
+	ldr	r2, [sp, #12]
17031
+	str	r1, [sp, #4]
17032
+	subs	r4, r3, r1
17033
+	uxth	r4, r4
17034
+	cmp	r5, r4
17035
+	it	cc
17036
+	uxthcc	r4, r5
17037
+	cbz	r2, .L2627
17038
+	cmp	r4, r3
17039
+	beq	.L2627
17040
+	ldr	r3, [r8, #3324]
17041
+	add	r0, sp, #20
17042
+	str	r2, [sp, #24]
17043
+	movs	r2, #1
17044
+	mov	r1, r2
17045
+	str	r3, [sp, #28]
17046
+	movs	r3, #0
17047
+	str	r3, [sp, #32]
17048
+	bl	FlashReadPages
17049
+.L2628:
17050
+	lsls	r3, r4, #9
17051
+	ldr	r0, [r8, #3324]
17052
+	mov	r1, r10
17053
+	mov	r2, r3
17054
+	str	r3, [sp, #8]
17055
+	ldr	r3, [sp, #4]
17056
+	subs	r5, r5, r4
17057
+	add	r7, r7, r4
17058
+	add	fp, fp, #4
17059
+	add	r0, r0, r3, lsl #9
17060
+	bl	ftl_memcpy
17061
+	mov	r1, r6
17062
+	ldr	r2, [r8, #3324]
17063
+	ldr	r0, .L2635+4
17064
+	adds	r6, r6, #1
17065
+	bl	FtlMapWritePage
17066
+	ldr	r3, [sp, #8]
17067
+	adds	r0, r0, #1
17068
+	it	eq
17069
+	moveq	r9, #-1
17070
+	add	r10, r10, r3
17071
+	b	.L2625
17072
+.L2627:
17073
+	ldr	r3, [sp]
17074
+	movs	r1, #0
17075
+	ldr	r0, [r8, #3324]
17076
+	ldrh	r2, [r3, #2400]
17077
+	bl	ftl_memset
17078
+	b	.L2628
17079
+.L2631:
17080
+	mov	r9, #-1
17081
+	b	.L2623
17082
+.L2636:
16796
17083
 	.align	2
16797
-.L2728:
17084
+.L2635:
16798
17085
 	.word	.LANCHOR0
17086
+	.word	.LANCHOR4+1296
16799
17087
 	.word	.LANCHOR2
16800
-	.word	.LANCHOR4+1288
16801
17088
 	.fnend
16802
17089
 	.size	FtlVendorPartWrite, .-FtlVendorPartWrite
16803
17090
 	.align	1
16804
17091
 	.global	Ftl_save_ext_data
17092
+	.syntax unified
16805
17093
 	.thumb
16806
17094
 	.thumb_func
17095
+	.fpu softvfp
16807
17096
 	.type	Ftl_save_ext_data, %function
16808
17097
 Ftl_save_ext_data:
16809
17098
 	.fnstart
16810
17099
 	@ args = 0, pretend = 0, frame = 0
16811
17100
 	@ frame_needed = 0, uses_anonymous_args = 0
16812
17101
 	@ link register save eliminated.
16813
-	ldr	r2, .L2732
16814
-	ldr	r3, .L2732+4
16815
-	ldr	r1, [r2, #608]
17102
+	ldr	r2, .L2639
17103
+	ldr	r3, .L2639+4
17104
+	ldr	r1, [r2, #604]
16816
17105
 	cmp	r1, r3
16817
-	bne	.L2730
16818
-	ldr	r3, .L2732+8
16819
-	movs	r0, #0
17106
+	bne	.L2637
17107
+	ldr	r3, .L2639+8
16820
17108
 	movs	r1, #1
16821
-	str	r3, [r2, #612]
17109
+	movs	r0, #0
17110
+	str	r3, [r2, #608]
16822
17111
 	ldr	r3, [r2, #500]
16823
-	str	r3, [r2, #696]
17112
+	str	r3, [r2, #692]
16824
17113
 	ldr	r3, [r2, #504]
16825
-	str	r3, [r2, #700]
17114
+	str	r3, [r2, #696]
16826
17115
 	ldr	r3, [r2, #496]
16827
-	str	r3, [r2, #616]
17116
+	str	r3, [r2, #612]
16828
17117
 	ldr	r3, [r2, #484]
16829
-	str	r3, [r2, #620]
17118
+	str	r3, [r2, #616]
16830
17119
 	ldr	r3, [r2, #476]
16831
-	str	r3, [r2, #624]
17120
+	str	r3, [r2, #620]
16832
17121
 	ldr	r3, [r2, #492]
16833
-	str	r3, [r2, #628]
17122
+	str	r3, [r2, #624]
16834
17123
 	ldr	r3, [r2, #520]
16835
-	str	r3, [r2, #636]
16836
-	ldr	r3, [r2, #236]
16837
-	add	r2, r2, #608
17124
+	str	r3, [r2, #632]
17125
+	ldr	r3, [r2, #240]
17126
+	add	r2, r2, #604
16838
17127
 	str	r3, [r2, #32]
16839
-	ldr	r3, [r2, #-128]
17128
+	ldr	r3, [r2, #-124]
16840
17129
 	str	r3, [r2, #36]
16841
-	ldr	r3, [r2, #-120]
17130
+	ldr	r3, [r2, #-116]
16842
17131
 	str	r3, [r2, #40]
16843
-	ldr	r3, [r2, #-80]
16844
-	str	r3, [r2, #44]
16845
17132
 	ldr	r3, [r2, #-76]
17133
+	str	r3, [r2, #44]
17134
+	ldr	r3, [r2, #-72]
16846
17135
 	str	r3, [r2, #48]
16847
-	ldr	r3, [r2, #-4]
17136
+	ldr	r3, [r2, #512]
16848
17137
 	str	r3, [r2, #60]
16849
-	ldr	r3, [r2, #2668]
17138
+	ldr	r3, [r2, #2672]
16850
17139
 	str	r3, [r2, #64]
16851
17140
 	b	FtlVendorPartWrite
16852
-.L2730:
17141
+.L2637:
16853
17142
 	bx	lr
16854
-.L2733:
17143
+.L2640:
16855
17144
 	.align	2
16856
-.L2732:
17145
+.L2639:
16857
17146
 	.word	.LANCHOR2
16858
17147
 	.word	1179929683
16859
17148
 	.word	1342177379
..
..
@@ -16861,51 +17150,51 @@
16861
17150
 	.size	Ftl_save_ext_data, .-Ftl_save_ext_data
16862
17151
 	.align	1
16863
17152
 	.global	FtlEctTblFlush
17153
+	.syntax unified
16864
17154
 	.thumb
16865
17155
 	.thumb_func
17156
+	.fpu softvfp
16866
17157
 	.type	FtlEctTblFlush, %function
16867
17158
 FtlEctTblFlush:
16868
17159
 	.fnstart
16869
17160
 	@ args = 0, pretend = 0, frame = 0
16870
17161
 	@ frame_needed = 0, uses_anonymous_args = 0
16871
-	ldr	r3, .L2741
17162
+	ldr	r3, .L2648
16872
17163
 	push	{r4, lr}
16873
17164
 	.save {r4, lr}
16874
-	ldr	r2, [r3, #2244]
16875
-	ldr	r3, .L2741+4
16876
-	cbz	r2, .L2739
17165
+	ldr	r2, [r3, #2248]
17166
+	ldr	r3, .L2648+4
17167
+	cmp	r2, #0
17168
+	beq	.L2646
16877
17169
 	ldr	r2, [r3, #532]
16878
17170
 	cmp	r2, #39
16879
17171
 	ite	hi
16880
-	movhi	r1, #32
16881
-	movls	r1, #4
16882
-	b	.L2735
16883
-.L2739:
16884
-	movs	r1, #32
16885
-.L2735:
16886
-	ldr	r4, .L2741+8
16887
-	ldrh	r2, [r4, #1332]
16888
-	cmp	r2, #31
17172
+	movhi	r2, #32
17173
+	movls	r2, #4
17174
+.L2642:
17175
+	ldr	r4, .L2648+8
17176
+	ldrh	r1, [r4, #1340]
17177
+	cmp	r1, #31
16889
17178
 	ittt	ls
16890
-	addls	r2, r2, #1
16891
-	movls	r1, #1
16892
-	strhls	r2, [r4, #1332]	@ movhi
16893
-	cbnz	r0, .L2737
16894
-	ldr	r0, [r3, #3360]
16895
-	ldr	r2, [r0, #20]
16896
-	add	r2, r2, r1
16897
-	ldr	r1, [r0, #16]
17179
+	addls	r1, r1, #1
17180
+	movls	r2, #1
17181
+	strhls	r1, [r4, #1340]	@ movhi
17182
+	cbnz	r0, .L2644
17183
+	ldr	r1, [r3, #3360]
17184
+	ldr	r0, [r1, #20]
17185
+	ldr	r1, [r1, #16]
17186
+	add	r2, r2, r0
16898
17187
 	cmp	r1, r2
16899
-	bcc	.L2738
16900
-.L2737:
17188
+	bcc	.L2645
17189
+.L2644:
16901
17190
 	ldr	r2, [r3, #3360]
16902
17191
 	movs	r0, #64
16903
17192
 	ldr	r1, [r2, #16]
16904
17193
 	str	r1, [r2, #20]
16905
-	ldr	r1, .L2741+12
17194
+	ldr	r1, .L2648+12
16906
17195
 	str	r1, [r2]
16907
-	ldr	r2, [r3, #3360]
16908
17196
 	ldrh	r1, [r3, #3352]
17197
+	ldr	r2, [r3, #3360]
16909
17198
 	lsls	r3, r1, #9
16910
17199
 	str	r3, [r2, #12]
16911
17200
 	ldr	r3, [r2, #8]
..
..
@@ -16915,12 +17204,15 @@
16915
17204
 	str	r3, [r2, #4]
16916
17205
 	bl	FtlVendorPartWrite
16917
17206
 	bl	Ftl_save_ext_data
16918
-.L2738:
17207
+.L2645:
16919
17208
 	movs	r0, #0
16920
17209
 	pop	{r4, pc}
16921
-.L2742:
17210
+.L2646:
17211
+	movs	r2, #32
17212
+	b	.L2642
17213
+.L2649:
16922
17214
 	.align	2
16923
-.L2741:
17215
+.L2648:
16924
17216
 	.word	.LANCHOR0
16925
17217
 	.word	.LANCHOR2
16926
17218
 	.word	.LANCHOR4
..
..
@@ -16929,122 +17221,125 @@
16929
17221
 	.size	FtlEctTblFlush, .-FtlEctTblFlush
16930
17222
 	.align	1
16931
17223
 	.global	FtlVendorPartRead
17224
+	.syntax unified
16932
17225
 	.thumb
16933
17226
 	.thumb_func
17227
+	.fpu softvfp
16934
17228
 	.type	FtlVendorPartRead, %function
16935
17229
 FtlVendorPartRead:
16936
17230
 	.fnstart
16937
17231
 	@ args = 0, pretend = 0, frame = 56
16938
17232
 	@ frame_needed = 0, uses_anonymous_args = 0
16939
-	ldr	r3, .L2754
17233
+	ldr	r3, .L2660
16940
17234
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
16941
17235
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
16942
-	mov	r6, r0
16943
-	mov	r4, r1
16944
-	add	r0, r0, r1
16945
-	ldrh	r1, [r3, #2384]
17236
+	mov	r9, r2
17237
+	mov	r6, r1
17238
+	adds	r1, r0, r1
16946
17239
 	.pad #60
16947
17240
 	sub	sp, sp, #60
16948
-	mov	r7, r2
16949
-	ldrh	r2, [r3, #2396]
16950
-	cmp	r0, r1
16951
-	str	r3, [sp, #12]
16952
-	bhi	.L2752
16953
-	ldr	r10, .L2754+4
16954
-	lsr	r5, r6, r2
16955
-	mov	fp, #0
16956
-	lsls	r3, r5, #2
16957
-	str	r3, [sp, #4]
16958
-.L2745:
16959
-	cmp	r4, #0
16960
-	beq	.L2753
16961
-	ldr	r3, .L2754+4
16962
-	mov	r0, r6
16963
-	ldr	r2, [sp, #4]
16964
-	ldr	r3, [r3, #3384]
16965
-	ldr	r8, [r3, r2]
16966
-	ldr	r3, [sp, #12]
16967
-	ldrh	r9, [r3, #2394]
16968
-	mov	r1, r9
16969
-	bl	__aeabi_uidivmod
16970
-	rsb	r3, r1, r9
16971
-	str	r1, [sp, #8]
16972
-	uxth	r9, r3
16973
-	cmp	r9, r4
16974
-	it	hi
16975
-	uxthhi	r9, r4
16976
-	cmp	r8, #0
16977
-	beq	.L2747
16978
-	ldr	r2, [r10, #3324]
16979
-	movs	r1, #1
16980
-	add	r0, sp, #20
16981
-	str	r8, [sp, #24]
16982
-	str	r2, [sp, #28]
16983
-	movs	r2, #0
16984
-	str	r2, [sp, #32]
16985
-	mov	r2, r1
16986
-	bl	FlashReadPages
16987
-	ldr	r3, .L2754+8
16988
-	ldr	r2, [sp, #20]
16989
-	adds	r2, r2, #1
16990
-	ldr	r2, [r3, #1248]
16991
-	it	eq
16992
-	moveq	fp, #-1
16993
-	cmp	r2, #256
16994
-	bne	.L2749
16995
-	mov	r1, r5
16996
-	mov	r2, r8
16997
-	ldr	r0, .L2754+12
16998
-	bl	printk
16999
-	ldr	r0, .L2754+16
17000
-	mov	r1, r5
17001
-	ldr	r2, [r10, #3324]
17002
-	bl	FtlMapWritePage
17003
-.L2749:
17004
-	ldrh	r8, [sp, #8]
17005
-	mov	r0, r7
17006
-	ldr	r1, [r10, #3324]
17007
-	lsl	r2, r9, #9
17008
-	add	r1, r1, r8, lsl #9
17009
-	bl	ftl_memcpy
17010
-	b	.L2750
17011
-.L2747:
17012
-	mov	r0, r7
17013
-	mov	r1, r8
17014
-	lsl	r2, r9, #9
17015
-	bl	ftl_memset
17016
-.L2750:
17017
-	ldr	r3, [sp, #4]
17018
-	adds	r5, r5, #1
17019
-	rsb	r4, r9, r4
17020
-	add	r6, r6, r9
17021
-	adds	r3, r3, #4
17022
-	add	r7, r7, r9, lsl #9
17023
-	str	r3, [sp, #4]
17024
-	b	.L2745
17025
-.L2753:
17026
-	mov	r0, fp
17027
-	b	.L2744
17028
-.L2752:
17029
-	mov	r0, #-1
17030
-.L2744:
17241
+	mov	r7, r0
17242
+	ldrh	r2, [r3, #2386]
17243
+	str	r3, [sp, #8]
17244
+	cmp	r1, r2
17245
+	bhi	.L2659
17246
+	ldrh	r5, [r3, #2398]
17247
+	mov	r8, #0
17248
+	ldr	r10, .L2660+16
17249
+	lsr	r5, r0, r5
17250
+	lsl	fp, r5, #2
17251
+.L2652:
17252
+	cbnz	r6, .L2658
17253
+.L2650:
17254
+	mov	r0, r8
17031
17255
 	add	sp, sp, #60
17032
17256
 	@ sp needed
17033
17257
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
17034
-.L2755:
17258
+.L2658:
17259
+	ldr	r3, [r10, #3384]
17260
+	mov	r0, r7
17261
+	ldr	r3, [r3, fp]
17262
+	str	r3, [sp, #12]
17263
+	ldr	r3, [sp, #8]
17264
+	ldrh	r4, [r3, #2396]
17265
+	mov	r1, r4
17266
+	bl	__aeabi_uidivmod
17267
+	subs	r4, r4, r1
17268
+	ldr	r3, [sp, #12]
17269
+	uxth	r4, r4
17270
+	str	r1, [sp, #4]
17271
+	cmp	r6, r4
17272
+	it	cc
17273
+	uxthcc	r4, r6
17274
+	lsls	r2, r4, #9
17275
+	str	r2, [sp, #12]
17276
+	cbz	r3, .L2654
17277
+	ldr	r2, [r10, #3324]
17278
+	add	r0, sp, #20
17279
+	str	r3, [sp, #24]
17280
+	str	r3, [sp, #12]
17281
+	str	r2, [sp, #28]
17282
+	movs	r2, #0
17283
+	str	r2, [sp, #32]
17284
+	movs	r2, #1
17285
+	mov	r1, r2
17286
+	bl	FlashReadPages
17287
+	ldr	r3, .L2660+4
17288
+	ldr	r2, [sp, #20]
17289
+	adds	r2, r2, #1
17290
+	ldr	r2, [r3, #1256]
17291
+	it	eq
17292
+	moveq	r8, #-1
17293
+	ldr	r3, [sp, #12]
17294
+	cmp	r2, #256
17295
+	bne	.L2656
17296
+	mov	r2, r3
17297
+	mov	r1, r5
17298
+	ldr	r0, .L2660+8
17299
+	bl	printk
17300
+	ldr	r2, [r10, #3324]
17301
+	mov	r1, r5
17302
+	ldr	r0, .L2660+12
17303
+	bl	FtlMapWritePage
17304
+.L2656:
17305
+	ldr	r1, [r10, #3324]
17306
+	lsls	r2, r4, #9
17307
+	ldr	r3, [sp, #4]
17308
+	mov	r0, r9
17309
+	add	r1, r1, r3, lsl #9
17310
+	bl	ftl_memcpy
17311
+.L2657:
17312
+	adds	r5, r5, #1
17313
+	subs	r6, r6, r4
17314
+	add	r7, r7, r4
17315
+	add	r9, r9, r4, lsl #9
17316
+	add	fp, fp, #4
17317
+	b	.L2652
17318
+.L2654:
17319
+	lsls	r2, r4, #9
17320
+	mov	r1, r3
17321
+	mov	r0, r9
17322
+	bl	ftl_memset
17323
+	b	.L2657
17324
+.L2659:
17325
+	mov	r8, #-1
17326
+	b	.L2650
17327
+.L2661:
17035
17328
 	.align	2
17036
-.L2754:
17329
+.L2660:
17037
17330
 	.word	.LANCHOR0
17038
-	.word	.LANCHOR2
17039
17331
 	.word	.LANCHOR4
17040
17332
 	.word	.LC136
17041
-	.word	.LANCHOR4+1288
17333
+	.word	.LANCHOR4+1296
17334
+	.word	.LANCHOR2
17042
17335
 	.fnend
17043
17336
 	.size	FtlVendorPartRead, .-FtlVendorPartRead
17044
17337
 	.align	1
17045
17338
 	.global	FtlLoadEctTbl
17339
+	.syntax unified
17046
17340
 	.thumb
17047
17341
 	.thumb_func
17342
+	.fpu softvfp
17048
17343
 	.type	FtlLoadEctTbl, %function
17049
17344
 FtlLoadEctTbl:
17050
17345
 	.fnstart
..
..
@@ -17053,39 +17348,41 @@
17053
17348
 	push	{r4, lr}
17054
17349
 	.save {r4, lr}
17055
17350
 	movs	r0, #64
17056
-	ldr	r4, .L2758
17351
+	ldr	r4, .L2664
17057
17352
 	ldr	r2, [r4, #3360]
17058
17353
 	ldrh	r1, [r4, #3352]
17059
17354
 	bl	FtlVendorPartRead
17060
17355
 	ldr	r3, [r4, #3360]
17061
17356
 	ldr	r2, [r3]
17062
-	ldr	r3, .L2758+4
17357
+	ldr	r3, .L2664+4
17063
17358
 	cmp	r2, r3
17064
-	beq	.L2757
17065
-	ldr	r1, .L2758+8
17066
-	ldr	r0, .L2758+12
17359
+	beq	.L2663
17360
+	ldr	r1, .L2664+8
17361
+	ldr	r0, .L2664+12
17067
17362
 	bl	printk
17068
17363
 	ldrh	r2, [r4, #3352]
17069
-	ldr	r0, [r4, #3360]
17070
17364
 	movs	r1, #0
17365
+	ldr	r0, [r4, #3360]
17071
17366
 	lsls	r2, r2, #9
17072
17367
 	bl	ftl_memset
17073
-.L2757:
17368
+.L2663:
17074
17369
 	movs	r0, #0
17075
17370
 	pop	{r4, pc}
17076
-.L2759:
17371
+.L2665:
17077
17372
 	.align	2
17078
-.L2758:
17373
+.L2664:
17079
17374
 	.word	.LANCHOR2
17080
17375
 	.word	1112818501
17081
17376
 	.word	.LC137
17082
-	.word	.LC76
17377
+	.word	.LC77
17083
17378
 	.fnend
17084
17379
 	.size	FtlLoadEctTbl, .-FtlLoadEctTbl
17085
17380
 	.align	1
17086
17381
 	.global	Ftl_load_ext_data
17382
+	.syntax unified
17087
17383
 	.thumb
17088
17384
 	.thumb_func
17385
+	.fpu softvfp
17089
17386
 	.type	Ftl_load_ext_data, %function
17090
17387
 Ftl_load_ext_data:
17091
17388
 	.fnstart
..
..
@@ -17093,95 +17390,95 @@
17093
17390
 	@ frame_needed = 0, uses_anonymous_args = 0
17094
17391
 	push	{r3, r4, r5, lr}
17095
17392
 	.save {r3, r4, r5, lr}
17096
-	movs	r0, #0
17097
-	ldr	r4, .L2765
17098
17393
 	movs	r1, #1
17099
-	ldr	r5, .L2765+4
17100
-	add	r2, r4, #608
17394
+	ldr	r4, .L2671
17395
+	movs	r0, #0
17396
+	ldr	r5, .L2671+4
17397
+	add	r2, r4, #604
17101
17398
 	bl	FtlVendorPartRead
17102
-	ldr	r3, [r4, #608]
17399
+	ldr	r3, [r4, #604]
17103
17400
 	cmp	r3, r5
17104
-	beq	.L2761
17105
-	add	r0, r4, #608
17106
-	movs	r1, #0
17401
+	beq	.L2667
17107
17402
 	mov	r2, #512
17403
+	movs	r1, #0
17404
+	add	r0, r4, #604
17108
17405
 	bl	ftl_memset
17109
-	str	r5, [r4, #608]
17110
-.L2761:
17111
-	ldr	r2, [r4, #608]
17112
-	ldr	r3, .L2765
17113
-	cmp	r2, r5
17114
-	bne	.L2762
17115
-	ldr	r2, [r3, #696]
17116
-	str	r2, [r3, #500]
17117
-	ldr	r2, [r3, #700]
17118
-	str	r2, [r3, #504]
17119
-	ldr	r2, [r3, #616]
17120
-	str	r2, [r3, #496]
17121
-	ldr	r2, [r3, #620]
17122
-	str	r2, [r3, #484]
17123
-	ldr	r2, [r3, #624]
17124
-	str	r2, [r3, #476]
17125
-	ldr	r2, [r3, #628]
17126
-	str	r2, [r3, #492]
17127
-	ldr	r2, [r3, #636]
17128
-	str	r2, [r3, #520]
17129
-	ldr	r2, [r3, #640]
17130
-	str	r2, [r3, #236]
17131
-	ldr	r2, [r3, #644]
17132
-	str	r2, [r3, #480]
17133
-	ldr	r2, [r3, #648]
17134
-	str	r2, [r3, #488]
17135
-	ldr	r2, [r3, #652]
17136
-	str	r2, [r3, #528]
17137
-	ldr	r2, [r3, #656]
17138
-	str	r2, [r3, #532]
17139
-	ldr	r2, [r3, #668]
17140
-	str	r2, [r3, #604]
17141
-.L2762:
17142
-	ldr	r1, [r4, #676]
17406
+	str	r5, [r4, #604]
17407
+.L2667:
17408
+	ldr	r3, [r4, #604]
17409
+	cmp	r3, r5
17410
+	bne	.L2668
17411
+	ldr	r3, [r4, #692]
17412
+	str	r3, [r4, #500]
17413
+	ldr	r3, [r4, #696]
17414
+	str	r3, [r4, #504]
17415
+	ldr	r3, [r4, #612]
17416
+	str	r3, [r4, #496]
17417
+	ldr	r3, [r4, #616]
17418
+	str	r3, [r4, #484]
17419
+	ldr	r3, [r4, #620]
17420
+	str	r3, [r4, #476]
17421
+	ldr	r3, [r4, #624]
17422
+	str	r3, [r4, #492]
17423
+	ldr	r3, [r4, #632]
17424
+	str	r3, [r4, #520]
17425
+	ldr	r3, [r4, #636]
17426
+	str	r3, [r4, #240]
17427
+	ldr	r3, [r4, #640]
17428
+	str	r3, [r4, #480]
17429
+	ldr	r3, [r4, #644]
17430
+	str	r3, [r4, #488]
17431
+	ldr	r3, [r4, #648]
17432
+	str	r3, [r4, #528]
17433
+	ldr	r3, [r4, #652]
17434
+	str	r3, [r4, #532]
17435
+	ldr	r3, [r4, #664]
17436
+	str	r3, [r4, #1116]
17437
+.L2668:
17438
+	ldr	r1, [r4, #672]
17143
17439
 	movs	r3, #0
17144
-	ldr	r2, .L2765+8
17440
+	ldr	r2, .L2671+8
17145
17441
 	str	r3, [r4, #3276]
17442
+	ldr	r5, .L2671+12
17146
17443
 	cmp	r1, r2
17147
-	ldr	r5, .L2765+12
17148
-	bne	.L2763
17149
-	ldrb	r2, [r5, #144]	@ zero_extendqisi2
17150
-	cbz	r2, .L2764
17151
-	ldr	r2, .L2765
17152
-	str	r3, [r2, #676]
17444
+	bne	.L2669
17445
+	ldrb	r2, [r5, #152]	@ zero_extendqisi2
17446
+	cbz	r2, .L2670
17447
+	str	r3, [r4, #672]
17153
17448
 	bl	Ftl_save_ext_data
17154
-	b	.L2763
17155
-.L2764:
17156
-	ldr	r0, .L2765+16
17157
-	movs	r3, #1
17158
-	ldr	r1, .L2765+20
17159
-	str	r3, [r5, #2244]
17160
-	bl	printk
17161
-.L2763:
17162
-	ldrh	r2, [r5, #2380]
17449
+.L2669:
17450
+	ldrh	r2, [r5, #2382]
17163
17451
 	ldr	r3, [r4, #520]
17164
17452
 	ldr	r0, [r4, #516]
17165
-	ldrh	r1, [r5, #2328]
17453
+	ldrh	r1, [r5, #2332]
17166
17454
 	mla	r0, r0, r2, r3
17167
17455
 	bl	__aeabi_uidiv
17168
17456
 	str	r0, [r4, #524]
17169
17457
 	pop	{r3, r4, r5, pc}
17170
-.L2766:
17458
+.L2670:
17459
+	movs	r3, #1
17460
+	ldr	r1, .L2671+16
17461
+	ldr	r0, .L2671+20
17462
+	str	r3, [r5, #2248]
17463
+	bl	printk
17464
+	b	.L2669
17465
+.L2672:
17171
17466
 	.align	2
17172
-.L2765:
17467
+.L2671:
17173
17468
 	.word	.LANCHOR2
17174
17469
 	.word	1179929683
17175
17470
 	.word	305432421
17176
17471
 	.word	.LANCHOR0
17177
-	.word	.LC76
17178
17472
 	.word	.LC138
17473
+	.word	.LC77
17179
17474
 	.fnend
17180
17475
 	.size	Ftl_load_ext_data, .-Ftl_load_ext_data
17181
17476
 	.align	1
17182
17477
 	.global	FtlMapBlkWriteDumpData
17478
+	.syntax unified
17183
17479
 	.thumb
17184
17480
 	.thumb_func
17481
+	.fpu softvfp
17185
17482
 	.type	FtlMapBlkWriteDumpData, %function
17186
17483
 FtlMapBlkWriteDumpData:
17187
17484
 	.fnstart
..
..
@@ -17191,46 +17488,45 @@
17191
17488
 	.save {r4, r5, r6, lr}
17192
17489
 	mov	r6, r0
17193
17490
 	ldr	r3, [r0, #36]
17194
-	ldrh	r5, [r0, #6]
17195
-	ldr	r1, [r0, #24]
17196
-	cbz	r3, .L2767
17197
-	ldr	r2, .L2773
17491
+	cbz	r3, .L2673
17492
+	ldr	r2, .L2679
17198
17493
 	movs	r3, #0
17199
17494
 	str	r3, [r0, #36]
17200
-	ldr	r3, [r2, #224]
17201
-	cbnz	r3, .L2767
17495
+	ldrh	r5, [r0, #6]
17496
+	ldr	r3, [r2, #228]
17497
+	ldr	r1, [r0, #24]
17498
+	cbnz	r3, .L2673
17499
+	ldr	r4, .L2679+4
17202
17500
 	subs	r5, r5, #1
17203
-	ldr	r3, .L2773+4
17204
17501
 	ldr	r0, [r2, #3320]
17205
-	ldr	r2, [r2, #3340]
17206
17502
 	uxth	r5, r5
17207
-	mov	r4, r3
17208
-	str	r0, [r3, #1256]
17209
-	str	r2, [r3, #1260]
17503
+	ldr	r2, [r2, #3340]
17504
+	str	r0, [r4, #1264]
17505
+	str	r2, [r4, #1268]
17210
17506
 	ldr	r2, [r1, r5, lsl #2]
17211
-	str	r2, [r3, #1252]
17212
-	cbz	r2, .L2771
17213
-	movs	r1, #1
17214
-	add	r0, r3, #1248
17215
-	mov	r2, r1
17507
+	str	r2, [r4, #1260]
17508
+	cbz	r2, .L2677
17509
+	movs	r2, #1
17510
+	add	r0, r4, #1256
17511
+	mov	r1, r2
17216
17512
 	bl	FlashReadPages
17217
-	b	.L2772
17218
-.L2771:
17219
-	ldr	r3, .L2773+8
17220
-	movs	r1, #255
17221
-	ldrh	r2, [r3, #2398]
17222
-	bl	ftl_memset
17223
-.L2772:
17224
-	mov	r0, r6
17513
+.L2678:
17514
+	ldr	r2, [r4, #1264]
17225
17515
 	mov	r1, r5
17226
-	ldr	r2, [r4, #1256]
17516
+	mov	r0, r6
17227
17517
 	pop	{r4, r5, r6, lr}
17228
17518
 	b	FtlMapWritePage
17229
-.L2767:
17519
+.L2677:
17520
+	ldr	r3, .L2679+8
17521
+	movs	r1, #255
17522
+	ldrh	r2, [r3, #2400]
17523
+	bl	ftl_memset
17524
+	b	.L2678
17525
+.L2673:
17230
17526
 	pop	{r4, r5, r6, pc}
17231
-.L2774:
17527
+.L2680:
17232
17528
 	.align	2
17233
-.L2773:
17529
+.L2679:
17234
17530
 	.word	.LANCHOR2
17235
17531
 	.word	.LANCHOR4
17236
17532
 	.word	.LANCHOR0
..
..
@@ -17238,100 +17534,102 @@
17238
17534
 	.size	FtlMapBlkWriteDumpData, .-FtlMapBlkWriteDumpData
17239
17535
 	.align	1
17240
17536
 	.global	FlashReadFacBbtData
17537
+	.syntax unified
17241
17538
 	.thumb
17242
17539
 	.thumb_func
17540
+	.fpu softvfp
17243
17541
 	.type	FlashReadFacBbtData, %function
17244
17542
 FlashReadFacBbtData:
17245
17543
 	.fnstart
17246
17544
 	@ args = 0, pretend = 0, frame = 40
17247
17545
 	@ frame_needed = 0, uses_anonymous_args = 0
17248
-	ldr	r3, .L2789
17249
17546
 	push	{r4, r5, r6, r7, r8, r9, r10, lr}
17250
17547
 	.save {r4, r5, r6, r7, r8, r9, r10, lr}
17251
17548
 	mov	r8, r2
17252
-	ldrh	r2, [r3, #128]
17253
-	mov	r7, r1
17254
-	ldrh	r3, [r3, #130]
17549
+	ldr	r2, .L2693
17255
17550
 	.pad #40
17256
17551
 	sub	sp, sp, #40
17257
17552
 	mov	r5, r0
17258
-	smulbb	r3, r2, r3
17259
-	ldr	r2, .L2789+4
17260
-	ldr	r1, [r2, #1184]
17261
-	mov	r9, r2
17553
+	mov	r9, r1
17554
+	ldr	r7, .L2693+4
17555
+	ldrh	r3, [r2, #138]
17556
+	ldrh	r2, [r2, #136]
17557
+	smulbb	r3, r3, r2
17558
+	ldr	r2, [r7, #1192]
17262
17559
 	uxth	r3, r3
17560
+	str	r2, [sp, #12]
17561
+	ldr	r2, [r7, #1224]
17263
17562
 	subs	r6, r3, #1
17264
-	str	r1, [sp, #12]
17265
-	mul	r10, r3, r7
17266
-	ldr	r1, [r2, #1216]
17563
+	mul	r10, r1, r3
17267
17564
 	uxth	r6, r6
17268
17565
 	sub	r4, r3, #16
17269
-	str	r1, [sp, #16]
17270
-.L2776:
17566
+	str	r2, [sp, #16]
17567
+.L2682:
17271
17568
 	cmp	r6, r4
17272
-	ble	.L2788
17273
-	movs	r1, #1
17569
+	bgt	.L2688
17570
+	mov	r0, #-1
17571
+	b	.L2681
17572
+.L2688:
17274
17573
 	add	r3, r6, r10
17275
-	add	r0, sp, #4
17276
-	mov	r2, r1
17574
+	movs	r2, #1
17277
17575
 	lsls	r3, r3, #10
17576
+	mov	r1, r2
17577
+	add	r0, sp, #4
17278
17578
 	str	r3, [sp, #8]
17279
17579
 	bl	FlashReadPages
17280
17580
 	ldr	r3, [sp, #4]
17281
17581
 	adds	r3, r3, #1
17282
-	beq	.L2777
17283
-	ldr	r3, [r9, #1216]
17582
+	beq	.L2683
17583
+	ldr	r3, [r7, #1224]
17284
17584
 	ldrh	r2, [r3]
17285
17585
 	movw	r3, #61664
17286
17586
 	cmp	r2, r3
17287
-	bne	.L2777
17288
-	cbz	r5, .L2783
17289
-	cbz	r7, .L2784
17290
-.L2781:
17291
-	ldr	r1, [r9, #1184]
17587
+	bne	.L2683
17588
+	cbz	r5, .L2689
17589
+	cmp	r9, #0
17590
+	bne	.L2685
17591
+	mov	r1, r9
17592
+	movs	r4, #1
17593
+.L2686:
17594
+	ldr	r0, [r7, #1212]
17595
+	uxth	r3, r1
17596
+	adds	r1, r1, #1
17597
+	cmp	r3, r0
17598
+	bcc	.L2687
17599
+.L2685:
17292
17600
 	mov	r2, r8
17601
+	ldr	r1, [r7, #1192]
17293
17602
 	mov	r0, r5
17294
17603
 	bl	ftl_memcpy
17295
-	movs	r2, #4
17296
-	ldr	r0, .L2789+8
17604
+	movs	r3, #4
17605
+	ldr	r0, .L2693+8
17606
+	mov	r2, r3
17297
17607
 	mov	r1, r5
17298
-	mov	r3, r2
17299
17608
 	bl	rknand_print_hex
17300
17609
 	movs	r0, #0
17301
-	b	.L2778
17302
-.L2784:
17303
-	ldr	r6, .L2789+4
17304
-	mov	lr, #1
17305
-.L2779:
17306
-	ldr	r2, [r9, #1204]
17307
-	uxth	r3, r7
17308
-	adds	r7, r7, #1
17309
-	cmp	r3, r2
17310
-	bcs	.L2781
17311
-	ldr	r2, [r6, #1184]
17312
-	lsrs	r1, r3, #5
17313
-	and	r4, r3, #31
17314
-	lsl	r3, lr, r4
17315
-	ldr	r0, [r2, r1, lsl #2]
17316
-	orrs	r3, r3, r0
17317
-	str	r3, [r2, r1, lsl #2]
17318
-	b	.L2779
17319
-.L2777:
17320
-	subs	r6, r6, #1
17321
-	uxth	r6, r6
17322
-	b	.L2776
17323
-.L2788:
17324
-	mov	r0, #-1
17325
-	b	.L2778
17326
-.L2783:
17327
-	mov	r0, r5
17328
-.L2778:
17610
+.L2681:
17329
17611
 	add	sp, sp, #40
17330
17612
 	@ sp needed
17331
17613
 	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
17332
-.L2790:
17614
+.L2687:
17615
+	ldr	r0, [r7, #1192]
17616
+	lsrs	r6, r3, #5
17617
+	and	r3, r3, #31
17618
+	lsl	r3, r4, r3
17619
+	ldr	r2, [r0, r6, lsl #2]
17620
+	orrs	r3, r3, r2
17621
+	str	r3, [r0, r6, lsl #2]
17622
+	b	.L2686
17623
+.L2683:
17624
+	subs	r6, r6, #1
17625
+	uxth	r6, r6
17626
+	b	.L2682
17627
+.L2689:
17628
+	mov	r0, r5
17629
+	b	.L2681
17630
+.L2694:
17333
17631
 	.align	2
17334
-.L2789:
17632
+.L2693:
17335
17633
 	.word	.LANCHOR0
17336
17634
 	.word	.LANCHOR4
17337
17635
 	.word	.LC139
..
..
@@ -17339,72 +17637,76 @@
17339
17637
 	.size	FlashReadFacBbtData, .-FlashReadFacBbtData
17340
17638
 	.align	1
17341
17639
 	.global	FlashGetBadBlockList
17640
+	.syntax unified
17342
17641
 	.thumb
17343
17642
 	.thumb_func
17643
+	.fpu softvfp
17344
17644
 	.type	FlashGetBadBlockList, %function
17345
17645
 FlashGetBadBlockList:
17346
17646
 	.fnstart
17347
17647
 	@ args = 0, pretend = 0, frame = 0
17348
17648
 	@ frame_needed = 0, uses_anonymous_args = 0
17349
-	ldr	r3, .L2801
17649
+	ldr	r3, .L2705
17350
17650
 	push	{r4, r5, r6, r7, r8, lr}
17351
17651
 	.save {r4, r5, r6, r7, r8, lr}
17352
17652
 	mov	r5, r0
17353
-	ldr	r3, [r3, #44]
17354
-	ldr	r6, .L2801+4
17653
+	ldr	r6, .L2705+4
17654
+	ldr	r3, [r3, #48]
17655
+	ldr	r0, [r6, #1220]
17355
17656
 	ldrb	r4, [r3, #13]	@ zero_extendqisi2
17356
17657
 	ldrh	r3, [r3, #14]
17357
-	ldr	r0, [r6, #1212]
17358
17658
 	smulbb	r4, r4, r3
17359
17659
 	uxth	r4, r4
17360
17660
 	adds	r2, r4, #7
17361
17661
 	asrs	r2, r2, #3
17362
17662
 	bl	FlashReadFacBbtData
17363
17663
 	adds	r0, r0, #1
17364
-	bne	.L2792
17365
-.L2796:
17664
+	mov	ip, r6
17665
+	bne	.L2696
17666
+.L2700:
17366
17667
 	movs	r3, #0
17367
-	b	.L2793
17368
-.L2792:
17369
-	movs	r1, #0
17370
-	lsr	lr, r4, #4
17371
-	mov	ip, #1
17372
-	subs	r4, r4, #1
17373
-	mov	r3, r1
17374
-.L2794:
17375
-	uxth	r2, r1
17376
-	cmp	r2, r4
17377
-	bge	.L2793
17378
-	ldr	r7, [r6, #1212]
17379
-	lsrs	r0, r2, #5
17380
-	and	r8, r2, #31
17381
-	adds	r1, r1, #1
17382
-	lsl	r8, ip, r8
17383
-	ldr	r0, [r7, r0, lsl #2]
17384
-	tst	r8, r0
17385
-	ittt	ne
17386
-	strhne	r2, [r5, r3, lsl #1]	@ movhi
17387
-	addne	r0, r3, #1
17388
-	uxthne	r3, r0
17389
-	cmp	r3, lr
17390
-	bcc	.L2794
17391
-	b	.L2796
17392
-.L2793:
17668
+.L2697:
17393
17669
 	movw	r2, #65535
17394
17670
 	movs	r0, #0
17395
17671
 	strh	r2, [r5, r3, lsl #1]	@ movhi
17396
17672
 	pop	{r4, r5, r6, r7, r8, pc}
17397
-.L2802:
17673
+.L2696:
17674
+	movs	r2, #0
17675
+	lsr	lr, r4, #4
17676
+	mov	r3, r2
17677
+	subs	r4, r4, #1
17678
+	mov	r8, #1
17679
+.L2698:
17680
+	uxth	r1, r2
17681
+	cmp	r1, r4
17682
+	bge	.L2697
17683
+	ldr	r6, [ip, #1220]
17684
+	lsrs	r7, r1, #5
17685
+	and	r0, r1, #31
17686
+	lsl	r0, r8, r0
17687
+	adds	r2, r2, #1
17688
+	ldr	r6, [r6, r7, lsl #2]
17689
+	tst	r0, r6
17690
+	ittt	ne
17691
+	addne	r0, r3, #1
17692
+	strhne	r1, [r5, r3, lsl #1]	@ movhi
17693
+	uxthne	r3, r0
17694
+	cmp	r3, lr
17695
+	bcc	.L2698
17696
+	b	.L2700
17697
+.L2706:
17398
17698
 	.align	2
17399
-.L2801:
17699
+.L2705:
17400
17700
 	.word	.LANCHOR0
17401
17701
 	.word	.LANCHOR4
17402
17702
 	.fnend
17403
17703
 	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
17404
17704
 	.align	1
17405
17705
 	.global	FtlMakeBbt
17706
+	.syntax unified
17406
17707
 	.thumb
17407
17708
 	.thumb_func
17709
+	.fpu softvfp
17408
17710
 	.type	FtlMakeBbt, %function
17409
17711
 FtlMakeBbt:
17410
17712
 	.fnstart
..
..
@@ -17413,405 +17715,399 @@
17413
17715
 	push	{r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr}
17414
17716
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
17415
17717
 	.pad #12
17416
-	ldr	r5, .L2827
17417
-	ldr	r4, [r5, #224]
17418
-	cmp	r4, #0
17419
-	bne	.L2804
17718
+	ldr	r6, .L2728
17719
+	ldr	r7, [r6, #228]
17720
+	cmp	r7, #0
17721
+	bne	.L2708
17722
+	ldr	r9, .L2728+8
17723
+	ldr	r8, .L2728+12
17420
17724
 	bl	FtlBbtMemInit
17421
-	ldr	r6, .L2827+4
17725
+	subw	r10, r9, #2484
17726
+	sub	fp, r9, #18
17727
+	mov	r4, r10
17422
17728
 	bl	FtlLoadFactoryBbt
17423
-	ldr	r9, .L2827+16
17424
-	sub	r8, r6, #18
17425
-	sub	r7, r6, #2480
17426
-.L2805:
17427
-	ldrh	r3, [r7, #2342]
17428
-	ldr	r10, .L2827+8
17429
-	cmp	r4, r3
17430
-	bcs	.L2824
17431
-	ldr	r3, [r5, #3340]
17729
+.L2709:
17730
+	ldrh	r3, [r10, #2346]
17731
+	cmp	r7, r3
17732
+	bcc	.L2715
17733
+	movs	r5, #0
17734
+.L2716:
17735
+	ldrh	r3, [r4, #2404]
17736
+	uxth	r0, r5
17737
+	adds	r5, r5, #1
17738
+	cmp	r3, r0
17739
+	bhi	.L2717
17740
+	ldrh	r5, [r4, #2468]
17741
+	movw	r7, #65535
17742
+	subs	r5, r5, #1
17743
+	uxth	r5, r5
17744
+.L2718:
17745
+	ldrh	r3, [r4, #2468]
17746
+	subs	r3, r3, #48
17747
+	cmp	r5, r3
17748
+	ble	.L2722
17749
+	mov	r0, r5
17750
+	bl	FtlBbmIsBadBlock
17751
+	cmp	r0, #1
17752
+	beq	.L2719
17753
+	mov	r0, r5
17754
+	bl	FlashTestBlk
17755
+	cmp	r0, #0
17756
+	beq	.L2720
17757
+	mov	r0, r5
17758
+	bl	FtlBbmMapBadBlock
17759
+.L2719:
17760
+	subs	r5, r5, #1
17761
+	uxth	r5, r5
17762
+	b	.L2718
17763
+.L2715:
17764
+	ldr	r3, [r6, #3340]
17432
17765
 	movw	r2, #65535
17433
-	ldr	r0, [r5, #3316]
17434
-	ldr	fp, .L2827+16
17766
+	ldr	r0, [r6, #3316]
17435
17767
 	str	r3, [sp]
17436
-	str	r3, [r9, #1260]
17437
-	ldrh	r3, [r8, #2]!
17438
-	str	r0, [r9, #1256]
17768
+	str	r3, [r8, #1268]
17769
+	ldrh	r3, [fp, #2]!
17770
+	str	r0, [r8, #1264]
17439
17771
 	cmp	r3, r2
17440
-	beq	.L2806
17441
-	ldrh	ip, [r7, #2386]
17442
-	movs	r1, #1
17443
-	add	r0, fp, #1248
17444
-	mov	r2, r1
17445
-	mla	ip, ip, r4, r3
17446
-	lsl	r3, ip, #10
17447
-	str	ip, [sp]
17448
-	str	r3, [r9, #1252]
17772
+	beq	.L2710
17773
+	ldrh	r5, [r10, #2388]
17774
+	movs	r2, #1
17775
+	mov	r1, r2
17776
+	ldr	r0, .L2728+4
17777
+	mla	r5, r7, r5, r3
17778
+	lsls	r3, r5, #10
17779
+	str	r3, [r8, #1260]
17449
17780
 	bl	FlashReadPages
17450
-	ldrh	r2, [r7, #2386]
17451
-	ldr	r0, [r6]
17781
+	ldrh	r2, [r10, #2388]
17782
+	ldr	r1, [r8, #1264]
17783
+	ldr	r0, [r9]
17452
17784
 	adds	r2, r2, #7
17453
-	ldr	r1, [r9, #1256]
17454
17785
 	asrs	r2, r2, #3
17455
17786
 	bl	ftl_memcpy
17456
-	ldr	ip, [sp]
17457
-	b	.L2807
17458
-.L2806:
17459
-	mov	r1, r4
17787
+.L2711:
17788
+	uxth	r0, r5
17789
+	adds	r7, r7, #1
17790
+	add	r9, r9, #4
17791
+	bl	FtlBbmMapBadBlock
17792
+	b	.L2709
17793
+.L2710:
17794
+	mov	r1, r7
17460
17795
 	bl	FlashGetBadBlockList
17461
-	ldr	r0, [r9, #1256]
17462
-	ldr	r1, [r6]
17796
+	ldr	r1, [r9]
17797
+	ldr	r0, [r8, #1264]
17463
17798
 	bl	FtlBbt2Bitmap
17464
-	ldrh	r3, [r7, #2386]
17799
+	ldrh	r3, [r10, #2388]
17800
+.L2727:
17465
17801
 	subs	r3, r3, #1
17466
-.L2823:
17467
-	uxth	r10, r3
17468
-.L2808:
17469
-	ldr	r3, .L2827+8
17470
-	ldrh	r0, [r3, #2386]
17471
-	smlabb	r0, r0, r4, r10
17802
+	uxth	r3, r3
17803
+	str	r3, [sp, #4]
17804
+.L2712:
17805
+	ldr	r3, [sp, #4]
17806
+	ldrh	r0, [r4, #2388]
17807
+	smlabb	r0, r0, r7, r3
17472
17808
 	uxth	r0, r0
17473
17809
 	bl	FtlBbmIsBadBlock
17474
17810
 	cmp	r0, #1
17475
-	bne	.L2825
17476
-	add	r3, r10, #-1
17477
-	b	.L2823
17478
-.L2825:
17479
-	movs	r1, #0
17811
+	beq	.L2713
17812
+	ldrh	r3, [sp, #4]
17480
17813
 	movs	r2, #16
17481
-	strh	r10, [r8]	@ movhi
17482
-	ldr	r0, [r5, #3340]
17814
+	movs	r1, #0
17815
+	ldr	r0, [r6, #3340]
17816
+	strh	r3, [fp]	@ movhi
17483
17817
 	bl	ftl_memset
17484
-	movw	r3, #61664
17485
17818
 	ldr	r2, [sp]
17819
+	movw	r3, #61664
17486
17820
 	strh	r3, [r2]	@ movhi
17487
17821
 	movs	r3, #0
17488
17822
 	str	r3, [r2, #4]
17489
-	ldrh	r3, [r8]
17490
-	ldrh	ip, [r7, #2386]
17823
+	ldrh	r3, [fp]
17824
+	ldrh	r5, [r4, #2388]
17491
17825
 	strh	r3, [r2, #2]	@ movhi
17492
-	ldrh	r3, [r8]
17493
-	ldrh	r2, [r5, #3404]
17494
-	ldr	r1, [r6]
17495
-	mla	ip, ip, r4, r3
17826
+	ldrh	r3, [fp]
17827
+	ldrh	r2, [r6, #3404]
17828
+	ldr	r1, [r9]
17829
+	ldr	r0, [r8, #1264]
17830
+	mla	r5, r7, r5, r3
17496
17831
 	lsls	r2, r2, #2
17497
-	ldr	r0, [fp, #1256]
17498
-	lsl	r3, ip, #10
17499
-	str	ip, [sp, #4]
17500
-	str	r3, [fp, #1252]
17832
+	lsls	r3, r5, #10
17833
+	str	r3, [r8, #1260]
17501
17834
 	bl	ftl_memcpy
17502
-	movs	r1, #1
17503
-	ldr	r0, .L2827+12
17504
-	mov	r2, r1
17835
+	movs	r2, #1
17836
+	ldr	r0, .L2728+4
17837
+	mov	r1, r2
17505
17838
 	bl	FlashEraseBlocks
17506
-	movs	r1, #1
17507
-	ldr	r0, .L2827+12
17508
-	mov	r3, r1
17509
-	mov	r2, r1
17839
+	movs	r3, #1
17840
+	ldr	r0, .L2728+4
17841
+	mov	r2, r3
17842
+	mov	r1, r3
17510
17843
 	bl	FlashProgPages
17511
-	ldr	r3, [fp, #1248]
17844
+	ldr	r3, [r8, #1256]
17512
17845
 	adds	r3, r3, #1
17513
-	ldr	ip, [sp, #4]
17514
-	bne	.L2807
17515
-	uxth	r0, ip
17846
+	bne	.L2711
17847
+	uxth	r0, r5
17516
17848
 	bl	FtlBbmMapBadBlock
17517
-	b	.L2808
17518
-.L2807:
17519
-	uxth	r0, ip
17520
-	adds	r4, r4, #1
17849
+	b	.L2712
17850
+.L2713:
17851
+	ldr	r3, [sp, #4]
17852
+	b	.L2727
17853
+.L2717:
17521
17854
 	bl	FtlBbmMapBadBlock
17522
-	adds	r6, r6, #4
17523
-	b	.L2805
17524
-.L2824:
17525
-	movs	r4, #0
17526
-.L2812:
17527
-	ldrh	r3, [r10, #2402]
17528
-	uxth	r0, r4
17529
-	ldr	r6, .L2827+8
17530
-	adds	r4, r4, #1
17531
-	cmp	r3, r0
17532
-	bls	.L2826
17533
-	bl	FtlBbmMapBadBlock
17534
-	b	.L2812
17535
-.L2826:
17536
-	ldrh	r4, [r6, #2464]
17537
-	movw	r7, #65535
17538
-	subs	r4, r4, #1
17539
-	uxth	r4, r4
17540
-.L2814:
17541
-	ldrh	r3, [r10, #2464]
17542
-	subs	r3, r3, #48
17543
-	cmp	r4, r3
17544
-	ble	.L2818
17545
-	mov	r0, r4
17546
-	bl	FtlBbmIsBadBlock
17547
-	cmp	r0, #1
17548
-	beq	.L2815
17549
-	mov	r0, r4
17550
-	bl	FlashTestBlk
17551
-	cbz	r0, .L2816
17552
-	mov	r0, r4
17553
-	bl	FtlBbmMapBadBlock
17554
-	b	.L2815
17555
-.L2816:
17556
-	ldrh	r3, [r6, #2452]
17855
+	b	.L2716
17856
+.L2720:
17857
+	ldrh	r3, [r4, #2456]
17557
17858
 	cmp	r3, r7
17558
-	bne	.L2817
17559
-	strh	r4, [r6, #2452]	@ movhi
17560
-	b	.L2815
17561
-.L2817:
17562
-	ldr	r3, .L2827+8
17563
-	strh	r4, [r3, #2456]	@ movhi
17564
-	b	.L2818
17565
-.L2815:
17566
-	subs	r4, r4, #1
17567
-	uxth	r4, r4
17568
-	b	.L2814
17569
-.L2818:
17570
-	ldr	r0, [r5, #228]
17571
-	movs	r4, #0
17572
-	ldrh	r3, [r10, #2452]
17859
+	bne	.L2721
17860
+	strh	r5, [r4, #2456]	@ movhi
17861
+	b	.L2719
17862
+.L2721:
17863
+	strh	r5, [r4, #2460]	@ movhi
17864
+.L2722:
17865
+	ldrh	r3, [r4, #2456]
17866
+	movs	r5, #0
17867
+	ldr	r0, [r6, #232]
17573
17868
 	movs	r2, #2
17574
-	str	r4, [r10, #2460]
17869
+	str	r5, [r4, #2464]
17575
17870
 	movs	r1, #1
17576
-	strh	r4, [r10, #2454]	@ movhi
17871
+	strh	r5, [r4, #2458]	@ movhi
17577
17872
 	lsls	r3, r3, #10
17578
17873
 	str	r3, [r0, #4]
17579
-	ldrh	r3, [r10, #2456]
17874
+	ldrh	r3, [r4, #2460]
17580
17875
 	lsls	r3, r3, #10
17581
17876
 	str	r3, [r0, #40]
17582
17877
 	bl	FlashEraseBlocks
17583
-	ldrh	r0, [r10, #2452]
17878
+	ldrh	r0, [r4, #2456]
17584
17879
 	bl	FtlBbmMapBadBlock
17585
-	ldrh	r0, [r10, #2456]
17880
+	ldrh	r0, [r4, #2460]
17586
17881
 	bl	FtlBbmMapBadBlock
17587
17882
 	bl	FtlBbmTblFlush
17588
-	ldr	r3, [r10, #2460]
17589
-	ldrh	r2, [r10, #2456]
17883
+	ldr	r3, [r4, #2464]
17884
+	ldrh	r2, [r4, #2460]
17885
+	strh	r5, [r4, #2458]	@ movhi
17590
17886
 	adds	r3, r3, #1
17591
-	str	r3, [r10, #2460]
17592
-	ldrh	r3, [r10, #2452]
17593
-	strh	r4, [r10, #2454]	@ movhi
17594
-	strh	r2, [r10, #2452]	@ movhi
17595
-	strh	r3, [r10, #2456]	@ movhi
17887
+	str	r3, [r4, #2464]
17888
+	ldrh	r3, [r4, #2456]
17889
+	strh	r2, [r4, #2456]	@ movhi
17890
+	strh	r3, [r4, #2460]	@ movhi
17596
17891
 	bl	FtlBbmTblFlush
17597
-.L2804:
17892
+.L2708:
17598
17893
 	movs	r0, #0
17599
17894
 	add	sp, sp, #12
17600
17895
 	@ sp needed
17601
17896
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
17602
-.L2828:
17897
+.L2729:
17603
17898
 	.align	2
17604
-.L2827:
17899
+.L2728:
17605
17900
 	.word	.LANCHOR2
17606
-	.word	.LANCHOR0+2480
17607
-	.word	.LANCHOR0
17608
-	.word	.LANCHOR4+1248
17901
+	.word	.LANCHOR4+1256
17902
+	.word	.LANCHOR0+2484
17609
17903
 	.word	.LANCHOR4
17610
17904
 	.fnend
17611
17905
 	.size	FtlMakeBbt, .-FtlMakeBbt
17612
17906
 	.align	1
17613
17907
 	.global	log2phys
17908
+	.syntax unified
17614
17909
 	.thumb
17615
17910
 	.thumb_func
17911
+	.fpu softvfp
17616
17912
 	.type	log2phys, %function
17617
17913
 log2phys:
17618
17914
 	.fnstart
17619
17915
 	@ args = 0, pretend = 0, frame = 16
17620
17916
 	@ frame_needed = 0, uses_anonymous_args = 0
17917
+	ldr	r3, .L2745
17621
17918
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
17622
17919
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
17623
17920
 	.pad #20
17624
17921
 	sub	sp, sp, #20
17625
-	ldr	r6, .L2845
17626
-	mov	r9, r0
17627
17922
 	str	r2, [sp, #8]
17628
-	mov	r10, r1
17629
-	ldr	r3, [r6, #2448]
17630
-	ldrh	r2, [r6, #2396]
17631
-	cmp	r0, r3
17632
-	bcs	.L2830
17633
-	adds	r3, r2, #7
17634
-	ldr	r2, .L2845+4
17635
-	lsr	r5, r0, r3
17923
+	mov	fp, r1
17924
+	mov	r8, r3
17925
+	ldr	r2, [r3, #2452]
17926
+	str	r0, [sp]
17927
+	cmp	r0, r2
17928
+	bcs	.L2731
17929
+	ldrh	r3, [r3, #2398]
17930
+	movs	r5, #12
17931
+	ldr	r4, .L2745+4
17932
+	adds	r3, r3, #7
17636
17933
 	str	r3, [sp, #4]
17637
-	ldrh	r1, [r6, #2426]
17638
-	movs	r4, #0
17639
-	ldr	fp, [r2, #460]
17640
-	mov	r8, r2
17641
-	uxth	r5, r5
17642
-	movs	r2, #12
17643
-	b	.L2831
17644
-.L2830:
17645
-	ldr	r3, [sp, #8]
17646
-	mov	r0, #-1
17647
-	cmp	r3, #0
17648
-	bne	.L2832
17649
-	str	r0, [r1]
17650
-	b	.L2832
17651
-.L2836:
17652
-	adds	r4, r4, #1
17653
-	mla	r0, r2, r4, fp
17654
-	ldrh	r0, [r0, #-12]
17655
-	cmp	r0, r5
17656
-	beq	.L2833
17657
-.L2831:
17658
-	uxth	r7, r4
17659
-	cmp	r7, r1
17660
-	bcc	.L2836
17934
+	movs	r3, #0
17935
+	ldr	r2, [sp, #4]
17936
+	ldr	r7, [r4, #464]
17937
+	lsr	r6, r0, r2
17938
+	ldrh	r2, [r8, #2430]
17939
+	uxth	r10, r6
17940
+.L2732:
17941
+	uxth	r9, r3
17942
+	cmp	r9, r2
17943
+	bcc	.L2737
17661
17944
 	bl	select_l2p_ram_region
17662
-	movs	r4, #12
17663
-	movw	r3, #65535
17664
-	muls	r4, r0, r4
17665
-	mov	r7, r0
17666
-	add	r2, fp, r4
17667
-	ldrh	r1, [fp, r4]
17668
-	cmp	r1, r3
17669
-	bne	.L2844
17670
-.L2837:
17671
-	ldr	r3, [r8, #3388]
17672
-	ldr	fp, .L2845+4
17673
-	ldr	r3, [r3, r5, lsl #2]
17945
+	muls	r5, r0, r5
17946
+	movw	r2, #65535
17947
+	mov	r9, r0
17948
+	ldrh	r1, [r7, r5]
17949
+	adds	r3, r7, r5
17950
+	cmp	r1, r2
17951
+	beq	.L2738
17952
+	ldr	r3, [r3, #4]
17674
17953
 	cmp	r3, #0
17675
-	bne	.L2838
17676
-	ldr	r2, [fp, #460]
17954
+	bge	.L2738
17955
+	bl	flush_l2p_region
17956
+.L2738:
17957
+	ldr	r3, [r4, #3388]
17958
+	uxth	r6, r6
17959
+	ldr	r3, [r3, r6, lsl #2]
17960
+	cmp	r3, #0
17961
+	bne	.L2739
17962
+	ldr	r2, [r4, #464]
17677
17963
 	movs	r1, #255
17678
17964
 	str	r3, [sp, #12]
17679
-	add	r2, r2, r4
17680
-	ldr	r0, [r2, #8]
17681
-	ldrh	r2, [r6, #2398]
17965
+	adds	r0, r2, r5
17966
+	ldrh	r2, [r8, #2400]
17967
+	ldr	r0, [r0, #8]
17682
17968
 	bl	ftl_memset
17683
-	ldr	r2, [fp, #460]
17684
-	strh	r5, [r2, r4]	@ movhi
17685
-	ldr	r2, [fp, #460]
17686
-	add	r4, r4, r2
17969
+	ldr	r2, [r4, #464]
17687
17970
 	ldr	r3, [sp, #12]
17688
-	str	r3, [r4, #4]
17689
-.L2833:
17690
-	ldr	r3, [sp, #4]
17691
-	movs	r2, #1
17692
-	ldr	r1, [sp, #8]
17693
-	lsls	r2, r2, r3
17694
-	movs	r3, #12
17695
-	subs	r2, r2, #1
17696
-	and	r9, r9, r2
17697
-	ldr	r2, .L2845+4
17698
-	uxth	r9, r9
17699
-	cbnz	r1, .L2834
17700
-	ldr	r1, [r2, #460]
17701
-	mla	r3, r3, r7, r1
17702
-	ldr	r3, [r3, #8]
17703
-	ldr	r3, [r3, r9, lsl #2]
17704
-	str	r3, [r10]
17705
-	b	.L2835
17706
-.L2834:
17707
-	muls	r3, r7, r3
17708
-	ldr	r1, [r2, #460]
17709
-	ldr	r0, [r10]
17710
-	add	r1, r1, r3
17711
-	ldr	r1, [r1, #8]
17712
-	str	r0, [r1, r9, lsl #2]
17713
-	ldr	r1, [r2, #460]
17714
-	strh	r5, [r2, #464]	@ movhi
17715
-	add	r3, r3, r1
17716
-	ldr	r1, [r3, #4]
17717
-	orr	r1, r1, #-2147483648
17718
-	str	r1, [r3, #4]
17719
-.L2835:
17720
-	ldr	r2, [r2, #460]
17721
-	movs	r3, #12
17722
-	mla	r7, r3, r7, r2
17723
-	ldr	r3, [r7, #4]
17724
-	adds	r2, r3, #1
17725
-	beq	.L2842
17726
-	adds	r3, r3, #1
17727
-	str	r3, [r7, #4]
17728
-	b	.L2842
17729
-.L2844:
17730
-	ldr	r3, [r2, #4]
17731
-	cmp	r3, #0
17732
-	bge	.L2837
17733
-	bl	flush_l2p_region
17734
-	b	.L2837
17735
-.L2838:
17736
-	ldr	r2, [fp, #460]
17737
-	movs	r1, #1
17738
-	ldr	r8, .L2845+24
17739
-	add	r2, r2, r4
17740
-	str	r3, [sp, #12]
17741
-	add	r0, r8, #1248
17742
-	ldr	r2, [r2, #8]
17743
-	str	r3, [r8, #1252]
17744
-	str	r2, [r8, #1256]
17745
-	ldr	r2, [fp, #3340]
17746
-	str	r2, [r8, #1260]
17747
-	mov	r2, r1
17748
-	bl	FlashReadPages
17749
-	ldr	r2, [r8, #1260]
17750
-	ldrh	r2, [r2, #8]
17751
-	cmp	r2, r5
17752
-	ldr	r3, [sp, #12]
17753
-	beq	.L2839
17754
-	mov	r2, r3
17755
-	mov	r1, r5
17756
-	ldr	r0, .L2845+8
17757
-	bl	printk
17758
-	movs	r2, #4
17759
-	ldr	r0, .L2845+12
17760
-	mov	r3, r2
17761
-	ldr	r1, [r8, #1260]
17762
-	bl	rknand_print_hex
17763
-	ldrh	r3, [r6, #2424]
17764
-	ldr	r0, .L2845+16
17765
-	movs	r2, #4
17766
-	ldr	r1, [fp, #3388]
17767
-	bl	rknand_print_hex
17768
-	movs	r3, #1
17769
-	str	r3, [fp, #224]
17770
-	b	.L2840
17771
-.L2839:
17772
-	ldr	r2, [r8, #1248]
17773
-	cmp	r2, #256
17774
-	bne	.L2840
17775
-	mov	r2, r3
17776
-	mov	r1, r5
17777
-	ldr	r0, .L2845+20
17778
-	bl	printk
17779
-	ldr	r3, [fp, #460]
17780
-	add	r0, fp, #3408
17781
-	mov	r1, r5
17782
-	add	r3, r3, r4
17783
-	ldr	r2, [r3, #8]
17784
-	bl	FtlMapWritePage
17785
-.L2840:
17786
-	ldr	r3, .L2845+4
17787
-	movs	r1, #0
17788
-	ldr	r3, [r3, #460]
17789
-	adds	r2, r3, r4
17790
-	str	r1, [r2, #4]
17791
-	strh	r5, [r3, r4]	@ movhi
17792
-	b	.L2833
17793
-.L2842:
17794
-	movs	r0, #0
17795
-.L2832:
17971
+	strh	r10, [r2, r5]	@ movhi
17972
+	ldr	r2, [r4, #464]
17973
+	add	r5, r5, r2
17974
+	str	r3, [r5, #4]
17975
+	b	.L2734
17976
+.L2731:
17977
+	ldr	r3, [sp, #8]
17978
+	mov	r0, #-1
17979
+	cbnz	r3, .L2730
17980
+	str	r0, [fp]
17981
+.L2730:
17796
17982
 	add	sp, sp, #20
17797
17983
 	@ sp needed
17798
17984
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
17799
-.L2846:
17985
+.L2737:
17986
+	adds	r3, r3, #1
17987
+	mla	r1, r5, r3, r7
17988
+	ldrh	r1, [r1, #-12]
17989
+	cmp	r1, r10
17990
+	bne	.L2732
17991
+.L2734:
17992
+	ldr	r2, [sp, #4]
17993
+	movs	r3, #1
17994
+	ldr	r0, [sp, #8]
17995
+	ldr	r1, .L2745+4
17996
+	lsls	r3, r3, r2
17997
+	ldr	r2, [sp]
17998
+	subs	r3, r3, #1
17999
+	ands	r3, r3, r2
18000
+	movs	r2, #12
18001
+	uxth	r3, r3
18002
+	cbnz	r0, .L2735
18003
+	ldr	r0, [r1, #464]
18004
+	mla	r2, r2, r9, r0
18005
+	ldr	r2, [r2, #8]
18006
+	ldr	r3, [r2, r3, lsl #2]
18007
+	str	r3, [fp]
18008
+.L2736:
18009
+	ldr	r2, [r1, #464]
18010
+	movs	r3, #12
18011
+	mla	r9, r3, r9, r2
18012
+	ldr	r3, [r9, #4]
18013
+	adds	r2, r3, #1
18014
+	beq	.L2743
18015
+	adds	r3, r3, #1
18016
+	str	r3, [r9, #4]
18017
+.L2743:
18018
+	movs	r0, #0
18019
+	b	.L2730
18020
+.L2735:
18021
+	mul	r2, r2, r9
18022
+	ldr	r0, [r4, #464]
18023
+	ldr	r5, [fp]
18024
+	add	r0, r0, r2
18025
+	ldr	r0, [r0, #8]
18026
+	str	r5, [r0, r3, lsl #2]
18027
+	ldr	r3, [r4, #464]
18028
+	strh	r10, [r4, #468]	@ movhi
18029
+	add	r2, r2, r3
18030
+	ldr	r3, [r2, #4]
18031
+	orr	r3, r3, #-2147483648
18032
+	str	r3, [r2, #4]
18033
+	b	.L2736
18034
+.L2739:
18035
+	ldr	r2, [r4, #464]
18036
+	ldr	r7, .L2745+8
18037
+	str	r3, [sp, #12]
18038
+	add	r2, r2, r5
18039
+	ldr	r2, [r2, #8]
18040
+	add	r0, r7, #1256
18041
+	str	r3, [r7, #1260]
18042
+	str	r2, [r7, #1264]
18043
+	ldr	r2, [r4, #3340]
18044
+	str	r2, [r7, #1268]
18045
+	movs	r2, #1
18046
+	mov	r1, r2
18047
+	bl	FlashReadPages
18048
+	ldr	r2, [r7, #1268]
18049
+	ldr	r3, [sp, #12]
18050
+	ldrh	r2, [r2, #8]
18051
+	cmp	r2, r10
18052
+	beq	.L2740
18053
+	mov	r2, r3
18054
+	mov	r1, r6
18055
+	ldr	r0, .L2745+12
18056
+	bl	printk
18057
+	movs	r3, #4
18058
+	ldr	r1, [r7, #1268]
18059
+	mov	r2, r3
18060
+	ldr	r0, .L2745+16
18061
+	bl	rknand_print_hex
18062
+	ldrh	r3, [r8, #2428]
18063
+	movs	r2, #4
18064
+	ldr	r1, [r4, #3388]
18065
+	ldr	r0, .L2745+20
18066
+	bl	rknand_print_hex
18067
+	movs	r3, #1
18068
+	str	r3, [r4, #228]
18069
+.L2741:
18070
+	ldr	r3, .L2745+4
18071
+	movs	r1, #0
18072
+	ldr	r3, [r3, #464]
18073
+	adds	r2, r3, r5
18074
+	str	r1, [r2, #4]
18075
+	strh	r10, [r3, r5]	@ movhi
18076
+	b	.L2734
18077
+.L2740:
18078
+	ldr	r2, [r7, #1256]
18079
+	cmp	r2, #256
18080
+	bne	.L2741
18081
+	mov	r2, r3
18082
+	mov	r1, r6
18083
+	ldr	r0, .L2745+24
18084
+	bl	printk
18085
+	ldr	r3, [r4, #464]
18086
+	mov	r1, r6
18087
+	ldr	r0, .L2745+28
18088
+	add	r3, r3, r5
18089
+	ldr	r2, [r3, #8]
18090
+	bl	FtlMapWritePage
18091
+	b	.L2741
18092
+.L2746:
17800
18093
 	.align	2
17801
-.L2845:
18094
+.L2745:
17802
18095
 	.word	.LANCHOR0
17803
18096
 	.word	.LANCHOR2
18097
+	.word	.LANCHOR4
17804
18098
 	.word	.LC140
17805
18099
 	.word	.LC101
17806
18100
 	.word	.LC141
17807
18101
 	.word	.LC142
17808
-	.word	.LANCHOR4
18102
+	.word	.LANCHOR2+3408
17809
18103
 	.fnend
17810
18104
 	.size	log2phys, .-log2phys
17811
18105
 	.align	1
17812
18106
 	.global	FtlWriteDumpData
18107
+	.syntax unified
17813
18108
 	.thumb
17814
18109
 	.thumb_func
18110
+	.fpu softvfp
17815
18111
 	.type	FtlWriteDumpData, %function
17816
18112
 FtlWriteDumpData:
17817
18113
 	.fnstart
..
..
@@ -17821,110 +18117,114 @@
17821
18117
 	.save {r4, r5, r6, r7, r8, r9, r10, lr}
17822
18118
 	.pad #40
17823
18119
 	sub	sp, sp, #40
17824
-	ldr	r4, .L2865
17825
-	ldr	r3, [r4, #224]
18120
+	ldr	r4, .L2765
18121
+	ldr	r3, [r4, #228]
17826
18122
 	cmp	r3, #0
17827
-	bne	.L2847
17828
-	ldrh	r2, [r4, #320]
18123
+	bne	.L2747
18124
+	ldrh	r2, [r4, #324]
17829
18125
 	cmp	r2, #0
17830
-	beq	.L2849
17831
-	ldrb	r3, [r4, #324]	@ zero_extendqisi2
18126
+	beq	.L2749
18127
+	ldrb	r3, [r4, #328]	@ zero_extendqisi2
17832
18128
 	cmp	r3, #0
17833
-	bne	.L2849
17834
-	ldr	r7, .L2865+4
17835
-	ldrb	r1, [r4, #323]	@ zero_extendqisi2
17836
-	ldrh	r3, [r7, #2388]
18129
+	bne	.L2749
18130
+	ldr	r7, .L2765+4
18131
+	ldrb	r1, [r4, #327]	@ zero_extendqisi2
18132
+	ldrh	r3, [r7, #2390]
17837
18133
 	muls	r3, r1, r3
17838
18134
 	cmp	r2, r3
17839
-	beq	.L2849
17840
-	ldrb	r9, [r4, #326]	@ zero_extendqisi2
17841
-	ldr	r6, [r7, #2448]
17842
-	ldrh	r8, [r7, #2320]
18135
+	beq	.L2749
18136
+	ldrb	r9, [r4, #330]	@ zero_extendqisi2
17843
18137
 	cmp	r9, #0
17844
-	bne	.L2847
17845
-	subs	r6, r6, #1
17846
-	mov	r1, sp
18138
+	bne	.L2747
18139
+	ldr	r6, [r7, #2452]
17847
18140
 	mov	r2, r9
18141
+	mov	r1, sp
18142
+	ldrh	r8, [r7, #2324]
18143
+	subs	r6, r6, #1
17848
18144
 	mov	r0, r6
17849
18145
 	bl	log2phys
18146
+	ldr	r3, [sp]
17850
18147
 	ldr	r5, [r4, #3340]
17851
18148
 	ldr	r0, [r4, #3316]
17852
-	ldr	r3, [sp]
17853
-	str	r6, [sp, #20]
17854
-	str	r0, [sp, #12]
17855
18149
 	str	r3, [sp, #8]
17856
18150
 	adds	r3, r3, #1
18151
+	str	r6, [sp, #20]
18152
+	str	r0, [sp, #12]
17857
18153
 	str	r5, [sp, #16]
17858
18154
 	str	r9, [r5, #4]
17859
-	beq	.L2851
17860
-	movs	r1, #1
18155
+	beq	.L2751
17861
18156
 	mov	r2, r9
18157
+	movs	r1, #1
17862
18158
 	add	r0, sp, #4
17863
18159
 	bl	FlashReadPages
17864
-	b	.L2852
17865
-.L2851:
17866
-	movs	r1, #255
17867
-	ldrh	r2, [r7, #2398]
17868
-	bl	ftl_memset
17869
-.L2852:
18160
+.L2752:
18161
+	ldr	r9, .L2765+8
17870
18162
 	movs	r7, #0
17871
-	ldr	r10, .L2865
17872
18163
 	lsl	r8, r8, #2
18164
+	mov	r10, r7
17873
18165
 	movw	r3, #61589
17874
-	mov	r9, r7
17875
18166
 	strh	r3, [r5]	@ movhi
17876
-.L2853:
17877
-	cmp	r7, r8
17878
-	beq	.L2854
17879
-	ldrh	r3, [r4, #320]
17880
-	cbz	r3, .L2854
18167
+.L2753:
18168
+	cmp	r8, r7
18169
+	bne	.L2757
18170
+.L2754:
18171
+	movs	r3, #1
18172
+.L2764:
18173
+	strb	r3, [r4, #330]
18174
+.L2747:
18175
+	add	sp, sp, #40
18176
+	@ sp needed
18177
+	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
18178
+.L2751:
18179
+	ldrh	r2, [r7, #2400]
18180
+	movs	r1, #255
18181
+	bl	ftl_memset
18182
+	b	.L2752
18183
+.L2757:
18184
+	ldrh	r3, [r4, #324]
18185
+	cmp	r3, #0
18186
+	beq	.L2754
17881
18187
 	ldr	r3, [sp, #8]
17882
-	adds	r7, r7, #1
18188
+	mov	r0, r9
17883
18189
 	str	r6, [r5, #8]
17884
-	ldr	r0, .L2865+8
18190
+	adds	r7, r7, #1
17885
18191
 	str	r3, [r5, #12]
17886
-	ldrh	r3, [r10, #316]
18192
+	ldrh	r3, [r4, #320]
17887
18193
 	strh	r3, [r5, #2]	@ movhi
17888
18194
 	bl	get_new_active_ppa
17889
-	ldr	r3, [r10, #512]
18195
+	ldr	r3, [r4, #512]
17890
18196
 	movs	r1, #1
17891
18197
 	str	r0, [sp, #8]
17892
18198
 	add	r0, sp, #4
17893
18199
 	str	r3, [r5, #4]
17894
18200
 	adds	r3, r3, #1
17895
18201
 	adds	r2, r3, #1
17896
-	mov	r2, #0
17897
18202
 	it	eq
17898
-	moveq	r3, r9
17899
-	str	r3, [r10, #512]
17900
-	mov	r3, r2
17901
-	bl	FlashProgPages
17902
-	ldrh	r0, [r4, #316]
17903
-	bl	decrement_vpc_count
17904
-	b	.L2853
17905
-.L2854:
17906
-	movs	r3, #1
17907
-	b	.L2864
17908
-.L2849:
18203
+	moveq	r3, r10
18204
+	str	r3, [r4, #512]
17909
18205
 	movs	r3, #0
17910
-.L2864:
17911
-	strb	r3, [r4, #326]
17912
-.L2847:
17913
-	add	sp, sp, #40
17914
-	@ sp needed
17915
-	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
17916
-.L2866:
18206
+	mov	r2, r3
18207
+	bl	FlashProgPages
18208
+	ldrh	r0, [r4, #320]
18209
+	bl	decrement_vpc_count
18210
+	b	.L2753
18211
+.L2749:
18212
+	movs	r3, #0
18213
+	b	.L2764
18214
+.L2766:
17917
18215
 	.align	2
17918
-.L2865:
18216
+.L2765:
17919
18217
 	.word	.LANCHOR2
17920
18218
 	.word	.LANCHOR0
17921
-	.word	.LANCHOR2+316
18219
+	.word	.LANCHOR2+320
17922
18220
 	.fnend
17923
18221
 	.size	FtlWriteDumpData, .-FtlWriteDumpData
17924
18222
 	.align	1
17925
18223
 	.global	l2p_flush
18224
+	.syntax unified
17926
18225
 	.thumb
17927
18226
 	.thumb_func
18227
+	.fpu softvfp
17928
18228
 	.type	l2p_flush, %function
17929
18229
 l2p_flush:
17930
18230
 	.fnstart
..
..
@@ -17932,39 +18232,42 @@
17932
18232
 	@ frame_needed = 0, uses_anonymous_args = 0
17933
18233
 	push	{r3, r4, r5, r6, r7, lr}
17934
18234
 	.save {r3, r4, r5, r6, r7, lr}
17935
-	bl	FtlWriteDumpData
17936
18235
 	movs	r4, #0
17937
-	ldr	r5, .L2872
18236
+	ldr	r5, .L2771
17938
18237
 	movs	r7, #12
17939
-	ldr	r6, .L2872+4
17940
-.L2868:
17941
-	ldrh	r3, [r5, #2426]
18238
+	ldr	r6, .L2771+4
18239
+	bl	FtlWriteDumpData
18240
+.L2768:
18241
+	ldrh	r3, [r5, #2430]
17942
18242
 	uxth	r0, r4
17943
18243
 	cmp	r3, r0
17944
-	bls	.L2871
17945
-	ldr	r3, [r6, #460]
17946
-	mla	r3, r7, r0, r3
17947
-	ldr	r3, [r3, #4]
17948
-	cmp	r3, #0
17949
-	bge	.L2869
17950
-	bl	flush_l2p_region
17951
-.L2869:
17952
-	adds	r4, r4, #1
17953
-	b	.L2868
17954
-.L2871:
18244
+	bhi	.L2770
17955
18245
 	movs	r0, #0
17956
18246
 	pop	{r3, r4, r5, r6, r7, pc}
17957
-.L2873:
18247
+.L2770:
18248
+	ldr	r2, [r6, #464]
18249
+	uxth	r3, r4
18250
+	mla	r3, r7, r3, r2
18251
+	ldr	r3, [r3, #4]
18252
+	cmp	r3, #0
18253
+	bge	.L2769
18254
+	bl	flush_l2p_region
18255
+.L2769:
18256
+	adds	r4, r4, #1
18257
+	b	.L2768
18258
+.L2772:
17958
18259
 	.align	2
17959
-.L2872:
18260
+.L2771:
17960
18261
 	.word	.LANCHOR0
17961
18262
 	.word	.LANCHOR2
17962
18263
 	.fnend
17963
18264
 	.size	l2p_flush, .-l2p_flush
17964
18265
 	.align	1
17965
18266
 	.global	allocate_new_data_superblock
18267
+	.syntax unified
17966
18268
 	.thumb
17967
18269
 	.thumb_func
18270
+	.fpu softvfp
17968
18271
 	.type	allocate_new_data_superblock, %function
17969
18272
 allocate_new_data_superblock:
17970
18273
 	.fnstart
..
..
@@ -17973,323 +18276,324 @@
17973
18276
 	push	{r4, r5, r6, lr}
17974
18277
 	.save {r4, r5, r6, lr}
17975
18278
 	mov	r6, r0
17976
-	ldr	r4, .L2900
18279
+	ldr	r4, .L2799
18280
+	ldr	r3, [r4, #228]
18281
+	cbnz	r3, .L2774
17977
18282
 	ldrh	r5, [r0]
17978
-	ldr	r3, [r4, #224]
17979
-	cmp	r3, #0
17980
-	bne	.L2875
17981
18283
 	movw	r3, #65535
17982
18284
 	cmp	r5, r3
17983
-	beq	.L2876
17984
-	ldr	r3, [r4, #296]
18285
+	beq	.L2775
18286
+	ldr	r3, [r4, #300]
17985
18287
 	mov	r0, r5
17986
18288
 	ldrh	r3, [r3, r5, lsl #1]
17987
-	cbz	r3, .L2877
18289
+	cbz	r3, .L2776
17988
18290
 	bl	INSERT_DATA_LIST
17989
-	b	.L2876
17990
-.L2877:
17991
-	bl	INSERT_FREE_LIST
17992
-.L2876:
17993
-	ldr	r2, .L2900
18291
+.L2775:
18292
+	ldr	r2, .L2799+4
17994
18293
 	movs	r3, #0
17995
18294
 	strb	r3, [r6, #8]
17996
-	add	r3, r2, #364
17997
-	cmp	r6, r3
17998
-	beq	.L2878
17999
-	ldr	r3, .L2900+4
18000
-	ldrh	r1, [r3, #2340]
18295
+	cmp	r6, r2
18296
+	beq	.L2777
18297
+	ldr	r3, .L2799+8
18298
+	ldrh	r1, [r3, #2344]
18001
18299
 	cmp	r1, #1
18002
-	beq	.L2878
18003
-	ldrb	r0, [r3, #144]	@ zero_extendqisi2
18004
-	cbz	r0, .L2879
18005
-.L2878:
18300
+	beq	.L2777
18301
+	ldrb	r0, [r3, #152]	@ zero_extendqisi2
18302
+	cbz	r0, .L2778
18303
+.L2777:
18006
18304
 	movs	r3, #1
18007
18305
 	strb	r3, [r6, #8]
18008
-	b	.L2880
18009
-.L2879:
18010
-	add	r0, r2, #316
18011
-	cmp	r6, r0
18012
-	bne	.L2880
18013
-	cmp	r1, #3
18014
-	beq	.L2882
18015
-	ldr	r2, [r2, #604]
18016
-	cmp	r2, #1
18017
-	bne	.L2883
18018
-.L2882:
18019
-	movs	r2, #1
18020
-	strb	r2, [r4, #324]
18021
-.L2883:
18022
-	ldr	r3, [r3, #2244]
18023
-	cbz	r3, .L2880
18024
-	ldr	r3, [r4, #532]
18025
-	cmp	r3, #39
18026
-	ittt	ls
18027
-	movls	r2, #1
18028
-	ldrls	r3, .L2900
18029
-	strbls	r2, [r3, #324]
18030
-.L2880:
18306
+.L2779:
18031
18307
 	ldrh	r0, [r4, #3460]
18032
18308
 	movw	r3, #65535
18033
18309
 	cmp	r0, r3
18034
-	beq	.L2885
18310
+	beq	.L2784
18035
18311
 	cmp	r5, r0
18036
-	bne	.L2886
18037
-	ldr	r3, .L2900
18038
-	ldr	r3, [r3, #296]
18312
+	bne	.L2785
18313
+	ldr	r3, [r4, #300]
18039
18314
 	ldrh	r3, [r3, r0, lsl #1]
18040
-	cbz	r3, .L2887
18041
-.L2886:
18315
+	cbz	r3, .L2786
18316
+.L2785:
18042
18317
 	bl	update_vpc_list
18043
-.L2887:
18318
+.L2786:
18044
18319
 	movw	r3, #65535
18045
18320
 	strh	r3, [r4, #3460]	@ movhi
18046
-.L2885:
18321
+.L2784:
18047
18322
 	mov	r0, r6
18048
18323
 	bl	allocate_data_superblock
18049
18324
 	bl	l2p_flush
18050
18325
 	movs	r0, #0
18051
18326
 	bl	FtlEctTblFlush
18052
18327
 	bl	FtlVpcTblFlush
18053
-.L2875:
18328
+.L2774:
18054
18329
 	movs	r0, #0
18055
18330
 	pop	{r4, r5, r6, pc}
18056
-.L2901:
18331
+.L2776:
18332
+	bl	INSERT_FREE_LIST
18333
+	b	.L2775
18334
+.L2778:
18335
+	subs	r2, r2, #48
18336
+	cmp	r6, r2
18337
+	bne	.L2779
18338
+	cmp	r1, #3
18339
+	beq	.L2781
18340
+	ldr	r2, [r4, #1116]
18341
+	cmp	r2, #1
18342
+	bne	.L2782
18343
+.L2781:
18344
+	movs	r2, #1
18345
+	strb	r2, [r4, #328]
18346
+.L2782:
18347
+	ldr	r3, [r3, #2248]
18348
+	cmp	r3, #0
18349
+	beq	.L2779
18350
+	ldr	r3, [r4, #532]
18351
+	cmp	r3, #39
18352
+	itt	ls
18353
+	movls	r3, #1
18354
+	strbls	r3, [r4, #328]
18355
+	b	.L2779
18356
+.L2800:
18057
18357
 	.align	2
18058
-.L2900:
18358
+.L2799:
18059
18359
 	.word	.LANCHOR2
18360
+	.word	.LANCHOR2+368
18060
18361
 	.word	.LANCHOR0
18061
18362
 	.fnend
18062
18363
 	.size	allocate_new_data_superblock, .-allocate_new_data_superblock
18063
18364
 	.align	1
18064
18365
 	.global	FtlCheckVpc
18366
+	.syntax unified
18065
18367
 	.thumb
18066
18368
 	.thumb_func
18369
+	.fpu softvfp
18067
18370
 	.type	FtlCheckVpc, %function
18068
18371
 FtlCheckVpc:
18069
18372
 	.fnstart
18070
18373
 	@ args = 0, pretend = 0, frame = 8
18071
18374
 	@ frame_needed = 0, uses_anonymous_args = 0
18072
-	push	{r0, r1, r4, r5, r6, r7, r8, r9, r10, lr}
18073
-	.save {r4, r5, r6, r7, r8, r9, r10, lr}
18074
-	.pad #8
18375
+	push	{r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr}
18376
+	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
18377
+	.pad #12
18075
18378
 	movs	r4, #0
18076
-	ldr	r1, .L2924
18077
-	ldr	r0, .L2924+4
18379
+	ldr	r5, .L2821
18380
+	ldr	r6, .L2821+4
18381
+	ldr	r1, .L2821+8
18382
+	mov	r8, r5
18383
+	ldr	r0, .L2821+12
18078
18384
 	bl	printk
18079
-	ldr	r0, .L2924+8
18080
-	movs	r1, #0
18081
18385
 	mov	r2, #8192
18386
+	movs	r1, #0
18387
+	ldr	r0, .L2821+4
18082
18388
 	bl	memset
18083
-	ldr	r5, .L2924+12
18084
-	ldr	r6, .L2924+16
18085
-.L2903:
18086
-	ldr	r3, [r5, #2448]
18087
-	ldr	r9, .L2924+12
18389
+.L2802:
18390
+	ldr	r3, [r5, #2452]
18088
18391
 	cmp	r4, r3
18089
-	bcs	.L2922
18090
-	mov	r0, r4
18091
-	add	r1, sp, #4
18392
+	bcc	.L2804
18393
+	ldr	r5, .L2821+16
18394
+	movs	r4, #0
18395
+	ldr	r9, .L2821+4
18396
+	mov	r7, r4
18397
+	ldr	r10, .L2821+28
18398
+.L2805:
18399
+	ldrh	r2, [r8, #2332]
18400
+	uxth	r3, r4
18401
+	cmp	r2, r3
18402
+	bhi	.L2807
18403
+	ldr	r4, [r5, #312]
18404
+	cbz	r4, .L2808
18405
+	ldr	r3, [r5, #292]
18406
+	movs	r6, #0
18407
+	ldrh	r8, [r5, #316]
18408
+	mov	fp, #6
18409
+	ldr	r9, .L2821+4
18410
+	subs	r4, r4, r3
18411
+	ldr	r3, .L2821+20
18412
+	asrs	r4, r4, #1
18413
+	ldr	r10, .L2821+32
18414
+	muls	r4, r3, r4
18415
+	uxth	r4, r4
18416
+.L2809:
18417
+	uxth	r3, r6
18418
+	cmp	r8, r3
18419
+	bls	.L2808
18420
+	ldr	r3, [r5, #300]
18421
+	ldrh	r2, [r3, r4, lsl #1]
18422
+	cbz	r2, .L2810
18423
+	movs	r7, #1
18424
+	ldrh	r3, [r9, r4, lsl #1]
18425
+	mov	r1, r4
18426
+	mov	r0, r10
18427
+	bl	printk
18428
+.L2810:
18429
+	mul	r4, fp, r4
18430
+	ldr	r3, [r5, #292]
18431
+	adds	r6, r6, #1
18432
+	ldrh	r4, [r3, r4]
18433
+	movw	r3, #65535
18434
+	cmp	r4, r3
18435
+	bne	.L2809
18436
+.L2808:
18437
+	mov	r1, r7
18438
+	ldr	r0, .L2821+24
18439
+	bl	printk
18440
+	add	sp, sp, #12
18441
+	@ sp needed
18442
+	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
18443
+.L2804:
18092
18444
 	movs	r2, #0
18445
+	add	r1, sp, #4
18446
+	mov	r0, r4
18093
18447
 	bl	log2phys
18094
18448
 	ldr	r0, [sp, #4]
18095
18449
 	adds	r3, r0, #1
18096
-	beq	.L2904
18450
+	beq	.L2803
18097
18451
 	ubfx	r0, r0, #10, #16
18098
18452
 	bl	P2V_block_in_plane
18099
-	add	r0, r6, r0, lsl #1
18100
-	ldrh	r3, [r0, #1336]
18453
+	ldrh	r3, [r6, r0, lsl #1]
18101
18454
 	adds	r3, r3, #1
18102
-	strh	r3, [r0, #1336]	@ movhi
18103
-.L2904:
18455
+	strh	r3, [r6, r0, lsl #1]	@ movhi
18456
+.L2803:
18104
18457
 	adds	r4, r4, #1
18105
-	b	.L2903
18106
-.L2922:
18107
-	movs	r7, #0
18108
-	ldr	r8, .L2924+20
18109
-	ldr	r10, .L2924+16
18110
-	mov	r6, r7
18111
-.L2906:
18112
-	ldrh	r3, [r9, #2328]
18113
-	uxth	r4, r7
18114
-	ldr	r5, .L2924+20
18115
-	cmp	r3, r4
18116
-	bls	.L2923
18117
-	ldr	r3, [r8, #296]
18118
-	add	r5, r10, r4, lsl #1
18119
-	ldrh	r2, [r3, r4, lsl #1]
18120
-	ldrh	r3, [r5, #1336]
18458
+	b	.L2802
18459
+.L2807:
18460
+	ldr	r3, [r5, #300]
18461
+	uxth	r6, r4
18462
+	ldrh	r2, [r3, r6, lsl #1]
18463
+	ldrh	r3, [r9, r6, lsl #1]
18121
18464
 	cmp	r2, r3
18122
-	beq	.L2907
18123
-	ldr	r0, .L2924+24
18124
-	mov	r1, r4
18465
+	beq	.L2806
18466
+	mov	r1, r6
18467
+	mov	r0, r10
18125
18468
 	bl	printk
18126
-	ldr	r3, [r8, #296]
18469
+	ldr	r3, [r5, #300]
18127
18470
 	movw	r2, #65535
18128
-	ldrh	r3, [r3, r4, lsl #1]
18471
+	ldrh	r3, [r3, r6, lsl #1]
18129
18472
 	cmp	r3, r2
18130
-	beq	.L2907
18131
-	ldrh	r2, [r5, #1336]
18473
+	beq	.L2806
18474
+	ldrh	r2, [r9, r6, lsl #1]
18132
18475
 	cmp	r2, r3
18133
18476
 	it	hi
18134
-	movhi	r6, #1
18135
-.L2907:
18136
-	adds	r7, r7, #1
18137
-	b	.L2906
18138
-.L2923:
18139
-	ldr	r3, [r5, #308]
18140
-	cbz	r3, .L2909
18141
-	ldr	r2, [r5, #288]
18142
-	movs	r7, #0
18143
-	ldrh	r8, [r5, #312]
18144
-	subs	r3, r3, r2
18145
-	ldr	r2, .L2924+28
18146
-	ldr	r9, .L2924+16
18147
-	asrs	r3, r3, #1
18148
-	muls	r3, r2, r3
18149
-	uxth	r4, r3
18150
-.L2910:
18151
-	uxth	r3, r7
18152
-	cmp	r3, r8
18153
-	bcs	.L2909
18154
-	ldr	r3, [r5, #296]
18155
-	ldrh	r2, [r3, r4, lsl #1]
18156
-	cbz	r2, .L2911
18157
-	add	r3, r9, r4, lsl #1
18158
-	ldr	r0, .L2924+32
18159
-	mov	r1, r4
18160
-	movs	r6, #1
18161
-	ldrh	r3, [r3, #1336]
18162
-	bl	printk
18163
-.L2911:
18164
-	movs	r3, #6
18165
-	ldr	r2, [r5, #288]
18166
-	adds	r7, r7, #1
18167
-	muls	r4, r3, r4
18168
-	movw	r3, #65535
18169
-	ldrh	r4, [r2, r4]
18170
-	cmp	r4, r3
18171
-	bne	.L2910
18172
-.L2909:
18173
-	mov	r1, r6
18174
-	ldr	r0, .L2924+36
18175
-	bl	printk
18176
-	add	sp, sp, #8
18177
-	@ sp needed
18178
-	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
18179
-.L2925:
18477
+	movhi	r7, #1
18478
+.L2806:
18479
+	adds	r4, r4, #1
18480
+	b	.L2805
18481
+.L2822:
18180
18482
 	.align	2
18181
-.L2924:
18182
-	.word	.LANCHOR3+204
18183
-	.word	.LC110
18184
-	.word	.LANCHOR4+1336
18483
+.L2821:
18185
18484
 	.word	.LANCHOR0
18186
-	.word	.LANCHOR4
18485
+	.word	check_valid_page_count_table
18486
+	.word	.LANCHOR3+191
18487
+	.word	.LC110
18187
18488
 	.word	.LANCHOR2
18188
-	.word	.LC143
18189
18489
 	.word	-1431655765
18190
-	.word	.LC144
18191
18490
 	.word	.LC145
18491
+	.word	.LC143
18492
+	.word	.LC144
18192
18493
 	.fnend
18193
18494
 	.size	FtlCheckVpc, .-FtlCheckVpc
18194
18495
 	.align	1
18195
18496
 	.global	Ftlscanalldata
18497
+	.syntax unified
18196
18498
 	.thumb
18197
18499
 	.thumb_func
18500
+	.fpu softvfp
18198
18501
 	.type	Ftlscanalldata, %function
18199
18502
 Ftlscanalldata:
18200
18503
 	.fnstart
18201
18504
 	@ args = 0, pretend = 0, frame = 8
18202
18505
 	@ frame_needed = 0, uses_anonymous_args = 0
18203
-	push	{r4, r5, r6, r7, lr}
18204
-	.save {r4, r5, r6, r7, lr}
18506
+	push	{r4, r5, r6, r7, r8, lr}
18507
+	.save {r4, r5, r6, r7, r8, lr}
18508
+	movs	r5, #0
18509
+	ldr	r4, .L2837
18510
+	.pad #32
18511
+	sub	sp, sp, #32
18205
18512
 	movs	r1, #0
18206
-	.pad #36
18207
-	sub	sp, sp, #36
18208
-	ldr	r0, .L2941
18513
+	ldr	r7, .L2837+4
18514
+	add	r8, r4, #1256
18515
+	ldr	r0, .L2837+8
18209
18516
 	bl	printk
18210
-	ldr	r7, .L2941+4
18211
-	ldr	r5, .L2941+8
18212
-	movs	r4, #0
18213
-.L2927:
18214
-	ldr	r3, [r7, #2448]
18215
-	cmp	r4, r3
18216
-	bcs	.L2940
18217
-	mov	r0, r4
18218
-	add	r1, sp, #28
18517
+.L2824:
18518
+	ldr	r3, [r7, #2452]
18519
+	cmp	r5, r3
18520
+	bcc	.L2830
18521
+	add	sp, sp, #32
18522
+	@ sp needed
18523
+	pop	{r4, r5, r6, r7, r8, pc}
18524
+.L2830:
18219
18525
 	movs	r2, #0
18526
+	add	r1, sp, #28
18527
+	mov	r0, r5
18220
18528
 	bl	log2phys
18221
-	ubfx	r3, r4, #0, #11
18222
-	cbnz	r3, .L2928
18223
-	ldr	r0, .L2941+12
18224
-	mov	r1, r4
18529
+	ubfx	r3, r5, #0, #11
18530
+	cbnz	r3, .L2825
18225
18531
 	ldr	r2, [sp, #28]
18532
+	mov	r1, r5
18533
+	ldr	r0, .L2837+12
18226
18534
 	bl	printk
18227
-.L2928:
18535
+.L2825:
18228
18536
 	ldr	r3, [sp, #28]
18229
18537
 	adds	r2, r3, #1
18230
-	beq	.L2930
18231
-	str	r3, [r5, #1252]
18538
+	beq	.L2827
18539
+	str	r3, [r4, #1260]
18232
18540
 	movs	r1, #1
18233
-	ldr	r3, .L2941+16
18234
-	ldr	r0, .L2941+20
18235
-	str	r4, [r5, #1264]
18541
+	ldr	r3, .L2837+16
18542
+	mov	r0, r8
18543
+	str	r5, [r4, #1272]
18236
18544
 	ldr	r2, [r3, #3316]
18237
18545
 	ldr	r6, [r3, #3340]
18238
-	str	r2, [r5, #1256]
18546
+	str	r2, [r4, #1264]
18239
18547
 	movs	r2, #0
18240
-	str	r6, [r5, #1260]
18241
-	str	r2, [r5, #1248]
18548
+	str	r6, [r4, #1268]
18549
+	str	r2, [r4, #1256]
18242
18550
 	bl	FlashReadPages
18243
-	ldr	r3, [r5, #1248]
18244
-	ldr	r2, .L2941+8
18551
+	ldr	r3, [r4, #1256]
18245
18552
 	cmp	r3, #256
18246
-	beq	.L2931
18553
+	beq	.L2828
18247
18554
 	adds	r3, r3, #1
18248
-	beq	.L2931
18555
+	beq	.L2828
18249
18556
 	ldr	r3, [r6, #8]
18250
-	cmp	r3, r4
18251
-	beq	.L2930
18252
-.L2931:
18253
-	ldr	r3, [r2, #1260]
18254
-	ldr	r1, [r2, #1256]
18255
-	ldr	r0, [r3, #4]
18256
-	str	r0, [sp]
18257
-	ldr	r0, [r3, #8]
18258
-	str	r0, [sp, #4]
18259
-	ldr	r0, [r3, #12]
18260
-	str	r0, [sp, #8]
18261
-	ldr	r0, [r1]
18262
-	str	r0, [sp, #12]
18263
-	ldr	r1, [r1, #4]
18264
-	ldr	r0, .L2941+24
18557
+	cmp	r5, r3
18558
+	beq	.L2827
18559
+.L2828:
18560
+	ldr	r2, [r4, #1264]
18561
+	ldr	r3, [r4, #1268]
18562
+	ldr	r0, .L2837+20
18563
+	ldr	r1, [r2, #4]
18265
18564
 	str	r1, [sp, #16]
18266
-	mov	r1, r4
18267
-	ldr	r2, [r2, #1252]
18565
+	mov	r1, r5
18566
+	ldr	r2, [r2]
18567
+	str	r2, [sp, #12]
18568
+	ldr	r2, [r3, #12]
18569
+	str	r2, [sp, #8]
18570
+	ldr	r2, [r3, #8]
18571
+	str	r2, [sp, #4]
18572
+	ldr	r2, [r3, #4]
18573
+	str	r2, [sp]
18574
+	ldr	r2, [r4, #1260]
18268
18575
 	ldr	r3, [r3]
18269
18576
 	bl	printk
18270
-.L2930:
18271
-	adds	r4, r4, #1
18272
-	b	.L2927
18273
-.L2940:
18274
-	add	sp, sp, #36
18275
-	@ sp needed
18276
-	pop	{r4, r5, r6, r7, pc}
18277
-.L2942:
18577
+.L2827:
18578
+	adds	r5, r5, #1
18579
+	b	.L2824
18580
+.L2838:
18278
18581
 	.align	2
18279
-.L2941:
18280
-	.word	.LC146
18281
-	.word	.LANCHOR0
18582
+.L2837:
18282
18583
 	.word	.LANCHOR4
18584
+	.word	.LANCHOR0
18585
+	.word	.LC146
18283
18586
 	.word	.LC147
18284
18587
 	.word	.LANCHOR2
18285
-	.word	.LANCHOR4+1248
18286
18588
 	.word	.LC148
18287
18589
 	.fnend
18288
18590
 	.size	Ftlscanalldata, .-Ftlscanalldata
18289
18591
 	.align	1
18290
18592
 	.global	FtlReUsePrevPpa
18593
+	.syntax unified
18291
18594
 	.thumb
18292
18595
 	.thumb_func
18596
+	.fpu softvfp
18293
18597
 	.type	FtlReUsePrevPpa, %function
18294
18598
 FtlReUsePrevPpa:
18295
18599
 	.fnstart
..
..
@@ -18299,911 +18603,907 @@
18299
18603
 	.save {r4, r5, r6, r7, lr}
18300
18604
 	.pad #12
18301
18605
 	mov	r6, r0
18606
+	ldr	r5, .L2848
18302
18607
 	ubfx	r0, r1, #10, #16
18303
18608
 	str	r1, [sp, #4]
18304
18609
 	bl	P2V_block_in_plane
18305
-	ldr	r5, .L2952
18306
-	ldr	r4, [r5, #296]
18307
-	ldrh	r3, [r4, r0, lsl #1]
18308
-	cbnz	r3, .L2944
18309
-	ldr	r4, [r5, #308]
18310
-	cbz	r4, .L2945
18311
-	ldr	r1, [r5, #288]
18312
-	mov	lr, #6
18313
-	ldr	r2, .L2952+4
18314
-	movw	ip, #65535
18610
+	ldr	r2, [r5, #300]
18611
+	ldrh	r3, [r2, r0, lsl #1]
18612
+	cbnz	r3, .L2840
18613
+	ldr	r4, [r5, #312]
18614
+	cbz	r4, .L2841
18615
+	ldr	r1, [r5, #292]
18616
+	mov	ip, #6
18617
+	ldr	r2, .L2848+4
18618
+	movw	lr, #65535
18619
+	ldrh	r7, [r5, #316]
18315
18620
 	subs	r4, r4, r1
18316
-	ldrh	r7, [r5, #312]
18317
18621
 	asrs	r4, r4, #1
18318
18622
 	muls	r4, r2, r4
18319
18623
 	uxth	r4, r4
18320
-.L2946:
18624
+.L2842:
18321
18625
 	uxth	r2, r3
18322
-	cmp	r2, r7
18323
-	bcs	.L2945
18626
+	cmp	r7, r2
18627
+	bls	.L2841
18324
18628
 	cmp	r4, r0
18325
-	bne	.L2947
18629
+	bne	.L2843
18326
18630
 	mov	r1, r4
18327
-	ldr	r0, .L2952+8
18631
+	ldr	r0, .L2848+8
18328
18632
 	bl	List_remove_node
18329
-	ldrh	r3, [r5, #312]
18633
+	ldrh	r3, [r5, #316]
18330
18634
 	mov	r0, r4
18331
18635
 	subs	r3, r3, #1
18332
-	strh	r3, [r5, #312]	@ movhi
18636
+	strh	r3, [r5, #316]	@ movhi
18333
18637
 	bl	INSERT_DATA_LIST
18334
-	ldr	r2, [r5, #296]
18638
+	ldr	r2, [r5, #300]
18335
18639
 	ldrh	r3, [r2, r4, lsl #1]
18336
18640
 	adds	r3, r3, #1
18337
18641
 	strh	r3, [r2, r4, lsl #1]	@ movhi
18338
-	b	.L2945
18339
-.L2947:
18340
-	mul	r4, lr, r4
18341
-	adds	r3, r3, #1
18342
-	ldrh	r4, [r1, r4]
18343
-	cmp	r4, ip
18344
-	bne	.L2946
18345
-	b	.L2945
18346
-.L2944:
18347
-	adds	r3, r3, #1
18348
-	strh	r3, [r4, r0, lsl #1]	@ movhi
18349
-.L2945:
18350
-	mov	r0, r6
18351
-	add	r1, sp, #4
18642
+.L2841:
18352
18643
 	movs	r2, #1
18644
+	add	r1, sp, #4
18645
+	mov	r0, r6
18353
18646
 	bl	log2phys
18354
18647
 	add	sp, sp, #12
18355
18648
 	@ sp needed
18356
18649
 	pop	{r4, r5, r6, r7, pc}
18357
-.L2953:
18650
+.L2843:
18651
+	mul	r4, ip, r4
18652
+	adds	r3, r3, #1
18653
+	ldrh	r4, [r1, r4]
18654
+	cmp	r4, lr
18655
+	bne	.L2842
18656
+	b	.L2841
18657
+.L2840:
18658
+	adds	r3, r3, #1
18659
+	strh	r3, [r2, r0, lsl #1]	@ movhi
18660
+	b	.L2841
18661
+.L2849:
18358
18662
 	.align	2
18359
-.L2952:
18663
+.L2848:
18360
18664
 	.word	.LANCHOR2
18361
18665
 	.word	-1431655765
18362
-	.word	.LANCHOR2+308
18666
+	.word	.LANCHOR2+312
18363
18667
 	.fnend
18364
18668
 	.size	FtlReUsePrevPpa, .-FtlReUsePrevPpa
18365
18669
 	.align	1
18366
18670
 	.global	FtlRecoverySuperblock
18671
+	.syntax unified
18367
18672
 	.thumb
18368
18673
 	.thumb_func
18674
+	.fpu softvfp
18369
18675
 	.type	FtlRecoverySuperblock, %function
18370
18676
 FtlRecoverySuperblock:
18371
18677
 	.fnstart
18372
-	@ args = 0, pretend = 0, frame = 64
18678
+	@ args = 0, pretend = 0, frame = 56
18373
18679
 	@ frame_needed = 0, uses_anonymous_args = 0
18374
18680
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
18375
18681
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
18376
-	movw	r7, #65535
18682
+	movw	r2, #65535
18377
18683
 	ldrh	r3, [r0]
18378
-	.pad #68
18379
-	sub	sp, sp, #68
18684
+	.pad #60
18685
+	sub	sp, sp, #60
18380
18686
 	mov	r4, r0
18381
-	cmp	r3, r7
18382
-	beq	.L3101
18383
-	ldrh	r3, [r0, #2]
18384
-	movs	r5, #0
18385
-	ldr	r6, .L3117
18386
-	str	r3, [sp, #12]
18387
-	ldrb	r3, [r0, #6]	@ zero_extendqisi2
18388
-	ldr	r2, [sp, #12]
18389
-	str	r3, [sp, #28]
18390
-	ldrh	r3, [r6, #2388]
18391
18687
 	cmp	r3, r2
18392
-	bne	.L2957
18393
-	strh	r5, [r0, #4]	@ movhi
18394
-	strb	r5, [r0, #6]
18395
-	b	.L3101
18396
-.L2957:
18688
+	beq	.L2999
18689
+	ldrh	r3, [r0, #2]
18690
+	ldr	r6, .L3009
18691
+	str	r3, [sp, #8]
18692
+	ldr	r1, [sp, #8]
18693
+	ldrh	r3, [r6, #2390]
18694
+	cmp	r3, r1
18695
+	mov	r3, #0
18696
+	bne	.L2853
18697
+	strh	r3, [r0, #4]	@ movhi
18698
+.L3007:
18699
+	strb	r3, [r4, #6]
18700
+.L2999:
18701
+	movs	r0, #0
18702
+	add	sp, sp, #60
18703
+	@ sp needed
18704
+	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
18705
+.L2853:
18397
18706
 	ldrh	r0, [r0, #16]
18398
-.L2958:
18399
-	cmp	r0, r7
18400
-	add	r5, r5, #1
18401
-	bne	.L3112
18402
-	uxth	r3, r5
18403
-	adds	r3, r3, #8
18404
-	ldrh	r0, [r4, r3, lsl #1]
18405
-	b	.L2958
18406
-.L3112:
18707
+.L2854:
18708
+	cmp	r0, r2
18709
+	add	r3, r3, #1
18710
+	beq	.L2855
18407
18711
 	ldrb	r1, [r4, #8]	@ zero_extendqisi2
18712
+	ldrb	r3, [r4, #6]	@ zero_extendqisi2
18408
18713
 	cmp	r1, #1
18409
-	bne	.L2960
18714
+	str	r3, [sp, #20]
18715
+	bne	.L2856
18410
18716
 	bl	FtlGetLastWrittenPage
18411
-	adds	r2, r0, #1
18717
+	adds	r7, r0, #1
18412
18718
 	mov	r5, r0
18413
-	beq	.L2961
18414
-	ldrb	r3, [r6, #144]	@ zero_extendqisi2
18415
-	cbnz	r3, .L3103
18416
-	ldr	r3, .L3117
18417
-	add	r3, r3, r0, lsl #1
18418
-	ldrh	r7, [r3, #148]
18419
-	b	.L3035
18420
-.L2960:
18719
+	beq	.L2857
18720
+	ldrb	r3, [r6, #152]	@ zero_extendqisi2
18721
+	cmp	r3, #0
18722
+	bne	.L2931
18723
+	add	r3, r6, r0, lsl #1
18724
+	ldrh	r7, [r3, #156]
18725
+.L2858:
18726
+	ldr	r3, .L3009+4
18727
+	movs	r2, #0
18728
+	ldrh	ip, [r6, #2324]
18729
+	movw	r9, #65535
18730
+	mov	r10, #36
18731
+	mov	fp, r2
18732
+	ldr	r0, [r3, #3304]
18733
+	ldr	r8, [r3, #1148]
18734
+	ldrh	r3, [r6, #2402]
18735
+	mov	r6, r2
18736
+	str	r3, [sp, #4]
18737
+	add	r3, r4, #16
18738
+	mov	lr, r3
18739
+	str	r3, [sp, #16]
18740
+.L2859:
18741
+	uxth	r3, r2
18742
+	cmp	ip, r3
18743
+	bhi	.L2862
18744
+	ldrb	r3, [r4, #8]	@ zero_extendqisi2
18745
+	cmp	r3, #1
18746
+	bne	.L2932
18747
+	ldr	r3, .L3009
18748
+	ldrb	r3, [r3, #152]	@ zero_extendqisi2
18749
+	adds	r3, r3, #0
18750
+	it	ne
18751
+	movne	r3, #1
18752
+.L3000:
18753
+	str	r3, [sp, #24]
18754
+	mov	r1, r6
18755
+	ldr	r2, [sp, #24]
18756
+	mov	r9, #0
18757
+	bl	FlashReadPages
18758
+	ldr	r3, .L3009+4
18759
+	ldr	r2, [r3, #512]
18760
+	mov	r8, r3
18761
+	mov	fp, r3
18762
+	add	r10, r2, #-1
18763
+	movw	r2, #65535
18764
+	str	r2, [sp, #12]
18765
+.L2864:
18766
+	uxth	r3, r9
18767
+	cmp	r6, r3
18768
+	bhi	.L2869
18769
+	bne	.L2867
18770
+	ldr	r3, [r8, #3304]
18771
+	adds	r5, r5, #1
18772
+	uxth	fp, r5
18773
+	ldr	r0, [r3, #4]
18774
+.L3001:
18775
+	ubfx	r0, r0, #10, #16
18776
+	bl	P2V_plane
18777
+	ldrb	r2, [r4, #8]	@ zero_extendqisi2
18778
+	str	r0, [sp, #4]
18779
+	ldr	r3, .L3009
18780
+	cmp	r2, #1
18781
+	bne	.L2871
18782
+	ldrb	r1, [r3, #152]	@ zero_extendqisi2
18783
+	cbnz	r1, .L2871
18784
+	add	r5, r3, fp, lsl #1
18785
+	ldrh	fp, [r5, #156]
18786
+.L2871:
18787
+	ldrh	r3, [r3, #2390]
18788
+	cmp	r3, fp
18789
+	itttt	eq
18790
+	moveq	r3, #0
18791
+	strheq	fp, [r4, #2]	@ movhi
18792
+	strbeq	r3, [r4, #6]
18793
+	strheq	r3, [r4, #4]	@ movhi
18794
+	ldrh	r3, [sp, #20]
18795
+	str	r3, [sp, #28]
18796
+	ldr	r3, [sp, #8]
18797
+	cmp	fp, r3
18798
+	bne	.L2873
18799
+	ldr	r3, [sp, #4]
18800
+	ldr	r1, [sp, #28]
18801
+	cmp	r3, r1
18802
+	bne	.L2873
18803
+	mov	r2, r3
18804
+.L3008:
18805
+	mov	r1, fp
18806
+	mov	r0, r4
18807
+	bl	ftl_sb_update_avl_pages
18808
+	b	.L2999
18809
+.L2855:
18810
+	uxth	r1, r3
18811
+	adds	r1, r1, #8
18812
+	ldrh	r0, [r4, r1, lsl #1]
18813
+	b	.L2854
18814
+.L2856:
18421
18815
 	movs	r1, #0
18422
18816
 	bl	FtlGetLastWrittenPage
18423
-	adds	r3, r0, #1
18424
18817
 	mov	r5, r0
18425
-	beq	.L2961
18426
-.L3103:
18818
+	adds	r0, r0, #1
18819
+	beq	.L2857
18820
+.L2931:
18427
18821
 	mov	r7, r5
18428
-.L3035:
18429
-	ldr	r3, .L3117+4
18430
-	movw	r9, #65535
18431
-	ldrh	ip, [r6, #2320]
18432
-	mov	r10, #36
18433
-	ldrh	r0, [r6, #2400]
18434
-	ldr	r2, [r3, #3304]
18435
-	ldr	r8, [r3, #1148]
18436
-	add	r3, r4, #14
18437
-	str	r3, [sp, #20]
18438
-	str	r2, [sp, #4]
18439
-	movs	r2, #0
18440
-	mov	lr, r3
18441
-	mov	r6, r2
18442
-	mov	fp, r2
18443
-	b	.L2963
18444
-.L2961:
18822
+	b	.L2858
18823
+.L2857:
18445
18824
 	movs	r3, #0
18446
18825
 	strh	r3, [r4, #2]	@ movhi
18447
-	strb	r3, [r4, #6]
18448
-	b	.L3101
18449
-.L2966:
18450
-	ldrh	r3, [lr, #2]!
18826
+	b	.L3007
18827
+.L2862:
18828
+	ldrh	r3, [lr], #2
18451
18829
 	cmp	r3, r9
18452
-	beq	.L2964
18453
-	ldr	r1, [sp, #4]
18830
+	beq	.L2860
18831
+	mla	r1, r10, r6, r0
18454
18832
 	orr	r3, r7, r3, lsl #10
18455
-	mla	r1, r10, r6, r1
18456
18833
 	str	r3, [r1, #4]
18457
-	mov	r3, r0
18834
+	ldr	r3, [sp, #4]
18458
18835
 	muls	r3, r6, r3
18459
18836
 	add	r6, r6, #1
18460
18837
 	it	mi
18461
18838
 	addmi	r3, r3, #3
18462
-	str	fp, [r1, #8]
18463
18839
 	uxth	r6, r6
18464
18840
 	bic	r3, r3, #3
18465
18841
 	add	r3, r3, r8
18842
+	str	fp, [r1, #8]
18466
18843
 	str	r3, [r1, #12]
18467
-.L2964:
18844
+.L2860:
18468
18845
 	adds	r2, r2, #1
18469
-.L2963:
18470
-	uxth	r3, r2
18471
-	cmp	r3, ip
18472
-	bcc	.L2966
18473
-	ldrb	r3, [r4, #8]	@ zero_extendqisi2
18474
-	cmp	r3, #1
18475
-	bne	.L3037
18476
-	ldr	r3, .L3117
18477
-	ldrb	r1, [r3, #144]	@ zero_extendqisi2
18478
-	adds	r3, r1, #0
18479
-	it	ne
18480
-	movne	r3, #1
18481
-	b	.L3104
18482
-.L3037:
18846
+	b	.L2859
18847
+.L2932:
18483
18848
 	movs	r3, #0
18484
-.L3104:
18485
-	ldr	r8, .L3117+4
18486
-	mov	r1, r6
18487
-	str	r3, [sp, #24]
18488
-	mov	fp, #0
18489
-	ldr	r2, [sp, #24]
18490
-	ldr	r0, [r8, #3304]
18491
-	bl	FlashReadPages
18492
-	ldr	r3, [r8, #512]
18493
-	subs	r3, r3, #1
18494
-	str	r8, [sp, #8]
18495
-	str	r3, [sp, #4]
18496
-	movw	r3, #65535
18497
-	str	r3, [sp, #16]
18498
-.L2968:
18499
-	uxth	r9, fp
18500
-	cmp	r9, r6
18501
-	bcs	.L2975
18502
-	movs	r1, #36
18503
-	ldr	r0, [r8, #3304]
18504
-	mul	r1, r1, fp
18505
-	add	lr, r0, r1
18506
-	ldr	r1, [r0, r1]
18507
-	cbnz	r1, .L2969
18508
-	ldr	r3, [lr, #12]
18509
-	ldr	r10, [r3, #4]
18510
-	cmp	r10, #-1
18511
-	beq	.L2970
18512
-	mov	r0, r10
18513
-	ldr	r1, [r8, #512]
18514
-	str	r3, [sp, #32]
18849
+	b	.L3000
18850
+.L2869:
18851
+	movs	r3, #36
18852
+	ldr	r1, [fp, #3304]
18853
+	mul	r3, r3, r9
18854
+	adds	r2, r1, r3
18855
+	ldr	r3, [r1, r3]
18856
+	cbnz	r3, .L2865
18857
+	ldr	r2, [r2, #12]
18858
+	ldr	r3, [r2, #4]
18859
+	adds	r1, r3, #1
18860
+	beq	.L2866
18861
+	ldr	r1, [fp, #512]
18862
+	mov	r0, r3
18515
18863
 	bl	ftl_cmp_data_ver
18516
-	ldr	r3, [sp, #32]
18517
-	cbz	r0, .L2970
18518
-	add	r1, r10, #1
18519
-	str	r1, [r8, #512]
18520
-.L2970:
18521
-	ldr	r1, [r3]
18522
-	adds	r1, r1, #1
18523
-	bne	.L2971
18524
-.L2975:
18525
-	cmp	r9, r6
18526
-	ldr	r6, .L3117+4
18527
-	bne	.L3102
18528
-	ldr	r3, [r6, #3304]
18529
-	adds	r5, r5, #1
18530
-	uxth	r10, r5
18531
-	ldr	r0, [r3, #4]
18532
-	b	.L3105
18533
-.L2969:
18534
-	ldr	r1, [lr, #4]
18535
-	ldr	r0, .L3117+8
18536
-	bl	printk
18537
-	uxth	r3, r7
18538
-	ldrh	r1, [r4]
18539
-	str	r3, [sp, #16]
18540
-	ldr	r3, .L3117+12
18541
-	strh	r1, [r3, #840]	@ movhi
18542
-.L2971:
18543
-	add	fp, fp, #1
18544
-	b	.L2968
18545
-.L3102:
18546
-	ldr	r3, [sp, #8]
18864
+	cbz	r0, .L2866
18865
+	adds	r3, r3, #1
18866
+	str	r3, [fp, #512]
18867
+.L2866:
18868
+	ldr	r3, [r2]
18869
+	adds	r3, r3, #1
18870
+	bne	.L2868
18871
+.L2867:
18872
+	ldr	r3, [r8, #3304]
18873
+	uxth	r9, r9
18547
18874
 	movs	r2, #36
18548
-	uxth	r10, r5
18549
-	ldr	r3, [r3, #3304]
18875
+	uxth	fp, r5
18550
18876
 	mla	r9, r2, r9, r3
18551
18877
 	ldr	r0, [r9, #4]
18552
-.L3105:
18553
-	ubfx	r0, r0, #10, #16
18554
-	bl	P2V_plane
18555
-	ldrb	r5, [r4, #8]	@ zero_extendqisi2
18556
-	ldr	r2, .L3117
18557
-	cmp	r5, #1
18558
-	str	r0, [sp, #8]
18559
-	bne	.L2977
18560
-	ldrb	r3, [r2, #144]	@ zero_extendqisi2
18561
-	cbnz	r3, .L2977
18562
-	add	r3, r2, r10, lsl #1
18563
-	ldrh	r10, [r3, #148]
18564
-.L2977:
18565
-	ldrh	r3, [r2, #2388]
18566
-	cmp	r3, r10
18567
-	itttt	eq
18568
-	strheq	r10, [r4, #2]	@ movhi
18569
-	moveq	r3, #0
18570
-	strbeq	r3, [r4, #6]
18571
-	strheq	r3, [r4, #4]	@ movhi
18572
-	ldrh	r3, [sp, #28]
18573
-	str	r3, [sp, #32]
18574
-	ldr	r3, [sp, #12]
18575
-	cmp	r10, r3
18576
-	bne	.L2979
18577
-	ldr	r3, [sp, #8]
18578
-	ldr	r2, [sp, #32]
18579
-	cmp	r3, r2
18580
-	bne	.L2979
18581
-	mov	r0, r4
18582
-	mov	r1, r10
18583
-	mov	r2, r3
18584
-	b	.L3110
18585
-.L2979:
18586
-	ldr	r2, [sp, #16]
18878
+	b	.L3001
18879
+.L2865:
18880
+	ldr	r1, [r2, #4]
18881
+	ldr	r0, .L3009+8
18882
+	bl	printk
18883
+	uxth	r3, r7
18884
+	ldr	r2, .L3009+12
18885
+	str	r3, [sp, #12]
18886
+	ldrh	r3, [r4]
18887
+	strh	r3, [r2, #1342]	@ movhi
18888
+.L2868:
18889
+	add	r9, r9, #1
18890
+	b	.L2864
18891
+.L2873:
18892
+	ldr	r1, [sp, #12]
18587
18893
 	movw	r3, #65535
18588
-	cmp	r2, r3
18589
-	bne	.L2980
18590
-	cmp	r5, #0
18591
-	bne	.L2981
18592
-.L2980:
18593
-	ldr	r3, [r6, #3472]
18594
-	uxth	fp, r7
18894
+	cmp	r1, r3
18895
+	bne	.L2874
18896
+	cmp	r2, #0
18897
+	bne	.L2875
18898
+.L2874:
18899
+	uxth	r3, r7
18900
+	uxth	r7, r7
18901
+	str	r3, [sp, #20]
18595
18902
 	mov	r9, #-1
18596
-	ldr	r7, .L3117+4
18903
+	ldr	r3, [r8, #3472]
18597
18904
 	adds	r3, r3, #1
18905
+	it	eq
18906
+	streq	r10, [r8, #3472]
18907
+	ldr	r3, [r8, #3472]
18598
18908
 	mov	r8, r9
18599
-	ittt	eq
18600
-	ldreq	r3, .L3117+4
18601
-	ldreq	r2, [sp, #4]
18602
-	streq	r2, [r3, #3472]
18603
-	ldr	r3, [r6, #3472]
18604
-	str	r3, [sp, #16]
18605
-	ldr	r3, [sp, #12]
18909
+	str	r3, [sp, #32]
18910
+	ldr	r3, [sp, #8]
18606
18911
 	adds	r3, r3, #7
18607
-	cmp	fp, r3
18608
-	itet	gt
18609
-	subgt	r5, fp, #7
18610
-	ldrle	r5, [sp, #12]
18912
+	cmp	r7, r3
18913
+	ldr	r7, .L3009+4
18914
+	itett	gt
18915
+	ldrgt	r3, [sp, #20]
18916
+	ldrle	r5, [sp, #8]
18917
+	subgt	r5, r3, #7
18611
18918
 	uxthgt	r5, r5
18612
-.L2984:
18613
-	cmp	r5, fp
18614
-	bhi	.L2997
18615
-	ldr	r3, .L3117
18616
-	ldr	r1, [sp, #20]
18617
-	ldrh	ip, [r3, #2320]
18618
-	ldr	r3, [r7, #3304]
18619
-	str	r3, [sp, #28]
18919
+.L2878:
18920
+	ldr	r3, [sp, #20]
18921
+	cmp	r5, r3
18922
+	bhi	.L2891
18923
+	ldr	r3, .L3009
18924
+	movw	lr, #65535
18925
+	ldr	r0, [r7, #3304]
18926
+	mov	ip, #36
18927
+	ldrh	r3, [r3, #2324]
18928
+	str	r3, [sp, #36]
18929
+	ldr	r3, [sp, #16]
18930
+	str	r3, [sp, #12]
18620
18931
 	movs	r3, #0
18621
18932
 	mov	r6, r3
18622
-.L2998:
18623
-	uxth	r2, r3
18624
-	cmp	r2, ip
18625
-	bcs	.L3113
18626
-	ldrh	r2, [r1, #2]!
18627
-	movw	r0, #65535
18628
-	cmp	r2, r0
18629
-	beq	.L2985
18630
-	ldr	r0, [sp, #28]
18631
-	mov	lr, #36
18632
-	orr	r2, r5, r2, lsl #10
18633
-	mla	r0, lr, r6, r0
18933
+	b	.L2892
18934
+.L2880:
18935
+	ldr	r1, [sp, #12]
18936
+	ldrh	r2, [r1], #2
18937
+	cmp	r2, lr
18938
+	str	r1, [sp, #12]
18939
+	beq	.L2879
18940
+	mla	r1, ip, r6, r0
18634
18941
 	adds	r6, r6, #1
18942
+	orr	r2, r5, r2, lsl #10
18635
18943
 	uxth	r6, r6
18636
-	str	r2, [r0, #4]
18637
-.L2985:
18944
+	str	r2, [r1, #4]
18945
+.L2879:
18638
18946
 	adds	r3, r3, #1
18639
-	b	.L2998
18640
-.L3113:
18947
+.L2892:
18948
+	ldr	r1, [sp, #36]
18949
+	uxth	r2, r3
18950
+	cmp	r2, r1
18951
+	bcc	.L2880
18641
18952
 	mov	r1, r6
18642
18953
 	ldr	r2, [sp, #24]
18643
-	ldr	r0, [r7, #3304]
18644
18954
 	bl	FlashReadPages
18645
-	ldr	r3, .L3117
18955
+	ldr	r3, .L3009
18646
18956
 	movs	r2, #36
18647
-	add	lr, r7, r5, lsl #1
18957
+	add	ip, r7, r5, lsl #1
18648
18958
 	movw	r1, #65535
18649
-	ldrb	r0, [r3, #144]	@ zero_extendqisi2
18959
+	ldrb	r0, [r3, #152]	@ zero_extendqisi2
18650
18960
 	ldr	r3, [r7, #3304]
18651
18961
 	mla	r6, r2, r6, r3
18652
-.L2987:
18653
-	cmp	r3, r6
18654
-	beq	.L3114
18962
+.L2881:
18963
+	cmp	r6, r3
18964
+	bne	.L2890
18965
+	adds	r5, r5, #1
18966
+	uxth	r5, r5
18967
+	b	.L2878
18968
+.L2890:
18655
18969
 	ldr	r2, [r3]
18656
-	cbnz	r2, .L2988
18970
+	cbnz	r2, .L2882
18657
18971
 	ldr	r2, [r3, #12]
18658
-	ldrh	ip, [r2]
18659
-	cmp	ip, r1
18660
-	beq	.L2989
18972
+	ldrh	lr, [r2]
18973
+	cmp	lr, r1
18974
+	beq	.L2883
18661
18975
 	ldr	r2, [r2, #4]
18662
18976
 	cmp	r2, #-1
18663
-	beq	.L2989
18977
+	beq	.L2883
18664
18978
 	cmp	r9, #-1
18665
18979
 	ldr	r8, [r7, #3472]
18666
18980
 	str	r2, [r7, #3472]
18667
-	bne	.L2989
18668
-	ldrh	r2, [lr, #1220]
18981
+	bne	.L2883
18982
+	ldrh	r2, [ip, #1220]
18669
18983
 	cmp	r2, r1
18670
-	bne	.L2990
18671
-	cmp	r0, #0
18672
-	beq	.L2989
18673
-.L2990:
18674
-	ldr	r2, [sp, #4]
18675
-	cmp	r8, r2
18676
-	ite	ne
18984
+	bne	.L2884
18985
+	cbz	r0, .L2883
18986
+.L2884:
18987
+	cmp	r10, r8
18988
+	it	ne
18677
18989
 	movne	r9, r8
18678
-	moveq	r9, #-1
18679
-	b	.L2989
18680
-.L3118:
18990
+.L2883:
18991
+	adds	r3, r3, #36
18992
+	b	.L2881
18993
+.L3010:
18681
18994
 	.align	2
18682
-.L3117:
18995
+.L3009:
18683
18996
 	.word	.LANCHOR0
18684
18997
 	.word	.LANCHOR2
18685
18998
 	.word	.LC149
18686
-	.word	.LANCHOR5
18687
-.L2988:
18688
-	ldr	r3, .L3119
18999
+	.word	.LANCHOR4
19000
+.L2882:
19001
+	ldr	r3, .L3011
18689
19002
 	ldrh	r2, [r4]
18690
-	strh	r2, [r3, #840]	@ movhi
19003
+	strh	r2, [r3, #1342]	@ movhi
18691
19004
 	ldrb	r3, [r4, #8]	@ zero_extendqisi2
18692
-	cbnz	r3, .L2981
18693
-	ldr	r3, .L3119+4
19005
+	cbnz	r3, .L2875
19006
+	ldr	r3, .L3011+4
18694
19007
 	movw	r2, #65535
18695
19008
 	add	r5, r3, r5, lsl #1
18696
19009
 	ldrh	r1, [r5, #1220]
18697
19010
 	cmp	r1, r2
18698
-	bne	.L2992
19011
+	bne	.L2886
18699
19012
 	cmp	r9, #-1
18700
-	beq	.L2993
19013
+	beq	.L2887
18701
19014
 	str	r9, [r3, #3472]
18702
-	b	.L2981
18703
-.L2993:
18704
-	ldr	r2, [sp, #16]
18705
-	ldr	r1, [sp, #4]
18706
-	cmp	r2, r1
18707
-	bne	.L3106
18708
-	ldr	r2, [r3, #3472]
18709
-	b	.L3111
18710
-.L2992:
18711
-	ldr	r2, [sp, #4]
18712
-	cmp	r8, r2
18713
-	beq	.L2995
18714
-	cmp	r8, #-1
18715
-	beq	.L2981
18716
-	str	r8, [r3, #3472]
18717
-	b	.L2981
18718
-.L2995:
18719
-	ldr	r2, [r3, #3472]
18720
-	ldr	r1, [sp, #4]
18721
-	cmp	r2, r1
18722
-	beq	.L2981
18723
-.L3111:
18724
-	subs	r2, r2, #1
18725
-	b	.L3106
18726
-.L2989:
18727
-	adds	r3, r3, #36
18728
-	b	.L2987
18729
-.L3114:
18730
-	adds	r5, r5, #1
18731
-	uxth	r5, r5
18732
-	b	.L2984
18733
-.L2997:
18734
-	ldr	r3, .L3119+4
18735
-	mov	r2, #-1
18736
-.L3106:
18737
-	str	r2, [r3, #3472]
18738
-.L2981:
18739
-	ldr	r3, .L3119
19015
+.L2875:
19016
+	ldr	r6, [sp, #8]
18740
19017
 	movs	r2, #1
18741
-	ldr	fp, [sp, #12]
18742
-	ldr	r5, .L3119+4
18743
-	strh	r2, [r3, #842]	@ movhi
18744
-.L2999:
18745
-	ldr	r3, .L3119+8
18746
-	movw	r9, #65535
18747
-	ldr	r1, [r5, #3304]
18748
-	movs	r6, #0
18749
-	ldr	r7, [sp, #20]
18750
-	ldrh	r8, [r3, #2320]
18751
-	ldrb	r0, [r3, #144]	@ zero_extendqisi2
18752
-	str	r6, [sp, #16]
18753
-.L3000:
18754
-	uxth	r3, r6
18755
-	cmp	r3, r8
18756
-	bcs	.L3115
18757
-	ldrh	r3, [r7, #2]!
18758
-	cmp	r3, r9
18759
-	beq	.L3001
18760
-	ldr	r2, [sp, #16]
18761
-	mov	lr, #36
18762
-	orr	r3, fp, r3, lsl #10
18763
-	mla	r2, lr, r2, r1
18764
-	str	r3, [r2, #4]
18765
-	ldrb	lr, [r4, #8]	@ zero_extendqisi2
18766
-	cmp	lr, #1
18767
-	bne	.L3002
18768
-	cbz	r0, .L3002
18769
-	orr	r3, r3, #-2147483648
18770
-	str	r3, [r2, #4]
18771
-.L3002:
18772
-	ldr	r3, [sp, #16]
18773
-	add	ip, r3, #1
18774
-	uxth	r3, ip
18775
-	str	r3, [sp, #16]
18776
-.L3001:
18777
-	adds	r6, r6, #1
18778
-	b	.L3000
18779
-.L3115:
19018
+	ldr	r5, .L3011+4
19019
+	ldr	r3, .L3011
19020
+	strh	r2, [r3, #1344]	@ movhi
19021
+.L2893:
19022
+	ldr	r3, .L3011+8
19023
+	movw	r8, #65535
18780
19024
 	ldr	r0, [r5, #3304]
18781
-	ldr	r1, [sp, #16]
19025
+	mov	r9, #36
19026
+	movs	r2, #0
19027
+	ldrh	ip, [r3, #2324]
19028
+	ldrb	r3, [r3, #152]	@ zero_extendqisi2
19029
+	str	r2, [sp, #12]
19030
+	mov	r1, r3
19031
+	ldr	r3, [sp, #16]
19032
+	str	r3, [sp, #20]
19033
+.L2894:
19034
+	uxth	r3, r2
19035
+	cmp	ip, r3
19036
+	bhi	.L2897
18782
19037
 	ldr	r2, [sp, #24]
19038
+	ldr	r1, [sp, #12]
18783
19039
 	bl	FlashReadPages
18784
19040
 	movs	r3, #0
18785
-.L3109:
18786
-	str	r3, [sp, #28]
18787
-	ldr	r2, [sp, #16]
18788
-	ldrh	r3, [sp, #28]
18789
-	cmp	r3, r2
18790
-	bcs	.L3116
18791
-	ldr	r3, [sp, #28]
18792
-	movs	r6, #36
18793
-	ldr	r9, [r5, #3304]
18794
-	muls	r6, r3, r6
18795
-	add	r8, r9, r6
18796
-	ldr	r7, [r8, #4]
18797
-	ubfx	r0, r7, #10, #16
18798
-	str	r7, [sp, #60]
18799
-	bl	P2V_plane
18800
-	ldr	r3, [sp, #12]
18801
-	cmp	fp, r3
18802
-	bcc	.L3005
18803
-	bne	.L3006
18804
-	ldr	r3, [sp, #32]
18805
-	cmp	r0, r3
18806
-	bcc	.L3005
18807
19041
 .L3006:
18808
-	cmp	fp, r10
18809
-	bne	.L3007
18810
-	ldr	r3, [sp, #8]
18811
-	cmp	r0, r3
18812
-	beq	.L3008
18813
-.L3007:
18814
-	ldr	r3, [r9, r6]
18815
-	adds	r3, r3, #1
18816
-	beq	.L3009
18817
-	ldr	r8, [r8, #12]
18818
-	movw	r3, #61589
18819
-	ldrh	r2, [r8]
19042
+	str	r3, [sp, #20]
19043
+	ldr	r2, [sp, #12]
19044
+	ldrh	r3, [sp, #20]
18820
19045
 	cmp	r2, r3
18821
-	beq	.L3010
18822
-	ldrh	r0, [r4]
18823
-	b	.L3107
18824
-.L3010:
18825
-	ldr	r3, [r8, #4]
18826
-	adds	r7, r3, #1
18827
-	str	r3, [sp, #4]
18828
-	beq	.L3011
18829
-	mov	r0, r3
18830
-	ldr	r1, [r5, #512]
18831
-	bl	ftl_cmp_data_ver
18832
-	cbz	r0, .L3011
18833
-	ldr	r3, [sp, #4]
19046
+	bhi	.L2925
19047
+	ldrb	r3, [r4, #8]	@ zero_extendqisi2
19048
+	adds	r6, r6, #1
19049
+	uxth	r6, r6
19050
+	ldr	r2, .L3011+8
19051
+	cmp	r3, #1
19052
+	bne	.L2926
19053
+	ldrb	r3, [r2, #152]	@ zero_extendqisi2
19054
+	cbz	r3, .L2926
19055
+	ldrh	r3, [r2, #2392]
19056
+	cmp	r3, r6
19057
+	bne	.L2926
19058
+	cmp	fp, r6
19059
+	beq	.L2902
19060
+.L2926:
19061
+	ldrh	r3, [r2, #2390]
19062
+	cmp	r3, r6
19063
+	bne	.L2893
19064
+	ldrh	r2, [r2, #2324]
19065
+	movw	r0, #65535
19066
+	movs	r3, #0
19067
+	strh	r6, [r4, #2]	@ movhi
19068
+	strh	r3, [r4, #4]	@ movhi
19069
+.L2927:
19070
+	uxth	r1, r3
19071
+	cmp	r1, r2
19072
+	bcs	.L2999
19073
+	ldr	r1, [sp, #16]
19074
+	ldrh	r5, [r1], #2
19075
+	cmp	r5, r0
19076
+	str	r1, [sp, #16]
19077
+	add	r1, r3, #1
19078
+	bne	.L3007
19079
+	mov	r3, r1
19080
+	b	.L2927
19081
+.L2887:
19082
+	ldr	r2, [sp, #32]
19083
+	cmp	r10, r2
19084
+	beq	.L2888
19085
+.L3003:
19086
+	str	r2, [r3, #3472]
19087
+	b	.L2875
19088
+.L2888:
19089
+	ldr	r2, [r3, #3472]
19090
+.L3002:
19091
+	subs	r2, r2, #1
19092
+	b	.L3003
19093
+.L2886:
19094
+	cmp	r8, r10
19095
+	beq	.L2889
19096
+	cmp	r8, #-1
19097
+	beq	.L2875
19098
+	str	r8, [r3, #3472]
19099
+	b	.L2875
19100
+.L2889:
19101
+	ldr	r2, [r3, #3472]
19102
+	cmp	r10, r2
19103
+	bne	.L3002
19104
+	b	.L2875
19105
+.L2891:
19106
+	mov	r3, #-1
19107
+	str	r3, [r7, #3472]
19108
+	b	.L2875
19109
+.L2897:
19110
+	ldr	r7, [sp, #20]
19111
+	ldrh	r3, [r7], #2
19112
+	cmp	r3, r8
19113
+	str	r7, [sp, #20]
19114
+	beq	.L2895
19115
+	ldr	r7, [sp, #12]
19116
+	orr	r3, r6, r3, lsl #10
19117
+	mla	r7, r9, r7, r0
19118
+	str	r3, [r7, #4]
19119
+	ldrb	lr, [r4, #8]	@ zero_extendqisi2
19120
+	cmp	lr, #1
19121
+	bne	.L2896
19122
+	cbz	r1, .L2896
19123
+	orr	r3, r3, #-2147483648
19124
+	str	r3, [r7, #4]
19125
+.L2896:
19126
+	ldr	r3, [sp, #12]
18834
19127
 	adds	r3, r3, #1
18835
-	str	r3, [r5, #512]
18836
-.L3011:
18837
-	ldr	r7, [r8, #8]
18838
-	add	r1, sp, #56
18839
-	ldr	r3, [r8, #12]
19128
+	uxth	r3, r3
19129
+	str	r3, [sp, #12]
19130
+.L2895:
19131
+	adds	r2, r2, #1
19132
+	b	.L2894
19133
+.L2925:
19134
+	ldr	r3, [sp, #20]
19135
+	mov	r8, #36
19136
+	mul	r8, r8, r3
19137
+	ldr	r3, [r5, #3304]
19138
+	str	r3, [sp, #32]
19139
+	add	r9, r3, r8
19140
+	ldr	r7, [r9, #4]
19141
+	ubfx	r0, r7, #10, #16
19142
+	str	r7, [sp, #52]
19143
+	bl	P2V_plane
19144
+	ldr	r3, [sp, #8]
19145
+	cmp	r6, r3
19146
+	bcc	.L2899
19147
+	ldr	r3, [sp, #32]
19148
+	bne	.L2900
19149
+	ldr	r2, [sp, #28]
19150
+	cmp	r2, r0
19151
+	bhi	.L2899
19152
+.L2900:
19153
+	cmp	r6, fp
19154
+	bne	.L2901
19155
+	ldr	r2, [sp, #4]
19156
+	cmp	r2, r0
19157
+	beq	.L2902
19158
+.L2901:
19159
+	ldr	r3, [r3, r8]
19160
+	adds	r3, r3, #1
19161
+	beq	.L2903
19162
+	ldr	r3, [r9, #12]
19163
+	movw	r2, #61589
19164
+	ldrh	r1, [r3]
19165
+	cmp	r1, r2
19166
+	beq	.L2904
19167
+	ldrh	r0, [r4]
19168
+.L3004:
19169
+	bl	decrement_vpc_count
19170
+	b	.L2899
19171
+.L2904:
19172
+	ldr	r10, [r3, #4]
19173
+	cmp	r10, #-1
19174
+	beq	.L2905
19175
+	ldr	r1, [r5, #512]
19176
+	mov	r0, r10
19177
+	bl	ftl_cmp_data_ver
19178
+	cbz	r0, .L2905
19179
+	add	r2, r10, #1
19180
+	str	r2, [r5, #512]
19181
+.L2905:
19182
+	ldr	r7, [r3, #8]
19183
+	add	r1, sp, #48
19184
+	ldr	r3, [r3, #12]
18840
19185
 	movs	r2, #0
18841
19186
 	mov	r0, r7
18842
-	str	r3, [sp, #52]
19187
+	str	r3, [sp, #44]
18843
19188
 	bl	log2phys
18844
19189
 	ldr	r1, [r5, #3472]
18845
19190
 	adds	r0, r1, #1
18846
-	beq	.L3012
18847
-	ldr	r0, [sp, #4]
19191
+	beq	.L2906
19192
+	mov	r0, r10
18848
19193
 	bl	ftl_cmp_data_ver
18849
19194
 	cmp	r0, #0
18850
-	beq	.L3012
18851
-	ldr	r3, [sp, #52]
19195
+	beq	.L2906
19196
+	ldr	r3, [sp, #44]
18852
19197
 	adds	r2, r3, #1
18853
-	beq	.L3013
19198
+	beq	.L2907
18854
19199
 	ldr	r0, [r5, #3304]
18855
19200
 	movs	r2, #0
18856
19201
 	movs	r1, #1
18857
-	add	r0, r0, r6
19202
+	add	r0, r0, r8
18858
19203
 	str	r3, [r0, #4]
18859
19204
 	ldr	r9, [r0, #12]
18860
19205
 	bl	FlashReadPages
18861
19206
 	ldr	r2, [r5, #3304]
18862
-	ldr	r3, [r9, #4]
18863
-	add	ip, r2, r6
18864
-	str	r3, [sp, #36]
18865
-	ldr	r3, [r2, r6]
18866
-	adds	r3, r3, #1
18867
-	bne	.L3014
18868
-	b	.L3015
18869
-.L3013:
18870
-	ldr	r3, [sp, #60]
18871
-	ldr	r2, [sp, #56]
18872
-	cmp	r2, r3
18873
-	bne	.L3005
18874
-	mov	r0, r7
18875
-	add	r1, sp, #52
18876
-	movs	r2, #1
18877
-	bl	log2phys
18878
-	b	.L3005
18879
-.L3014:
18880
-	ldr	r8, [r9, #8]
18881
-	cmp	r8, r7
18882
-	bne	.L3015
18883
-	ldr	r0, [r5, #3472]
18884
-	ldr	r1, [sp, #36]
18885
-	str	r2, [sp, #44]
18886
-	str	ip, [sp, #40]
18887
-	bl	ftl_cmp_data_ver
18888
-	ldr	ip, [sp, #40]
18889
-	ldr	r2, [sp, #44]
18890
-	cbz	r0, .L3015
18891
-	ldr	r3, [sp, #56]
18892
-	ldr	r1, [sp, #60]
18893
-	cmp	r3, r1
18894
-	beq	.L3020
18895
-	ldr	r1, [sp, #52]
18896
-	cmp	r3, r1
18897
-	beq	.L3015
18898
-	adds	r7, r3, #1
18899
-	beq	.L3018
18900
-	str	r3, [ip, #4]
18901
-	mov	r0, ip
18902
-	movs	r1, #1
18903
-	movs	r2, #0
18904
-	ldr	r9, [ip, #12]
18905
-	bl	FlashReadPages
18906
-	b	.L3019
18907
-.L3018:
18908
-	str	r3, [r2, r6]
18909
-.L3019:
18910
-	ldr	r3, [r5, #3304]
18911
-	ldr	r3, [r3, r6]
18912
-	adds	r3, r3, #1
18913
-	beq	.L3020
18914
-	ldr	r6, [r9, #4]
18915
-	ldr	r0, [r5, #3472]
18916
-	mov	r1, r6
18917
-	bl	ftl_cmp_data_ver
18918
-	cbz	r0, .L3020
18919
-	ldr	r0, [sp, #36]
18920
-	mov	r1, r6
18921
-	bl	ftl_cmp_data_ver
18922
-	cbz	r0, .L3015
18923
-.L3020:
18924
-	mov	r0, r8
18925
-	ldr	r1, [sp, #52]
18926
-	bl	FtlReUsePrevPpa
18927
-.L3015:
19207
+	ldr	r1, [r2, r8]
19208
+	add	r3, r2, r8
19209
+	adds	r1, r1, #1
19210
+	bne	.L2908
19211
+.L2909:
18928
19212
 	mov	r3, #-1
18929
-	str	r3, [sp, #52]
18930
-	b	.L3022
18931
-.L3120:
18932
-	.align	2
18933
-.L3119:
18934
-	.word	.LANCHOR5
18935
-	.word	.LANCHOR2
18936
-	.word	.LANCHOR0
18937
-.L3012:
18938
-	ldr	r3, [sp, #60]
18939
-	ldr	r2, [sp, #56]
18940
-	cmp	r2, r3
18941
-	beq	.L3022
18942
-	ldr	r3, [sp, #52]
18943
-	adds	r0, r3, #1
18944
-	beq	.L3024
18945
-	ldr	r2, .L3121
18946
-	ubfx	r3, r3, #10, #21
18947
-	ldr	r2, [r2, #2336]
18948
-	cmp	r3, r2
18949
-	bcs	.L3005
18950
-.L3024:
18951
-	mov	r0, r7
18952
-	add	r1, sp, #60
18953
-	movs	r2, #1
18954
-	bl	log2phys
18955
-	ldr	r8, [sp, #56]
18956
-	cmp	r8, #-1
18957
-	beq	.L3022
18958
-	ldr	r3, [sp, #52]
18959
-	cmp	r8, r3
18960
-	beq	.L3022
18961
-	ubfx	r0, r8, #10, #16
18962
-	bl	P2V_block_in_plane
18963
-	ldrh	r3, [r5, #316]
18964
-	cmp	r3, r0
18965
-	beq	.L3026
18966
-	ldrh	r3, [r5, #364]
18967
-	cmp	r3, r0
18968
-	beq	.L3026
18969
-	ldrh	r3, [r5, #412]
18970
-	cmp	r3, r0
18971
-	bne	.L3022
18972
-.L3026:
18973
-	ldr	r3, .L3121+4
18974
-	movs	r1, #1
18975
-	movs	r2, #0
18976
-	ldr	r0, [r3, #3304]
18977
-	str	r8, [r0, #4]
18978
-	ldr	r6, [r0, #12]
18979
-	bl	FlashReadPages
18980
-	ldr	r3, .L3121+4
18981
-	ldr	r1, [r6, #4]
18982
-	ldr	r3, [r3, #3304]
18983
-	ldr	r3, [r3]
18984
-	adds	r3, r3, #1
18985
-	beq	.L3022
18986
-	ldr	r0, [sp, #4]
18987
-	bl	ftl_cmp_data_ver
18988
-	cbnz	r0, .L3022
18989
-	mov	r0, r7
18990
-	add	r1, sp, #56
18991
-	movs	r2, #1
18992
-	bl	log2phys
18993
-.L3022:
18994
-	ldr	r0, [sp, #52]
19213
+	str	r3, [sp, #44]
19214
+.L2916:
19215
+	ldr	r0, [sp, #44]
18995
19216
 	adds	r1, r0, #1
18996
-	beq	.L3005
19217
+	beq	.L2899
19218
+.L2930:
18997
19219
 	ubfx	r0, r0, #10, #16
18998
19220
 	bl	P2V_block_in_plane
18999
-	ldr	r3, [r5, #296]
19000
-	ldrh	r3, [r3, r0, lsl #1]
19221
+	ldr	r3, [r5, #300]
19001
19222
 	mov	r1, r0
19002
-	cbz	r3, .L3027
19003
-.L3107:
19004
-	bl	decrement_vpc_count
19005
-	b	.L3005
19006
-.L3027:
19007
-	ldr	r0, .L3121+8
19223
+	ldrh	r3, [r3, r0, lsl #1]
19224
+	cmp	r3, #0
19225
+	bne	.L3004
19226
+	ldr	r0, .L3011+12
19008
19227
 	bl	printk
19009
-	b	.L3005
19010
-.L3009:
19228
+	b	.L2899
19229
+.L2907:
19230
+	ldr	r3, [sp, #52]
19231
+	ldr	r2, [sp, #48]
19232
+	cmp	r2, r3
19233
+	bne	.L2899
19234
+	movs	r2, #1
19235
+	add	r1, sp, #44
19236
+	mov	r0, r7
19237
+	bl	log2phys
19238
+.L2899:
19239
+	ldr	r3, [sp, #20]
19240
+	adds	r3, r3, #1
19241
+	b	.L3006
19242
+.L2908:
19243
+	ldr	r1, [r9, #8]
19244
+	cmp	r7, r1
19245
+	bne	.L2909
19246
+	ldr	r1, [r9, #4]
19247
+	ldr	r0, [r5, #3472]
19248
+	str	r1, [sp, #32]
19249
+	bl	ftl_cmp_data_ver
19250
+	cmp	r0, #0
19251
+	beq	.L2909
19252
+	ldr	r1, [sp, #48]
19253
+	ldr	r0, [sp, #52]
19254
+	cmp	r1, r0
19255
+	bne	.L2911
19256
+.L2914:
19257
+	ldr	r1, [sp, #44]
19258
+	mov	r0, r7
19259
+	bl	FtlReUsePrevPpa
19260
+	b	.L2909
19261
+.L2911:
19262
+	ldr	r0, [sp, #44]
19263
+	cmp	r1, r0
19264
+	beq	.L2909
19265
+	adds	r0, r1, #1
19266
+	beq	.L2912
19267
+	str	r1, [r3, #4]
19268
+	movs	r2, #0
19269
+	movs	r1, #1
19270
+	mov	r0, r3
19271
+	ldr	r9, [r3, #12]
19272
+	bl	FlashReadPages
19273
+.L2913:
19274
+	ldr	r3, [r5, #3304]
19275
+	ldr	r3, [r3, r8]
19276
+	adds	r3, r3, #1
19277
+	beq	.L2914
19278
+	ldr	r3, [r9, #4]
19279
+	ldr	r0, [r5, #3472]
19280
+	mov	r1, r3
19281
+	bl	ftl_cmp_data_ver
19282
+	cmp	r0, #0
19283
+	beq	.L2914
19284
+	mov	r1, r3
19285
+	ldr	r0, [sp, #32]
19286
+	bl	ftl_cmp_data_ver
19287
+	cmp	r0, #0
19288
+	beq	.L2909
19289
+	b	.L2914
19290
+.L2912:
19291
+	str	r1, [r2, r8]
19292
+	b	.L2913
19293
+.L3012:
19294
+	.align	2
19295
+.L3011:
19296
+	.word	.LANCHOR4
19297
+	.word	.LANCHOR2
19298
+	.word	.LANCHOR0
19299
+	.word	.LC150
19300
+.L2906:
19301
+	ldr	r3, [sp, #52]
19302
+	ldr	r2, [sp, #48]
19303
+	cmp	r2, r3
19304
+	beq	.L2916
19305
+	ldr	r3, [sp, #44]
19306
+	adds	r0, r3, #1
19307
+	beq	.L2918
19308
+	ldr	r2, .L3013
19309
+	ubfx	r3, r3, #10, #21
19310
+	ldr	r2, [r2, #2340]
19311
+	cmp	r3, r2
19312
+	bcs	.L2899
19313
+.L2918:
19314
+	movs	r2, #1
19315
+	add	r1, sp, #52
19316
+	mov	r0, r7
19317
+	bl	log2phys
19318
+	ldr	r9, [sp, #48]
19319
+	cmp	r9, #-1
19320
+	beq	.L2916
19321
+	ldr	r3, [sp, #44]
19322
+	cmp	r9, r3
19323
+	beq	.L2920
19324
+	ubfx	r0, r9, #10, #16
19325
+	bl	P2V_block_in_plane
19326
+	ldrh	r3, [r5, #320]
19327
+	cmp	r3, r0
19328
+	beq	.L2921
19329
+	ldrh	r3, [r5, #368]
19330
+	cmp	r3, r0
19331
+	beq	.L2921
19332
+	ldrh	r3, [r5, #416]
19333
+	cmp	r3, r0
19334
+	bne	.L2916
19335
+.L2921:
19336
+	ldr	r0, [r5, #3304]
19337
+	movs	r2, #0
19338
+	movs	r1, #1
19339
+	str	r9, [r0, #4]
19340
+	ldr	r8, [r0, #12]
19341
+	bl	FlashReadPages
19342
+	ldr	r3, [r5, #3304]
19343
+	ldr	r3, [r3]
19344
+	adds	r3, r3, #1
19345
+	beq	.L2916
19346
+	ldr	r1, [r8, #4]
19347
+	mov	r0, r10
19348
+	bl	ftl_cmp_data_ver
19349
+	cmp	r0, #0
19350
+	bne	.L2916
19351
+	movs	r2, #1
19352
+	add	r1, sp, #48
19353
+	mov	r0, r7
19354
+	bl	log2phys
19355
+	b	.L2916
19356
+.L2903:
19011
19357
 	ldrh	r3, [r4]
19012
19358
 	mov	r1, r7
19013
-	ldr	r2, .L3121+12
19014
-	ldr	r0, .L3121+16
19015
-	strh	r3, [r2, #840]	@ movhi
19016
-	ldr	r2, [sp, #4]
19359
+	ldr	r2, .L3013+4
19360
+	ldr	r0, .L3013+8
19361
+	strh	r3, [r2, #1342]	@ movhi
19362
+	mov	r2, r10
19017
19363
 	bl	printk
19018
-	ldr	r3, .L3121+12
19019
-	ldr	r3, [r3, #844]
19364
+	ldr	r3, .L3013+4
19365
+	ldr	r3, [r3, #1348]
19020
19366
 	cmp	r3, #31
19021
-	bhi	.L3028
19022
-	ldr	r2, .L3121+12
19023
-	ldr	r1, [sp, #60]
19367
+	bhi	.L2923
19368
+	ldr	r2, .L3013+4
19369
+	ldr	r1, [sp, #52]
19024
19370
 	add	r2, r2, r3, lsl #2
19025
19371
 	adds	r3, r3, #1
19026
-	str	r1, [r2, #848]
19027
-	ldr	r2, .L3121+12
19028
-	str	r3, [r2, #844]
19029
-.L3028:
19372
+	str	r1, [r2, #1352]
19373
+	ldr	r2, .L3013+4
19374
+	str	r3, [r2, #1348]
19375
+.L2923:
19030
19376
 	ldrh	r0, [r4]
19031
19377
 	bl	decrement_vpc_count
19032
19378
 	ldr	r3, [r5, #3472]
19033
19379
 	adds	r2, r3, #1
19034
-	bne	.L3029
19035
-	ldr	r3, [sp, #4]
19036
-	b	.L3108
19037
-.L3029:
19038
-	ldr	r2, [sp, #4]
19039
-	cmp	r3, r2
19040
-	bls	.L3005
19041
-	mov	r3, r2
19042
-.L3108:
19043
-	str	r3, [r5, #3472]
19380
+	bne	.L2924
19044
19381
 .L3005:
19045
-	ldr	r3, [sp, #28]
19046
-	adds	r3, r3, #1
19047
-	b	.L3109
19048
-.L3116:
19049
-	ldrb	r3, [r4, #8]	@ zero_extendqisi2
19050
-	add	fp, fp, #1
19051
-	cmp	r3, #1
19052
-	uxth	fp, fp
19053
-	ldr	r3, .L3121
19054
-	bne	.L3031
19055
-	ldrb	r2, [r3, #144]	@ zero_extendqisi2
19056
-	cbz	r2, .L3031
19057
-	ldrh	r2, [r3, #2390]
19058
-	cmp	r2, fp
19059
-	bne	.L3031
19060
-	cmp	r10, fp
19061
-	beq	.L3008
19062
-.L3031:
19063
-	ldrh	r3, [r3, #2388]
19064
-	cmp	fp, r3
19065
-	bne	.L2999
19066
-	ldr	r2, .L3121
19067
-	movw	r0, #65535
19068
-	movs	r3, #0
19382
+	str	r10, [r5, #3472]
19383
+	b	.L2899
19384
+.L2924:
19385
+	cmp	r10, r3
19386
+	bcs	.L2899
19387
+	b	.L3005
19388
+.L2902:
19389
+	ldrb	r3, [sp, #4]	@ zero_extendqisi2
19069
19390
 	strh	fp, [r4, #2]	@ movhi
19070
-	strh	r3, [r4, #4]	@ movhi
19071
-	ldrh	r1, [r2, #2320]
19072
-.L3032:
19073
-	uxth	r2, r3
19074
-	cmp	r2, r1
19075
-	bcs	.L3101
19076
-	ldr	r6, [sp, #20]
19077
-	adds	r3, r3, #1
19078
-	ldrh	r5, [r6, #2]!
19079
-	cmp	r5, r0
19080
-	str	r6, [sp, #20]
19081
-	beq	.L3032
19082
-	strb	r2, [r4, #6]
19083
-	b	.L3101
19084
-.L3008:
19085
-	ldrb	r3, [sp, #8]	@ zero_extendqisi2
19086
-	mov	r0, r4
19087
-	ldr	r2, [sp, #8]
19088
-	mov	r1, r10
19089
-	strh	r10, [r4, #2]	@ movhi
19391
+	ldr	r2, [sp, #4]
19090
19392
 	strb	r3, [r4, #6]
19091
-.L3110:
19092
-	bl	ftl_sb_update_avl_pages
19093
-.L3101:
19094
-	movs	r0, #0
19095
-	add	sp, sp, #68
19096
-	@ sp needed
19097
-	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
19098
-.L3122:
19393
+	b	.L3008
19394
+.L2920:
19395
+	mov	r0, r9
19396
+	b	.L2930
19397
+.L3014:
19099
19398
 	.align	2
19100
-.L3121:
19399
+.L3013:
19101
19400
 	.word	.LANCHOR0
19102
-	.word	.LANCHOR2
19103
-	.word	.LC150
19104
-	.word	.LANCHOR5
19401
+	.word	.LANCHOR4
19105
19402
 	.word	.LC151
19106
19403
 	.fnend
19107
19404
 	.size	FtlRecoverySuperblock, .-FtlRecoverySuperblock
19108
19405
 	.align	1
19109
19406
 	.global	FtlVpcCheckAndModify
19407
+	.syntax unified
19110
19408
 	.thumb
19111
19409
 	.thumb_func
19410
+	.fpu softvfp
19112
19411
 	.type	FtlVpcCheckAndModify, %function
19113
19412
 FtlVpcCheckAndModify:
19114
19413
 	.fnstart
19115
19414
 	@ args = 0, pretend = 0, frame = 8
19116
19415
 	@ frame_needed = 0, uses_anonymous_args = 0
19117
-	push	{r0, r1, r2, r4, r5, r6, r7, r8, r9, lr}
19118
-	.save {r4, r5, r6, r7, r8, r9, lr}
19119
-	.pad #12
19120
-	movs	r4, #0
19121
-	ldr	r7, .L3136
19122
-	ldr	r1, .L3136+4
19123
-	ldr	r0, .L3136+8
19416
+	push	{r0, r1, r4, r5, r6, r7, r8, r9, r10, lr}
19417
+	.save {r4, r5, r6, r7, r8, r9, r10, lr}
19418
+	.pad #8
19419
+	movs	r5, #0
19420
+	ldr	r7, .L3026
19421
+	ldr	r1, .L3026+4
19422
+	ldr	r0, .L3026+8
19124
19423
 	bl	printk
19125
-	ldr	r5, .L3136+12
19126
-	ldrh	r2, [r7, #2330]
19424
+	ldrh	r2, [r7, #2334]
19127
19425
 	movs	r1, #0
19128
-	ldr	r0, [r5, #3364]
19426
+	ldr	r4, .L3026+12
19129
19427
 	lsls	r2, r2, #1
19428
+	ldr	r0, [r4, #3364]
19130
19429
 	bl	ftl_memset
19131
-.L3124:
19132
-	ldr	r3, [r7, #2448]
19133
-	cmp	r4, r3
19134
-	bcs	.L3134
19135
-	mov	r0, r4
19136
-	add	r1, sp, #4
19430
+.L3016:
19431
+	ldr	r3, [r7, #2452]
19432
+	cmp	r5, r3
19433
+	bcc	.L3018
19434
+	ldr	r10, .L3026+16
19435
+	mov	r8, #0
19436
+	movw	r9, #65535
19437
+.L3019:
19438
+	ldrh	r3, [r7, #2332]
19439
+	uxth	r6, r8
19440
+	cmp	r3, r6
19441
+	bhi	.L3022
19442
+	bl	l2p_flush
19443
+	bl	FtlVpcTblFlush
19444
+	add	sp, sp, #8
19445
+	@ sp needed
19446
+	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
19447
+.L3018:
19137
19448
 	movs	r2, #0
19449
+	add	r1, sp, #4
19450
+	mov	r0, r5
19138
19451
 	bl	log2phys
19139
19452
 	ldr	r0, [sp, #4]
19140
19453
 	adds	r3, r0, #1
19141
-	beq	.L3125
19454
+	beq	.L3017
19142
19455
 	ubfx	r0, r0, #10, #16
19143
19456
 	bl	P2V_block_in_plane
19144
-	ldr	r2, [r5, #3364]
19457
+	ldr	r2, [r4, #3364]
19145
19458
 	ldrh	r3, [r2, r0, lsl #1]
19146
19459
 	adds	r3, r3, #1
19147
19460
 	strh	r3, [r2, r0, lsl #1]	@ movhi
19148
-.L3125:
19149
-	adds	r4, r4, #1
19150
-	b	.L3124
19151
-.L3134:
19152
-	ldr	r6, .L3136+12
19153
-	mov	r8, #0
19154
-	movw	r9, #65535
19155
-.L3127:
19156
-	ldrh	r3, [r7, #2328]
19157
-	uxth	r4, r8
19158
-	cmp	r3, r4
19159
-	bls	.L3135
19160
-	ldr	r3, [r5, #296]
19161
-	ldrh	r2, [r3, r4, lsl #1]
19162
-	ldr	r3, [r5, #3364]
19163
-	ldrh	r3, [r3, r4, lsl #1]
19461
+.L3017:
19462
+	adds	r5, r5, #1
19463
+	b	.L3016
19464
+.L3022:
19465
+	ldr	r3, [r4, #300]
19466
+	uxth	r5, r8
19467
+	ldrh	r2, [r3, r5, lsl #1]
19468
+	ldr	r3, [r4, #3364]
19469
+	ldrh	r3, [r3, r5, lsl #1]
19164
19470
 	cmp	r2, r3
19165
-	beq	.L3128
19471
+	beq	.L3020
19166
19472
 	cmp	r2, r9
19167
-	beq	.L3128
19168
-	ldrh	r1, [r6, #316]
19169
-	cmp	r1, r4
19170
-	beq	.L3128
19171
-	ldrh	r1, [r6, #412]
19172
-	cmp	r1, r4
19173
-	beq	.L3128
19174
-	ldrh	r1, [r6, #364]
19175
-	cmp	r1, r4
19176
-	beq	.L3128
19177
-	ldr	r0, .L3136+16
19178
-	mov	r1, r4
19473
+	beq	.L3020
19474
+	ldrh	r1, [r4, #320]
19475
+	cmp	r1, r6
19476
+	beq	.L3020
19477
+	ldrh	r1, [r4, #416]
19478
+	cmp	r1, r6
19479
+	beq	.L3020
19480
+	ldrh	r1, [r4, #368]
19481
+	cmp	r1, r6
19482
+	beq	.L3020
19483
+	mov	r1, r5
19484
+	mov	r0, r10
19179
19485
 	bl	printk
19180
-	ldr	r3, [r6, #296]
19181
-	ldrh	r2, [r3, r4, lsl #1]
19182
-	cbnz	r2, .L3129
19183
-	ldr	r2, [r6, #3364]
19184
-	ldrh	r2, [r2, r4, lsl #1]
19185
-	strh	r2, [r3, r4, lsl #1]	@ movhi
19186
-	b	.L3128
19187
-.L3129:
19188
-	ldr	r2, [r6, #3364]
19189
-	mov	r0, r4
19190
-	ldrh	r2, [r2, r4, lsl #1]
19191
-	strh	r2, [r3, r4, lsl #1]	@ movhi
19192
-	bl	update_vpc_list
19193
-.L3128:
19486
+	ldr	r3, [r4, #300]
19487
+	ldrh	r2, [r3, r5, lsl #1]
19488
+	cbnz	r2, .L3021
19489
+	ldr	r2, [r4, #3364]
19490
+	ldrh	r2, [r2, r5, lsl #1]
19491
+	strh	r2, [r3, r5, lsl #1]	@ movhi
19492
+.L3020:
19194
19493
 	add	r8, r8, #1
19195
-	b	.L3127
19196
-.L3135:
19197
-	bl	l2p_flush
19198
-	bl	FtlVpcTblFlush
19199
-	add	sp, sp, #12
19200
-	@ sp needed
19201
-	pop	{r4, r5, r6, r7, r8, r9, pc}
19202
-.L3137:
19494
+	b	.L3019
19495
+.L3021:
19496
+	ldr	r2, [r4, #3364]
19497
+	mov	r0, r6
19498
+	ldrh	r2, [r2, r5, lsl #1]
19499
+	strh	r2, [r3, r5, lsl #1]	@ movhi
19500
+	bl	update_vpc_list
19501
+	b	.L3020
19502
+.L3027:
19203
19503
 	.align	2
19204
-.L3136:
19504
+.L3026:
19205
19505
 	.word	.LANCHOR0
19206
-	.word	.LANCHOR3+216
19506
+	.word	.LANCHOR3+203
19207
19507
 	.word	.LC110
19208
19508
 	.word	.LANCHOR2
19209
19509
 	.word	.LC152
..
..
@@ -19211,301 +19511,290 @@
19211
19511
 	.size	FtlVpcCheckAndModify, .-FtlVpcCheckAndModify
19212
19512
 	.align	1
19213
19513
 	.global	FtlGcScanTempBlk
19514
+	.syntax unified
19214
19515
 	.thumb
19215
19516
 	.thumb_func
19517
+	.fpu softvfp
19216
19518
 	.type	FtlGcScanTempBlk, %function
19217
19519
 FtlGcScanTempBlk:
19218
19520
 	.fnstart
19219
19521
 	@ args = 0, pretend = 0, frame = 72
19220
19522
 	@ frame_needed = 0, uses_anonymous_args = 0
19221
-	ldr	r3, .L3192
19523
+	ldr	r3, .L3078
19222
19524
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
19223
19525
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
19224
19526
 	.pad #76
19225
19527
 	sub	sp, sp, #76
19226
-	ldrh	r5, [r3, #3448]
19227
-	movw	r3, #65535
19228
19528
 	mov	r4, r0
19229
-	str	r1, [sp, #20]
19230
-	cmp	r5, r3
19231
-	beq	.L3174
19232
-	cbnz	r5, .L3139
19233
-	b	.L3140
19234
-.L3174:
19235
-	movs	r5, #0
19236
-.L3139:
19237
-	ldr	r3, .L3192+4
19238
-	ldr	r2, [sp, #20]
19239
-	ldrh	r3, [r3, #2388]
19240
-	cmp	r2, r3
19241
-	bne	.L3141
19242
-.L3140:
19529
+	str	r1, [sp, #16]
19530
+	ldrh	r6, [r3, #3444]
19531
+	movw	r3, #65535
19532
+	cmp	r6, r3
19533
+	beq	.L3062
19534
+	cbnz	r6, .L3029
19535
+.L3030:
19243
19536
 	bl	FtlGcPageVarInit
19244
-.L3141:
19245
-	ldr	r6, .L3192+8
19537
+	b	.L3031
19538
+.L3062:
19539
+	movs	r6, #0
19540
+.L3029:
19541
+	ldr	r3, .L3078+4
19542
+	ldr	r2, [sp, #16]
19543
+	ldrh	r3, [r3, #2390]
19544
+	cmp	r3, r2
19545
+	beq	.L3030
19546
+.L3031:
19547
+	ldr	r5, .L3078+8
19246
19548
 	mov	r3, #-1
19247
-	str	r3, [sp, #16]
19549
+	str	r3, [sp, #12]
19248
19550
 	movs	r3, #0
19249
19551
 	str	r3, [sp, #4]
19250
-.L3142:
19552
+.L3032:
19251
19553
 	ldrh	r1, [r4]
19252
19554
 	movw	r3, #65535
19253
19555
 	movs	r2, #0
19254
19556
 	strb	r2, [r4, #8]
19255
19557
 	cmp	r1, r3
19256
-	beq	.L3143
19257
-.L3144:
19258
-	ldr	r10, .L3192+4
19259
-.L3171:
19260
-	ldr	r3, [r6, #3304]
19558
+	beq	.L3033
19559
+	ldr	r7, .L3078+4
19560
+.L3059:
19561
+	ldr	r3, [r5, #3304]
19261
19562
 	movs	r2, #0
19262
-	ldrh	lr, [r10, #2320]
19263
-	add	ip, r4, #14
19264
-	ldr	r8, [r6, #1148]
19265
-	mov	fp, #36
19563
+	ldrh	ip, [r7, #2324]
19564
+	add	lr, r4, #16
19565
+	ldr	r10, [r5, #1148]
19566
+	mov	fp, r2
19266
19567
 	str	r3, [sp, #8]
19267
-	mov	r7, r2
19268
-	ldr	r3, [r6, #1144]
19269
-	movw	r9, #65535
19270
-	str	r3, [sp, #12]
19271
-	ldrh	r3, [r10, #2398]
19568
+	movw	r8, #65535
19569
+	ldr	r3, [r5, #1144]
19570
+	mov	r9, #36
19571
+	str	r3, [sp, #20]
19572
+	ldrh	r3, [r7, #2400]
19272
19573
 	str	r3, [sp, #24]
19273
-	ldrh	r3, [r10, #2400]
19574
+	ldrh	r3, [r7, #2402]
19274
19575
 	str	r3, [sp, #28]
19275
-.L3145:
19576
+.L3034:
19276
19577
 	uxth	r3, r2
19277
-	cmp	r3, lr
19278
-	bcs	.L3190
19279
-	ldrh	r3, [ip, #2]!
19280
-	cmp	r3, r9
19281
-	beq	.L3146
19578
+	cmp	ip, r3
19579
+	bhi	.L3038
19580
+	mov	r10, #0
19581
+	movs	r2, #0
19582
+	mov	r1, fp
19583
+	ldr	r0, [sp, #8]
19584
+	bl	FlashReadPages
19585
+.L3039:
19586
+	uxth	r3, r10
19587
+	cmp	fp, r3
19588
+	bhi	.L3057
19589
+	ldr	r3, [sp, #4]
19590
+	adds	r6, r6, #1
19591
+	uxth	r6, r6
19592
+	adds	r3, r3, #1
19593
+	str	r3, [sp, #4]
19594
+	ldr	r2, [sp, #4]
19595
+	ldr	r3, [sp, #16]
19596
+	cmp	r3, r2
19597
+	bls	.L3058
19598
+.L3060:
19599
+	ldrh	r3, [r7, #2390]
19600
+	cmp	r3, r6
19601
+	bhi	.L3059
19602
+	movs	r2, #0
19603
+	b	.L3033
19604
+.L3038:
19605
+	ldrh	r3, [lr], #2
19606
+	cmp	r3, r8
19607
+	beq	.L3035
19282
19608
 	ldr	r1, [sp, #8]
19283
-	orr	r3, r5, r3, lsl #10
19284
-	mla	r1, fp, r7, r1
19609
+	orr	r3, r6, r3, lsl #10
19610
+	mov	r0, fp
19611
+	mla	r1, r9, fp, r1
19285
19612
 	str	r3, [r1, #4]
19286
19613
 	ldr	r3, [sp, #24]
19287
-	muls	r3, r7, r3
19614
+	muls	r3, r0, r3
19615
+	ldr	r0, [sp, #20]
19288
19616
 	it	mi
19289
19617
 	addmi	r3, r3, #3
19290
19618
 	bic	r3, r3, #3
19291
-	mov	r0, r3
19292
-	ldr	r3, [sp, #12]
19293
-	add	r0, r0, r3
19619
+	add	r3, r3, r0
19620
+	mov	r0, fp
19621
+	str	r3, [r1, #8]
19294
19622
 	ldr	r3, [sp, #28]
19295
-	muls	r3, r7, r3
19296
-	add	r7, r7, #1
19623
+	muls	r3, r0, r3
19297
19624
 	it	mi
19298
19625
 	addmi	r3, r3, #3
19299
-	str	r0, [r1, #8]
19300
-	uxth	r7, r7
19301
19626
 	bic	r3, r3, #3
19302
-	add	r3, r3, r8
19627
+	add	r3, r3, r10
19303
19628
 	str	r3, [r1, #12]
19304
-.L3146:
19629
+	add	r3, fp, #1
19630
+	uxth	fp, r3
19631
+.L3035:
19305
19632
 	adds	r2, r2, #1
19306
-	b	.L3145
19307
-.L3190:
19308
-	ldr	r0, [r6, #3304]
19309
-	mov	r1, r7
19310
-	movs	r2, #0
19311
-	bl	FlashReadPages
19312
-	movs	r3, #0
19313
-.L3189:
19314
-	str	r3, [sp, #8]
19315
-	ldrh	r3, [sp, #8]
19316
-	cmp	r3, r7
19317
-	bcs	.L3191
19318
-	ldr	r3, [sp, #8]
19633
+	b	.L3034
19634
+.L3057:
19319
19635
 	mov	r9, #36
19320
-	mul	r9, r9, r3
19321
-	ldr	r3, .L3192+8
19322
-	ldr	r8, [r3, #3304]
19323
-	add	fp, r8, r9
19324
-	ldr	r3, [fp, #4]
19325
-	ubfx	r0, r3, #10, #16
19326
-	str	r3, [sp, #12]
19636
+	ldr	r8, [r5, #3304]
19637
+	mul	r9, r9, r10
19638
+	add	r3, r8, r9
19639
+	ldr	r2, [r3, #4]
19640
+	str	r3, [sp, #20]
19641
+	ubfx	r0, r2, #10, #16
19642
+	str	r2, [sp, #8]
19327
19643
 	bl	P2V_plane
19328
19644
 	ldr	r8, [r8, r9]
19329
-	ldr	r3, [fp, #12]
19330
-	ldr	ip, .L3192+4
19331
-	ldr	fp, .L3192+8
19332
19645
 	mov	r2, r0
19646
+	ldr	r3, [sp, #20]
19647
+	ldr	r3, [r3, #12]
19333
19648
 	cmp	r8, #0
19334
-	bne	.L3151
19649
+	bne	.L3040
19335
19650
 	ldrh	r0, [r3]
19336
19651
 	movw	r1, #65535
19337
19652
 	cmp	r0, r1
19338
-	bne	.L3152
19339
-.L3155:
19340
-	ldrb	r3, [ip, #144]	@ zero_extendqisi2
19341
-	cbz	r3, .L3186
19653
+	bne	.L3041
19654
+.L3044:
19655
+	ldrb	r3, [r7, #152]	@ zero_extendqisi2
19656
+	cbz	r3, .L3074
19342
19657
 	movs	r3, #1
19343
-	str	r3, [fp, #3468]
19344
-	b	.L3143
19345
-.L3152:
19658
+	str	r3, [r5, #3468]
19659
+.L3033:
19660
+	ldr	r3, .L3078
19661
+	movw	r1, #65535
19662
+	strh	r6, [r4, #2]	@ movhi
19663
+	mov	r0, r4
19664
+	strb	r2, [r4, #6]
19665
+	strh	r1, [r3, #3444]	@ movhi
19666
+	mov	r1, r6
19667
+	bl	ftl_sb_update_avl_pages
19668
+	b	.L3028
19669
+.L3041:
19346
19670
 	ldr	r0, [r3, #8]
19347
-	ldr	r1, [r10, #2448]
19671
+	ldr	r1, [r7, #2452]
19348
19672
 	cmp	r0, r1
19349
-	bls	.L3187
19350
-	b	.L3155
19351
-.L3186:
19673
+	bhi	.L3044
19674
+	ldrb	r2, [r7, #36]	@ zero_extendqisi2
19675
+	cbnz	r2, .L3047
19676
+.L3048:
19677
+	ldr	r2, [r3, #8]
19678
+	add	r10, r10, #1
19679
+	ldr	r1, [sp, #8]
19680
+	ldr	r0, [r3, #12]
19681
+	bl	FtlGcUpdatePage
19682
+	b	.L3039
19683
+.L3074:
19352
19684
 	ldrh	r1, [r4]
19353
-	ldr	r2, [fp, #296]
19685
+	ldr	r2, [r5, #300]
19354
19686
 	strh	r3, [r2, r1, lsl #1]	@ movhi
19687
+.L3077:
19355
19688
 	ldrh	r0, [r4]
19356
19689
 	bl	INSERT_FREE_LIST
19357
19690
 	movw	r3, #65535
19358
19691
 	strh	r3, [r4]	@ movhi
19359
-	strh	r3, [fp, #556]	@ movhi
19360
-	b	.L3188
19361
-.L3187:
19362
-	ldrb	r2, [r10]	@ zero_extendqisi2
19363
-	cmp	r2, #0
19364
-	beq	.L3159
19365
-	add	r1, sp, #32
19692
+	strh	r3, [r5, #556]	@ movhi
19693
+.L3076:
19694
+	bl	FtlGcPageVarInit
19695
+	movs	r6, #0
19696
+	b	.L3032
19697
+.L3047:
19366
19698
 	mov	r2, r8
19367
-	str	r3, [sp, #24]
19699
+	add	r1, sp, #32
19700
+	str	r3, [sp, #20]
19368
19701
 	bl	log2phys
19369
-	ldr	r3, [sp, #24]
19370
-	ldr	r2, [sp, #32]
19371
-	ldr	r1, [r3, #12]
19702
+	ldr	r3, [sp, #20]
19703
+	ldr	r1, [sp, #32]
19704
+	ldr	r2, [r3, #12]
19372
19705
 	cmp	r2, r1
19373
-	bne	.L3159
19706
+	bne	.L3048
19374
19707
 	adds	r1, r2, #1
19375
-	beq	.L3159
19708
+	beq	.L3048
19376
19709
 	str	r2, [sp, #40]
19377
19710
 	movs	r1, #1
19378
-	ldr	r2, [r6, #3336]
19711
+	ldr	r2, [r5, #3336]
19379
19712
 	add	r0, sp, #36
19380
19713
 	str	r2, [sp, #44]
19381
-	ldr	r2, [r6, #3344]
19714
+	ldr	r2, [r5, #3344]
19382
19715
 	str	r2, [sp, #48]
19383
19716
 	mov	r2, r8
19384
19717
 	bl	FlashReadPages
19385
-	ldrh	r2, [r10, #2394]
19386
-	ldr	r1, [r6, #3304]
19387
-	lsl	lr, r2, #7
19388
-	add	r9, r9, r1
19718
+	ldrh	r2, [r7, #2396]
19719
+	ldr	r1, [r5, #3304]
19389
19720
 	ldr	r0, [sp, #44]
19390
-	ldr	r3, [sp, #24]
19391
-.L3161:
19392
-	cmp	r8, lr
19393
-	beq	.L3159
19721
+	ldr	r3, [sp, #20]
19722
+	lsl	ip, r2, #7
19723
+	add	r9, r9, r1
19724
+.L3049:
19725
+	cmp	r8, ip
19726
+	beq	.L3048
19394
19727
 	ldr	r1, [r9, #8]
19395
19728
 	ldr	r2, [r0, r8, lsl #2]
19396
19729
 	ldr	r1, [r1, r8, lsl #2]
19397
19730
 	cmp	r1, r2
19398
-	beq	.L3162
19399
-	ldrh	r1, [r4]
19731
+	beq	.L3050
19400
19732
 	ldr	r2, [sp, #40]
19401
-	ldr	r0, .L3192+12
19733
+	ldrh	r1, [r4]
19734
+	ldr	r0, .L3078+12
19402
19735
 	bl	printk
19403
-	ldr	r3, [r6, #296]
19404
19736
 	ldrh	r2, [r4]
19737
+	movs	r1, #0
19738
+	ldr	r3, [r5, #300]
19739
+	strh	r1, [r3, r2, lsl #1]	@ movhi
19740
+	b	.L3077
19741
+.L3050:
19742
+	add	r8, r8, #1
19743
+	b	.L3049
19744
+.L3040:
19745
+	ldr	r2, [sp, #8]
19746
+	ldrh	r1, [r4]
19747
+	ldr	r0, .L3078+16
19748
+	bl	printk
19749
+	ldr	r3, [r7, #2248]
19750
+	ldrh	r2, [r4]
19751
+	cbnz	r3, .L3053
19752
+	ldrb	r3, [r7, #152]	@ zero_extendqisi2
19753
+	cbz	r3, .L3054
19754
+.L3053:
19755
+	ldr	r3, [r5, #236]
19756
+	ldrh	r3, [r3, r2, lsl #1]
19757
+	cmp	r3, #159
19758
+	bls	.L3055
19759
+.L3054:
19760
+	ldr	r3, [r5, #3304]
19761
+	ldr	r3, [r3, r9]
19762
+	adds	r3, r3, #1
19763
+	bne	.L3056
19764
+.L3055:
19765
+	ldr	r3, [r5, #3304]
19766
+	add	r3, r3, r9
19767
+	ldr	r3, [r3, #4]
19768
+	str	r3, [sp, #12]
19769
+.L3056:
19770
+	ldr	r3, [r5, #300]
19405
19771
 	movs	r1, #0
19406
19772
 	strh	r1, [r3, r2, lsl #1]	@ movhi
19407
19773
 	ldrh	r0, [r4]
19408
19774
 	bl	INSERT_FREE_LIST
19409
19775
 	movw	r3, #65535
19410
19776
 	strh	r3, [r4]	@ movhi
19411
-	strh	r3, [r6, #556]	@ movhi
19412
-	b	.L3188
19413
-.L3162:
19414
-	add	r8, r8, #1
19415
-	b	.L3161
19416
-.L3159:
19417
-	ldr	r0, [r3, #12]
19418
-	ldr	r2, [r3, #8]
19419
-	ldr	r1, [sp, #12]
19420
-	bl	FtlGcUpdatePage
19421
-	ldr	r3, [sp, #8]
19422
-	adds	r3, r3, #1
19423
-	b	.L3189
19424
-.L3151:
19425
-	ldr	r2, [sp, #12]
19426
-	ldr	r0, .L3192+16
19427
-	ldrh	r1, [r4]
19428
-	str	ip, [sp, #8]
19429
-	bl	printk
19430
-	ldrh	r3, [r4]
19431
-	ldr	ip, [sp, #8]
19432
-	ldr	r2, [ip, #2244]
19433
-	cbnz	r2, .L3165
19434
-	ldrb	r2, [ip, #144]	@ zero_extendqisi2
19435
-	cbz	r2, .L3166
19436
-.L3165:
19437
-	ldr	r2, [fp, #232]
19438
-	ldrh	r2, [r2, r3, lsl #1]
19439
-	cmp	r2, #159
19440
-	bls	.L3167
19441
-.L3166:
19442
-	ldr	r2, [fp, #3304]
19443
-	ldr	r2, [r2, r9]
19444
-	adds	r2, r2, #1
19445
-	bne	.L3168
19446
-.L3167:
19447
-	ldr	r2, [fp, #3304]
19448
-	add	r9, r9, r2
19449
-	ldr	r2, [r9, #4]
19450
-	str	r2, [sp, #16]
19451
-.L3168:
19452
-	ldr	r2, .L3192+8
19453
-	movs	r1, #0
19454
-	ldr	r2, [r2, #296]
19455
-	strh	r1, [r2, r3, lsl #1]	@ movhi
19456
-	ldrh	r0, [r4]
19457
-	bl	INSERT_FREE_LIST
19458
-	movw	r3, #65535
19459
-	strh	r3, [r4]	@ movhi
19460
-.L3188:
19461
-	bl	FtlGcPageVarInit
19462
-	movs	r5, #0
19463
-	b	.L3142
19464
-.L3191:
19465
-	ldr	r3, [sp, #4]
19466
-	adds	r5, r5, #1
19467
-	ldr	r2, [sp, #20]
19468
-	adds	r3, r3, #1
19469
-	uxth	r5, r5
19470
-	cmp	r3, r2
19471
-	str	r3, [sp, #4]
19472
-	bcs	.L3170
19473
-.L3172:
19474
-	ldrh	r3, [r10, #2388]
19475
-	cmp	r3, r5
19476
-	bhi	.L3171
19477
-	movs	r2, #0
19478
-	b	.L3143
19479
-.L3170:
19480
-	ldr	r2, .L3192
19777
+	b	.L3076
19778
+.L3058:
19779
+	ldr	r2, .L3078
19481
19780
 	movw	r1, #65535
19482
-	ldrh	r3, [r2, #3448]
19781
+	ldrh	r3, [r2, #3444]
19483
19782
 	cmp	r3, r1
19484
-	beq	.L3172
19783
+	beq	.L3060
19485
19784
 	ldr	r1, [sp, #4]
19486
19785
 	add	r3, r3, r1
19487
-	strh	r3, [r2, #3448]	@ movhi
19488
-	ldrh	r3, [r10, #2388]
19489
-	cmp	r3, r5
19490
-	bls	.L3172
19491
-	b	.L3173
19492
-.L3143:
19493
-	ldr	r3, .L3192
19494
-	movw	r1, #65535
19495
-	strh	r5, [r4, #2]	@ movhi
19496
-	mov	r0, r4
19497
-	strb	r2, [r4, #6]
19498
-	strh	r1, [r3, #3448]	@ movhi
19499
-	mov	r1, r5
19500
-	bl	ftl_sb_update_avl_pages
19501
-.L3173:
19502
-	ldr	r0, [sp, #16]
19786
+	strh	r3, [r2, #3444]	@ movhi
19787
+	ldrh	r3, [r7, #2390]
19788
+	cmp	r3, r6
19789
+	bls	.L3060
19790
+.L3028:
19791
+	ldr	r0, [sp, #12]
19503
19792
 	add	sp, sp, #76
19504
19793
 	@ sp needed
19505
19794
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
19506
-.L3193:
19795
+.L3079:
19507
19796
 	.align	2
19508
-.L3192:
19797
+.L3078:
19509
19798
 	.word	.LANCHOR1
19510
19799
 	.word	.LANCHOR0
19511
19800
 	.word	.LANCHOR2
..
..
@@ -19515,8 +19804,10 @@
19515
19804
 	.size	FtlGcScanTempBlk, .-FtlGcScanTempBlk
19516
19805
 	.align	1
19517
19806
 	.global	FtlReadRefresh
19807
+	.syntax unified
19518
19808
 	.thumb
19519
19809
 	.thumb_func
19810
+	.fpu softvfp
19520
19811
 	.type	FtlReadRefresh, %function
19521
19812
 FtlReadRefresh:
19522
19813
 	.fnstart
..
..
@@ -19526,36 +19817,42 @@
19526
19817
 	.save {r4, r5, r6, r7, r8, r9, lr}
19527
19818
 	.pad #44
19528
19819
 	sub	sp, sp, #44
19529
-	ldr	r5, .L3210
19530
-	ldr	r4, .L3210+4
19531
-	ldr	r9, [r5, #688]
19820
+	ldr	r5, .L3096
19821
+	ldr	r9, [r5, #684]
19532
19822
 	mov	r6, r5
19533
19823
 	cmp	r9, #0
19534
-	beq	.L3195
19535
-	ldr	r2, [r5, #692]
19536
-	ldr	r3, [r4, #2448]
19537
-	cmp	r2, r3
19538
-	bcs	.L3196
19824
+	beq	.L3081
19825
+	ldr	r4, .L3096+4
19826
+	ldr	r1, [r5, #688]
19827
+	ldr	r2, [r4, #2452]
19828
+	cmp	r1, r2
19829
+	bcs	.L3082
19539
19830
 	mov	r5, #2048
19540
-	mov	r7, r6
19541
-.L3201:
19542
-	ldr	r0, [r6, #692]
19543
-	ldr	r3, [r4, #2448]
19831
+.L3087:
19832
+	ldr	r0, [r6, #688]
19833
+	ldr	r3, [r4, #2452]
19544
19834
 	cmp	r0, r3
19545
-	bcs	.L3200
19835
+	bcc	.L3083
19836
+.L3086:
19837
+	mov	r0, #-1
19838
+.L3080:
19839
+	add	sp, sp, #44
19840
+	@ sp needed
19841
+	pop	{r4, r5, r6, r7, r8, r9, pc}
19842
+.L3083:
19843
+	movs	r2, #0
19546
19844
 	mov	r1, sp
19547
-	movs	r2, #0
19548
19845
 	bl	log2phys
19549
-	ldr	r3, [r7, #692]
19550
-	adds	r3, r3, #1
19551
-	str	r3, [r7, #692]
19552
19846
 	ldr	r2, [sp]
19847
+	ldr	r3, [r6, #688]
19553
19848
 	adds	r1, r2, #1
19554
-	beq	.L3199
19555
-	add	r0, sp, #40
19849
+	add	r3, r3, #1
19850
+	str	r3, [r6, #688]
19851
+	beq	.L3085
19556
19852
 	str	r2, [sp, #8]
19557
-	movs	r1, #1
19853
+	add	r0, sp, #40
19558
19854
 	movs	r2, #0
19855
+	movs	r1, #1
19559
19856
 	str	r2, [r0, #-36]!
19560
19857
 	str	r3, [sp, #20]
19561
19858
 	str	r2, [sp, #12]
..
..
@@ -19563,285 +19860,283 @@
19563
19860
 	bl	FlashReadPages
19564
19861
 	ldr	r3, [sp, #4]
19565
19862
 	cmp	r3, #256
19566
-	bne	.L3200
19863
+	bne	.L3086
19567
19864
 	ldr	r0, [sp]
19568
19865
 	ubfx	r0, r0, #10, #16
19569
19866
 	bl	P2V_block_in_plane
19570
19867
 	bl	FtlGcRefreshBlock
19571
-.L3200:
19572
-	mov	r0, #-1
19573
-	b	.L3203
19574
-.L3199:
19868
+	b	.L3086
19869
+.L3085:
19575
19870
 	subs	r5, r5, #1
19576
-	bne	.L3201
19577
-	b	.L3200
19578
-.L3196:
19871
+	bne	.L3087
19872
+	b	.L3086
19873
+.L3082:
19579
19874
 	ldr	r3, [r5, #476]
19580
19875
 	movs	r0, #0
19876
+	str	r0, [r5, #684]
19581
19877
 	str	r0, [r5, #688]
19582
-	str	r0, [r5, #692]
19583
-	str	r3, [r5, #684]
19584
-	b	.L3203
19585
-.L3195:
19878
+	str	r3, [r5, #680]
19879
+	b	.L3080
19880
+.L3081:
19586
19881
 	ldr	r8, [r5, #476]
19587
-	ldr	r1, [r5, #528]
19588
-	ldr	r7, [r5, #684]
19589
-	add	r2, r8, #1048576
19590
-	ldr	r3, [r4, #2448]
19591
19882
 	movw	r4, #10000
19883
+	ldr	r1, [r5, #528]
19884
+	ldr	r7, [r5, #680]
19885
+	add	r3, r8, #1048576
19592
19886
 	cmp	r1, r4
19593
19887
 	ite	hi
19594
19888
 	movhi	r4, #31
19595
19889
 	movls	r4, #63
19596
-	cmp	r7, r2
19597
-	bhi	.L3205
19598
-	mov	r0, #1000
19890
+	cmp	r7, r3
19891
+	bhi	.L3091
19892
+	ldr	r3, .L3096+4
19599
19893
 	lsrs	r1, r1, #10
19894
+	mov	r0, #1000
19600
19895
 	adds	r1, r1, #1
19896
+	ldr	r3, [r3, #2452]
19601
19897
 	muls	r0, r3, r0
19602
19898
 	bl	__aeabi_uidiv
19603
19899
 	add	r0, r0, r7
19604
-	cmp	r0, r8
19605
-	bcc	.L3205
19606
-	ldrh	r3, [r5, #268]
19900
+	cmp	r8, r0
19901
+	bhi	.L3091
19902
+	ldrh	r3, [r5, #272]
19607
19903
 	ands	r0, r4, r3
19608
-	bne	.L3207
19609
-	ldr	r2, [r5, #708]
19610
-	cmp	r2, r3
19611
-	beq	.L3203
19612
-.L3205:
19613
-	ldrh	r3, [r6, #268]
19904
+	bne	.L3093
19905
+	ldr	r2, [r5, #704]
19906
+	cmp	r3, r2
19907
+	beq	.L3080
19908
+.L3091:
19909
+	ldrh	r3, [r6, #272]
19614
19910
 	movs	r0, #0
19615
-	str	r8, [r6, #684]
19616
-	str	r0, [r6, #692]
19617
-	str	r3, [r6, #708]
19911
+	str	r0, [r6, #688]
19912
+	str	r8, [r6, #680]
19913
+	str	r3, [r6, #704]
19618
19914
 	movs	r3, #1
19619
-	str	r3, [r6, #688]
19620
-	b	.L3203
19621
-.L3207:
19915
+	str	r3, [r6, #684]
19916
+	b	.L3080
19917
+.L3093:
19622
19918
 	mov	r0, r9
19623
-.L3203:
19624
-	add	sp, sp, #44
19625
-	@ sp needed
19626
-	pop	{r4, r5, r6, r7, r8, r9, pc}
19627
-.L3211:
19919
+	b	.L3080
19920
+.L3097:
19628
19921
 	.align	2
19629
-.L3210:
19922
+.L3096:
19630
19923
 	.word	.LANCHOR2
19631
19924
 	.word	.LANCHOR0
19632
19925
 	.fnend
19633
19926
 	.size	FtlReadRefresh, .-FtlReadRefresh
19634
19927
 	.align	1
19635
19928
 	.global	FtlGcFreeTempBlock
19929
+	.syntax unified
19636
19930
 	.thumb
19637
19931
 	.thumb_func
19932
+	.fpu softvfp
19638
19933
 	.type	FtlGcFreeTempBlock, %function
19639
19934
 FtlGcFreeTempBlock:
19640
19935
 	.fnstart
19641
19936
 	@ args = 0, pretend = 0, frame = 8
19642
19937
 	@ frame_needed = 0, uses_anonymous_args = 0
19643
-	push	{r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr}
19644
-	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
19645
-	.pad #12
19646
-	ldr	r5, .L3250
19647
-	ldr	r6, .L3250+4
19648
-	ldr	r2, [r5, #224]
19649
-	mov	r4, r5
19650
-	ldrh	r1, [r6, #2388]
19651
-	cmp	r2, #0
19652
-	bne	.L3248
19653
-	ldrh	r5, [r5, #412]
19938
+	push	{r0, r1, r4, r5, r6, r7, r8, r9, r10, lr}
19939
+	.save {r4, r5, r6, r7, r8, r9, r10, lr}
19940
+	.pad #8
19941
+	ldr	r4, .L3136
19942
+	ldr	r6, .L3136+4
19943
+	ldr	r2, [r4, #228]
19944
+	ldrh	r1, [r6, #2390]
19945
+	cbz	r2, .L3099
19946
+.L3134:
19947
+	movs	r0, #0
19948
+.L3098:
19949
+	add	sp, sp, #8
19950
+	@ sp needed
19951
+	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
19952
+.L3099:
19953
+	ldrh	r5, [r4, #416]
19654
19954
 	movw	r7, #65535
19655
19955
 	cmp	r5, r7
19656
-	bne	.L3215
19657
-.L3224:
19658
-	ldrh	r2, [r4, #412]
19956
+	bne	.L3101
19957
+.L3110:
19958
+	ldrh	r2, [r4, #416]
19659
19959
 	movw	r3, #65535
19660
-	movs	r7, #0
19661
-	ldr	r5, .L3250
19960
+	movs	r5, #0
19961
+	str	r5, [r4, #3468]
19662
19962
 	cmp	r2, r3
19663
-	str	r7, [r4, #3468]
19664
-	beq	.L3248
19963
+	beq	.L3134
19665
19964
 	bl	FtlCacheWriteBack
19666
-	ldrb	r0, [r5, #419]	@ zero_extendqisi2
19667
-	ldrh	r3, [r6, #2388]
19668
-	mov	r10, #12
19669
-	ldr	r2, [r5, #296]
19670
-	ldrh	r1, [r5, #412]
19671
-	smulbb	r3, r0, r3
19965
+	ldrb	r3, [r4, #423]	@ zero_extendqisi2
19966
+	mov	r9, #12
19967
+	ldrh	r0, [r6, #2390]
19968
+	ldr	r2, [r4, #300]
19969
+	ldrh	r1, [r4, #416]
19970
+	smulbb	r3, r3, r0
19672
19971
 	strh	r3, [r2, r1, lsl #1]	@ movhi
19673
-	ldr	r3, [r5, #496]
19674
-	ldrh	r2, [r5, #1172]
19675
-	add	r3, r3, r2
19676
-	str	r3, [r5, #496]
19677
-	b	.L3225
19678
-.L3215:
19679
-	cbz	r0, .L3218
19680
-	ldr	r3, .L3250+8
19681
-	ldrh	r0, [r3, #3448]
19682
-	cmp	r0, r7
19683
-	beq	.L3219
19684
-.L3220:
19685
-	movs	r1, #2
19686
-	b	.L3218
19687
-.L3219:
19688
-	strh	r2, [r3, #3448]	@ movhi
19689
-	ldrh	r3, [r4, #312]
19690
-	cmp	r3, #17
19691
-	bhi	.L3220
19692
-.L3218:
19693
-	ldr	r7, .L3250
19694
-	add	r0, r7, #412
19695
-	bl	FtlGcScanTempBlk
19696
-	str	r0, [sp, #4]
19697
-	adds	r0, r0, #1
19698
-	beq	.L3221
19699
-	ldr	r2, [r7, #232]
19700
-	ldrh	r3, [r2, r5, lsl #1]
19701
-	cmp	r3, #4
19702
-	bls	.L3222
19703
-	subs	r3, r3, #5
19704
-	movs	r0, #1
19705
-	strh	r3, [r2, r5, lsl #1]	@ movhi
19706
-	bl	FtlEctTblFlush
19707
-.L3222:
19708
-	ldr	r3, [r4, #3468]
19709
-	ldr	r2, .L3250
19710
-	cbnz	r3, .L3223
19711
-	ldr	r0, [sp, #4]
19712
-	ldr	r3, [r2, #704]
19713
-	ubfx	r0, r0, #10, #16
19714
-	adds	r3, r3, #1
19715
-	str	r3, [r2, #704]
19716
-	bl	FtlBbmMapBadBlock
19717
-	bl	FtlBbmTblFlush
19718
-.L3223:
19719
-	movs	r3, #0
19720
-	str	r3, [r4, #3468]
19721
-	b	.L3235
19722
-.L3221:
19723
-	ldr	r3, .L3250+8
19724
-	ldrh	r2, [r3, #3448]
19725
-	movw	r3, #65535
19726
-	cmp	r2, r3
19727
-	bne	.L3235
19728
-	b	.L3224
19729
-.L3228:
19730
-	ldr	r3, [r9, #4]
19731
-	cmp	r0, r3
19732
-	bne	.L3246
19733
-.L3227:
19734
-	adds	r7, r7, #1
19735
-.L3225:
19972
+	ldr	r2, [r4, #496]
19736
19973
 	ldrh	r3, [r4, #1172]
19737
-	uxth	r8, r7
19738
-	cmp	r3, r8
19739
-	bls	.L3249
19740
-	mul	r8, r10, r8
19741
-	ldr	fp, [r5, #1168]
19742
-	ldr	r3, [r6, #2448]
19743
-	add	r9, fp, r8
19744
-	ldr	r0, [r9, #8]
19745
-	cmp	r0, r3
19746
-	bcs	.L3246
19747
-	add	r1, sp, #4
19748
-	movs	r2, #0
19749
-	bl	log2phys
19750
-	ldr	r3, [fp, r8]
19751
-	ldr	r0, [sp, #4]
19752
-	cmp	r0, r3
19753
-	bne	.L3228
19754
-	ubfx	r0, r0, #10, #16
19755
-	bl	P2V_block_in_plane
19756
-	add	r1, r9, #4
19757
-	movs	r2, #1
19758
-	mov	r8, r0
19759
-	ldr	r0, [r9, #8]
19760
-	bl	log2phys
19761
-	mov	r0, r8
19762
-	b	.L3247
19763
-.L3246:
19764
-	ldrh	r0, [r5, #412]
19765
-.L3247:
19766
-	bl	decrement_vpc_count
19767
-	b	.L3227
19768
-.L3249:
19974
+	add	r3, r3, r2
19975
+	str	r3, [r4, #496]
19976
+.L3111:
19977
+	ldrh	r2, [r4, #1172]
19978
+	uxth	r3, r5
19979
+	cmp	r2, r3
19980
+	bhi	.L3115
19769
19981
 	movw	r0, #65535
19770
19982
 	bl	decrement_vpc_count
19771
-	ldrb	r3, [r6, #144]	@ zero_extendqisi2
19772
-	cbz	r3, .L3230
19773
-	ldr	r3, .L3250
19774
-	ldr	r0, .L3250+12
19775
-	ldrh	r1, [r3, #412]
19983
+	ldrb	r3, [r6, #152]	@ zero_extendqisi2
19984
+	cbz	r3, .L3116
19985
+	ldrh	r1, [r4, #416]
19986
+	ldr	r0, .L3136+8
19776
19987
 	bl	printk
19777
-.L3230:
19778
-	ldrh	r0, [r4, #412]
19779
-	ldr	r3, [r4, #296]
19988
+.L3116:
19989
+	ldrh	r0, [r4, #416]
19990
+	ldr	r3, [r4, #300]
19780
19991
 	ldrh	r3, [r3, r0, lsl #1]
19781
-	cbz	r3, .L3231
19992
+	cmp	r3, #0
19993
+	beq	.L3117
19782
19994
 	bl	INSERT_DATA_LIST
19783
-	b	.L3232
19784
-.L3231:
19785
-	bl	INSERT_FREE_LIST
19786
-.L3232:
19787
-	movw	r8, #65535
19995
+.L3118:
19996
+	movw	r7, #65535
19788
19997
 	movs	r5, #0
19789
-	strh	r8, [r4, #412]	@ movhi
19998
+	strh	r7, [r4, #416]	@ movhi
19790
19999
 	strh	r5, [r4, #1172]	@ movhi
19791
20000
 	strh	r5, [r4, #1164]	@ movhi
19792
20001
 	bl	l2p_flush
19793
20002
 	bl	FtlVpcTblFlush
19794
-	ldr	r3, [r6, #2244]
19795
-	ldr	r7, .L3250
19796
-	strh	r8, [r4, #556]	@ movhi
19797
-	cbz	r3, .L3233
19798
-	ldr	r3, [r7, #532]
20003
+	ldr	r3, [r6, #2248]
20004
+	strh	r7, [r4, #556]	@ movhi
20005
+	cmp	r3, #0
20006
+	beq	.L3119
20007
+	ldr	r3, [r4, #532]
19799
20008
 	cmp	r3, #39
19800
-	bhi	.L3233
19801
-	ldrh	r3, [r7, #536]
19802
-	ldrh	r2, [r7, #312]
19803
-	cmp	r2, r3
19804
-	bcs	.L3248
19805
-	lsls	r3, r3, #1
19806
-	strh	r3, [r7, #1120]	@ movhi
19807
-	b	.L3248
19808
-.L3233:
20009
+	bhi	.L3119
19809
20010
 	ldrh	r3, [r4, #536]
19810
-	ldrh	r1, [r4, #312]
19811
-	ldr	r2, .L3250
19812
-	add	r0, r3, r3, lsl #1
19813
-	cmp	r1, r0, asr #2
19814
-	ble	.L3248
19815
-	ldrb	r0, [r6, #144]	@ zero_extendqisi2
19816
-	cbz	r0, .L3234
19817
-	subs	r3, r3, #2
19818
-	strh	r3, [r2, #1120]	@ movhi
19819
-.L3248:
19820
-	movs	r0, #0
19821
-	b	.L3214
19822
-.L3234:
19823
-	movs	r3, #20
19824
-	strh	r3, [r2, #1120]	@ movhi
19825
-	b	.L3214
19826
-.L3235:
20011
+	ldrh	r2, [r4, #316]
20012
+	cmp	r2, r3
20013
+	bcs	.L3134
20014
+	lsls	r3, r3, #1
20015
+.L3135:
20016
+	strh	r3, [r4, #1120]	@ movhi
20017
+	b	.L3134
20018
+.L3101:
20019
+	cbz	r0, .L3104
20020
+	ldr	r3, .L3136+12
20021
+	ldrh	r0, [r3, #3444]
20022
+	cmp	r0, r7
20023
+	beq	.L3105
20024
+.L3106:
20025
+	movs	r1, #2
20026
+.L3104:
20027
+	ldr	r0, .L3136+16
20028
+	bl	FtlGcScanTempBlk
20029
+	str	r0, [sp, #4]
20030
+	adds	r0, r0, #1
20031
+	beq	.L3107
20032
+	ldr	r2, [r4, #236]
20033
+	ldrh	r3, [r2, r5, lsl #1]
20034
+	cmp	r3, #4
20035
+	bls	.L3108
20036
+	subs	r3, r3, #5
19827
20037
 	movs	r0, #1
19828
-.L3214:
19829
-	add	sp, sp, #12
19830
-	@ sp needed
19831
-	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
19832
-.L3251:
20038
+	strh	r3, [r2, r5, lsl #1]	@ movhi
20039
+	bl	FtlEctTblFlush
20040
+.L3108:
20041
+	ldr	r3, [r4, #3468]
20042
+	cbnz	r3, .L3109
20043
+	ldr	r3, [r4, #700]
20044
+	ldr	r0, [sp, #4]
20045
+	adds	r3, r3, #1
20046
+	ubfx	r0, r0, #10, #16
20047
+	str	r3, [r4, #700]
20048
+	bl	FtlBbmMapBadBlock
20049
+	bl	FtlBbmTblFlush
20050
+.L3109:
20051
+	movs	r3, #0
20052
+	str	r3, [r4, #3468]
20053
+.L3121:
20054
+	movs	r0, #1
20055
+	b	.L3098
20056
+.L3105:
20057
+	strh	r2, [r3, #3444]	@ movhi
20058
+	ldrh	r3, [r4, #316]
20059
+	cmp	r3, #17
20060
+	bhi	.L3106
20061
+	b	.L3104
20062
+.L3107:
20063
+	ldr	r3, .L3136+12
20064
+	ldrh	r2, [r3, #3444]
20065
+	movw	r3, #65535
20066
+	cmp	r2, r3
20067
+	bne	.L3121
20068
+	b	.L3110
20069
+.L3115:
20070
+	uxth	r8, r5
20071
+	ldr	r10, [r4, #1168]
20072
+	ldr	r3, [r6, #2452]
20073
+	mul	r8, r9, r8
20074
+	add	r7, r10, r8
20075
+	ldr	r0, [r7, #8]
20076
+	cmp	r0, r3
20077
+	bcc	.L3112
20078
+.L3132:
20079
+	ldrh	r0, [r4, #416]
20080
+	b	.L3133
20081
+.L3112:
20082
+	movs	r2, #0
20083
+	add	r1, sp, #4
20084
+	bl	log2phys
20085
+	ldr	r0, [r10, r8]
20086
+	ldr	r3, [sp, #4]
20087
+	cmp	r0, r3
20088
+	bne	.L3114
20089
+	ubfx	r0, r0, #10, #16
20090
+	bl	P2V_block_in_plane
20091
+	movs	r2, #1
20092
+	mov	r8, r0
20093
+	adds	r1, r7, #4
20094
+	ldr	r0, [r7, #8]
20095
+	bl	log2phys
20096
+	mov	r0, r8
20097
+.L3133:
20098
+	bl	decrement_vpc_count
20099
+	b	.L3113
20100
+.L3114:
20101
+	ldr	r2, [r7, #4]
20102
+	cmp	r3, r2
20103
+	bne	.L3132
20104
+.L3113:
20105
+	adds	r5, r5, #1
20106
+	b	.L3111
20107
+.L3117:
20108
+	bl	INSERT_FREE_LIST
20109
+	b	.L3118
20110
+.L3119:
20111
+	ldrh	r3, [r4, #536]
20112
+	ldrh	r2, [r4, #316]
20113
+	add	r1, r3, r3, lsl #1
20114
+	cmp	r2, r1, asr #2
20115
+	ble	.L3134
20116
+	ldrb	r0, [r6, #152]	@ zero_extendqisi2
20117
+	cbz	r0, .L3120
20118
+	subs	r3, r3, #2
20119
+	b	.L3135
20120
+.L3120:
20121
+	movs	r3, #20
20122
+	strh	r3, [r4, #1120]	@ movhi
20123
+	b	.L3098
20124
+.L3137:
19833
20125
 	.align	2
19834
-.L3250:
20126
+.L3136:
19835
20127
 	.word	.LANCHOR2
19836
20128
 	.word	.LANCHOR0
19837
-	.word	.LANCHOR1
19838
20129
 	.word	.LC155
20130
+	.word	.LANCHOR1
20131
+	.word	.LANCHOR2+416
19839
20132
 	.fnend
19840
20133
 	.size	FtlGcFreeTempBlock, .-FtlGcFreeTempBlock
19841
20134
 	.align	1
19842
20135
 	.global	FtlGcPageRecovery
20136
+	.syntax unified
19843
20137
 	.thumb
19844
20138
 	.thumb_func
20139
+	.fpu softvfp
19845
20140
 	.type	FtlGcPageRecovery, %function
19846
20141
 FtlGcPageRecovery:
19847
20142
 	.fnstart
..
..
@@ -19849,34 +20144,36 @@
19849
20144
 	@ frame_needed = 0, uses_anonymous_args = 0
19850
20145
 	push	{r3, r4, r5, lr}
19851
20146
 	.save {r3, r4, r5, lr}
19852
-	ldr	r5, .L3254
19853
-	ldr	r4, .L3254+4
19854
-	ldrh	r1, [r5, #2388]
19855
-	add	r0, r4, #412
20147
+	ldr	r5, .L3140
20148
+	ldr	r4, .L3140+4
20149
+	ldrh	r1, [r5, #2390]
20150
+	add	r0, r4, #416
19856
20151
 	bl	FtlGcScanTempBlk
19857
-	ldrh	r2, [r4, #414]
19858
-	ldrh	r3, [r5, #2388]
20152
+	ldrh	r2, [r4, #418]
20153
+	ldrh	r3, [r5, #2390]
19859
20154
 	cmp	r2, r3
19860
-	bcc	.L3252
20155
+	bcc	.L3138
19861
20156
 	add	r0, r4, #3408
19862
20157
 	bl	FtlMapBlkWriteDumpData
19863
20158
 	movs	r0, #0
19864
20159
 	bl	FtlGcFreeTempBlock
19865
20160
 	movs	r3, #0
19866
20161
 	str	r3, [r4, #3468]
19867
-.L3252:
20162
+.L3138:
19868
20163
 	pop	{r3, r4, r5, pc}
19869
-.L3255:
20164
+.L3141:
19870
20165
 	.align	2
19871
-.L3254:
20166
+.L3140:
19872
20167
 	.word	.LANCHOR0
19873
20168
 	.word	.LANCHOR2
19874
20169
 	.fnend
19875
20170
 	.size	FtlGcPageRecovery, .-FtlGcPageRecovery
19876
20171
 	.align	1
19877
20172
 	.global	FtlPowerLostRecovery
20173
+	.syntax unified
19878
20174
 	.thumb
19879
20175
 	.thumb_func
20176
+	.fpu softvfp
19880
20177
 	.type	FtlPowerLostRecovery, %function
19881
20178
 FtlPowerLostRecovery:
19882
20179
 	.fnstart
..
..
@@ -19885,12 +20182,12 @@
19885
20182
 	push	{r4, r5, r6, lr}
19886
20183
 	.save {r4, r5, r6, lr}
19887
20184
 	movs	r5, #0
19888
-	ldr	r4, .L3257
19889
-	ldr	r3, .L3257+4
19890
-	add	r6, r4, #316
19891
-	add	r4, r4, #364
20185
+	ldr	r4, .L3143
20186
+	ldr	r3, .L3143+4
20187
+	add	r6, r4, #320
20188
+	add	r4, r4, #368
19892
20189
 	mov	r0, r6
19893
-	str	r5, [r3, #844]
20190
+	str	r5, [r3, #1348]
19894
20191
 	bl	FtlRecoverySuperblock
19895
20192
 	mov	r0, r6
19896
20193
 	bl	FtlSlcSuperblockCheck
..
..
@@ -19903,17 +20200,19 @@
19903
20200
 	bl	decrement_vpc_count
19904
20201
 	mov	r0, r5
19905
20202
 	pop	{r4, r5, r6, pc}
19906
-.L3258:
20203
+.L3144:
19907
20204
 	.align	2
19908
-.L3257:
20205
+.L3143:
19909
20206
 	.word	.LANCHOR2
19910
-	.word	.LANCHOR5
20207
+	.word	.LANCHOR4
19911
20208
 	.fnend
19912
20209
 	.size	FtlPowerLostRecovery, .-FtlPowerLostRecovery
19913
20210
 	.align	1
19914
20211
 	.global	FtlSysBlkInit
20212
+	.syntax unified
19915
20213
 	.thumb
19916
20214
 	.thumb_func
20215
+	.fpu softvfp
19917
20216
 	.type	FtlSysBlkInit, %function
19918
20217
 FtlSysBlkInit:
19919
20218
 	.fnstart
..
..
@@ -19922,26 +20221,29 @@
19922
20221
 	push	{r3, r4, r5, r6, r7, lr}
19923
20222
 	.save {r3, r4, r5, r6, r7, lr}
19924
20223
 	movs	r3, #0
19925
-	ldr	r5, .L3276
20224
+	ldr	r5, .L3162
19926
20225
 	movw	r7, #65535
19927
-	ldr	r6, .L3276+4
19928
-	ldr	r4, .L3276+8
19929
-	ldrh	r0, [r5, #2324]
19930
-	strh	r3, [r6, #842]	@ movhi
19931
-	strh	r7, [r6, #840]	@ movhi
20226
+	ldr	r6, .L3162+4
20227
+	ldr	r4, .L3162+8
20228
+	ldrh	r0, [r5, #2328]
20229
+	strh	r3, [r6, #1344]	@ movhi
20230
+	strh	r7, [r6, #1342]	@ movhi
19932
20231
 	bl	FtlFreeSysBlkQueueInit
19933
20232
 	bl	FtlScanSysBlk
19934
20233
 	ldrh	r3, [r4, #540]
19935
20234
 	cmp	r3, r7
19936
-	bne	.L3260
19937
-.L3262:
19938
-	mov	r7, #-1
19939
-	b	.L3261
19940
-.L3260:
20235
+	mov	r7, r6
20236
+	bne	.L3146
20237
+.L3148:
20238
+	mov	r6, #-1
20239
+.L3145:
20240
+	mov	r0, r6
20241
+	pop	{r3, r4, r5, r6, r7, pc}
20242
+.L3146:
19941
20243
 	bl	FtlLoadSysInfo
19942
-	mov	r7, r0
20244
+	mov	r6, r0
19943
20245
 	cmp	r0, #0
19944
-	bne	.L3262
20246
+	bne	.L3148
19945
20247
 	bl	FtlLoadMapInfo
19946
20248
 	bl	FtlLoadVonderInfo
19947
20249
 	bl	Ftl_load_ext_data
..
..
@@ -19951,405 +20253,399 @@
19951
20253
 	bl	FtlPowerLostRecovery
19952
20254
 	movs	r0, #1
19953
20255
 	bl	FtlUpdateVaildLpn
19954
-	ldrh	r1, [r5, #2426]
19955
-	ldr	r2, [r4, #460]
20256
+	ldrh	r1, [r5, #2430]
20257
+	mov	r3, r6
20258
+	ldr	r2, [r4, #464]
19956
20259
 	movs	r0, #12
19957
-	mov	r3, r7
19958
-.L3263:
20260
+.L3149:
19959
20261
 	cmp	r3, r1
19960
-	bge	.L3268
19961
-	mla	lr, r0, r3, r2
19962
-	ldr	lr, [lr, #4]
19963
-	cmp	lr, #0
19964
-	bge	.L3264
19965
-.L3268:
19966
-	ldrh	r2, [r4, #268]
20262
+	bge	.L3154
20263
+	mla	ip, r0, r3, r2
20264
+	ldr	ip, [ip, #4]
20265
+	cmp	ip, #0
20266
+	bge	.L3150
20267
+.L3154:
20268
+	ldrh	r2, [r4, #272]
19967
20269
 	cmp	r3, r1
19968
20270
 	add	r2, r2, #1
19969
-	strh	r2, [r4, #268]	@ movhi
19970
-	bge	.L3275
19971
-	b	.L3265
19972
-.L3264:
19973
-	adds	r3, r3, #1
19974
-	b	.L3263
19975
-.L3275:
19976
-	ldrh	r3, [r6, #842]
19977
-	cbz	r3, .L3269
19978
-.L3265:
19979
-	ldrh	r1, [r4, #316]
19980
-	ldr	r2, [r4, #296]
19981
-	ldrh	r0, [r4, #320]
20271
+	strh	r2, [r4, #272]	@ movhi
20272
+	bge	.L3161
20273
+.L3151:
20274
+	ldrh	r1, [r4, #320]
20275
+	ldr	r2, [r4, #300]
20276
+	ldrh	r0, [r4, #324]
19982
20277
 	ldrh	r3, [r2, r1, lsl #1]
19983
20278
 	subs	r3, r3, r0
19984
20279
 	strh	r3, [r2, r1, lsl #1]	@ movhi
19985
-	ldr	r1, [r4, #296]
19986
-	ldrh	r3, [r5, #2388]
19987
-	ldrh	r0, [r4, #364]
19988
-	ldrh	r6, [r4, #368]
19989
-	strh	r3, [r4, #318]	@ movhi
20280
+	ldrh	r3, [r5, #2390]
20281
+	ldr	r1, [r4, #300]
20282
+	ldrh	r0, [r4, #368]
20283
+	strh	r3, [r4, #322]	@ movhi
19990
20284
 	movs	r3, #0
19991
-	strb	r3, [r4, #322]
19992
-	strh	r3, [r4, #320]	@ movhi
20285
+	strb	r3, [r4, #326]
20286
+	strh	r3, [r4, #324]	@ movhi
20287
+	ldrh	r7, [r4, #372]
19993
20288
 	ldrh	r2, [r1, r0, lsl #1]
19994
-	subs	r2, r2, r6
20289
+	subs	r2, r2, r7
19995
20290
 	strh	r2, [r1, r0, lsl #1]	@ movhi
19996
-	ldrh	r2, [r5, #2388]
19997
-	strb	r3, [r4, #370]
19998
-	strh	r3, [r4, #368]	@ movhi
19999
-	ldrh	r3, [r4, #270]
20000
-	strh	r2, [r4, #366]	@ movhi
20291
+	strb	r3, [r4, #374]
20292
+	strh	r3, [r4, #372]	@ movhi
20293
+	ldrh	r3, [r4, #274]
20294
+	ldrh	r2, [r5, #2390]
20001
20295
 	adds	r3, r3, #1
20002
-	strh	r3, [r4, #270]	@ movhi
20296
+	strh	r2, [r4, #370]	@ movhi
20297
+	strh	r3, [r4, #274]	@ movhi
20003
20298
 	bl	l2p_flush
20004
20299
 	bl	FtlVpcTblFlush
20005
20300
 	bl	FtlVpcTblFlush
20006
-.L3269:
20007
-	ldrh	r0, [r4, #316]
20301
+	b	.L3155
20302
+.L3150:
20303
+	adds	r3, r3, #1
20304
+	b	.L3149
20305
+.L3161:
20306
+	ldrh	r3, [r7, #1344]
20307
+	cmp	r3, #0
20308
+	bne	.L3151
20309
+.L3155:
20310
+	ldrh	r0, [r4, #320]
20008
20311
 	movw	r3, #65535
20009
-	ldr	r6, .L3276+8
20010
20312
 	cmp	r0, r3
20011
-	beq	.L3270
20012
-	ldrh	r3, [r6, #320]
20013
-	cbnz	r3, .L3270
20014
-	ldrh	r3, [r6, #368]
20015
-	cbnz	r3, .L3270
20313
+	beq	.L3156
20314
+	ldrh	r3, [r4, #324]
20315
+	cbnz	r3, .L3156
20316
+	ldrh	r3, [r4, #372]
20317
+	cbnz	r3, .L3156
20016
20318
 	bl	FtlGcRefreshOpenBlock
20017
-	ldrh	r0, [r6, #364]
20319
+	ldrh	r0, [r4, #368]
20018
20320
 	bl	FtlGcRefreshOpenBlock
20019
20321
 	bl	FtlVpcTblFlush
20020
-	add	r0, r6, #316
20322
+	ldr	r0, .L3162+12
20021
20323
 	bl	allocate_new_data_superblock
20022
-	add	r0, r6, #364
20324
+	ldr	r0, .L3162+16
20023
20325
 	bl	allocate_new_data_superblock
20024
-.L3270:
20025
-	ldrb	r3, [r5]	@ zero_extendqisi2
20026
-	cbnz	r3, .L3271
20027
-	ldrh	r3, [r4, #268]
20326
+.L3156:
20327
+	ldrb	r3, [r5, #36]	@ zero_extendqisi2
20328
+	cbnz	r3, .L3157
20329
+	ldrh	r3, [r4, #272]
20028
20330
 	lsls	r3, r3, #27
20029
-	bne	.L3261
20030
-.L3271:
20331
+	bne	.L3145
20332
+.L3157:
20031
20333
 	bl	FtlVpcCheckAndModify
20032
-.L3261:
20033
-	mov	r0, r7
20034
-	pop	{r3, r4, r5, r6, r7, pc}
20035
-.L3277:
20334
+	b	.L3145
20335
+.L3163:
20036
20336
 	.align	2
20037
-.L3276:
20337
+.L3162:
20038
20338
 	.word	.LANCHOR0
20039
-	.word	.LANCHOR5
20339
+	.word	.LANCHOR4
20040
20340
 	.word	.LANCHOR2
20341
+	.word	.LANCHOR2+320
20342
+	.word	.LANCHOR2+368
20041
20343
 	.fnend
20042
20344
 	.size	FtlSysBlkInit, .-FtlSysBlkInit
20043
20345
 	.align	1
20044
20346
 	.global	FtlLowFormat
20347
+	.syntax unified
20045
20348
 	.thumb
20046
20349
 	.thumb_func
20350
+	.fpu softvfp
20047
20351
 	.type	FtlLowFormat, %function
20048
20352
 FtlLowFormat:
20049
20353
 	.fnstart
20050
-	@ args = 0, pretend = 0, frame = 8
20354
+	@ args = 0, pretend = 0, frame = 0
20051
20355
 	@ frame_needed = 0, uses_anonymous_args = 0
20052
-	push	{r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr}
20053
-	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
20054
-	.pad #12
20055
-	ldr	r4, .L3312
20056
-	ldr	r6, [r4, #224]
20356
+	push	{r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
20357
+	.save {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
20358
+	ldr	r4, .L3195
20359
+	ldr	r6, [r4, #228]
20057
20360
 	cmp	r6, #0
20058
-	bne	.L3280
20059
-	ldr	r5, .L3312+4
20361
+	bne	.L3166
20362
+	ldr	r5, .L3195+4
20060
20363
 	mov	r1, r6
20061
20364
 	ldr	r0, [r4, #3392]
20062
-	ldrh	r2, [r5, #2424]
20365
+	ldrh	r2, [r5, #2428]
20063
20366
 	lsls	r2, r2, #2
20064
20367
 	bl	ftl_memset
20065
-	ldrh	r2, [r5, #2424]
20368
+	ldrh	r2, [r5, #2428]
20066
20369
 	mov	r1, r6
20067
20370
 	ldr	r0, [r4, #3388]
20068
20371
 	lsls	r2, r2, #2
20069
20372
 	bl	ftl_memset
20070
-	ldrh	r0, [r5, #2324]
20373
+	ldrh	r0, [r5, #2328]
20071
20374
 	str	r6, [r4, #508]
20072
20375
 	str	r6, [r4, #512]
20073
20376
 	bl	FtlFreeSysBlkQueueInit
20074
20377
 	bl	FtlLoadBbt
20075
-	cbz	r0, .L3281
20378
+	cbz	r0, .L3167
20076
20379
 	bl	FtlMakeBbt
20077
-.L3281:
20078
-	ldr	r0, .L3312+8
20380
+.L3167:
20381
+	ldr	r0, .L3195+8
20079
20382
 	movs	r2, #0
20080
-.L3282:
20081
-	ldrh	r1, [r5, #2394]
20383
+.L3168:
20384
+	ldrh	r1, [r5, #2396]
20082
20385
 	uxth	r3, r2
20083
20386
 	adds	r2, r2, #1
20084
20387
 	cmp	r3, r1, lsl #7
20085
-	bge	.L3309
20388
+	blt	.L3169
20389
+	ldrh	r7, [r5, #2332]
20390
+	movs	r6, #0
20391
+.L3170:
20392
+	ldrh	r3, [r5, #2334]
20393
+	cmp	r3, r7
20394
+	bhi	.L3171
20395
+	ldrh	r1, [r5, #2324]
20396
+	subs	r3, r6, #3
20397
+	cmp	r3, r1, lsl #1
20398
+	blt	.L3172
20399
+	mov	r0, r6
20400
+	movs	r6, #0
20401
+	bl	__aeabi_uidiv
20402
+	ldr	r3, [r5, #2424]
20403
+	add	r0, r0, r3
20404
+	uxth	r0, r0
20405
+	bl	FtlSysBlkNumInit
20406
+	ldrh	r0, [r5, #2328]
20407
+	bl	FtlFreeSysBlkQueueInit
20408
+	ldrh	r7, [r5, #2332]
20409
+.L3173:
20410
+	ldrh	r3, [r5, #2334]
20411
+	cmp	r3, r7
20412
+	bhi	.L3174
20413
+.L3172:
20414
+	movs	r7, #0
20415
+	mov	r8, r7
20416
+.L3175:
20417
+	ldrh	r3, [r5, #2332]
20418
+	uxth	r0, r7
20419
+	adds	r7, r7, #1
20420
+	cmp	r3, r0
20421
+	bhi	.L3176
20422
+	ldrh	r3, [r5, #2334]
20423
+	ldrh	r7, [r5, #2324]
20424
+	ldr	fp, [r5, #2336]
20425
+	str	r3, [r4, #3292]
20426
+	mov	r1, r7
20427
+	mov	r0, fp
20428
+	bl	__aeabi_uidiv
20429
+	ubfx	r9, r0, #5, #16
20430
+	mov	r10, r0
20431
+	add	r3, r9, #36
20432
+	str	r0, [r5, #2452]
20433
+	strh	r3, [r4, #536]	@ movhi
20434
+	movs	r3, #24
20435
+	muls	r3, r7, r3
20436
+	cmp	r8, r3
20437
+	ble	.L3177
20438
+	mov	r1, r7
20439
+	sub	r0, fp, r8
20440
+	bl	__aeabi_uidiv
20441
+	str	r0, [r5, #2452]
20442
+	lsrs	r0, r0, #5
20443
+	adds	r0, r0, #24
20444
+	strh	r0, [r4, #536]	@ movhi
20445
+.L3177:
20446
+	ldr	r3, [r5, #2248]
20447
+	cmp	r3, #1
20448
+	bne	.L3178
20449
+	ldrh	fp, [r4, #536]
20450
+	mov	r1, r7
20451
+	mov	r0, r8
20452
+	bl	__aeabi_uidiv
20453
+	uxtah	r0, fp, r0
20454
+	add	fp, fp, r0, asr #2
20455
+	strh	fp, [r4, #536]	@ movhi
20456
+.L3178:
20457
+	ldrb	r3, [r5, #152]	@ zero_extendqisi2
20458
+	cbz	r3, .L3179
20459
+	ldrh	fp, [r4, #536]
20460
+	mov	r1, r7
20461
+	mov	r0, r8
20462
+	bl	__aeabi_uidiv
20463
+	uxtah	r0, fp, r0
20464
+	add	fp, fp, r0, asr #2
20465
+	strh	fp, [r4, #536]	@ movhi
20466
+.L3179:
20467
+	ldrh	r3, [r5, #2384]
20468
+	cbz	r3, .L3181
20469
+	ldrh	r2, [r4, #536]
20470
+	add	r2, r2, r3, lsr #1
20471
+	strh	r2, [r4, #536]	@ movhi
20472
+	mul	r2, r7, r3
20473
+	cmp	r8, r2
20474
+	itttt	lt
20475
+	addlt	r3, r3, #32
20476
+	strlt	r10, [r5, #2452]
20477
+	addlt	r3, r3, r9
20478
+	strhlt	r3, [r4, #536]	@ movhi
20479
+.L3181:
20480
+	ldrh	r2, [r4, #536]
20481
+	ldr	r3, [r5, #2452]
20482
+	ldr	r9, .L3195+28
20483
+	subs	r3, r3, r2
20484
+	muls	r7, r3, r7
20485
+	ldrh	r3, [r5, #2390]
20486
+	str	r7, [r9, #1292]
20487
+	muls	r7, r3, r7
20488
+	ldrh	r3, [r5, #2396]
20489
+	str	r7, [r5, #2452]
20490
+	muls	r7, r3, r7
20491
+	str	r7, [r5, #2432]
20492
+	bl	FtlBbmTblFlush
20493
+	ldr	r2, [r5, #2340]
20494
+	add	r1, r6, r8
20495
+	ldrh	r3, [r5, #2404]
20496
+	add	r3, r3, r2, lsr #3
20497
+	cmp	r1, r3
20498
+	bls	.L3183
20499
+	lsrs	r2, r2, #5
20500
+	ldr	r0, .L3195+12
20501
+	bl	printk
20502
+.L3183:
20503
+	ldrh	r2, [r5, #2334]
20504
+	movs	r1, #0
20505
+	ldr	r0, [r4, #300]
20506
+	movw	r7, #65535
20507
+	lsls	r2, r2, #1
20508
+	bl	ftl_memset
20509
+	ldrh	r2, [r5, #2332]
20510
+	movs	r3, #0
20511
+	ldr	r0, [r5, #32]
20512
+	movs	r1, #255
20513
+	ldr	r5, .L3195+16
20514
+	str	r3, [r4, #472]
20515
+	strh	r3, [r4, #558]	@ movhi
20516
+	lsrs	r2, r2, #3
20517
+	strb	r3, [r4, #562]
20518
+	strb	r3, [r4, #564]
20519
+	strh	r3, [r4, #322]	@ movhi
20520
+	strb	r3, [r4, #326]
20521
+	strh	r3, [r4, #320]	@ movhi
20522
+	movs	r3, #1
20523
+	strh	r7, [r4, #556]	@ movhi
20524
+	strb	r3, [r4, #328]
20525
+	bl	ftl_memset
20526
+.L3184:
20527
+	mov	r0, r5
20528
+	bl	make_superblock
20529
+	ldrb	r3, [r4, #327]	@ zero_extendqisi2
20530
+	ldrh	r2, [r4, #320]
20531
+	cbnz	r3, .L3185
20532
+	ldr	r3, [r4, #300]
20533
+	strh	r7, [r3, r2, lsl #1]	@ movhi
20534
+	ldrh	r3, [r4, #320]
20535
+	adds	r3, r3, #1
20536
+	strh	r3, [r4, #320]	@ movhi
20537
+	b	.L3184
20538
+.L3169:
20086
20539
 	ldr	r6, [r4, #3332]
20087
20540
 	mvns	r1, r3
20088
20541
 	orr	r1, r3, r1, lsl #16
20089
20542
 	str	r1, [r6, r3, lsl #2]
20090
20543
 	ldr	r1, [r4, #3336]
20091
20544
 	str	r0, [r1, r3, lsl #2]
20092
-	b	.L3282
20093
-.L3309:
20094
-	ldr	r3, .L3312+4
20095
-	movs	r6, #0
20096
-	ldrh	r7, [r3, #2328]
20097
-.L3284:
20098
-	ldrh	r3, [r5, #2330]
20099
-	ldr	r8, .L3312+4
20100
-	cmp	r3, r7
20101
-	bls	.L3310
20545
+	b	.L3168
20546
+.L3171:
20102
20547
 	mov	r0, r7
20103
20548
 	movs	r1, #1
20104
20549
 	bl	FtlLowFormatEraseBlock
20105
20550
 	adds	r7, r7, #1
20551
+	add	r6, r6, r0
20552
+	uxth	r6, r6
20106
20553
 	uxth	r7, r7
20107
-	add	r0, r0, r6
20108
-	uxth	r6, r0
20109
-	b	.L3284
20110
-.L3310:
20111
-	ldrh	r1, [r8, #2320]
20112
-	subs	r3, r6, #3
20113
-	cmp	r3, r1, lsl #1
20114
-	blt	.L3286
20115
-	mov	r0, r6
20116
-	movs	r6, #0
20117
-	bl	__aeabi_uidiv
20118
-	ldr	r3, [r8, #2420]
20119
-	add	r0, r0, r3
20120
-	uxth	r0, r0
20121
-	bl	FtlSysBlkNumInit
20122
-	ldrh	r0, [r8, #2324]
20123
-	bl	FtlFreeSysBlkQueueInit
20124
-	ldrh	r7, [r8, #2328]
20125
-.L3287:
20126
-	ldrh	r3, [r5, #2330]
20127
-	cmp	r3, r7
20128
-	bls	.L3286
20554
+	b	.L3170
20555
+.L3174:
20129
20556
 	mov	r0, r7
20130
20557
 	movs	r1, #1
20131
20558
 	bl	FtlLowFormatEraseBlock
20132
20559
 	adds	r7, r7, #1
20560
+	add	r6, r6, r0
20561
+	uxth	r6, r6
20133
20562
 	uxth	r7, r7
20134
-	add	r0, r0, r6
20135
-	uxth	r6, r0
20136
-	b	.L3287
20137
-.L3286:
20138
-	mov	r8, #0
20139
-	mov	r7, r8
20140
-.L3289:
20141
-	ldrh	r3, [r5, #2328]
20142
-	uxth	r0, r8
20143
-	ldr	fp, .L3312+4
20144
-	add	r8, r8, #1
20145
-	cmp	r3, r0
20146
-	bls	.L3311
20563
+	b	.L3173
20564
+.L3176:
20147
20565
 	movs	r1, #0
20148
20566
 	bl	FtlLowFormatEraseBlock
20149
-	add	r0, r0, r7
20150
-	uxth	r7, r0
20151
-	b	.L3289
20152
-.L3311:
20153
-	ldr	r2, [fp, #2332]
20154
-	ldrh	r3, [fp, #2330]
20155
-	ldrh	r8, [fp, #2320]
20156
-	mov	r0, r2
20157
-	str	r2, [sp, #4]
20158
-	str	r3, [r4, #3292]
20159
-	mov	r1, r8
20160
-	bl	__aeabi_uidiv
20161
-	ubfx	r9, r0, #5, #16
20162
-	mov	r10, r0
20163
-	add	r3, r9, #36
20164
-	strh	r3, [r4, #536]	@ movhi
20165
-	movs	r3, #24
20166
-	str	r0, [fp, #2448]
20167
-	ldr	r2, [sp, #4]
20168
-	mul	r3, r3, r8
20169
-	cmp	r7, r3
20170
-	ble	.L3291
20171
-	subs	r0, r2, r7
20172
-	mov	r1, r8
20173
-	bl	__aeabi_uidiv
20174
-	ldr	r3, .L3312
20175
-	str	r0, [fp, #2448]
20176
-	lsrs	r0, r0, #5
20177
-	adds	r0, r0, #24
20178
-	strh	r0, [r3, #536]	@ movhi
20179
-.L3291:
20180
-	ldr	r3, [r5, #2244]
20181
-	cmp	r3, #1
20182
-	bne	.L3292
20183
-	mov	r0, r7
20184
-	mov	r1, r8
20185
-	bl	__aeabi_uidiv
20186
-	ldrh	fp, [r4, #536]
20187
-	uxtah	r0, fp, r0
20188
-	add	fp, fp, r0, asr #2
20189
-	strh	fp, [r4, #536]	@ movhi
20190
-.L3292:
20191
-	ldrb	r3, [r5, #144]	@ zero_extendqisi2
20192
-	cbz	r3, .L3293
20193
-	mov	r0, r7
20194
-	mov	r1, r8
20195
-	bl	__aeabi_uidiv
20196
-	ldrh	fp, [r4, #536]
20197
-	uxtah	r0, fp, r0
20198
-	add	fp, fp, r0, asr #2
20199
-	strh	fp, [r4, #536]	@ movhi
20200
-.L3293:
20201
-	ldrh	r3, [r5, #2382]
20202
-	cbz	r3, .L3295
20203
-	ldrh	r2, [r4, #536]
20204
-	add	r2, r2, r3, lsr #1
20205
-	strh	r2, [r4, #536]	@ movhi
20206
-	mul	r2, r8, r3
20207
-	cmp	r2, r7
20208
-	itttt	gt
20209
-	addgt	r3, r3, #32
20210
-	ldrgt	r2, .L3312+4
20211
-	addgt	r3, r3, r9
20212
-	strgt	r10, [r2, #2448]
20213
-	itt	gt
20214
-	ldrgt	r2, .L3312
20215
-	strhgt	r3, [r2, #536]	@ movhi
20216
-.L3295:
20217
-	ldrh	r2, [r4, #536]
20218
-	ldr	r3, [r5, #2448]
20219
-	subs	r3, r3, r2
20220
-	ldrh	r2, [r5, #2388]
20221
-	mul	r3, r8, r3
20222
-	ldr	r8, .L3312+20
20223
-	str	r3, [r8, #1284]
20224
-	muls	r3, r2, r3
20225
-	ldrh	r2, [r5, #2394]
20226
-	str	r3, [r5, #2448]
20227
-	muls	r3, r2, r3
20228
-	str	r3, [r5, #2428]
20229
-	bl	FtlBbmTblFlush
20230
-	ldr	r2, [r5, #2336]
20231
-	adds	r1, r7, r6
20232
-	ldrh	r3, [r5, #2402]
20233
-	add	r3, r3, r2, lsr #3
20234
-	cmp	r1, r3
20235
-	bls	.L3297
20236
-	ldr	r0, .L3312+12
20237
-	lsrs	r2, r2, #5
20238
-	bl	printk
20239
-.L3297:
20240
-	ldrh	r2, [r5, #2330]
20241
-	movs	r1, #0
20242
-	ldr	r0, [r4, #296]
20243
-	movs	r7, #0
20244
-	movw	r6, #65535
20245
-	lsls	r2, r2, #1
20246
-	bl	ftl_memset
20247
-	ldrh	r2, [r5, #2328]
20248
-	ldr	r0, [r4, #472]
20249
-	movs	r1, #255
20250
-	str	r7, [r4, #468]
20251
-	movs	r3, #1
20252
-	lsrs	r2, r2, #3
20253
-	strh	r7, [r4, #558]	@ movhi
20254
-	strb	r7, [r4, #562]
20255
-	strb	r7, [r4, #564]
20256
-	strh	r7, [r4, #318]	@ movhi
20257
-	strb	r7, [r4, #322]
20258
-	strh	r7, [r4, #316]	@ movhi
20259
-	strh	r6, [r4, #556]	@ movhi
20260
-	strb	r3, [r4, #324]
20261
-	bl	ftl_memset
20262
-	ldr	r7, .L3312
20263
-.L3298:
20264
-	ldr	r5, .L3312
20265
-	add	r0, r5, #316
20266
-	bl	make_superblock
20267
-	ldrb	r3, [r4, #323]	@ zero_extendqisi2
20268
-	ldrh	r2, [r4, #316]
20269
-	cbnz	r3, .L3299
20270
-	ldr	r3, [r7, #296]
20271
-	strh	r6, [r3, r2, lsl #1]	@ movhi
20272
-	ldrh	r3, [r7, #316]
20567
+	add	r8, r8, r0
20568
+	uxth	r8, r8
20569
+	b	.L3175
20570
+.L3185:
20571
+	ldr	r3, [r4, #508]
20572
+	movw	r5, #65535
20573
+	ldrh	r1, [r4, #324]
20574
+	ldr	r7, .L3195+20
20575
+	str	r3, [r4, #332]
20273
20576
 	adds	r3, r3, #1
20274
-	strh	r3, [r7, #316]	@ movhi
20275
-	b	.L3298
20276
-.L3299:
20277
-	ldr	r3, [r5, #508]
20278
-	movw	r7, #65535
20279
-	ldrh	r1, [r5, #320]
20280
-	str	r3, [r5, #328]
20281
-	adds	r3, r3, #1
20282
-	str	r3, [r5, #508]
20283
-	ldr	r3, [r5, #296]
20577
+	str	r3, [r4, #508]
20578
+	ldr	r3, [r4, #300]
20284
20579
 	strh	r1, [r3, r2, lsl #1]	@ movhi
20285
20580
 	movs	r3, #0
20286
-	strh	r3, [r5, #366]	@ movhi
20287
-	strb	r3, [r5, #370]
20288
-	ldrh	r3, [r5, #316]
20581
+	strh	r3, [r4, #370]	@ movhi
20582
+	strb	r3, [r4, #374]
20583
+	ldrh	r3, [r4, #320]
20289
20584
 	adds	r3, r3, #1
20290
-	strh	r3, [r5, #364]	@ movhi
20585
+	strh	r3, [r4, #368]	@ movhi
20291
20586
 	movs	r3, #1
20292
-	strb	r3, [r5, #372]
20293
-.L3300:
20294
-	ldr	r6, .L3312
20295
-	add	r0, r6, #364
20587
+	strb	r3, [r4, #376]
20588
+.L3186:
20589
+	mov	r0, r7
20296
20590
 	bl	make_superblock
20297
-	ldrb	r3, [r4, #371]	@ zero_extendqisi2
20298
-	ldrh	r2, [r4, #364]
20299
-	cbnz	r3, .L3301
20300
-	ldr	r3, [r5, #296]
20301
-	strh	r7, [r3, r2, lsl #1]	@ movhi
20302
-	ldrh	r3, [r5, #364]
20591
+	ldrb	r3, [r4, #375]	@ zero_extendqisi2
20592
+	ldrh	r2, [r4, #368]
20593
+	cbnz	r3, .L3187
20594
+	ldr	r3, [r4, #300]
20595
+	strh	r5, [r3, r2, lsl #1]	@ movhi
20596
+	ldrh	r3, [r4, #368]
20303
20597
 	adds	r3, r3, #1
20304
-	strh	r3, [r5, #364]	@ movhi
20305
-	b	.L3300
20306
-.L3301:
20307
-	ldr	r3, [r6, #508]
20308
-	movw	r4, #65535
20309
-	ldrh	r1, [r6, #368]
20310
-	str	r3, [r6, #376]
20598
+	strh	r3, [r4, #368]	@ movhi
20599
+	b	.L3186
20600
+.L3187:
20601
+	ldr	r3, [r4, #508]
20602
+	movw	r5, #65535
20603
+	ldrh	r1, [r4, #372]
20604
+	str	r3, [r4, #380]
20311
20605
 	adds	r3, r3, #1
20312
-	str	r3, [r6, #508]
20313
-	ldr	r3, [r6, #296]
20606
+	str	r3, [r4, #508]
20607
+	ldr	r3, [r4, #300]
20314
20608
 	strh	r1, [r3, r2, lsl #1]	@ movhi
20315
-	strh	r4, [r6, #412]	@ movhi
20609
+	strh	r5, [r4, #416]	@ movhi
20316
20610
 	bl	FtlFreeSysBlkQueueOut
20317
20611
 	movs	r3, #0
20318
-	strh	r3, [r6, #542]	@ movhi
20319
-	ldr	r3, [r8, #1284]
20320
-	strh	r4, [r6, #544]	@ movhi
20321
-	strh	r3, [r6, #546]	@ movhi
20322
-	ldr	r3, [r6, #508]
20323
-	str	r3, [r6, #548]
20612
+	strh	r0, [r4, #540]	@ movhi
20613
+	strh	r3, [r4, #542]	@ movhi
20614
+	ldr	r3, [r9, #1292]
20615
+	strh	r5, [r4, #544]	@ movhi
20616
+	strh	r3, [r4, #546]	@ movhi
20617
+	ldr	r3, [r4, #508]
20618
+	str	r3, [r4, #548]
20324
20619
 	adds	r3, r3, #1
20325
-	str	r3, [r6, #508]
20326
-	strh	r0, [r6, #540]	@ movhi
20620
+	str	r3, [r4, #508]
20327
20621
 	bl	FtlVpcTblFlush
20328
20622
 	bl	FtlSysBlkInit
20329
-	cbnz	r0, .L3280
20330
-	ldr	r3, .L3312+16
20623
+	cbnz	r0, .L3166
20624
+	ldr	r3, .L3195+24
20331
20625
 	movs	r2, #1
20332
-	str	r2, [r3, #504]
20333
-.L3280:
20626
+	str	r2, [r3, #500]
20627
+.L3166:
20334
20628
 	movs	r0, #0
20335
-	add	sp, sp, #12
20336
-	@ sp needed
20337
-	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
20338
-.L3313:
20629
+	pop	{r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
20630
+.L3196:
20339
20631
 	.align	2
20340
-.L3312:
20632
+.L3195:
20341
20633
 	.word	.LANCHOR2
20342
20634
 	.word	.LANCHOR0
20343
20635
 	.word	168778952
20344
20636
 	.word	.LC156
20637
+	.word	.LANCHOR2+320
20638
+	.word	.LANCHOR2+368
20345
20639
 	.word	.LANCHOR1
20346
20640
 	.word	.LANCHOR4
20347
20641
 	.fnend
20348
20642
 	.size	FtlLowFormat, .-FtlLowFormat
20349
20643
 	.align	1
20350
20644
 	.global	FtlReInitForSDUpdata
20645
+	.syntax unified
20351
20646
 	.thumb
20352
20647
 	.thumb_func
20648
+	.fpu softvfp
20353
20649
 	.type	FtlReInitForSDUpdata, %function
20354
20650
 FtlReInitForSDUpdata:
20355
20651
 	.fnstart
..
..
@@ -20358,168 +20654,179 @@
20358
20654
 	push	{r0, r1, r2, r3, r4, r5, r6, lr}
20359
20655
 	.save {r4, r5, r6, lr}
20360
20656
 	.pad #16
20361
-	ldr	r4, .L3342
20362
-	ldrb	r3, [r4, #144]	@ zero_extendqisi2
20363
-	cbz	r3, .L3315
20364
-.L3317:
20365
-	movs	r0, #0
20366
-	b	.L3316
20367
-.L3315:
20368
-	ldr	r5, .L3342+4
20369
-	ldr	r0, [r5, #1180]
20370
-	bl	FlashInit
20371
-	cmp	r0, #0
20372
-	bne	.L3317
20373
-	bl	FlashLoadFactorBbt
20374
-	cbz	r0, .L3318
20375
-	bl	FlashMakeFactorBbt
20376
-.L3318:
20377
-	ldr	r0, [r5, #1212]
20378
-	bl	FlashReadIdbDataRaw
20379
-	cbz	r0, .L3319
20380
-	movs	r1, #0
20381
-	movs	r2, #16
20382
-	mov	r0, sp
20383
-	movs	r6, #1
20384
-	bl	FlashReadFacBbtData
20385
-	movs	r3, #0
20386
-	mov	r2, r3
20387
-	ldr	r1, [sp]
20388
-.L3320:
20389
-	lsl	r5, r6, r2
20390
-	adds	r0, r3, #1
20391
-	tst	r5, r1
20392
-	add	r2, r2, #1
20393
-	it	ne
20394
-	movne	r3, r0
20395
-	cmp	r2, #16
20396
-	bne	.L3320
20397
-	cmp	r3, #6
20398
-	bls	.L3338
20399
-	movs	r2, #0
20400
-	movs	r6, #1
20401
-.L3323:
20402
-	lsl	r5, r6, r2
20403
-	adds	r0, r3, #1
20404
-	tst	r5, r1
20405
-	add	r2, r2, #1
20406
-	it	ne
20407
-	movne	r3, r0
20408
-	cmp	r2, #24
20409
-	bne	.L3323
20410
-	cmp	r3, #17
20411
-	bhi	.L3324
20412
-.L3338:
20413
-	strb	r2, [r4, #1]
20414
-	b	.L3322
20415
-.L3324:
20416
-	movs	r3, #36
20417
-	strb	r3, [r4, #1]
20418
-.L3322:
20419
-	ldrb	r3, [r4, #1]	@ zero_extendqisi2
20420
-	strh	r3, [r4, #142]	@ movhi
20421
-.L3319:
20422
-	ldr	r1, .L3342+8
20423
-	ldr	r0, .L3342+12
20424
-	bl	printk
20425
-	ldr	r0, .L3342+16
20426
-	bl	FtlConstantsInit
20427
-	bl	FtlVariablesInit
20428
-	ldrh	r0, [r4, #2324]
20429
-	bl	FtlFreeSysBlkQueueInit
20430
-	movs	r4, #1
20431
-.L3325:
20432
-	bl	FtlLoadBbt
20433
-	cbz	r0, .L3326
20434
-.L3340:
20435
-	bl	FtlLowFormat
20436
-	cmp	r4, #3
20437
-	bhi	.L3341
20438
-	adds	r4, r4, #1
20439
-	b	.L3325
20440
-.L3341:
20441
-	mov	r0, #-1
20442
-	b	.L3316
20443
-.L3326:
20444
-	bl	FtlSysBlkInit
20445
-	cmp	r0, #0
20446
-	bne	.L3340
20447
-	ldr	r3, .L3342+20
20448
-	movs	r2, #1
20449
-	str	r2, [r3, #504]
20450
-.L3316:
20657
+	ldr	r4, .L3232
20658
+	ldrb	r3, [r4, #152]	@ zero_extendqisi2
20659
+	cbz	r3, .L3198
20660
+.L3200:
20661
+	movs	r5, #0
20662
+.L3197:
20663
+	mov	r0, r5
20451
20664
 	add	sp, sp, #16
20452
20665
 	@ sp needed
20453
20666
 	pop	{r4, r5, r6, pc}
20454
-.L3343:
20667
+.L3198:
20668
+	ldr	r6, .L3232+4
20669
+	ldr	r0, [r6, #1180]
20670
+	bl	FlashInit
20671
+	mov	r5, r0
20672
+	cmp	r0, #0
20673
+	bne	.L3200
20674
+	bl	FlashLoadFactorBbt
20675
+	cbz	r0, .L3201
20676
+	bl	FlashMakeFactorBbt
20677
+.L3201:
20678
+	ldr	r0, [r6, #1220]
20679
+	bl	FlashReadIdbDataRaw
20680
+	cbz	r0, .L3202
20681
+	movs	r2, #16
20682
+	movs	r1, #0
20683
+	mov	r0, sp
20684
+	bl	FlashReadFacBbtData
20685
+	ldr	r1, [sp]
20686
+	movs	r3, #0
20687
+	mov	r2, r3
20688
+	movs	r0, #1
20689
+.L3204:
20690
+	lsl	r6, r0, r2
20691
+	adds	r2, r2, #1
20692
+	tst	r6, r1
20693
+	it	ne
20694
+	addne	r3, r3, #1
20695
+	cmp	r2, #16
20696
+	bne	.L3204
20697
+	cmp	r3, #6
20698
+	bhi	.L3205
20699
+.L3229:
20700
+	strb	r2, [r4, #37]
20701
+.L3206:
20702
+	ldrb	r3, [r4, #37]	@ zero_extendqisi2
20703
+	strh	r3, [r4, #150]	@ movhi
20704
+.L3202:
20705
+	ldr	r1, .L3232+8
20706
+	ldr	r0, .L3232+12
20707
+	bl	printk
20708
+	ldr	r0, .L3232+16
20709
+	bl	FtlConstantsInit
20710
+	bl	FtlVariablesInit
20711
+	ldrh	r0, [r4, #2328]
20712
+	movs	r4, #1
20713
+	bl	FtlFreeSysBlkQueueInit
20714
+.L3210:
20715
+	bl	FtlLoadBbt
20716
+	cbz	r0, .L3211
20717
+.L3231:
20718
+	bl	FtlLowFormat
20719
+	cmp	r4, #3
20720
+	bls	.L3212
20721
+	mov	r5, #-1
20722
+	b	.L3197
20723
+.L3205:
20724
+	movs	r2, #0
20725
+	movs	r0, #1
20726
+.L3208:
20727
+	lsl	r6, r0, r2
20728
+	adds	r2, r2, #1
20729
+	tst	r6, r1
20730
+	it	ne
20731
+	addne	r3, r3, #1
20732
+	cmp	r2, #24
20733
+	bne	.L3208
20734
+	cmp	r3, #17
20735
+	bls	.L3229
20736
+	movs	r3, #36
20737
+	strb	r3, [r4, #37]
20738
+	b	.L3206
20739
+.L3212:
20740
+	adds	r4, r4, #1
20741
+	b	.L3210
20742
+.L3211:
20743
+	bl	FtlSysBlkInit
20744
+	cmp	r0, #0
20745
+	bne	.L3231
20746
+	ldr	r3, .L3232+20
20747
+	movs	r2, #1
20748
+	str	r2, [r3, #500]
20749
+	b	.L3197
20750
+.L3233:
20455
20751
 	.align	2
20456
-.L3342:
20752
+.L3232:
20457
20753
 	.word	.LANCHOR0
20458
20754
 	.word	.LANCHOR4
20459
-	.word	.LC77
20460
20755
 	.word	.LC76
20461
-	.word	.LANCHOR0+116
20756
+	.word	.LC77
20757
+	.word	.LANCHOR0+124
20462
20758
 	.word	.LANCHOR1
20463
20759
 	.fnend
20464
20760
 	.size	FtlReInitForSDUpdata, .-FtlReInitForSDUpdata
20465
20761
 	.align	1
20466
20762
 	.global	Ftl_gc_temp_data_write_back
20763
+	.syntax unified
20467
20764
 	.thumb
20468
20765
 	.thumb_func
20766
+	.fpu softvfp
20469
20767
 	.type	Ftl_gc_temp_data_write_back, %function
20470
20768
 Ftl_gc_temp_data_write_back:
20471
20769
 	.fnstart
20472
20770
 	@ args = 0, pretend = 0, frame = 0
20473
20771
 	@ frame_needed = 0, uses_anonymous_args = 0
20474
-	push	{r4, r5, r6, r7, r8, lr}
20475
-	.save {r4, r5, r6, r7, r8, lr}
20476
-	ldr	r5, .L3360
20477
-	ldr	r3, [r5, #224]
20478
-	cbz	r3, .L3345
20479
-.L3348:
20772
+	push	{r4, r5, r6, lr}
20773
+	.save {r4, r5, r6, lr}
20774
+	ldr	r4, .L3249
20775
+	ldr	r3, [r4, #228]
20776
+	cbz	r3, .L3235
20777
+.L3238:
20480
20778
 	movs	r0, #0
20481
-	pop	{r4, r5, r6, r7, r8, pc}
20482
-.L3345:
20483
-	ldr	r3, .L3360+4
20484
-	ldrb	r3, [r3, #144]	@ zero_extendqisi2
20485
-	cbz	r3, .L3347
20486
-	ldr	r3, [r5, #1136]
20779
+	pop	{r4, r5, r6, pc}
20780
+.L3235:
20781
+	ldr	r3, .L3249+4
20782
+	ldrb	r3, [r3, #152]	@ zero_extendqisi2
20783
+	cbz	r3, .L3237
20784
+	ldr	r3, [r4, #1136]
20487
20785
 	lsls	r3, r3, #31
20488
-	bpl	.L3347
20489
-	ldrh	r3, [r5, #416]
20786
+	bpl	.L3237
20787
+	ldrh	r3, [r4, #420]
20490
20788
 	cmp	r3, #0
20491
-	bne	.L3348
20492
-.L3347:
20493
-	movs	r2, #0
20494
-	ldr	r0, [r5, #3308]
20495
-	ldr	r1, [r5, #1136]
20496
-	movs	r6, #0
20497
-	mov	r3, r2
20498
-	ldr	r7, .L3360
20499
-	bl	FlashProgPages
20500
-	mov	r8, #36
20501
-.L3349:
20502
-	ldr	r1, [r5, #1136]
20503
-	uxth	r3, r6
20504
-	ldr	r4, .L3360
20505
-	cmp	r3, r1
20506
-	bcs	.L3359
20507
-	mul	r3, r8, r3
20508
-	ldr	r0, [r7, #3308]
20509
-	adds	r6, r6, #1
20510
-	adds	r1, r0, r3
20511
-	ldr	r0, [r0, r3]
20512
-	ldr	r2, [r1, #12]
20513
-	cmp	r0, #-1
20514
-	bne	.L3350
20515
-	ldrh	r1, [r4, #412]
20789
+	bne	.L3238
20790
+.L3237:
20791
+	movs	r3, #0
20516
20792
 	movs	r5, #0
20517
-	ldr	r2, [r4, #296]
20518
-	strh	r5, [r2, r1, lsl #1]	@ movhi
20519
-	ldr	r2, [r4, #704]
20520
-	strh	r0, [r4, #412]	@ movhi
20793
+	movs	r6, #36
20794
+	mov	r2, r3
20795
+	ldr	r1, [r4, #1136]
20796
+	ldr	r0, [r4, #3308]
20797
+	bl	FlashProgPages
20798
+.L3239:
20799
+	ldr	r1, [r4, #1136]
20800
+	uxth	r3, r5
20801
+	cmp	r3, r1
20802
+	bcc	.L3241
20803
+	ldr	r0, [r4, #3308]
20804
+	bl	FtlGcBufFree
20805
+	movs	r3, #0
20806
+	str	r3, [r4, #1136]
20807
+	ldrh	r3, [r4, #420]
20808
+	cmp	r3, #0
20809
+	bne	.L3238
20810
+	movs	r0, #1
20811
+	bl	FtlGcFreeTempBlock
20812
+	b	.L3248
20813
+.L3241:
20814
+	muls	r3, r6, r3
20815
+	ldr	r2, [r4, #3308]
20816
+	adds	r5, r5, #1
20817
+	adds	r1, r2, r3
20818
+	ldr	r2, [r2, r3]
20819
+	ldr	r0, [r1, #12]
20820
+	cmp	r2, #-1
20821
+	bne	.L3240
20822
+	ldrh	r0, [r4, #416]
20823
+	movs	r5, #0
20824
+	ldr	r1, [r4, #300]
20825
+	strh	r5, [r1, r0, lsl #1]	@ movhi
20826
+	strh	r2, [r4, #416]	@ movhi
20827
+	ldr	r2, [r4, #700]
20521
20828
 	adds	r2, r2, #1
20522
-	str	r2, [r4, #704]
20829
+	str	r2, [r4, #700]
20523
20830
 	ldr	r2, [r4, #3308]
20524
20831
 	add	r3, r3, r2
20525
20832
 	ldr	r0, [r3, #4]
..
..
@@ -20527,37 +20834,28 @@
20527
20834
 	bl	FtlBbmMapBadBlock
20528
20835
 	bl	FtlBbmTblFlush
20529
20836
 	bl	FtlGcPageVarInit
20530
-	b	.L3358
20531
-.L3350:
20532
-	ldr	r0, [r2, #12]
20837
+.L3248:
20838
+	movs	r0, #1
20839
+	pop	{r4, r5, r6, pc}
20840
+.L3240:
20841
+	ldr	r2, [r0, #8]
20533
20842
 	ldr	r1, [r1, #4]
20534
-	ldr	r2, [r2, #8]
20843
+	ldr	r0, [r0, #12]
20535
20844
 	bl	FtlGcUpdatePage
20536
-	b	.L3349
20537
-.L3359:
20538
-	ldr	r0, [r4, #3308]
20539
-	bl	FtlGcBufFree
20540
-	movs	r3, #0
20541
-	str	r3, [r4, #1136]
20542
-	ldrh	r3, [r4, #416]
20543
-	cmp	r3, #0
20544
-	bne	.L3348
20545
-	movs	r0, #1
20546
-	bl	FtlGcFreeTempBlock
20547
-.L3358:
20548
-	movs	r0, #1
20549
-	pop	{r4, r5, r6, r7, r8, pc}
20550
-.L3361:
20845
+	b	.L3239
20846
+.L3250:
20551
20847
 	.align	2
20552
-.L3360:
20848
+.L3249:
20553
20849
 	.word	.LANCHOR2
20554
20850
 	.word	.LANCHOR0
20555
20851
 	.fnend
20556
20852
 	.size	Ftl_gc_temp_data_write_back, .-Ftl_gc_temp_data_write_back
20557
20853
 	.align	1
20558
20854
 	.global	Ftl_get_new_temp_ppa
20855
+	.syntax unified
20559
20856
 	.thumb
20560
20857
 	.thumb_func
20858
+	.fpu softvfp
20561
20859
 	.type	Ftl_get_new_temp_ppa, %function
20562
20860
 Ftl_get_new_temp_ppa:
20563
20861
 	.fnstart
..
..
@@ -20566,19 +20864,19 @@
20566
20864
 	push	{r3, r4, r5, lr}
20567
20865
 	.save {r3, r4, r5, lr}
20568
20866
 	movw	r3, #65535
20569
-	ldr	r4, .L3365
20570
-	ldrh	r2, [r4, #412]
20867
+	ldr	r4, .L3254
20868
+	ldrh	r2, [r4, #416]
20571
20869
 	cmp	r2, r3
20572
-	beq	.L3363
20573
-	ldrh	r3, [r4, #416]
20574
-	cbnz	r3, .L3364
20575
-.L3363:
20870
+	beq	.L3252
20871
+	ldrh	r3, [r4, #420]
20872
+	cbnz	r3, .L3253
20873
+.L3252:
20576
20874
 	bl	FtlCacheWriteBack
20577
20875
 	movs	r0, #0
20578
20876
 	movs	r5, #0
20579
20877
 	bl	FtlGcFreeTempBlock
20580
-	ldr	r0, .L3365+4
20581
-	strb	r5, [r4, #420]
20878
+	ldr	r0, .L3254+4
20879
+	strb	r5, [r4, #424]
20582
20880
 	bl	allocate_data_superblock
20583
20881
 	strh	r5, [r4, #1164]	@ movhi
20584
20882
 	strh	r5, [r4, #1172]	@ movhi
..
..
@@ -20586,970 +20884,941 @@
20586
20884
 	mov	r0, r5
20587
20885
 	bl	FtlEctTblFlush
20588
20886
 	bl	FtlVpcTblFlush
20589
-.L3364:
20590
-	ldr	r0, .L3365+4
20887
+.L3253:
20888
+	ldr	r0, .L3254+4
20591
20889
 	pop	{r3, r4, r5, lr}
20592
20890
 	b	get_new_active_ppa
20593
-.L3366:
20891
+.L3255:
20594
20892
 	.align	2
20595
-.L3365:
20893
+.L3254:
20596
20894
 	.word	.LANCHOR2
20597
-	.word	.LANCHOR2+412
20895
+	.word	.LANCHOR2+416
20598
20896
 	.fnend
20599
20897
 	.size	Ftl_get_new_temp_ppa, .-Ftl_get_new_temp_ppa
20600
20898
 	.align	1
20601
20899
 	.global	ftl_do_gc
20900
+	.syntax unified
20602
20901
 	.thumb
20603
20902
 	.thumb_func
20903
+	.fpu softvfp
20604
20904
 	.type	ftl_do_gc, %function
20605
20905
 ftl_do_gc:
20606
20906
 	.fnstart
20607
20907
 	@ args = 0, pretend = 0, frame = 32
20608
20908
 	@ frame_needed = 0, uses_anonymous_args = 0
20609
-	ldr	r3, .L3540
20909
+	ldr	r3, .L3422
20610
20910
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
20611
20911
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
20612
20912
 	mov	r8, r0
20613
-	ldr	r0, [r3, #224]
20614
20913
 	.pad #44
20615
20914
 	sub	sp, sp, #44
20616
-	mov	r6, r1
20617
-	mov	r7, r3
20915
+	mov	r7, r1
20916
+	mov	r6, r3
20917
+	ldr	r0, [r3, #228]
20618
20918
 	cmp	r0, #0
20619
-	bne	.L3467
20620
-	ldr	r1, .L3540+4
20621
-	ldr	r4, [r1, #504]
20919
+	bne	.L3355
20920
+	ldr	r1, .L3422+4
20921
+	ldr	r4, [r1, #500]
20622
20922
 	cmp	r4, #1
20623
-	bne	.L3527
20923
+	bne	.L3256
20624
20924
 	ldr	r2, [r3, #3280]
20625
20925
 	cmp	r2, #0
20626
-	bne	.L3527
20627
-	ldrh	r0, [r3, #304]
20926
+	bne	.L3256
20927
+	ldrh	r0, [r3, #308]
20628
20928
 	cmp	r0, #47
20629
-	bls	.L3470
20630
-	ldrh	r1, [r1, #3448]
20929
+	bls	.L3355
20930
+	ldrh	r1, [r1, #3444]
20631
20931
 	movw	r2, #65535
20632
20932
 	cmp	r1, r2
20633
-	bne	.L3369
20634
-.L3372:
20635
-	ldrh	r4, [r7, #1176]
20636
-	movw	r1, #65535
20637
-	ldr	r3, .L3540
20638
-	cmp	r4, r1
20639
-	bne	.L3370
20640
-	b	.L3371
20641
-.L3369:
20642
-	ldrh	r3, [r3, #412]
20643
-	cmp	r3, r2
20644
-	beq	.L3372
20645
-	mov	r0, r4
20646
-	bl	FtlGcFreeTempBlock
20647
-	cmp	r0, #0
20648
-	beq	.L3372
20649
-	mov	r0, r4
20650
-	b	.L3527
20651
-.L3370:
20652
-	ldrh	r2, [r3, #1174]
20653
-	cmp	r2, r1
20654
-	bne	.L3371
20655
-	ldrh	r0, [r3, #1178]
20933
+	bne	.L3258
20934
+.L3261:
20935
+	ldrh	r0, [r6, #1176]
20936
+	movw	r2, #65535
20656
20937
 	cmp	r0, r2
20657
-	beq	.L3371
20658
-	ldrh	r1, [r3, #1180]
20659
-	cmp	r1, r2
20660
-	itttt	ne
20661
-	strhne	r4, [r3, #1174]	@ movhi
20662
-	strhne	r0, [r3, #1176]	@ movhi
20663
-	strhne	r1, [r3, #1178]	@ movhi
20664
-	strhne	r2, [r3, #1180]	@ movhi
20665
-.L3371:
20666
-	ldr	r4, [r7, #1124]
20938
+	bne	.L3259
20939
+.L3260:
20940
+	ldr	r3, [r6, #1124]
20667
20941
 	cmp	r8, #1
20668
-	add	r4, r4, #1
20669
-	add	r4, r4, r8, lsl #7
20670
-	str	r4, [r7, #1124]
20671
-	bne	.L3383
20672
-	ldr	r3, .L3540+8
20673
-	ldr	r2, [r3, #2244]
20674
-	mov	r10, r3
20675
-	cbnz	r2, .L3374
20676
-	ldrb	r3, [r3, #144]	@ zero_extendqisi2
20677
-	cmp	r3, #0
20678
-	beq	.L3383
20679
-.L3374:
20680
-	ldr	r3, [r7, #532]
20681
-	ldr	r5, .L3540
20682
-	cmp	r3, #39
20683
-	bhi	.L3383
20684
-	ldr	r9, .L3540+12
20685
-	ldrh	r3, [r9, #976]
20686
-	add	r4, r4, r3
20687
-	str	r4, [r5, #1124]
20942
+	add	r3, r3, #1
20943
+	add	r3, r3, r8, lsl #7
20944
+	str	r3, [r6, #1124]
20945
+	bne	.L3262
20946
+	ldr	r2, .L3422+8
20947
+	ldr	r1, [r2, #2248]
20948
+	mov	r9, r2
20949
+	cbnz	r1, .L3263
20950
+	ldrb	r2, [r2, #152]	@ zero_extendqisi2
20951
+	cmp	r2, #0
20952
+	beq	.L3262
20953
+.L3263:
20954
+	ldr	r2, [r6, #532]
20955
+	cmp	r2, #39
20956
+	bhi	.L3262
20957
+	ldr	r5, .L3422+12
20958
+	movw	r4, #65535
20959
+	ldrh	r2, [r5, #1480]
20960
+	add	r3, r3, r2
20961
+	str	r3, [r6, #1124]
20688
20962
 	bl	FtlGcReFreshBadBlk
20689
-	ldrh	r3, [r5, #556]
20690
-	movw	r2, #65535
20691
-	cmp	r3, r2
20692
-	bne	.L3383
20693
-	ldrh	r2, [r5, #1174]
20963
+	ldrh	r3, [r6, #556]
20964
+	cmp	r3, r4
20965
+	bne	.L3264
20966
+	ldrh	r2, [r6, #1174]
20694
20967
 	cmp	r2, r3
20695
-	bne	.L3383
20696
-	ldr	r3, [r5, #1124]
20968
+	bne	.L3352
20969
+	ldr	r3, [r6, #1124]
20697
20970
 	cmp	r3, #1024
20698
-	bhi	.L3375
20699
-	ldrh	r3, [r5, #312]
20971
+	bhi	.L3266
20972
+	ldrh	r3, [r6, #316]
20700
20973
 	cmp	r3, #63
20701
-	bhi	.L3383
20702
-.L3375:
20703
-	ldrh	r3, [r7, #1122]
20704
-	movs	r0, #0
20705
-	ldrh	r4, [r7, #312]
20974
+	bhi	.L3352
20975
+.L3266:
20976
+	ldrh	r3, [r6, #1122]
20977
+	movs	r2, #0
20978
+	ldrh	r1, [r6, #316]
20979
+	strh	r2, [r5, #1480]	@ movhi
20706
20980
 	adds	r3, r3, #64
20707
-	ldr	r2, .L3540+12
20708
-	cmp	r4, r3
20709
-	strh	r0, [r9, #976]	@ movhi
20710
-	ldr	r1, .L3540
20711
-	bgt	.L3383
20712
-	ldr	r3, [r1, #532]
20713
-	str	r0, [r1, #1124]
20714
-	cbnz	r3, .L3376
20981
+	cmp	r1, r3
20982
+	bgt	.L3352
20983
+	ldr	r3, [r6, #532]
20984
+	str	r2, [r6, #1124]
20985
+	cmp	r3, #0
20986
+	bne	.L3267
20715
20987
 	movs	r3, #6
20716
-	b	.L3528
20717
-.L3376:
20718
-	cmp	r3, #5
20719
-	bhi	.L3377
20720
-	movs	r3, #18
20721
-.L3528:
20722
-	strh	r3, [r2, #976]	@ movhi
20723
-.L3377:
20988
+.L3413:
20989
+	strh	r3, [r5, #1480]	@ movhi
20990
+.L3268:
20724
20991
 	movs	r0, #32
20725
20992
 	bl	List_get_gc_head_node
20726
-	movw	ip, #65535
20727
20993
 	uxth	r2, r0
20728
-	cmp	r2, ip
20729
-	beq	.L3382
20730
-	ldrh	r0, [r7, #1128]
20731
-	ldr	r5, .L3540
20732
-	cmp	r0, #0
20733
-	beq	.L3379
20734
-	ldrh	r4, [r10, #2390]
20735
-	ldrh	r3, [r10, #2320]
20736
-	ldr	fp, [r5, #296]
20737
-	muls	r3, r4, r3
20738
-	ldrh	r1, [fp, r2, lsl #1]
20739
-	adds	r3, r3, #1
20740
-	cmp	r1, r3
20741
-	bgt	.L3382
20742
-	adds	r1, r0, #1
20743
-	str	ip, [sp, #20]
20744
-	str	r2, [sp, #16]
20745
-	mov	r10, #0
20746
-	uxth	r1, r1
20747
-	str	r10, [r5, #1132]
20748
-	strh	r1, [r5, #1128]	@ movhi
20749
-	str	r1, [sp, #12]
20994
+	movw	r3, #65535
20995
+	str	r3, [sp, #16]
20996
+	cmp	r2, r3
20997
+	beq	.L3272
20998
+	ldrh	r4, [r6, #1128]
20999
+	cmp	r4, #0
21000
+	beq	.L3270
21001
+	ldrh	ip, [r9, #2392]
21002
+	uxth	r10, r0
21003
+	ldrh	r1, [r9, #2324]
21004
+	ldr	r2, [r6, #300]
21005
+	mul	r1, r1, ip
21006
+	ldrh	r0, [r2, r10, lsl #1]
21007
+	str	r2, [sp, #12]
21008
+	adds	r1, r1, #1
21009
+	cmp	r0, r1
21010
+	bgt	.L3272
21011
+	add	fp, r4, #1
21012
+	mov	r0, r4
21013
+	uxth	fp, fp
21014
+	mov	r9, #0
21015
+	str	r9, [r6, #1132]
21016
+	strh	fp, [r6, #1128]	@ movhi
20750
21017
 	bl	List_get_gc_head_node
20751
-	ldr	ip, [sp, #20]
21018
+	ldr	r3, [sp, #16]
20752
21019
 	uxth	r4, r0
20753
-	ldr	r1, [sp, #12]
20754
-	cmp	r4, ip
20755
-	ldr	r2, [sp, #16]
20756
-	beq	.L3382
20757
-	ldrh	r2, [fp, r2, lsl #1]
20758
-	ldrh	r3, [fp, r4, lsl #1]
20759
-	ldr	r0, .L3540+16
21020
+	ldr	r2, [sp, #12]
21021
+	cmp	r4, r3
21022
+	beq	.L3272
21023
+	ldrh	r3, [r2, r4, lsl #1]
21024
+	mov	r1, fp
21025
+	ldrh	r2, [r2, r10, lsl #1]
21026
+	ldr	r0, .L3422+16
20760
21027
 	str	r2, [sp]
20761
21028
 	mov	r2, r4
20762
21029
 	bl	printk
20763
-	ldrh	r3, [r5, #1128]
21030
+	ldrh	r3, [r6, #1128]
20764
21031
 	cmp	r3, #40
20765
-	bls	.L3380
20766
-	ldr	r3, [r5, #296]
21032
+	bls	.L3271
21033
+	ldr	r3, [r6, #300]
20767
21034
 	ldrh	r3, [r3, r4, lsl #1]
20768
21035
 	cmp	r3, #32
20769
21036
 	it	hi
20770
-	strhhi	r10, [r5, #1128]	@ movhi
20771
-.L3380:
21037
+	strhhi	r9, [r6, #1128]	@ movhi
21038
+.L3271:
20772
21039
 	movs	r3, #6
20773
-	strh	r3, [r9, #976]	@ movhi
20774
-	b	.L3399
20775
-.L3379:
21040
+	strh	r3, [r5, #1480]	@ movhi
21041
+.L3264:
21042
+	ldrh	r2, [r6, #416]
21043
+	movw	r3, #65535
21044
+	cmp	r2, r3
21045
+	bne	.L3299
21046
+.L3354:
21047
+	ldrh	r3, [r6, #1174]
21048
+	movw	r2, #65535
21049
+	cmp	r3, r2
21050
+	bne	.L3299
21051
+	cmp	r4, r3
21052
+	bne	.L3299
21053
+	ldrh	r3, [r6, #556]
21054
+	cmp	r3, r4
21055
+	beq	.L3300
21056
+.L3305:
21057
+	movw	r4, #65535
21058
+.L3299:
21059
+	ldr	r3, .L3422+8
21060
+	ldr	r3, [r3, #2248]
21061
+	cmp	r3, #0
21062
+	ite	eq
21063
+	moveq	r5, #1
21064
+	movne	r5, #2
21065
+.L3298:
21066
+	ldrh	r3, [r6, #556]
21067
+	movw	r2, #65535
21068
+	cmp	r3, r2
21069
+	bne	.L3308
21070
+	cmp	r4, r3
21071
+	beq	.L3309
21072
+	strh	r4, [r6, #556]	@ movhi
21073
+.L3310:
21074
+	ldrh	r0, [r6, #556]
21075
+	movw	r7, #65535
21076
+	movs	r3, #0
21077
+	strb	r3, [r6, #564]
21078
+	cmp	r0, r7
21079
+	beq	.L3308
21080
+	bl	IsBlkInGcList
21081
+	cbz	r0, .L3313
21082
+	strh	r7, [r6, #556]	@ movhi
21083
+.L3313:
21084
+	ldr	r3, .L3422+8
21085
+	ldrb	r3, [r3, #152]	@ zero_extendqisi2
21086
+	cbz	r3, .L3314
21087
+	ldrh	r0, [r6, #556]
21088
+	bl	ftl_get_blk_mode
21089
+	strb	r0, [r6, #564]
21090
+.L3314:
21091
+	ldrh	r2, [r6, #556]
21092
+	movw	r3, #65535
21093
+	cmp	r2, r3
21094
+	beq	.L3308
21095
+	ldr	r0, .L3422+20
21096
+	bl	make_superblock
21097
+	ldr	r2, .L3422+12
21098
+	movs	r3, #0
21099
+	strh	r3, [r6, #558]	@ movhi
21100
+	strb	r3, [r6, #562]
21101
+	strh	r3, [r2, #1482]	@ movhi
21102
+	ldrh	r1, [r6, #556]
21103
+	ldr	r3, [r6, #300]
21104
+	ldrh	r3, [r3, r1, lsl #1]
21105
+	strh	r3, [r2, #1484]	@ movhi
21106
+.L3308:
21107
+	ldrh	r3, [r6, #556]
21108
+	ldrh	r2, [r6, #320]
21109
+	cmp	r2, r3
21110
+	beq	.L3315
21111
+	ldrh	r2, [r6, #368]
21112
+	cmp	r2, r3
21113
+	beq	.L3315
21114
+	ldrh	r2, [r6, #416]
21115
+	cmp	r2, r3
21116
+	bne	.L3316
21117
+.L3315:
21118
+	movw	r3, #65535
21119
+	strh	r3, [r6, #556]	@ movhi
21120
+.L3316:
21121
+	ldr	r7, .L3422+8
21122
+.L3349:
21123
+	ldr	r9, .L3422
21124
+	movw	r3, #65535
21125
+	ldrh	fp, [r9, #556]
21126
+	mov	r6, r9
21127
+	cmp	fp, r3
21128
+	bne	.L3317
21129
+	movs	r3, #0
21130
+	str	r3, [r9, #1132]
21131
+.L3318:
21132
+	ldrh	r10, [r6, #1128]
21133
+	mov	r0, r10
21134
+	bl	List_get_gc_head_node
21135
+	uxth	r2, r0
21136
+	cmp	r2, fp
21137
+	strh	r2, [r6, #556]	@ movhi
21138
+	bne	.L3319
21139
+	movs	r3, #0
21140
+	movs	r0, #8
21141
+	strh	r3, [r6, #1128]	@ movhi
21142
+	b	.L3256
21143
+.L3258:
21144
+	ldrh	r3, [r3, #416]
21145
+	cmp	r3, r2
21146
+	beq	.L3261
21147
+	mov	r0, r4
21148
+	bl	FtlGcFreeTempBlock
21149
+	cmp	r0, #0
21150
+	beq	.L3261
21151
+	mov	r0, r4
21152
+	b	.L3256
21153
+.L3259:
21154
+	ldrh	r3, [r6, #1174]
21155
+	cmp	r3, r2
21156
+	bne	.L3260
21157
+	ldrh	r1, [r6, #1178]
21158
+	cmp	r1, r3
21159
+	beq	.L3260
21160
+	ldrh	r2, [r6, #1180]
21161
+	cmp	r2, r3
21162
+	itttt	ne
21163
+	strhne	r0, [r6, #1174]	@ movhi
21164
+	strhne	r1, [r6, #1176]	@ movhi
21165
+	strhne	r2, [r6, #1178]	@ movhi
21166
+	strhne	r3, [r6, #1180]	@ movhi
21167
+	b	.L3260
21168
+.L3267:
21169
+	cmp	r3, #5
21170
+	bhi	.L3268
21171
+	movs	r3, #18
21172
+	b	.L3413
21173
+.L3270:
20776
21174
 	movs	r3, #1
20777
-	strh	r3, [r5, #1128]	@ movhi
20778
-.L3382:
21175
+	strh	r3, [r6, #1128]	@ movhi
21176
+.L3272:
20779
21177
 	bl	GetSwlReplaceBlock
20780
21178
 	movw	r3, #65535
20781
-	cmp	r0, r3
20782
21179
 	mov	r4, r0
20783
-	bne	.L3399
21180
+	cmp	r0, r3
21181
+	bne	.L3264
20784
21182
 	movs	r3, #0
20785
-	strh	r3, [r9, #976]	@ movhi
20786
-.L3383:
20787
-	ldrh	r3, [r7, #556]
21183
+	strh	r3, [r5, #1480]	@ movhi
21184
+.L3262:
21185
+	ldrh	r3, [r6, #556]
20788
21186
 	movw	r4, #65535
20789
-	ldr	r5, .L3540
20790
21187
 	cmp	r3, r4
20791
-	bne	.L3533
20792
-	ldrh	r4, [r5, #412]
21188
+	beq	.L3352
21189
+	cmp	r8, #0
21190
+	beq	.L3353
21191
+	b	.L3264
21192
+.L3423:
21193
+	.align	2
21194
+.L3422:
21195
+	.word	.LANCHOR2
21196
+	.word	.LANCHOR1
21197
+	.word	.LANCHOR0
21198
+	.word	.LANCHOR4
21199
+	.word	.LC157
21200
+	.word	.LANCHOR2+556
21201
+.L3352:
21202
+	ldrh	r4, [r6, #416]
21203
+	movw	r3, #65535
20793
21204
 	cmp	r4, r3
20794
-	bne	.L3384
20795
-	ldrh	r10, [r5, #1174]
20796
-	cmp	r10, r4
20797
-	bne	.L3385
20798
-	ldrh	r3, [r5, #312]
20799
-	ldr	r2, [r5, #1124]
21205
+	bne	.L3273
21206
+	ldrh	r5, [r6, #1174]
21207
+	cmp	r5, r4
21208
+	bne	.L3274
21209
+	ldrh	r3, [r6, #316]
21210
+	ldr	r2, [r6, #1124]
20800
21211
 	cmp	r3, #24
20801
21212
 	ite	cc
20802
21213
 	movcc	r3, #5120
20803
21214
 	movcs	r3, #1024
20804
21215
 	cmp	r2, r3
20805
-	bls	.L3387
20806
-	ldr	r2, .L3540+12
21216
+	bls	.L3274
21217
+	ldr	r2, .L3424
20807
21218
 	movs	r3, #0
20808
-	str	r3, [r7, #1124]
20809
-	mov	r9, r5
20810
-	strh	r3, [r2, #976]	@ movhi
21219
+	str	r3, [r6, #1124]
21220
+	strh	r3, [r2, #1480]	@ movhi
20811
21221
 	bl	GetSwlReplaceBlock
20812
-	cmp	r0, r10
21222
+	cmp	r0, r5
20813
21223
 	mov	r4, r0
20814
-	bne	.L3388
20815
-	ldrh	r2, [r5, #312]
20816
-	ldrh	r3, [r5, #1122]
21224
+	bne	.L3362
21225
+	ldrh	r2, [r6, #316]
21226
+	ldrh	r3, [r6, #1122]
20817
21227
 	cmp	r2, r3
20818
-	bcs	.L3389
21228
+	bcs	.L3277
20819
21229
 	movs	r0, #64
20820
21230
 	bl	List_get_gc_head_node
20821
21231
 	uxth	r3, r0
20822
21232
 	cmp	r3, r4
20823
-	bne	.L3534
20824
-.L3398:
20825
-	bl	FtlGcReFreshBadBlk
20826
-	cmp	r8, #0
20827
-	beq	.L3535
20828
-.L3399:
20829
-	ldrh	r2, [r7, #412]
20830
-	movw	r3, #65535
20831
-	cmp	r2, r3
20832
-	bne	.L3410
20833
-.L3465:
20834
-	ldrh	r3, [r7, #1174]
20835
-	movw	r2, #65535
20836
-	cmp	r3, r2
20837
-	bne	.L3410
20838
-	cmp	r4, r3
20839
-	bne	.L3410
20840
-.L3466:
20841
-	ldrh	r1, [r7, #556]
20842
-	movw	r3, #65535
20843
-	ldr	r2, .L3540
21233
+	beq	.L3279
21234
+	ldr	r2, [r6, #3276]
21235
+	ldr	r9, .L3424+8
21236
+	cbnz	r2, .L3280
21237
+	ldrh	r2, [r9, #2344]
21238
+	cmp	r2, #3
21239
+	beq	.L3280
21240
+	ldr	r2, [r6, #1116]
21241
+	cbnz	r2, .L3280
21242
+	ldr	r2, [r9, #2248]
21243
+	cbnz	r2, .L3280
21244
+	ldrb	r0, [r9, #152]	@ zero_extendqisi2
21245
+	cmp	r0, #0
21246
+	beq	.L3281
21247
+.L3280:
21248
+	ldr	r2, [r6, #300]
21249
+	ldrh	r0, [r9, #2344]
21250
+	ldrh	r1, [r2, r3, lsl #1]
21251
+	ldrh	r3, [r9, #2392]
21252
+	cmp	r0, #3
21253
+	ldrh	r2, [r9, #2324]
21254
+	mul	r2, r3, r2
21255
+	ite	eq
21256
+	lsreq	r3, r3, #1
21257
+	movne	r3, #0
21258
+	add	r3, r3, r2
20844
21259
 	cmp	r1, r3
20845
-	beq	.L3411
20846
-.L3415:
20847
-	movw	r4, #65535
20848
-	b	.L3410
20849
-.L3411:
20850
-	movs	r3, #0
20851
-	ldrh	r1, [r2, #312]
20852
-	str	r3, [r2, #1132]
20853
-	ldrh	r3, [r2, #1120]
20854
-	ldr	r4, .L3540+12
20855
-	cmp	r1, r3
20856
-	bls	.L3412
20857
-	ldrh	r3, [r4, #976]
20858
-	cbnz	r3, .L3413
20859
-	ldr	r3, .L3540+8
20860
-	ldr	r2, [r2, #468]
20861
-	ldr	r3, [r3, #2448]
21260
+	bgt	.L3283
21261
+	movs	r0, #0
21262
+	bl	List_get_gc_head_node
21263
+	ldr	r3, [r9, #2452]
21264
+	uxth	r5, r0
21265
+	ldr	r2, [r6, #472]
20862
21266
 	add	r3, r3, r3, lsl #1
20863
21267
 	cmp	r2, r3, lsr #2
20864
-	bcs	.L3478
20865
-.L3413:
20866
-	ldrh	r3, [r7, #536]
20867
-	add	r3, r3, r3, lsl #1
20868
-	ubfx	r3, r3, #2, #16
21268
+	bls	.L3284
21269
+.L3415:
21270
+	movs	r3, #128
20869
21271
 	b	.L3414
20870
-.L3478:
20871
-	movs	r3, #18
21272
+.L3284:
21273
+	movs	r3, #160
20872
21274
 .L3414:
20873
-	strh	r3, [r7, #1120]	@ movhi
21275
+	strh	r3, [r6, #1122]	@ movhi
21276
+	movw	r3, #65535
21277
+	cmp	r5, r3
21278
+	beq	.L3279
21279
+.L3276:
21280
+	ldr	r3, [r6, #300]
21281
+	mov	r4, r5
21282
+	ldrh	r1, [r6, #1120]
21283
+	ldrh	r2, [r6, #316]
21284
+	ldrh	r3, [r3, r5, lsl #1]
21285
+	str	r1, [sp, #4]
21286
+	ldr	r1, [r6, #236]
21287
+	ldr	r0, .L3424+4
21288
+	ldrh	r1, [r1, r5, lsl #1]
21289
+	str	r1, [sp]
21290
+	mov	r1, r5
21291
+	bl	printk
21292
+	b	.L3279
21293
+.L3283:
21294
+	movs	r3, #128
21295
+.L3416:
21296
+	strh	r3, [r6, #1122]	@ movhi
21297
+.L3279:
21298
+	bl	FtlGcReFreshBadBlk
21299
+	cmp	r8, #0
21300
+	bne	.L3264
21301
+	movw	r3, #65535
21302
+	cmp	r4, r3
21303
+	bne	.L3264
21304
+.L3353:
21305
+	ldrh	r3, [r6, #316]
21306
+	cmp	r3, #24
21307
+	bhi	.L3364
21308
+	ldr	r2, .L3424+8
21309
+	cmp	r3, #16
21310
+	ldrh	r5, [r2, #2390]
21311
+	bls	.L3289
21312
+	lsrs	r5, r5, #5
21313
+.L3288:
21314
+	ldrh	r2, [r6, #1120]
21315
+	cmp	r2, r3
21316
+	bcs	.L3292
21317
+	ldrh	r3, [r6, #416]
21318
+	movw	r2, #65535
21319
+	cmp	r3, r2
21320
+	bne	.L3293
21321
+	ldrh	r2, [r6, #1174]
21322
+	cmp	r2, r3
21323
+	bne	.L3293
21324
+	ldr	r3, .L3424
21325
+	ldrh	r0, [r3, #1480]
21326
+	cbnz	r0, .L3294
21327
+	ldr	r3, .L3424+8
21328
+	ldr	r2, [r6, #472]
21329
+	ldr	r3, [r3, #2452]
21330
+	add	r3, r3, r3, lsl #1
21331
+	cmp	r2, r3, lsr #2
21332
+	bcs	.L3295
21333
+.L3294:
21334
+	ldrh	r3, [r6, #536]
21335
+	add	r3, r3, r3, lsl #1
21336
+	asrs	r3, r3, #2
21337
+.L3417:
21338
+	strh	r3, [r6, #1120]	@ movhi
21339
+	movs	r3, #0
21340
+	str	r3, [r6, #1132]
21341
+.L3256:
21342
+	add	sp, sp, #44
21343
+	@ sp needed
21344
+	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
21345
+.L3281:
21346
+	ldr	r2, [r6, #300]
21347
+	ldrh	r3, [r2, r3, lsl #1]
21348
+	cmp	r3, #7
21349
+	bhi	.L3286
21350
+	bl	List_get_gc_head_node
21351
+	uxth	r5, r0
21352
+	b	.L3415
21353
+.L3286:
21354
+	movs	r3, #64
21355
+	b	.L3416
21356
+.L3277:
21357
+	movs	r3, #80
21358
+	b	.L3416
21359
+.L3362:
21360
+	mov	r5, r0
21361
+	b	.L3276
21362
+.L3289:
21363
+	cmp	r3, #12
21364
+	bls	.L3290
21365
+	lsrs	r5, r5, #4
21366
+	b	.L3288
21367
+.L3290:
21368
+	cmp	r3, #8
21369
+	bls	.L3288
21370
+	lsrs	r5, r5, #2
21371
+	b	.L3288
21372
+.L3364:
21373
+	movs	r5, #1
21374
+	b	.L3288
21375
+.L3295:
21376
+	movs	r3, #18
21377
+	b	.L3417
21378
+.L3293:
21379
+	ldrh	r3, [r6, #536]
21380
+	add	r3, r3, r3, lsl #1
21381
+	asrs	r3, r3, #2
21382
+	strh	r3, [r6, #1120]	@ movhi
21383
+.L3292:
21384
+	ldr	r3, .L3424+8
21385
+	ldr	r3, [r3, #2248]
21386
+	cbz	r3, .L3366
21387
+	cmp	r7, #2
21388
+	bhi	.L3366
21389
+	adds	r5, r5, #1
21390
+	uxth	r5, r5
21391
+.L3366:
21392
+	movw	r4, #65535
21393
+	b	.L3298
21394
+.L3300:
21395
+	movs	r3, #0
21396
+	ldrh	r2, [r6, #316]
21397
+	str	r3, [r6, #1132]
21398
+	ldrh	r3, [r6, #1120]
21399
+	ldr	r4, .L3424
21400
+	cmp	r2, r3
21401
+	bls	.L3301
21402
+	ldrh	r3, [r4, #1480]
21403
+	cbnz	r3, .L3302
21404
+	ldr	r3, .L3424+8
21405
+	ldr	r2, [r6, #472]
21406
+	ldr	r3, [r3, #2452]
21407
+	add	r3, r3, r3, lsl #1
21408
+	cmp	r2, r3, lsr #2
21409
+	bcs	.L3303
21410
+.L3302:
21411
+	ldrh	r3, [r6, #536]
21412
+	add	r3, r3, r3, lsl #1
21413
+	asrs	r3, r3, #2
21414
+.L3418:
21415
+	strh	r3, [r6, #1120]	@ movhi
20874
21416
 	bl	FtlReadRefresh
20875
21417
 	movs	r0, #0
20876
21418
 	bl	List_get_gc_head_node
20877
-	ldr	r3, [r7, #296]
21419
+	ldr	r3, [r6, #300]
20878
21420
 	uxth	r0, r0
20879
21421
 	ldrh	r3, [r3, r0, lsl #1]
20880
21422
 	cmp	r3, #4
20881
-	bls	.L3412
20882
-	ldrh	r0, [r4, #976]
20883
-	b	.L3527
20884
-.L3412:
20885
-	ldrh	r0, [r4, #976]
21423
+	bls	.L3301
21424
+.L3420:
21425
+	ldrh	r0, [r4, #1480]
21426
+	b	.L3256
21427
+.L3303:
21428
+	movs	r3, #18
21429
+	b	.L3418
21430
+.L3301:
21431
+	ldrh	r0, [r4, #1480]
20886
21432
 	cmp	r0, #0
20887
-	bne	.L3415
20888
-	ldrh	r4, [r7, #536]
20889
-	add	r3, r4, r4, lsl #1
21433
+	bne	.L3305
21434
+	ldrh	r5, [r6, #536]
21435
+	add	r3, r5, r5, lsl #1
20890
21436
 	asrs	r3, r3, #2
20891
-	strh	r3, [r7, #1120]	@ movhi
21437
+	strh	r3, [r6, #1120]	@ movhi
20892
21438
 	bl	List_get_gc_head_node
20893
-	ldr	r3, [r7, #296]
21439
+	ldr	r3, [r6, #300]
20894
21440
 	uxth	r0, r0
21441
+	ldr	r1, .L3424+8
20895
21442
 	ldrh	r2, [r3, r0, lsl #1]
20896
-	ldr	r3, .L3540+8
20897
-	ldrh	r1, [r3, #2390]
20898
-	ldrh	r3, [r3, #2320]
20899
-	muls	r3, r1, r3
21443
+	ldrh	r0, [r1, #2392]
21444
+	ldrh	r3, [r1, #2324]
21445
+	muls	r3, r0, r3
20900
21446
 	add	r3, r3, r3, lsr #31
20901
21447
 	cmp	r2, r3, asr #1
20902
-	ble	.L3416
20903
-	ldr	r3, .L3540
20904
-	subs	r4, r4, #1
20905
-	ldrh	r3, [r3, #312]
20906
-	cmp	r3, r4
20907
-	blt	.L3416
21448
+	ble	.L3306
21449
+	ldrh	r3, [r6, #316]
21450
+	subs	r5, r5, #1
21451
+	cmp	r3, r5
21452
+	blt	.L3306
20908
21453
 	bl	FtlReadRefresh
20909
-	b	.L3532
20910
-.L3416:
20911
-	cmp	r2, #0
20912
-	bne	.L3415
20913
-	movw	r0, #65535
20914
-	bl	decrement_vpc_count
20915
-	ldrh	r0, [r7, #312]
20916
-	adds	r0, r0, #1
20917
-	b	.L3527
20918
-.L3541:
20919
-	.align	2
20920
-.L3540:
20921
-	.word	.LANCHOR2
20922
-	.word	.LANCHOR1
20923
-	.word	.LANCHOR0
20924
-	.word	.LANCHOR5
20925
-	.word	.LC157
20926
-.L3410:
20927
-	ldr	r3, .L3542
20928
-	ldr	r3, [r3, #2244]
20929
-	cmp	r3, #0
20930
-	ite	eq
20931
-	moveq	r5, #1
20932
-	movne	r5, #2
20933
-	b	.L3409
20934
-.L3535:
20935
-	movw	r3, #65535
20936
-	cmp	r4, r3
20937
-	bne	.L3399
20938
-.L3464:
20939
-	ldrh	r4, [r7, #312]
20940
-	cmp	r4, #24
20941
-	bhi	.L3474
20942
-	ldr	r3, .L3542
20943
-	cmp	r4, #16
20944
-	ldrh	r5, [r3, #2388]
20945
-	bls	.L3401
20946
-	lsrs	r5, r5, #5
20947
-.L3400:
20948
-	ldrh	r3, [r7, #1120]
20949
-	ldr	r2, .L3542+4
20950
-	cmp	r3, r4
20951
-	bcc	.L3536
20952
-.L3404:
20953
-	ldr	r3, .L3542
20954
-	ldr	r3, [r3, #2244]
20955
-	cmp	r3, #0
20956
-	bne	.L3537
20957
-.L3477:
20958
-	movw	r4, #65535
20959
-.L3409:
20960
-	ldrh	r2, [r7, #556]
20961
-	movw	r1, #65535
20962
-	ldr	r3, .L3542+4
20963
-	cmp	r2, r1
20964
-	bne	.L3418
20965
-	cmp	r4, r2
20966
-	beq	.L3419
20967
-	strh	r4, [r3, #556]	@ movhi
20968
21454
 	b	.L3420
20969
-.L3419:
20970
-	ldrh	r2, [r3, #1174]
20971
-	cmp	r2, r4
20972
-	beq	.L3420
20973
-	ldr	r1, [r3, #296]
20974
-	ldrh	r2, [r1, r2, lsl #1]
20975
-	cbnz	r2, .L3421
20976
-	strh	r4, [r3, #1174]	@ movhi
20977
-.L3421:
20978
-	ldrh	r3, [r7, #1174]
20979
-	strh	r3, [r7, #556]	@ movhi
20980
-	movw	r3, #65535
20981
-	strh	r3, [r7, #1174]	@ movhi
20982
-.L3420:
20983
-	ldrh	r0, [r7, #556]
20984
-	movw	r6, #65535
20985
-	movs	r3, #0
20986
-	strb	r3, [r7, #564]
20987
-	cmp	r0, r6
20988
-	beq	.L3418
20989
-	bl	IsBlkInGcList
20990
-	cbz	r0, .L3423
20991
-	ldr	r3, .L3542+4
20992
-	strh	r6, [r3, #556]	@ movhi
20993
-.L3423:
20994
-	ldr	r3, .L3542
20995
-	ldrb	r3, [r3, #144]	@ zero_extendqisi2
20996
-	cbz	r3, .L3424
20997
-	ldrh	r0, [r7, #556]
20998
-	bl	ftl_get_blk_mode
20999
-	strb	r0, [r7, #564]
21000
-.L3424:
21001
-	ldrh	r2, [r7, #556]
21002
-	movw	r3, #65535
21003
-	ldr	r6, .L3542+4
21004
-	cmp	r2, r3
21005
-	beq	.L3418
21006
-	add	r0, r6, #556
21007
-	bl	make_superblock
21008
-	ldr	r2, .L3542+8
21009
-	movs	r3, #0
21010
-	ldrh	r1, [r6, #556]
21011
-	strh	r3, [r6, #558]	@ movhi
21012
-	strb	r3, [r6, #562]
21013
-	strh	r3, [r2, #978]	@ movhi
21014
-	ldr	r3, [r6, #296]
21015
-	ldrh	r3, [r3, r1, lsl #1]
21016
-	strh	r3, [r2, #980]	@ movhi
21017
-.L3418:
21018
-	ldrh	r3, [r7, #556]
21019
-	ldrh	r1, [r7, #316]
21020
-	ldr	r2, .L3542+4
21021
-	cmp	r1, r3
21022
-	beq	.L3425
21023
-	ldrh	r1, [r2, #364]
21024
-	cmp	r1, r3
21025
-	beq	.L3425
21026
-	ldrh	r2, [r2, #412]
21027
-	cmp	r2, r3
21028
-	bne	.L3426
21029
-.L3425:
21030
-	movw	r3, #65535
21031
-	strh	r3, [r7, #556]	@ movhi
21032
-.L3426:
21033
-	ldr	r7, .L3542
21034
-.L3459:
21035
-	ldr	r6, .L3542+4
21036
-	movw	r3, #65535
21037
-	ldrh	r2, [r6, #556]
21038
-	mov	fp, r6
21039
-	cmp	r2, r3
21040
-	bne	.L3427
21041
-	mov	r10, r6
21042
-	movs	r3, #0
21043
-	str	r3, [r6, #1132]
21044
-.L3428:
21045
-	ldrh	r9, [fp, #1128]
21046
-	mov	r0, r9
21047
-	bl	List_get_gc_head_node
21048
-	movw	r2, #65535
21049
-	uxth	r3, r0
21050
-	strh	r3, [fp, #556]	@ movhi
21051
-	cmp	r3, r2
21052
-	bne	.L3429
21053
-	ldr	r3, .L3542+4
21054
-	movs	r2, #0
21055
-	movs	r0, #8
21056
-	strh	r2, [r3, #1128]	@ movhi
21057
-	b	.L3527
21058
-.L3429:
21059
-	mov	r0, r3
21060
-	str	r3, [sp, #12]
21061
-	bl	IsBlkInGcList
21062
-	add	r9, r9, #1
21063
-	ldr	r3, [sp, #12]
21064
-	cbz	r0, .L3430
21065
-	strh	r9, [r10, #1128]	@ movhi
21066
-	b	.L3428
21067
-.L3430:
21068
-	ldrh	lr, [r7, #2320]
21069
-	uxth	r9, r9
21070
-	ldrh	r2, [r7, #2388]
21071
-	ldr	r1, [r10, #296]
21072
-	strh	r9, [r10, #1128]	@ movhi
21073
-	mul	r2, lr, r2
21074
-	ldrh	r0, [r1, r3, lsl #1]
21075
-	add	lr, r2, r2, lsr #31
21076
-	cmp	r0, lr, asr #1
21077
-	bgt	.L3432
21078
-	cmp	r9, #48
21079
-	bls	.L3433
21080
-	cmp	r0, #8
21081
-	bls	.L3433
21082
-	ldrh	r0, [r10, #1164]
21083
-	cmp	r0, #35
21084
-	bhi	.L3433
21085
-.L3432:
21086
-	movs	r0, #0
21087
-	strh	r0, [fp, #1128]	@ movhi
21088
-.L3433:
21089
-	ldrh	r1, [r1, r3, lsl #1]
21090
-	cmp	r1, r2
21091
-	blt	.L3434
21092
-	movw	r2, #65535
21093
-	cmp	r4, r2
21094
-	bne	.L3434
21095
-	ldrh	r0, [fp, #1128]
21096
-	ldr	r2, .L3542+4
21097
-	cmp	r0, #3
21098
-	bhi	.L3434
21099
-	movs	r3, #0
21100
-	strh	r4, [r2, #556]	@ movhi
21101
-	strh	r3, [r2, #1128]	@ movhi
21102
-.L3532:
21103
-	ldr	r3, .L3542+8
21104
-	ldrh	r0, [r3, #976]
21105
-	b	.L3527
21106
-.L3434:
21107
-	cbnz	r1, .L3435
21455
+.L3306:
21456
+	cmp	r2, #0
21457
+	bne	.L3305
21108
21458
 	movw	r0, #65535
21109
21459
 	bl	decrement_vpc_count
21110
-	ldrh	r3, [fp, #1128]
21111
-	adds	r3, r3, #1
21112
-	strh	r3, [fp, #1128]	@ movhi
21113
-	b	.L3428
21114
-.L3435:
21115
-	movs	r2, #0
21116
-	strb	r2, [r6, #564]
21117
-	ldr	r2, .L3542
21118
-	ldrb	r2, [r2, #144]	@ zero_extendqisi2
21119
-	cbz	r2, .L3436
21120
-	mov	r0, r3
21121
-	bl	ftl_get_blk_mode
21122
-	ldr	r3, .L3542+4
21123
-	strb	r0, [r3, #564]
21124
-.L3436:
21125
-	ldr	r0, .L3542+12
21126
-	bl	make_superblock
21127
-	ldr	r2, .L3542+8
21128
-	ldrh	r0, [r6, #556]
21460
+	ldrh	r0, [r6, #316]
21461
+	adds	r0, r0, #1
21462
+	b	.L3256
21463
+.L3309:
21464
+	ldrh	r3, [r6, #1174]
21465
+	cmp	r3, r4
21466
+	beq	.L3310
21467
+	ldr	r2, [r6, #300]
21468
+	ldrh	r3, [r2, r3, lsl #1]
21469
+	cbnz	r3, .L3311
21470
+	strh	r4, [r6, #1174]	@ movhi
21471
+.L3311:
21472
+	ldrh	r3, [r6, #1174]
21473
+	strh	r3, [r6, #556]	@ movhi
21474
+	movw	r3, #65535
21475
+	strh	r3, [r6, #1174]	@ movhi
21476
+	b	.L3310
21477
+.L3319:
21478
+	str	r0, [sp, #16]
21479
+	mov	r0, r2
21480
+	str	r2, [sp, #12]
21481
+	add	r10, r10, #1
21482
+	bl	IsBlkInGcList
21483
+	ldr	r2, [sp, #12]
21484
+	ldr	r3, [sp, #16]
21485
+	cbz	r0, .L3320
21486
+	strh	r10, [r6, #1128]	@ movhi
21487
+	b	.L3318
21488
+.L3320:
21489
+	ldrh	lr, [r7, #2324]
21490
+	uxth	r10, r10
21491
+	ldrh	r1, [r7, #2390]
21492
+	uxth	r3, r3
21493
+	ldr	r0, [r6, #300]
21494
+	strh	r10, [r6, #1128]	@ movhi
21495
+	mul	r1, lr, r1
21496
+	ldrh	ip, [r0, r3, lsl #1]
21497
+	add	lr, r1, r1, lsr #31
21498
+	cmp	ip, lr, asr #1
21499
+	bgt	.L3322
21500
+	cmp	r10, #48
21501
+	bls	.L3323
21502
+	cmp	ip, #8
21503
+	bls	.L3323
21504
+	ldrh	ip, [r6, #1164]
21505
+	cmp	ip, #35
21506
+	bhi	.L3323
21507
+.L3322:
21508
+	mov	ip, #0
21509
+	strh	ip, [r6, #1128]	@ movhi
21510
+.L3323:
21511
+	ldrh	r3, [r0, r3, lsl #1]
21512
+	cmp	r1, r3
21513
+	bgt	.L3324
21514
+	cmp	r4, fp
21515
+	bne	.L3324
21516
+	ldrh	r1, [r6, #1128]
21517
+	cmp	r1, #3
21518
+	bhi	.L3324
21129
21519
 	movs	r3, #0
21130
-	ldr	r1, [r6, #296]
21131
-	strh	r3, [r2, #978]	@ movhi
21520
+	strh	r4, [r6, #556]	@ movhi
21521
+	strh	r3, [r6, #1128]	@ movhi
21522
+.L3421:
21523
+	ldr	r3, .L3424
21524
+	ldrh	r0, [r3, #1480]
21525
+	b	.L3256
21526
+.L3425:
21527
+	.align	2
21528
+.L3424:
21529
+	.word	.LANCHOR4
21530
+	.word	.LC158
21531
+	.word	.LANCHOR0
21532
+.L3324:
21533
+	cbnz	r3, .L3325
21534
+	movw	r0, #65535
21535
+	bl	decrement_vpc_count
21536
+	ldrh	r3, [r6, #1128]
21537
+	adds	r3, r3, #1
21538
+	strh	r3, [r6, #1128]	@ movhi
21539
+	b	.L3318
21540
+.L3325:
21541
+	movs	r3, #0
21542
+	strb	r3, [r9, #564]
21543
+	ldrb	r3, [r7, #152]	@ zero_extendqisi2
21544
+	cbz	r3, .L3326
21545
+	mov	r0, r2
21546
+	bl	ftl_get_blk_mode
21547
+	strb	r0, [r9, #564]
21548
+.L3326:
21549
+	ldr	r0, .L3426
21550
+	bl	make_superblock
21551
+	ldr	r2, .L3426+4
21552
+	movs	r3, #0
21553
+	ldrh	r0, [r9, #556]
21554
+	ldr	r1, [r9, #300]
21555
+	strh	r3, [r2, #1482]	@ movhi
21132
21556
 	ldrh	r1, [r1, r0, lsl #1]
21133
-	strh	r3, [r6, #558]	@ movhi
21134
-	strb	r3, [r6, #562]
21135
-	strh	r1, [r2, #980]	@ movhi
21136
-.L3427:
21557
+	strh	r3, [r9, #558]	@ movhi
21558
+	strb	r3, [r9, #562]
21559
+	strh	r1, [r2, #1484]	@ movhi
21560
+.L3317:
21137
21561
 	cmp	r8, #1
21138
-	bne	.L3437
21562
+	bne	.L3327
21139
21563
 	bl	FtlReadRefresh
21140
-.L3437:
21564
+.L3327:
21141
21565
 	movs	r3, #1
21142
-	str	r3, [r6, #3280]
21143
-	ldrh	r3, [r7, #2388]
21144
-	str	r3, [sp, #12]
21145
-	ldrb	r3, [r7, #144]	@ zero_extendqisi2
21146
-	cbz	r3, .L3438
21147
-	ldr	r3, .L3542+4
21148
-	ldrb	r3, [r3, #564]	@ zero_extendqisi2
21566
+	str	r3, [r9, #3280]
21567
+	ldrh	r3, [r7, #2390]
21568
+	str	r3, [sp, #16]
21569
+	ldrb	r3, [r7, #152]	@ zero_extendqisi2
21570
+	cbz	r3, .L3328
21571
+	ldrb	r3, [r9, #564]	@ zero_extendqisi2
21149
21572
 	cmp	r3, #1
21150
21573
 	itt	eq
21151
-	ldrheq	r3, [r7, #2390]
21152
-	streq	r3, [sp, #12]
21153
-.L3438:
21154
-	ldrh	r3, [r6, #558]
21155
-	ldr	r1, [sp, #12]
21574
+	ldrheq	r3, [r7, #2392]
21575
+	streq	r3, [sp, #16]
21576
+.L3328:
21577
+	ldrh	r3, [r9, #558]
21578
+	ldr	r1, [sp, #16]
21156
21579
 	adds	r2, r3, r5
21157
21580
 	cmp	r2, r1
21158
-	ittt	gt
21581
+	itt	gt
21159
21582
 	movgt	r2, r1
21160
-	subgt	r3, r2, r3
21161
-	uxthgt	r5, r3
21162
-	movs	r3, #0
21163
-.L3531:
21164
-	str	r3, [sp, #16]
21165
-	ldrh	r3, [sp, #16]
21166
-	ldr	r6, .L3542+4
21167
-	cmp	r3, r5
21168
-	bcs	.L3447
21169
-	ldr	r3, [r6, #1152]
21170
-	addw	r1, r6, #570
21171
-	ldr	r2, [sp, #16]
21172
-	movw	lr, #65535
21173
-	ldrh	r10, [r7, #2320]
21583
+	subgt	r5, r2, r3
21584
+	mov	r3, #0
21585
+	it	gt
21586
+	uxthgt	r5, r5
21587
+.L3419:
21174
21588
 	str	r3, [sp, #20]
21175
-	ldrh	r3, [r6, #558]
21176
-	add	ip, r3, r2
21177
-	movs	r3, #0
21178
-	mov	r9, r3
21179
-.L3448:
21180
-	uxth	r2, r3
21181
-	cmp	r2, r10
21182
-	bcs	.L3538
21183
-	ldrh	r2, [r1, #2]!
21184
-	cmp	r2, lr
21185
-	beq	.L3441
21186
-	ldr	r0, [sp, #20]
21187
-	mov	fp, #36
21188
-	orr	r2, ip, r2, lsl #10
21189
-	mla	fp, fp, r9, r0
21190
-	add	r9, r9, #1
21191
-	uxth	r9, r9
21192
-	str	r2, [fp, #4]
21193
-.L3441:
21194
-	adds	r3, r3, #1
21195
-	b	.L3448
21196
-.L3543:
21197
-	.align	2
21198
-.L3542:
21199
-	.word	.LANCHOR0
21200
-	.word	.LANCHOR2
21201
-	.word	.LANCHOR5
21202
-	.word	.LANCHOR2+556
21203
-.L3538:
21589
+	ldrh	r3, [sp, #20]
21590
+	ldr	r6, .L3426+8
21591
+	cmp	r5, r3
21592
+	bls	.L3337
21593
+	ldr	r3, [sp, #20]
21594
+	movw	fp, #65535
21595
+	ldrh	r10, [r6, #558]
21596
+	mov	ip, #36
21597
+	ldrh	r9, [r7, #2324]
21204
21598
 	ldr	r0, [r6, #1152]
21205
-	mov	r1, r9
21599
+	add	r10, r10, r3
21600
+	addw	r3, r6, #570
21601
+	str	r3, [sp, #24]
21602
+	movs	r3, #0
21603
+	str	r3, [sp, #12]
21604
+	b	.L3338
21605
+.L3332:
21606
+	ldr	r1, [sp, #24]
21607
+	ldrh	r2, [r1, #2]!
21608
+	cmp	r2, fp
21609
+	str	r1, [sp, #24]
21610
+	beq	.L3331
21611
+	ldr	r1, [sp, #12]
21612
+	orr	r2, r10, r2, lsl #10
21613
+	mla	lr, ip, r1, r0
21614
+	str	r2, [lr, #4]
21615
+	mov	r2, r1
21616
+	adds	r2, r2, #1
21617
+	uxth	r2, r2
21618
+	str	r2, [sp, #12]
21619
+.L3331:
21620
+	adds	r3, r3, #1
21621
+.L3338:
21622
+	uxth	r2, r3
21623
+	cmp	r9, r2
21624
+	bhi	.L3332
21206
21625
 	ldrb	r2, [r6, #564]	@ zero_extendqisi2
21207
21626
 	mov	fp, #0
21627
+	ldr	r6, .L3426+8
21628
+	ldr	r1, [sp, #12]
21208
21629
 	bl	FlashReadPages
21209
-	ldr	r6, .L3544
21210
-.L3443:
21630
+.L3333:
21631
+	ldr	r2, [sp, #12]
21211
21632
 	uxth	r3, fp
21212
-	cmp	r3, r9
21213
-	bcs	.L3539
21214
-	mov	ip, #36
21633
+	cmp	r2, r3
21634
+	bhi	.L3336
21635
+	ldr	r3, [sp, #20]
21636
+	adds	r3, r3, #1
21637
+	b	.L3419
21638
+.L3336:
21639
+	movs	r3, #36
21215
21640
 	ldr	r2, [r6, #1152]
21216
-	mul	r10, ip, fp
21217
-	add	r3, r2, r10
21218
-	ldr	r2, [r2, r10]
21219
-	ldr	r3, [r3, #12]
21641
+	mul	r9, r3, fp
21642
+	add	r1, r2, r9
21643
+	ldr	r2, [r2, r9]
21220
21644
 	adds	r2, r2, #1
21221
-	beq	.L3481
21222
-	ldrh	r1, [r3]
21645
+	beq	.L3334
21646
+	ldr	r10, [r1, #12]
21223
21647
 	movw	r2, #61589
21648
+	ldrh	r1, [r10]
21224
21649
 	cmp	r1, r2
21225
-	bne	.L3481
21226
-	ldr	r0, [r3, #8]
21227
-	add	r1, sp, #32
21650
+	bne	.L3334
21228
21651
 	movs	r2, #0
21229
-	str	ip, [sp, #24]
21230
-	str	r3, [sp, #20]
21652
+	add	r1, sp, #32
21653
+	ldr	r0, [r10, #8]
21654
+	str	r3, [sp, #24]
21231
21655
 	bl	log2phys
21232
21656
 	ldr	r1, [r6, #1152]
21233
-	add	r1, r1, r10
21234
-	ldr	r0, [r1, #4]
21235
21657
 	ldr	r2, [sp, #32]
21236
-	ldr	r3, [sp, #20]
21658
+	ldr	r3, [sp, #24]
21659
+	add	r1, r1, r9
21660
+	ldr	r0, [r1, #4]
21237
21661
 	bic	r2, r2, #-2147483648
21238
-	ldr	ip, [sp, #24]
21239
21662
 	cmp	r2, r0
21240
-	bne	.L3481
21241
-	str	r3, [sp, #28]
21242
-	ldr	r3, .L3544+4
21243
-	ldr	r0, [r6, #1136]
21663
+	bne	.L3334
21664
+	ldr	r2, .L3426+4
21665
+	ldr	r0, .L3426+4
21244
21666
 	ldr	r1, [r1, #16]
21245
-	ldrh	r2, [r3, #978]
21667
+	ldrh	r2, [r2, #1482]
21668
+	str	r3, [sp, #28]
21246
21669
 	adds	r2, r2, #1
21247
-	strh	r2, [r3, #978]	@ movhi
21670
+	strh	r2, [r0, #1482]	@ movhi
21671
+	ldr	r0, [r6, #1136]
21248
21672
 	ldr	r2, [r6, #3308]
21249
-	mla	r2, ip, r0, r2
21673
+	mla	r2, r3, r0, r2
21250
21674
 	str	r1, [r2, #16]
21251
-	str	r2, [sp, #20]
21675
+	str	r2, [sp, #24]
21252
21676
 	bl	Ftl_get_new_temp_ppa
21253
-	ldr	r1, [r6, #1136]
21254
-	ldr	r2, [sp, #20]
21255
-	ldr	ip, [sp, #24]
21677
+	ldr	r2, [sp, #24]
21678
+	ldr	r1, [r6, #3308]
21256
21679
 	ldr	r3, [sp, #28]
21257
21680
 	str	r0, [r2, #4]
21258
-	ldr	r2, [r6, #3308]
21259
-	mla	ip, ip, r1, r2
21681
+	ldr	r2, [r6, #1136]
21682
+	mla	r3, r3, r2, r1
21260
21683
 	ldr	r2, [r6, #1152]
21261
-	add	r2, r2, r10
21684
+	add	r2, r2, r9
21262
21685
 	ldr	r1, [r2, #8]
21263
-	str	r1, [ip, #8]
21686
+	str	r1, [r3, #8]
21264
21687
 	movs	r1, #1
21265
21688
 	ldr	r2, [r2, #12]
21266
-	str	r2, [ip, #12]
21267
-	ldr	r2, [sp, #32]
21268
21689
 	str	r2, [r3, #12]
21269
-	ldrh	r2, [r6, #412]
21270
-	strh	r2, [r3, #2]	@ movhi
21271
-	ldr	r2, [r6, #512]
21690
+	ldr	r3, [sp, #32]
21691
+	str	r3, [r10, #12]
21692
+	ldrh	r3, [r6, #416]
21693
+	strh	r3, [r10, #2]	@ movhi
21694
+	ldr	r3, [r6, #512]
21272
21695
 	ldr	r0, [r6, #1152]
21273
-	str	r2, [r3, #4]
21274
-	add	r0, r0, r10
21696
+	str	r3, [r10, #4]
21275
21697
 	ldr	r3, [r6, #1136]
21698
+	add	r0, r0, r9
21276
21699
 	adds	r3, r3, #1
21277
21700
 	str	r3, [r6, #1136]
21278
21701
 	bl	FtlGcBufAlloc
21279
-	ldrb	r3, [r7, #144]	@ zero_extendqisi2
21280
-	cbnz	r3, .L3445
21281
-	ldrb	r3, [r6, #419]	@ zero_extendqisi2
21282
-	ldr	r2, [r6, #1136]
21702
+	ldrb	r3, [r7, #152]	@ zero_extendqisi2
21703
+	cbnz	r3, .L3335
21704
+	ldrb	r2, [r6, #423]	@ zero_extendqisi2
21705
+	ldr	r3, [r6, #1136]
21283
21706
 	cmp	r2, r3
21284
-	beq	.L3445
21285
-	ldrh	r3, [r6, #416]
21286
-	cbnz	r3, .L3481
21287
-.L3445:
21707
+	beq	.L3335
21708
+	ldrh	r3, [r6, #420]
21709
+	cbnz	r3, .L3334
21710
+.L3335:
21288
21711
 	bl	Ftl_gc_temp_data_write_back
21289
-	cbz	r0, .L3481
21290
-	ldr	r3, .L3544
21712
+	cbz	r0, .L3334
21713
+	ldr	r3, .L3426+8
21291
21714
 	movs	r2, #0
21292
21715
 	movw	r1, #65535
21293
21716
 	str	r2, [r3, #3280]
21294
21717
 	strh	r1, [r3, #556]	@ movhi
21295
21718
 	strh	r2, [r3, #558]	@ movhi
21296
-	b	.L3532
21297
-.L3481:
21719
+	b	.L3421
21720
+.L3334:
21298
21721
 	add	fp, fp, #1
21299
-	b	.L3443
21300
-.L3539:
21301
-	ldr	r3, [sp, #16]
21302
-	adds	r3, r3, #1
21303
-	b	.L3531
21304
-.L3447:
21722
+	b	.L3333
21723
+.L3337:
21305
21724
 	ldrh	r3, [r6, #558]
21306
21725
 	add	r5, r5, r3
21307
-	ldr	r3, [sp, #12]
21726
+	ldr	r3, [sp, #16]
21308
21727
 	uxth	r5, r5
21728
+	cmp	r3, r5
21309
21729
 	strh	r5, [r6, #558]	@ movhi
21310
-	cmp	r5, r3
21311
-	bcc	.L3449
21730
+	bhi	.L3339
21312
21731
 	ldr	r3, [r6, #1136]
21313
-	ldr	r5, .L3544+4
21314
-	cbz	r3, .L3450
21732
+	ldr	r5, .L3426+4
21733
+	cbz	r3, .L3340
21315
21734
 	bl	Ftl_gc_temp_data_write_back
21316
-	cbz	r0, .L3450
21735
+	cbz	r0, .L3340
21317
21736
 	movs	r3, #0
21318
-	ldrh	r0, [r5, #976]
21737
+	ldrh	r0, [r5, #1480]
21319
21738
 	str	r3, [r6, #3280]
21320
-	b	.L3527
21321
-.L3450:
21322
-	ldrh	r5, [r5, #978]
21323
-	cbnz	r5, .L3451
21739
+	b	.L3256
21740
+.L3340:
21741
+	ldrh	r5, [r5, #1482]
21742
+	cbnz	r5, .L3341
21324
21743
 	ldrh	r2, [r6, #556]
21325
-	ldr	r3, [r6, #296]
21744
+	ldr	r3, [r6, #300]
21326
21745
 	ldrh	r3, [r3, r2, lsl #1]
21327
-	cbz	r3, .L3451
21328
-.L3452:
21329
-	ldr	r3, [r7, #2448]
21746
+	cbz	r3, .L3341
21747
+.L3342:
21748
+	ldr	r3, [r7, #2452]
21330
21749
 	cmp	r5, r3
21331
-	bcs	.L3457
21332
-	mov	r0, r5
21333
-	add	r1, sp, #36
21750
+	bcs	.L3347
21334
21751
 	movs	r2, #0
21752
+	add	r1, sp, #36
21753
+	mov	r0, r5
21335
21754
 	bl	log2phys
21336
21755
 	ldr	r0, [sp, #36]
21337
21756
 	adds	r3, r0, #1
21338
-	beq	.L3453
21757
+	beq	.L3343
21339
21758
 	ubfx	r0, r0, #10, #16
21340
21759
 	bl	P2V_block_in_plane
21341
21760
 	ldrh	r3, [r6, #556]
21342
21761
 	cmp	r3, r0
21343
-	bne	.L3453
21344
-.L3457:
21345
-	ldr	r3, .L3544+8
21346
-	ldr	r3, [r3, #2448]
21762
+	bne	.L3343
21763
+.L3347:
21764
+	ldr	r3, [r7, #2452]
21347
21765
 	cmp	r5, r3
21348
-	bcc	.L3451
21766
+	bcc	.L3341
21349
21767
 	ldrh	r2, [r6, #556]
21350
21768
 	movs	r1, #0
21351
-	ldr	r3, [r6, #296]
21769
+	ldr	r3, [r6, #300]
21352
21770
 	strh	r1, [r3, r2, lsl #1]	@ movhi
21353
21771
 	ldrh	r0, [r6, #556]
21354
21772
 	bl	update_vpc_list
21355
21773
 	bl	FtlCacheWriteBack
21356
21774
 	bl	l2p_flush
21357
21775
 	bl	FtlVpcTblFlush
21358
-	b	.L3451
21359
-.L3453:
21360
-	adds	r5, r5, #1
21361
-	b	.L3452
21362
-.L3451:
21776
+.L3341:
21363
21777
 	movw	r3, #65535
21364
21778
 	strh	r3, [r6, #556]	@ movhi
21365
-.L3449:
21366
-	ldrh	r3, [r6, #312]
21779
+.L3339:
21780
+	ldrh	r3, [r6, #316]
21367
21781
 	cmp	r3, #2
21368
-	bhi	.L3458
21369
-	ldrh	r5, [r7, #2388]
21370
-	b	.L3459
21371
-.L3458:
21372
-	ldr	r2, .L3544
21373
-	movs	r1, #0
21374
-	str	r1, [r2, #3280]
21375
-	ldr	r2, .L3544+4
21376
-	ldrh	r0, [r2, #976]
21377
-	cmp	r0, #0
21378
-	bne	.L3527
21379
-	adds	r0, r3, #1
21380
-	b	.L3527
21381
-.L3467:
21382
-	movs	r0, #0
21383
-	b	.L3527
21384
-.L3470:
21385
-	mov	r0, r2
21386
-	b	.L3527
21387
-.L3534:
21388
-	ldr	r2, [r5, #3276]
21389
-	ldr	r5, .L3544+8
21390
-	cbnz	r2, .L3391
21391
-	ldrh	r2, [r5, #2340]
21392
-	cmp	r2, #3
21393
-	beq	.L3391
21394
-	ldr	r2, [r9, #604]
21395
-	cbnz	r2, .L3391
21396
-	ldr	r2, [r5, #2244]
21397
-	cbnz	r2, .L3391
21398
-	ldrb	r0, [r5, #144]	@ zero_extendqisi2
21399
-	cbz	r0, .L3392
21400
-.L3391:
21401
-	ldr	r2, [r7, #296]
21402
-	ldrh	r0, [r5, #2340]
21403
-	ldrh	r1, [r2, r3, lsl #1]
21404
-	cmp	r0, #3
21405
-	ldrh	r3, [r5, #2390]
21406
-	ldrh	r2, [r5, #2320]
21407
-	mul	r2, r2, r3
21408
-	ite	eq
21409
-	lsreq	r3, r3, #1
21410
-	movne	r3, #0
21411
-	add	r3, r3, r2
21412
-	cmp	r1, r3
21413
-	bgt	.L3394
21414
-	movs	r0, #0
21415
-	bl	List_get_gc_head_node
21416
-	ldr	r3, [r5, #2448]
21417
-	ldr	r2, .L3544
21418
-	ldr	r1, [r7, #468]
21419
-	add	r3, r3, r3, lsl #1
21420
-	cmp	r1, r3, lsr #2
21421
-	ite	hi
21422
-	movhi	r3, #128
21423
-	movls	r3, #160
21424
-	strh	r3, [r2, #1122]	@ movhi
21425
-	uxth	r4, r0
21426
-	b	.L3396
21427
-.L3394:
21428
-	movs	r3, #128
21429
-	b	.L3530
21430
-.L3392:
21431
-	ldr	r2, [r9, #296]
21432
-	ldrh	r3, [r2, r3, lsl #1]
21433
-	cmp	r3, #7
21434
-	bhi	.L3397
21435
-	bl	List_get_gc_head_node
21436
-	movs	r3, #128
21437
-	strh	r3, [r7, #1122]	@ movhi
21438
-	uxth	r4, r0
21439
-	b	.L3396
21440
-.L3397:
21441
-	movs	r3, #64
21442
-.L3530:
21443
-	strh	r3, [r7, #1122]	@ movhi
21444
-	b	.L3398
21445
-.L3389:
21446
-	movs	r3, #80
21447
-	strh	r3, [r5, #1122]	@ movhi
21448
-	b	.L3398
21449
-.L3396:
21450
-	movw	r3, #65535
21451
-	cmp	r4, r3
21452
-	beq	.L3398
21453
-.L3388:
21454
-	ldr	r1, [r7, #232]
21455
-	ldr	r3, [r7, #296]
21456
-	ldrh	r2, [r7, #312]
21457
-	ldrh	r1, [r1, r4, lsl #1]
21458
-	ldrh	r3, [r3, r4, lsl #1]
21459
-	ldr	r0, .L3544+12
21460
-	str	r1, [sp]
21461
-	ldrh	r1, [r7, #1120]
21462
-	str	r1, [sp, #4]
21463
-	mov	r1, r4
21464
-	bl	printk
21465
-	b	.L3398
21466
-.L3401:
21467
-	cmp	r4, #12
21468
-	bls	.L3402
21469
-	lsrs	r5, r5, #4
21470
-	b	.L3400
21471
-.L3402:
21472
-	cmp	r4, #8
21473
-	bls	.L3400
21474
-	lsrs	r5, r5, #2
21475
-	b	.L3400
21476
-.L3474:
21477
-	movs	r5, #1
21478
-	b	.L3400
21479
-.L3536:
21480
-	ldrh	r3, [r2, #412]
21481
-	movw	r1, #65535
21482
-	cmp	r3, r1
21483
-	bne	.L3405
21484
-	ldrh	r1, [r2, #1174]
21485
-	cmp	r1, r3
21486
-	bne	.L3405
21487
-	ldr	r3, .L3544+4
21488
-	ldrh	r0, [r3, #976]
21489
-	cbnz	r0, .L3406
21490
-	ldr	r3, .L3544+8
21491
-	ldr	r2, [r2, #468]
21492
-	ldr	r3, [r3, #2448]
21493
-	add	r3, r3, r3, lsl #1
21494
-	cmp	r2, r3, lsr #2
21495
-	bcs	.L3475
21496
-.L3406:
21497
-	ldrh	r3, [r7, #536]
21498
-	add	r3, r3, r3, lsl #1
21499
-	ubfx	r3, r3, #2, #16
21500
-	b	.L3407
21501
-.L3545:
21502
-	.align	2
21503
-.L3544:
21504
-	.word	.LANCHOR2
21505
-	.word	.LANCHOR5
21506
-	.word	.LANCHOR0
21507
-	.word	.LC158
21508
-.L3475:
21509
-	movs	r3, #18
21510
-.L3407:
21511
-	strh	r3, [r7, #1120]	@ movhi
21512
-	movs	r3, #0
21513
-	str	r3, [r7, #1132]
21514
-	b	.L3527
21515
-.L3405:
21516
-	ldrh	r3, [r7, #536]
21517
-	add	r3, r3, r3, lsl #1
21518
-	asrs	r3, r3, #2
21519
-	strh	r3, [r7, #1120]	@ movhi
21520
-	b	.L3404
21521
-.L3537:
21522
-	cmp	r6, #2
21523
-	bhi	.L3477
21782
+	bhi	.L3348
21783
+	ldrh	r5, [r7, #2390]
21784
+	b	.L3349
21785
+.L3343:
21524
21786
 	adds	r5, r5, #1
21525
-	uxth	r5, r5
21526
-	b	.L3477
21527
-.L3533:
21787
+	b	.L3342
21788
+.L3348:
21789
+	movs	r2, #0
21790
+	str	r2, [r6, #3280]
21791
+	ldr	r2, .L3426+4
21792
+	ldrh	r0, [r2, #1480]
21793
+	cmp	r0, #0
21794
+	bne	.L3256
21795
+	adds	r0, r3, #1
21796
+	b	.L3256
21797
+.L3355:
21798
+	movs	r0, #0
21799
+	b	.L3256
21800
+.L3274:
21528
21801
 	cmp	r8, #0
21529
-	beq	.L3464
21530
-	b	.L3399
21531
-.L3385:
21802
+	bne	.L3354
21803
+	b	.L3353
21804
+.L3273:
21532
21805
 	cmp	r8, #0
21533
-	beq	.L3464
21534
-	b	.L3465
21535
-.L3384:
21536
-	cmp	r8, #0
21537
-	beq	.L3464
21538
-	b	.L3415
21539
-.L3387:
21540
-	cmp	r8, #0
21541
-	beq	.L3464
21542
-	b	.L3466
21543
-.L3527:
21544
-	add	sp, sp, #44
21545
-	@ sp needed
21546
-	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
21806
+	bne	.L3305
21807
+	b	.L3353
21808
+.L3427:
21809
+	.align	2
21810
+.L3426:
21811
+	.word	.LANCHOR2+556
21812
+	.word	.LANCHOR4
21813
+	.word	.LANCHOR2
21547
21814
 	.fnend
21548
21815
 	.size	ftl_do_gc, .-ftl_do_gc
21549
21816
 	.align	1
21550
21817
 	.global	FtlCacheWriteBack
21818
+	.syntax unified
21551
21819
 	.thumb
21552
21820
 	.thumb_func
21821
+	.fpu softvfp
21553
21822
 	.type	FtlCacheWriteBack, %function
21554
21823
 FtlCacheWriteBack:
21555
21824
 	.fnstart
..
..
@@ -21558,241 +21827,245 @@
21558
21827
 	push	{r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr}
21559
21828
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
21560
21829
 	.pad #12
21561
-	ldr	r3, .L3589
21562
-	ldr	r7, .L3589+4
21563
-	ldr	r5, [r3, #984]
21564
-	ldr	r3, [r7, #224]
21565
-	cmp	r3, #0
21566
-	bne	.L3548
21567
-	ldr	r4, .L3589+8
21568
-	ldr	r1, [r4, #2440]
21569
-	cmp	r1, #0
21570
-	beq	.L3548
21571
-	ldrb	r3, [r4, #144]	@ zero_extendqisi2
21572
-	cbz	r3, .L3571
21573
-	ldrb	r8, [r5, #8]	@ zero_extendqisi2
21830
+	ldr	r5, .L3470
21831
+	ldr	r9, [r5, #228]
21832
+	cmp	r9, #0
21833
+	bne	.L3430
21834
+	ldr	r4, .L3470+4
21835
+	ldr	r1, [r4, #2444]
21836
+	cbz	r1, .L3430
21837
+	ldr	r3, .L3470+8
21838
+	ldr	r6, [r3, #1488]
21839
+	ldrb	r3, [r4, #152]	@ zero_extendqisi2
21840
+	cbz	r3, .L3455
21841
+	ldrb	r8, [r6, #8]	@ zero_extendqisi2
21574
21842
 	add	r0, r8, #-1
21575
21843
 	rsbs	r8, r0, #0
21576
21844
 	adc	r8, r8, r0
21577
-	b	.L3550
21578
-.L3571:
21579
-	mov	r8, r3
21580
-.L3550:
21581
-	ldr	r0, [r4, #2444]
21845
+.L3432:
21846
+	movs	r7, #0
21847
+	mov	r10, #36
21848
+	ldrb	r3, [r6, #9]	@ zero_extendqisi2
21582
21849
 	mov	r2, r8
21583
-	ldrb	r3, [r5, #9]	@ zero_extendqisi2
21584
-	mov	r9, #0
21850
+	ldr	r0, [r4, #2448]
21585
21851
 	bl	FlashProgPages
21586
-	ldr	r10, .L3589+8
21587
-	mov	fp, #36
21588
-.L3551:
21589
-	ldr	r3, [r4, #2440]
21590
-	cmp	r9, r3
21591
-	bcs	.L3569
21592
-	mul	r6, fp, r9
21593
-	ldr	r3, [r10, #2444]
21594
-	adds	r2, r3, r6
21595
-	ldr	r3, [r3, r6]
21596
-	adds	r3, r3, #1
21597
-	beq	.L3572
21598
-	ldr	r3, [r2, #4]
21599
-	cmp	r8, #0
21600
-	beq	.L3585
21601
-	orr	r3, r3, #-2147483648
21602
-.L3585:
21603
-	ldr	r0, [r2, #16]
21604
-	add	r1, sp, #4
21605
-	movs	r2, #1
21606
-	str	r3, [sp, #4]
21607
-	bl	log2phys
21852
+.L3433:
21608
21853
 	ldr	r3, [r4, #2444]
21609
-	add	r6, r6, r3
21610
-	ldr	r3, [r6, #12]
21611
-	ldr	r0, [r3, #12]
21612
-	adds	r2, r0, #1
21613
-	beq	.L3555
21614
-	ubfx	r0, r0, #10, #16
21615
-	bl	P2V_block_in_plane
21616
-	ldr	r3, [r7, #296]
21617
-	ldrh	r2, [r3, r0, lsl #1]
21618
-	mov	r6, r0
21619
-	cbnz	r2, .L3556
21620
-	ldr	r0, .L3589+12
21621
-	mov	r1, r6
21622
-	bl	printk
21623
-.L3556:
21624
-	mov	r0, r6
21625
-	bl	decrement_vpc_count
21626
-.L3555:
21627
-	add	r9, r9, #1
21628
-	b	.L3551
21629
-.L3587:
21630
-	movw	r5, #16386
21631
-.L3568:
21632
-	ldrh	r3, [r7, #1182]
21633
-	cbz	r3, .L3569
21634
-	movs	r0, #1
21635
-	mov	r1, r0
21636
-	bl	ftl_do_gc
21637
-	subs	r5, r5, #1
21638
-	bne	.L3568
21639
-.L3569:
21854
+	cmp	r7, r3
21855
+	bcc	.L3440
21856
+.L3452:
21640
21857
 	movs	r3, #0
21641
-	str	r3, [r4, #2440]
21642
-	b	.L3548
21643
-.L3572:
21644
-	ldr	r10, .L3589+8
21645
-	mov	r9, #0
21646
-.L3552:
21647
-	ldr	r3, [r4, #2440]
21648
-	cmp	r9, r3
21649
-	bcs	.L3587
21650
-	movs	r6, #36
21651
-	ldr	r3, [r10, #2444]
21652
-	mov	fp, #0
21653
-	mov	r2, #-1
21654
-	mul	r6, r6, r9
21655
-	str	r2, [r3, r6]
21656
-.L3558:
21657
-	ldr	r3, [r4, #2444]
21658
-	adds	r2, r3, r6
21659
-	ldr	r3, [r3, r6]
21660
-	adds	r3, r3, #1
21661
-	bne	.L3588
21662
-	ldr	r0, [r2, #4]
21663
-	ubfx	r0, r0, #10, #16
21664
-	bl	P2V_block_in_plane
21665
-	ldrh	r3, [r5]
21666
-	cmp	r3, r0
21667
-	bne	.L3559
21668
-	ldr	r1, [r7, #296]
21669
-	ldrh	r0, [r5, #4]
21670
-	ldrh	r2, [r1, r3, lsl #1]
21671
-	subs	r2, r2, r0
21672
-	strh	r2, [r1, r3, lsl #1]	@ movhi
21673
-	ldrh	r3, [r10, #2388]
21674
-	strb	fp, [r5, #6]
21675
-	strh	fp, [r5, #4]	@ movhi
21676
-	strh	r3, [r5, #2]	@ movhi
21677
-.L3559:
21678
-	ldrh	r3, [r5, #4]
21679
-	cbnz	r3, .L3560
21680
-	mov	r0, r5
21681
-	bl	allocate_new_data_superblock
21682
-.L3560:
21683
-	ldr	r3, [r7, #704]
21684
-	adds	r3, r3, #1
21685
-	str	r3, [r7, #704]
21686
-	ldr	r3, [r4, #2444]
21687
-	add	r3, r3, r6
21688
-	ldr	r0, [r3, #4]
21689
-	ubfx	r0, r0, #10, #16
21690
-	bl	FtlGcMarkBadPhyBlk
21691
-	mov	r0, r5
21692
-	bl	get_new_active_ppa
21693
-	ldr	r3, [r4, #2444]
21694
-	mov	r2, r8
21695
-	movs	r1, #1
21696
-	add	r3, r3, r6
21697
-	str	r0, [sp, #4]
21698
-	str	r0, [r3, #4]
21699
-	mov	r0, r3
21700
-	ldrb	r3, [r5, #9]	@ zero_extendqisi2
21701
-	bl	FlashProgPages
21702
-	ldr	r3, [r4, #2444]
21703
-	ldr	r3, [r3, r6]
21704
-	adds	r3, r3, #1
21705
-	ittt	eq
21706
-	moveq	r3, #1
21707
-	ldreq	r2, .L3589+4
21708
-	streq	r3, [r2, #224]
21709
-	ldr	r3, [r7, #224]
21710
-	cmp	r3, #0
21711
-	beq	.L3558
21712
-	b	.L3548
21713
-.L3588:
21714
-	ldr	r3, [r2, #4]
21715
-	cmp	r8, #0
21716
-	beq	.L3586
21717
-	orr	r3, r3, #-2147483648
21718
-.L3586:
21719
-	ldr	r0, [r2, #16]
21720
-	add	r1, sp, #4
21721
-	movs	r2, #1
21722
-	str	r3, [sp, #4]
21723
-	bl	log2phys
21724
-	ldr	r3, [r4, #2444]
21725
-	add	r6, r6, r3
21726
-	ldr	r3, [r6, #12]
21727
-	ldr	r0, [r3, #12]
21728
-	adds	r3, r0, #1
21729
-	beq	.L3565
21730
-	ubfx	r0, r0, #10, #16
21731
-	bl	P2V_block_in_plane
21732
-	ldr	r3, [r7, #296]
21733
-	ldrh	r2, [r3, r0, lsl #1]
21734
-	mov	r6, r0
21735
-	cbnz	r2, .L3566
21736
-	ldr	r0, .L3589+12
21737
-	mov	r1, r6
21738
-	bl	printk
21739
-.L3566:
21740
-	mov	r0, r6
21741
-	bl	decrement_vpc_count
21742
-.L3565:
21743
-	add	r9, r9, #1
21744
-	b	.L3552
21745
-.L3548:
21858
+	str	r3, [r4, #2444]
21859
+.L3430:
21746
21860
 	movs	r0, #0
21747
21861
 	add	sp, sp, #12
21748
21862
 	@ sp needed
21749
21863
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
21750
-.L3590:
21864
+.L3455:
21865
+	mov	r8, r9
21866
+	b	.L3432
21867
+.L3440:
21868
+	mul	fp, r10, r7
21869
+	ldr	r2, [r4, #2448]
21870
+	add	r0, r2, fp
21871
+	ldr	r2, [r2, fp]
21872
+	adds	r2, r2, #1
21873
+	bne	.L3434
21874
+	mov	r10, #0
21875
+.L3435:
21876
+	ldr	r3, [r4, #2444]
21877
+	cmp	r9, r3
21878
+	bcc	.L3450
21879
+	movw	r6, #16386
21880
+.L3453:
21881
+	ldrh	r3, [r5, #1182]
21882
+	cmp	r3, #0
21883
+	beq	.L3452
21884
+	movs	r1, #1
21885
+	mov	r0, r1
21886
+	bl	ftl_do_gc
21887
+	subs	r6, r6, #1
21888
+	bne	.L3453
21889
+	b	.L3452
21890
+.L3434:
21891
+	ldr	r2, [r0, #4]
21892
+	cmp	r8, #0
21893
+	bne	.L3436
21894
+.L3468:
21895
+	str	r2, [sp, #4]
21896
+	add	r1, sp, #4
21897
+	movs	r2, #1
21898
+	ldr	r0, [r0, #16]
21899
+	bl	log2phys
21900
+	ldr	r2, [r4, #2448]
21901
+	add	r3, r2, fp
21902
+	ldr	r3, [r3, #12]
21903
+	ldr	r0, [r3, #12]
21904
+	adds	r2, r0, #1
21905
+	beq	.L3438
21906
+	ubfx	r0, r0, #10, #16
21907
+	bl	P2V_block_in_plane
21908
+	ldr	r2, [r5, #300]
21909
+	mov	fp, r0
21910
+	ldrh	r2, [r2, r0, lsl #1]
21911
+	cbnz	r2, .L3439
21912
+	mov	r1, r0
21913
+	ldr	r0, .L3470+12
21914
+	bl	printk
21915
+.L3439:
21916
+	mov	r0, fp
21917
+	bl	decrement_vpc_count
21918
+.L3438:
21919
+	adds	r7, r7, #1
21920
+	b	.L3433
21921
+.L3436:
21922
+	orr	r2, r2, #-2147483648
21923
+	b	.L3468
21924
+.L3450:
21925
+	movs	r7, #36
21926
+	ldr	r3, [r4, #2448]
21927
+	mul	r7, r7, r9
21928
+	mov	fp, #1
21929
+	mov	r2, #-1
21930
+	str	r2, [r3, r7]
21931
+.L3441:
21932
+	ldr	r2, [r4, #2448]
21933
+	adds	r3, r2, r7
21934
+	ldr	r2, [r2, r7]
21935
+	ldr	r0, [r3, #4]
21936
+	adds	r2, r2, #1
21937
+	beq	.L3445
21938
+	cmp	r8, #0
21939
+	bne	.L3446
21940
+.L3469:
21941
+	str	r0, [sp, #4]
21942
+	movs	r2, #1
21943
+	ldr	r0, [r3, #16]
21944
+	add	r1, sp, #4
21945
+	bl	log2phys
21946
+	ldr	r3, [r4, #2448]
21947
+	add	r7, r7, r3
21948
+	ldr	r3, [r7, #12]
21949
+	ldr	r0, [r3, #12]
21950
+	adds	r3, r0, #1
21951
+	beq	.L3448
21952
+	ubfx	r0, r0, #10, #16
21953
+	bl	P2V_block_in_plane
21954
+	ldr	r3, [r5, #300]
21955
+	mov	r7, r0
21956
+	ldrh	r2, [r3, r0, lsl #1]
21957
+	cbnz	r2, .L3449
21958
+	mov	r1, r0
21959
+	ldr	r0, .L3470+12
21960
+	bl	printk
21961
+.L3449:
21962
+	mov	r0, r7
21963
+	bl	decrement_vpc_count
21964
+.L3448:
21965
+	add	r9, r9, #1
21966
+	b	.L3435
21967
+.L3445:
21968
+	ubfx	r0, r0, #10, #16
21969
+	bl	P2V_block_in_plane
21970
+	ldrh	r3, [r6]
21971
+	cmp	r3, r0
21972
+	bne	.L3442
21973
+	ldr	r1, [r5, #300]
21974
+	ldrh	r0, [r6, #4]
21975
+	ldrh	r2, [r1, r3, lsl #1]
21976
+	subs	r2, r2, r0
21977
+	strh	r2, [r1, r3, lsl #1]	@ movhi
21978
+	ldrh	r3, [r4, #2390]
21979
+	strb	r10, [r6, #6]
21980
+	strh	r10, [r6, #4]	@ movhi
21981
+	strh	r3, [r6, #2]	@ movhi
21982
+.L3442:
21983
+	ldrh	r3, [r6, #4]
21984
+	cbnz	r3, .L3443
21985
+	mov	r0, r6
21986
+	bl	allocate_new_data_superblock
21987
+.L3443:
21988
+	ldr	r3, [r5, #700]
21989
+	adds	r3, r3, #1
21990
+	str	r3, [r5, #700]
21991
+	ldr	r3, [r4, #2448]
21992
+	add	r3, r3, r7
21993
+	ldr	r0, [r3, #4]
21994
+	ubfx	r0, r0, #10, #16
21995
+	bl	FtlGcMarkBadPhyBlk
21996
+	mov	r0, r6
21997
+	bl	get_new_active_ppa
21998
+	ldr	r3, [r4, #2448]
21999
+	mov	r2, r0
22000
+	str	r0, [sp, #4]
22001
+	movs	r1, #1
22002
+	adds	r0, r3, r7
22003
+	str	r2, [r0, #4]
22004
+	mov	r2, r8
22005
+	ldrb	r3, [r6, #9]	@ zero_extendqisi2
22006
+	bl	FlashProgPages
22007
+	ldr	r3, [r4, #2448]
22008
+	ldr	r3, [r3, r7]
22009
+	adds	r3, r3, #1
22010
+	it	eq
22011
+	streq	fp, [r5, #228]
22012
+	ldr	r3, [r5, #228]
22013
+	cmp	r3, #0
22014
+	beq	.L3441
22015
+	b	.L3430
22016
+.L3446:
22017
+	orr	r0, r0, #-2147483648
22018
+	b	.L3469
22019
+.L3471:
21751
22020
 	.align	2
21752
-.L3589:
21753
-	.word	.LANCHOR5
22021
+.L3470:
21754
22022
 	.word	.LANCHOR2
21755
22023
 	.word	.LANCHOR0
22024
+	.word	.LANCHOR4
21756
22025
 	.word	.LC159
21757
22026
 	.fnend
21758
22027
 	.size	FtlCacheWriteBack, .-FtlCacheWriteBack
21759
22028
 	.align	1
21760
22029
 	.global	FtlSysFlush
22030
+	.syntax unified
21761
22031
 	.thumb
21762
22032
 	.thumb_func
22033
+	.fpu softvfp
21763
22034
 	.type	FtlSysFlush, %function
21764
22035
 FtlSysFlush:
21765
22036
 	.fnstart
21766
22037
 	@ args = 0, pretend = 0, frame = 0
21767
22038
 	@ frame_needed = 0, uses_anonymous_args = 0
21768
-	ldr	r3, .L3593
22039
+	ldr	r3, .L3474
21769
22040
 	push	{r4, lr}
21770
22041
 	.save {r4, lr}
21771
-	ldr	r3, [r3, #224]
21772
-	cbnz	r3, .L3592
21773
-	ldr	r3, .L3593+4
21774
-	ldr	r4, [r3, #504]
22042
+	ldr	r3, [r3, #228]
22043
+	cbnz	r3, .L3473
22044
+	ldr	r3, .L3474+4
22045
+	ldr	r4, [r3, #500]
21775
22046
 	cmp	r4, #1
21776
-	bne	.L3592
22047
+	bne	.L3473
21777
22048
 	bl	FtlCacheWriteBack
21778
22049
 	bl	l2p_flush
21779
22050
 	mov	r0, r4
21780
22051
 	bl	FtlEctTblFlush
21781
22052
 	bl	FtlVpcTblFlush
21782
-.L3592:
22053
+.L3473:
21783
22054
 	movs	r0, #0
21784
22055
 	pop	{r4, pc}
21785
-.L3594:
22056
+.L3475:
21786
22057
 	.align	2
21787
-.L3593:
22058
+.L3474:
21788
22059
 	.word	.LANCHOR2
21789
22060
 	.word	.LANCHOR1
21790
22061
 	.fnend
21791
22062
 	.size	FtlSysFlush, .-FtlSysFlush
21792
22063
 	.align	1
21793
22064
 	.global	FtlDeInit
22065
+	.syntax unified
21794
22066
 	.thumb
21795
22067
 	.thumb_func
22068
+	.fpu softvfp
21796
22069
 	.type	FtlDeInit, %function
21797
22070
 FtlDeInit:
21798
22071
 	.fnstart
..
..
@@ -21800,24 +22073,26 @@
21800
22073
 	@ frame_needed = 0, uses_anonymous_args = 0
21801
22074
 	push	{r3, lr}
21802
22075
 	.save {r3, lr}
21803
-	ldr	r3, .L3597
21804
-	ldr	r3, [r3, #504]
22076
+	ldr	r3, .L3478
22077
+	ldr	r3, [r3, #500]
21805
22078
 	cmp	r3, #1
21806
-	bne	.L3596
22079
+	bne	.L3477
21807
22080
 	bl	FtlSysFlush
21808
-.L3596:
22081
+.L3477:
21809
22082
 	movs	r0, #0
21810
22083
 	pop	{r3, pc}
21811
-.L3598:
22084
+.L3479:
21812
22085
 	.align	2
21813
-.L3597:
22086
+.L3478:
21814
22087
 	.word	.LANCHOR1
21815
22088
 	.fnend
21816
22089
 	.size	FtlDeInit, .-FtlDeInit
21817
22090
 	.align	1
21818
22091
 	.global	ftl_deinit
22092
+	.syntax unified
21819
22093
 	.thumb
21820
22094
 	.thumb_func
22095
+	.fpu softvfp
21821
22096
 	.type	ftl_deinit, %function
21822
22097
 ftl_deinit:
21823
22098
 	.fnstart
..
..
@@ -21833,8 +22108,10 @@
21833
22108
 	.size	ftl_deinit, .-ftl_deinit
21834
22109
 	.align	1
21835
22110
 	.global	rk_ftl_de_init
22111
+	.syntax unified
21836
22112
 	.thumb
21837
22113
 	.thumb_func
22114
+	.fpu softvfp
21838
22115
 	.type	rk_ftl_de_init, %function
21839
22116
 rk_ftl_de_init:
21840
22117
 	.fnstart
..
..
@@ -21843,20 +22120,22 @@
21843
22120
 	push	{r3, lr}
21844
22121
 	.save {r3, lr}
21845
22122
 	movs	r1, #0
21846
-	ldr	r0, .L3601
22123
+	ldr	r0, .L3482
21847
22124
 	bl	printk
21848
22125
 	pop	{r3, lr}
21849
22126
 	b	ftl_deinit
21850
-.L3602:
22127
+.L3483:
21851
22128
 	.align	2
21852
-.L3601:
22129
+.L3482:
21853
22130
 	.word	.LC160
21854
22131
 	.fnend
21855
22132
 	.size	rk_ftl_de_init, .-rk_ftl_de_init
21856
22133
 	.align	1
21857
22134
 	.global	ftl_cache_flush
22135
+	.syntax unified
21858
22136
 	.thumb
21859
22137
 	.thumb_func
22138
+	.fpu softvfp
21860
22139
 	.type	ftl_cache_flush, %function
21861
22140
 ftl_cache_flush:
21862
22141
 	.fnstart
..
..
@@ -21868,8 +22147,10 @@
21868
22147
 	.size	ftl_cache_flush, .-ftl_cache_flush
21869
22148
 	.align	1
21870
22149
 	.global	rk_ftl_cache_write_back
22150
+	.syntax unified
21871
22151
 	.thumb
21872
22152
 	.thumb_func
22153
+	.fpu softvfp
21873
22154
 	.type	rk_ftl_cache_write_back, %function
21874
22155
 rk_ftl_cache_write_back:
21875
22156
 	.fnstart
..
..
@@ -21881,8 +22162,10 @@
21881
22162
 	.size	rk_ftl_cache_write_back, .-rk_ftl_cache_write_back
21882
22163
 	.align	1
21883
22164
 	.global	ftl_discard
22165
+	.syntax unified
21884
22166
 	.thumb
21885
22167
 	.thumb_func
22168
+	.fpu softvfp
21886
22169
 	.type	ftl_discard, %function
21887
22170
 ftl_discard:
21888
22171
 	.fnstart
..
..
@@ -21892,25 +22175,24 @@
21892
22175
 	.save {r4, r5, r6, r7, r8, r9, lr}
21893
22176
 	.pad #12
21894
22177
 	mov	r6, r0
21895
-	ldr	r7, .L3624
22178
+	ldr	r7, .L3504
21896
22179
 	mov	r4, r1
21897
-	ldr	r5, [r7, #2428]
21898
-	cmp	r0, r5
21899
-	bcs	.L3614
21900
-	cmp	r1, r5
21901
-	bhi	.L3614
21902
-	adds	r3, r0, r1
21903
-	cmp	r3, r5
21904
-	bhi	.L3614
22180
+	ldr	r3, [r7, #2432]
22181
+	cmp	r3, r0
22182
+	bls	.L3495
22183
+	cmp	r3, r1
22184
+	bcc	.L3495
22185
+	adds	r2, r0, r1
22186
+	cmp	r3, r2
22187
+	bcc	.L3495
21905
22188
 	cmp	r1, #31
21906
-	bls	.L3616
21907
-	ldr	r3, .L3624+4
21908
-	ldr	r2, [r3, #224]
22189
+	bls	.L3497
22190
+	ldr	r3, .L3504+4
22191
+	ldr	r2, [r3, #228]
21909
22192
 	mov	r8, r3
21910
-	cmp	r2, #0
21911
-	bne	.L3616
22193
+	cbnz	r2, .L3497
21912
22194
 	bl	FtlCacheWriteBack
21913
-	ldrh	r5, [r7, #2394]
22195
+	ldrh	r5, [r7, #2396]
21914
22196
 	mov	r0, r6
21915
22197
 	mov	r1, r5
21916
22198
 	bl	__aeabi_uidiv
..
..
@@ -21918,7 +22200,7 @@
21918
22200
 	mov	r9, r0
21919
22201
 	subs	r6, r6, r3
21920
22202
 	uxth	r6, r6
21921
-	cbz	r6, .L3607
22203
+	cbz	r6, .L3488
21922
22204
 	subs	r5, r5, r6
21923
22205
 	add	r9, r0, #1
21924
22206
 	cmp	r5, r4
..
..
@@ -21926,27 +22208,39 @@
21926
22208
 	movcs	r5, r4
21927
22209
 	uxth	r5, r5
21928
22210
 	subs	r4, r4, r5
21929
-.L3607:
21930
-	ldr	r5, .L3624+8
22211
+.L3488:
22212
+	ldr	r5, .L3504+8
21931
22213
 	mov	r3, #-1
21932
22214
 	str	r3, [sp, #4]
21933
-.L3608:
21934
-	ldrh	r3, [r7, #2394]
22215
+.L3489:
22216
+	ldrh	r3, [r7, #2396]
21935
22217
 	cmp	r4, r3
21936
-	bcc	.L3623
21937
-	mov	r0, r9
21938
-	mov	r1, sp
22218
+	bcs	.L3491
22219
+	ldr	r3, .L3504+8
22220
+	ldr	r2, [r3, #1492]
22221
+	cmp	r2, #32
22222
+	bls	.L3497
21939
22223
 	movs	r2, #0
22224
+	str	r2, [r3, #1492]
22225
+	bl	l2p_flush
22226
+	bl	FtlVpcTblFlush
22227
+.L3497:
22228
+	movs	r0, #0
22229
+	b	.L3486
22230
+.L3491:
22231
+	movs	r2, #0
22232
+	mov	r1, sp
22233
+	mov	r0, r9
21940
22234
 	bl	log2phys
21941
22235
 	ldr	r3, [sp]
21942
22236
 	adds	r3, r3, #1
21943
-	beq	.L3609
21944
-	ldr	r3, [r5, #988]
21945
-	add	r1, sp, #4
22237
+	beq	.L3490
22238
+	ldr	r3, [r5, #1492]
21946
22239
 	movs	r2, #1
22240
+	add	r1, sp, #4
21947
22241
 	mov	r0, r9
21948
22242
 	adds	r3, r3, #1
21949
-	str	r3, [r5, #988]
22243
+	str	r3, [r5, #1492]
21950
22244
 	ldr	r3, [r8, #480]
21951
22245
 	adds	r3, r3, #1
21952
22246
 	str	r3, [r8, #480]
..
..
@@ -21955,42 +22249,31 @@
21955
22249
 	ubfx	r0, r0, #10, #16
21956
22250
 	bl	P2V_block_in_plane
21957
22251
 	bl	decrement_vpc_count
21958
-.L3609:
21959
-	ldrh	r3, [r7, #2394]
22252
+.L3490:
22253
+	ldrh	r3, [r7, #2396]
21960
22254
 	add	r9, r9, #1
21961
22255
 	subs	r4, r4, r3
21962
-	b	.L3608
21963
-.L3623:
21964
-	ldr	r3, .L3624+8
21965
-	ldr	r2, [r3, #988]
21966
-	cmp	r2, #32
21967
-	bls	.L3616
21968
-	movs	r2, #0
21969
-	str	r2, [r3, #988]
21970
-	bl	l2p_flush
21971
-	bl	FtlVpcTblFlush
21972
-	b	.L3616
21973
-.L3614:
22256
+	b	.L3489
22257
+.L3495:
21974
22258
 	mov	r0, #-1
21975
-	b	.L3606
21976
-.L3616:
21977
-	movs	r0, #0
21978
-.L3606:
22259
+.L3486:
21979
22260
 	add	sp, sp, #12
21980
22261
 	@ sp needed
21981
22262
 	pop	{r4, r5, r6, r7, r8, r9, pc}
21982
-.L3625:
22263
+.L3505:
21983
22264
 	.align	2
21984
-.L3624:
22265
+.L3504:
21985
22266
 	.word	.LANCHOR0
21986
22267
 	.word	.LANCHOR2
21987
-	.word	.LANCHOR5
22268
+	.word	.LANCHOR4
21988
22269
 	.fnend
21989
22270
 	.size	ftl_discard, .-ftl_discard
21990
22271
 	.align	1
21991
22272
 	.global	FtlDiscard
22273
+	.syntax unified
21992
22274
 	.thumb
21993
22275
 	.thumb_func
22276
+	.fpu softvfp
21994
22277
 	.type	FtlDiscard, %function
21995
22278
 FtlDiscard:
21996
22279
 	.fnstart
..
..
@@ -22002,8 +22285,10 @@
22002
22285
 	.size	FtlDiscard, .-FtlDiscard
22003
22286
 	.align	1
22004
22287
 	.global	ftl_read
22288
+	.syntax unified
22005
22289
 	.thumb
22006
22290
 	.thumb_func
22291
+	.fpu softvfp
22007
22292
 	.type	ftl_read, %function
22008
22293
 ftl_read:
22009
22294
 	.fnstart
..
..
@@ -22011,289 +22296,294 @@
22011
22296
 	@ frame_needed = 0, uses_anonymous_args = 0
22012
22297
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
22013
22298
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
22014
-	mov	r8, r3
22015
-	ldr	r3, .L3672
22299
+	mov	r9, r3
22300
+	ldr	r3, .L3548
22016
22301
 	.pad #84
22017
22302
 	sub	sp, sp, #84
22018
22303
 	mov	r5, r1
22019
-	str	r2, [sp, #36]
22020
-	ldr	r3, [r3, #504]
22304
+	str	r2, [sp, #44]
22305
+	ldr	r3, [r3, #500]
22021
22306
 	cmp	r3, #1
22022
-	bne	.L3653
22307
+	bne	.L3532
22023
22308
 	cmp	r0, #16
22024
-	bne	.L3629
22025
-	add	r0, r1, #256
22026
-	mov	r1, r2
22027
-	mov	r2, r8
22309
+	bne	.L3509
22310
+	mov	r2, r9
22311
+	ldr	r1, [sp, #44]
22312
+	add	r0, r5, #256
22028
22313
 	bl	FtlVendorPartRead
22029
-	b	.L3628
22030
-.L3629:
22031
-	ldr	r2, .L3672+4
22032
-	ldr	r3, [r2, #2428]
22314
+	mov	r8, r0
22315
+.L3507:
22316
+	mov	r0, r8
22317
+	add	sp, sp, #84
22318
+	@ sp needed
22319
+	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
22320
+.L3509:
22321
+	ldr	r2, .L3548+4
22322
+	ldr	r3, [r2, #2432]
22033
22323
 	cmp	r1, r3
22034
-	bcs	.L3653
22035
-	ldr	r1, [sp, #36]
22324
+	bcs	.L3532
22325
+	ldr	r1, [sp, #44]
22036
22326
 	cmp	r1, r3
22037
-	bhi	.L3653
22327
+	bhi	.L3532
22038
22328
 	adds	r1, r5, r1
22039
-	str	r1, [sp, #40]
22040
-	cmp	r1, r3
22041
-	bhi	.L3653
22042
-	ldrh	r4, [r2, #2394]
22329
+	cmp	r3, r1
22330
+	str	r1, [sp, #48]
22331
+	bcc	.L3532
22332
+	ldrh	r4, [r2, #2396]
22043
22333
 	mov	r0, r5
22044
22334
 	mov	r1, r4
22045
22335
 	bl	__aeabi_uidiv
22336
+	ldr	r3, [sp, #48]
22046
22337
 	mov	r1, r4
22047
-	ldr	r3, [sp, #40]
22048
-	str	r0, [sp, #28]
22338
+	str	r0, [sp, #36]
22049
22339
 	subs	r0, r3, #1
22050
22340
 	bl	__aeabi_uidiv
22051
-	ldr	r3, [sp, #28]
22052
-	ldr	r1, [sp, #36]
22341
+	ldr	r3, [sp, #36]
22342
+	ldr	r1, [sp, #44]
22343
+	str	r0, [sp, #40]
22053
22344
 	rsb	r3, r3, #1
22054
-	str	r0, [sp, #32]
22055
22345
 	add	r3, r3, r0
22056
-	str	r3, [sp, #24]
22057
-	ldr	r3, .L3672+8
22058
-	ldr	r0, [sp, #28]
22346
+	str	r3, [sp, #32]
22347
+	ldr	r3, .L3548+8
22059
22348
 	ldr	r2, [r3, #504]
22060
22349
 	add	r2, r2, r1
22061
-	ldr	r1, [sp, #24]
22350
+	ldr	r1, [sp, #32]
22062
22351
 	str	r2, [r3, #504]
22063
22352
 	ldr	r2, [r3, #476]
22064
22353
 	add	r2, r2, r1
22065
-	ldr	r1, [sp, #32]
22354
+	mov	r1, r0
22355
+	ldr	r0, [sp, #36]
22066
22356
 	str	r2, [r3, #476]
22067
22357
 	bl	FtlCacheMetchLpa
22068
-	cbz	r0, .L3630
22358
+	cbz	r0, .L3510
22069
22359
 	bl	FtlCacheWriteBack
22070
-.L3630:
22071
-	mov	r10, #0
22072
-	ldr	r6, [sp, #28]
22073
-	ldr	r4, .L3672+8
22074
-	ldr	r9, .L3672+4
22075
-	mov	r7, r10
22076
-	str	r10, [sp, #48]
22077
-	str	r10, [sp, #52]
22078
-.L3631:
22079
-	ldr	r3, [sp, #24]
22360
+.L3510:
22361
+	ldr	r6, [sp, #36]
22362
+	movs	r3, #0
22363
+	ldr	r4, .L3548+8
22364
+	mov	r7, r3
22365
+	mov	r8, r3
22366
+	str	r3, [sp, #28]
22367
+	str	r3, [sp, #52]
22368
+.L3511:
22369
+	ldr	r3, [sp, #32]
22370
+	cbnz	r3, .L3528
22371
+	ldr	r3, .L3548+8
22372
+	ldrh	r3, [r3, #1182]
22080
22373
 	cmp	r3, #0
22081
-	beq	.L3671
22374
+	beq	.L3507
22375
+	movs	r1, #1
22376
+	ldr	r0, [sp, #32]
22377
+	bl	ftl_do_gc
22378
+	b	.L3507
22379
+.L3528:
22380
+	movs	r2, #0
22082
22381
 	add	r1, sp, #76
22083
22382
 	mov	r0, r6
22084
-	movs	r2, #0
22085
22383
 	bl	log2phys
22086
22384
 	ldr	r3, [sp, #76]
22087
-	adds	r1, r3, #1
22088
-	bne	.L3668
22089
-	mov	fp, #0
22090
-.L3632:
22091
-	ldrh	r0, [r9, #2394]
22092
-	cmp	fp, r0
22093
-	bcs	.L3636
22094
-	mla	r0, r0, r6, fp
22095
-	cmp	r0, r5
22096
-	bcc	.L3634
22097
-	ldr	r3, [sp, #40]
22098
-	cmp	r0, r3
22099
-	bcs	.L3634
22100
-	subs	r0, r0, r5
22101
-	movs	r1, #0
22102
-	mov	r2, #512
22103
-	add	r0, r8, r0, lsl #9
22104
-	bl	ftl_memset
22105
-.L3634:
22106
-	add	fp, fp, #1
22107
-	b	.L3632
22108
-.L3668:
22109
-	ldr	r2, [r4, #3304]
22110
-	mov	fp, #36
22111
-	mla	fp, fp, r7, r2
22112
-	str	r3, [fp, #4]
22113
-	ldr	r3, [sp, #28]
22114
-	cmp	r6, r3
22115
-	bne	.L3637
22116
-	ldrh	ip, [r9, #2394]
22117
-	mov	r0, r5
22118
-	ldr	r3, [r4, #3332]
22119
-	mov	r1, ip
22120
-	str	ip, [sp, #44]
22121
-	str	r3, [fp, #8]
22122
-	bl	__aeabi_uidivmod
22123
-	ldr	ip, [sp, #44]
22124
-	ldr	r2, [sp, #36]
22125
-	rsb	r3, r1, ip
22126
-	str	r1, [sp, #56]
22127
-	cmp	r3, r2
22128
-	it	cs
22129
-	movcs	r3, r2
22130
-	cmp	r3, ip
22131
-	str	r3, [sp, #48]
22132
-	bne	.L3638
22133
-	str	r8, [fp, #8]
22134
-	b	.L3638
22135
-.L3637:
22385
+	adds	r2, r3, #1
22386
+	bne	.L3512
22387
+	mov	r10, #0
22388
+.L3513:
22389
+	ldr	r3, .L3548+4
22390
+	ldrh	r0, [r3, #2396]
22391
+	cmp	r10, r0
22392
+	bcc	.L3515
22393
+.L3516:
22136
22394
 	ldr	r3, [sp, #32]
22137
-	cmp	r6, r3
22138
-	bne	.L3639
22139
-	ldr	r3, [r4, #3336]
22140
-	ldrh	r2, [r9, #2394]
22141
-	ldr	r1, [sp, #40]
22142
-	str	r3, [fp, #8]
22143
-	mul	r3, r2, r6
22144
-	rsb	r10, r3, r1
22145
-	cmp	r10, r2
22146
-	bne	.L3638
22147
-	b	.L3669
22148
-.L3639:
22149
-	ldrh	r3, [r9, #2394]
22150
-	muls	r3, r6, r3
22151
-.L3669:
22152
-	subs	r3, r3, r5
22153
-	add	r3, r8, r3, lsl #9
22154
-	str	r3, [fp, #8]
22155
-.L3638:
22156
-	ldrh	r3, [r9, #2400]
22157
-	ldr	r2, [r4, #3344]
22158
-	str	r6, [fp, #16]
22159
-	muls	r3, r7, r3
22160
-	adds	r7, r7, #1
22161
-	bic	r3, r3, #3
22162
-	add	r3, r3, r2
22163
-	str	r3, [fp, #12]
22164
-.L3636:
22165
-	ldr	r3, [sp, #24]
22166
22395
 	adds	r6, r6, #1
22167
22396
 	subs	r3, r3, #1
22168
-	str	r3, [sp, #24]
22169
-	beq	.L3640
22170
-	ldrh	r3, [r9, #2320]
22397
+	str	r3, [sp, #32]
22398
+	beq	.L3520
22399
+	ldr	r3, .L3548+4
22400
+	ldrh	r3, [r3, #2324]
22171
22401
 	cmp	r7, r3, lsl #3
22172
-	bne	.L3631
22173
-.L3640:
22402
+	bne	.L3511
22403
+.L3520:
22174
22404
 	cmp	r7, #0
22175
-	beq	.L3631
22176
-	ldr	r0, [r4, #3304]
22177
-	mov	r1, r7
22405
+	beq	.L3511
22178
22406
 	movs	r2, #0
22407
+	mov	r1, r7
22408
+	ldr	r0, [r4, #3304]
22409
+	mov	fp, #0
22179
22410
 	bl	FlashReadPages
22411
+	ldr	r3, [sp, #28]
22412
+	lsls	r3, r3, #9
22413
+	str	r3, [sp, #68]
22180
22414
 	ldr	r3, [sp, #56]
22181
22415
 	lsls	r3, r3, #9
22182
22416
 	str	r3, [sp, #60]
22183
-	ldr	r3, [sp, #48]
22417
+	ldr	r3, [sp, #52]
22184
22418
 	lsls	r3, r3, #9
22185
22419
 	str	r3, [sp, #64]
22186
-	lsl	r3, r10, #9
22187
-	str	r3, [sp, #68]
22188
-	movs	r3, #0
22189
-	str	r3, [sp, #44]
22190
-.L3647:
22191
-	ldr	r3, [sp, #44]
22192
-	mov	ip, #36
22193
-	ldr	r1, [sp, #28]
22194
-	mul	fp, ip, r3
22420
+.L3527:
22421
+	mov	r10, #36
22195
22422
 	ldr	r3, [r4, #3304]
22196
-	add	r3, r3, fp
22423
+	mul	r10, r10, fp
22424
+	ldr	r1, [sp, #36]
22425
+	add	r3, r3, r10
22197
22426
 	ldr	r2, [r3, #16]
22198
-	cmp	r2, r1
22199
-	bne	.L3642
22427
+	cmp	r1, r2
22428
+	bne	.L3522
22200
22429
 	ldr	r1, [r3, #8]
22201
22430
 	ldr	r3, [r4, #3332]
22202
22431
 	cmp	r1, r3
22203
-	bne	.L3643
22432
+	bne	.L3523
22204
22433
 	ldr	r3, [sp, #60]
22205
-	mov	r0, r8
22434
+	mov	r0, r9
22206
22435
 	ldr	r2, [sp, #64]
22207
22436
 	add	r1, r1, r3
22208
-	b	.L3670
22209
-.L3642:
22210
-	ldr	r1, [sp, #32]
22211
-	cmp	r2, r1
22212
-	bne	.L3643
22213
-	ldr	r1, [r3, #8]
22214
-	ldr	r3, [r4, #3336]
22215
-	cmp	r1, r3
22216
-	bne	.L3643
22217
-	ldrh	r0, [r9, #2394]
22218
-	ldr	r3, [sp, #32]
22219
-	ldr	r2, [sp, #68]
22220
-	muls	r0, r3, r0
22221
-	subs	r0, r0, r5
22222
-	add	r0, r8, r0, lsl #9
22223
-.L3670:
22437
+.L3547:
22224
22438
 	bl	ftl_memcpy
22225
-.L3643:
22226
-	ldr	r2, [r4, #3304]
22227
-	add	r3, r2, fp
22228
-	ldr	r1, [r2, fp]
22229
-	adds	r2, r1, #1
22230
-	itttt	eq
22231
-	streq	r1, [sp, #52]
22232
-	ldreq	r2, [r4, #680]
22233
-	addeq	r2, r2, #1
22234
-	streq	r2, [r4, #680]
22235
-	ldr	r2, [r3, #12]
22236
-	ldr	r1, [r3, #16]
22237
-	ldr	r2, [r2, #8]
22238
-	cmp	r1, r2
22239
-	beq	.L3645
22240
-	ldr	r2, [r4, #680]
22241
-	ldr	r0, .L3672+12
22242
-	adds	r2, r2, #1
22243
-	str	r2, [r4, #680]
22244
-	ldr	lr, [r3, #12]
22245
-	ldr	r2, [r3, #8]
22246
-	ldr	r1, [lr, #4]
22247
-	str	r1, [sp]
22248
-	ldr	r1, [lr, #8]
22249
-	str	r1, [sp, #4]
22250
-	ldr	r1, [lr, #12]
22251
-	str	r1, [sp, #8]
22252
-	ldr	r1, [r2]
22253
-	str	r1, [sp, #12]
22254
-	ldr	r2, [r2, #4]
22255
-	str	r2, [sp, #16]
22256
-	ldr	r1, [r3, #16]
22257
-	ldr	r2, [r3, #4]
22258
-	ldr	r3, [lr]
22259
-	bl	printk
22260
-.L3645:
22439
+.L3523:
22261
22440
 	ldr	r3, [r4, #3304]
22262
-	add	r2, r3, fp
22263
-	ldr	r3, [r3, fp]
22441
+	ldr	r2, [r3, r10]
22442
+	add	r1, r3, r10
22443
+	adds	r3, r2, #1
22444
+	itttt	eq
22445
+	ldreq	r3, [r4, #676]
22446
+	moveq	r8, r2
22447
+	addeq	r3, r3, #1
22448
+	streq	r3, [r4, #676]
22449
+	ldr	r3, [r1, #12]
22450
+	ldr	r2, [r1, #16]
22451
+	ldr	r3, [r3, #8]
22452
+	cmp	r2, r3
22453
+	beq	.L3525
22454
+	ldr	r3, [r4, #676]
22455
+	adds	r3, r3, #1
22456
+	str	r3, [r4, #676]
22457
+	ldr	r2, [r1, #8]
22458
+	ldr	r3, [r1, #12]
22459
+	ldr	r0, [r2, #4]
22460
+	str	r0, [sp, #16]
22461
+	ldr	r2, [r2]
22462
+	ldr	r0, .L3548+12
22463
+	str	r2, [sp, #12]
22464
+	ldr	r2, [r3, #12]
22465
+	str	r2, [sp, #8]
22466
+	ldr	r2, [r3, #8]
22467
+	str	r2, [sp, #4]
22468
+	ldr	r2, [r3, #4]
22469
+	str	r2, [sp]
22470
+	ldr	r2, [r1, #4]
22471
+	ldr	r3, [r3]
22472
+	ldr	r1, [r1, #16]
22473
+	bl	printk
22474
+.L3525:
22475
+	ldr	r3, [r4, #3304]
22476
+	add	r2, r3, r10
22477
+	ldr	r3, [r3, r10]
22264
22478
 	cmp	r3, #256
22265
-	bne	.L3646
22479
+	bne	.L3526
22266
22480
 	ldr	r0, [r2, #4]
22267
22481
 	ubfx	r0, r0, #10, #16
22268
22482
 	bl	P2V_block_in_plane
22269
22483
 	bl	FtlGcRefreshBlock
22270
-.L3646:
22271
-	ldr	r3, [sp, #44]
22272
-	adds	r3, r3, #1
22273
-	str	r3, [sp, #44]
22274
-	cmp	r3, r7
22275
-	bne	.L3647
22484
+.L3526:
22485
+	add	fp, fp, #1
22486
+	cmp	r7, fp
22487
+	bne	.L3527
22276
22488
 	movs	r7, #0
22277
-	b	.L3631
22278
-.L3671:
22279
-	ldr	r3, .L3672+8
22280
-	ldrh	r3, [r3, #1182]
22281
-	cbz	r3, .L3649
22282
-	ldr	r0, [sp, #24]
22283
-	movs	r1, #1
22284
-	bl	ftl_do_gc
22285
-.L3649:
22286
-	ldr	r0, [sp, #52]
22287
-	b	.L3628
22288
-.L3653:
22289
-	mov	r0, #-1
22290
-.L3628:
22291
-	add	sp, sp, #84
22292
-	@ sp needed
22293
-	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
22294
-.L3673:
22489
+	b	.L3511
22490
+.L3515:
22491
+	mla	r0, r0, r6, r10
22492
+	cmp	r5, r0
22493
+	bhi	.L3514
22494
+	ldr	r3, [sp, #48]
22495
+	cmp	r3, r0
22496
+	bls	.L3514
22497
+	subs	r0, r0, r5
22498
+	mov	r2, #512
22499
+	movs	r1, #0
22500
+	add	r0, r9, r0, lsl #9
22501
+	bl	ftl_memset
22502
+.L3514:
22503
+	add	r10, r10, #1
22504
+	b	.L3513
22505
+.L3512:
22506
+	ldr	r2, [r4, #3304]
22507
+	mov	r10, #36
22508
+	mla	r10, r10, r7, r2
22509
+	str	r3, [r10, #4]
22510
+	ldr	r3, [sp, #36]
22511
+	cmp	r6, r3
22512
+	bne	.L3517
22513
+	ldr	r3, [r4, #3332]
22514
+	mov	r0, r5
22515
+	str	r3, [r10, #8]
22516
+	ldr	r3, .L3548+4
22517
+	ldrh	fp, [r3, #2396]
22518
+	mov	r1, fp
22519
+	bl	__aeabi_uidivmod
22520
+	ldr	r2, [sp, #44]
22521
+	sub	r3, fp, r1
22522
+	str	r1, [sp, #56]
22523
+	cmp	r3, r2
22524
+	it	cs
22525
+	movcs	r3, r2
22526
+	cmp	r3, fp
22527
+	str	r3, [sp, #52]
22528
+	bne	.L3518
22529
+	str	r9, [r10, #8]
22530
+.L3518:
22531
+	ldr	r3, .L3548+4
22532
+	ldr	r2, [r4, #3344]
22533
+	str	r6, [r10, #16]
22534
+	ldrh	r3, [r3, #2402]
22535
+	muls	r3, r7, r3
22536
+	adds	r7, r7, #1
22537
+	bic	r3, r3, #3
22538
+	add	r3, r3, r2
22539
+	str	r3, [r10, #12]
22540
+	b	.L3516
22541
+.L3517:
22542
+	ldr	r3, [sp, #40]
22543
+	cmp	r6, r3
22544
+	bne	.L3519
22545
+	ldr	r3, [r4, #3336]
22546
+	ldr	r1, [sp, #48]
22547
+	str	r3, [r10, #8]
22548
+	ldr	r3, .L3548+4
22549
+	ldrh	r2, [r3, #2396]
22550
+	mul	r3, r2, r6
22551
+	subs	r1, r1, r3
22552
+	cmp	r2, r1
22553
+	str	r1, [sp, #28]
22554
+	bne	.L3518
22555
+.L3546:
22556
+	subs	r3, r3, r5
22557
+	add	r3, r9, r3, lsl #9
22558
+	str	r3, [r10, #8]
22559
+	b	.L3518
22560
+.L3519:
22561
+	ldr	r3, .L3548+4
22562
+	ldrh	r3, [r3, #2396]
22563
+	muls	r3, r6, r3
22564
+	b	.L3546
22565
+.L3522:
22566
+	ldr	r1, [sp, #40]
22567
+	cmp	r1, r2
22568
+	bne	.L3523
22569
+	ldr	r1, [r3, #8]
22570
+	ldr	r3, [r4, #3336]
22571
+	cmp	r1, r3
22572
+	bne	.L3523
22573
+	ldr	r3, .L3548+4
22574
+	ldr	r2, [sp, #68]
22575
+	ldrh	r0, [r3, #2396]
22576
+	ldr	r3, [sp, #40]
22577
+	muls	r0, r3, r0
22578
+	subs	r0, r0, r5
22579
+	add	r0, r9, r0, lsl #9
22580
+	b	.L3547
22581
+.L3532:
22582
+	mov	r8, #-1
22583
+	b	.L3507
22584
+.L3549:
22295
22585
 	.align	2
22296
-.L3672:
22586
+.L3548:
22297
22587
 	.word	.LANCHOR1
22298
22588
 	.word	.LANCHOR0
22299
22589
 	.word	.LANCHOR2
..
..
@@ -22302,29 +22592,29 @@
22302
22592
 	.size	ftl_read, .-ftl_read
22303
22593
 	.align	1
22304
22594
 	.global	ftl_vendor_read
22595
+	.syntax unified
22305
22596
 	.thumb
22306
22597
 	.thumb_func
22598
+	.fpu softvfp
22307
22599
 	.type	ftl_vendor_read, %function
22308
22600
 ftl_vendor_read:
22309
22601
 	.fnstart
22310
22602
 	@ args = 0, pretend = 0, frame = 0
22311
22603
 	@ frame_needed = 0, uses_anonymous_args = 0
22312
-	push	{r4, r5, lr}
22313
-	.save {r4, r5, lr}
22314
-	mov	r5, r0
22315
-	mov	r4, r1
22604
+	@ link register save eliminated.
22316
22605
 	mov	r3, r2
22317
-	mov	r1, r5
22318
-	mov	r2, r4
22606
+	mov	r2, r1
22607
+	mov	r1, r0
22319
22608
 	movs	r0, #16
22320
-	pop	{r4, r5, lr}
22321
22609
 	b	ftl_read
22322
22610
 	.fnend
22323
22611
 	.size	ftl_vendor_read, .-ftl_vendor_read
22324
22612
 	.align	1
22325
22613
 	.global	FlashBootVendorRead
22614
+	.syntax unified
22326
22615
 	.thumb
22327
22616
 	.thumb_func
22617
+	.fpu softvfp
22328
22618
 	.type	FlashBootVendorRead, %function
22329
22619
 FlashBootVendorRead:
22330
22620
 	.fnstart
..
..
@@ -22332,56 +22622,57 @@
22332
22622
 	@ frame_needed = 0, uses_anonymous_args = 0
22333
22623
 	push	{r4, r5, r6, lr}
22334
22624
 	.save {r4, r5, r6, lr}
22335
-	mov	r6, r0
22625
+	mov	r4, r0
22336
22626
 	mov	r5, r1
22337
-	mov	r4, r2
22627
+	mov	r6, r2
22338
22628
 	bl	rknand_device_lock
22339
-	ldr	r3, .L3678
22340
-	ldr	r3, [r3, #504]
22629
+	ldr	r3, .L3554
22630
+	ldr	r3, [r3, #500]
22341
22631
 	cmp	r3, #1
22342
-	bne	.L3677
22343
-	mov	r2, r4
22344
-	mov	r0, r6
22632
+	bne	.L3553
22633
+	mov	r0, r4
22634
+	mov	r2, r6
22345
22635
 	mov	r1, r5
22346
22636
 	bl	ftl_vendor_read
22347
22637
 	mov	r4, r0
22348
-	b	.L3676
22349
-.L3677:
22350
-	mov	r4, #-1
22351
-.L3676:
22638
+.L3552:
22352
22639
 	bl	rknand_device_unlock
22353
22640
 	mov	r0, r4
22354
22641
 	pop	{r4, r5, r6, pc}
22355
-.L3679:
22642
+.L3553:
22643
+	mov	r4, #-1
22644
+	b	.L3552
22645
+.L3555:
22356
22646
 	.align	2
22357
-.L3678:
22647
+.L3554:
22358
22648
 	.word	.LANCHOR1
22359
22649
 	.fnend
22360
22650
 	.size	FlashBootVendorRead, .-FlashBootVendorRead
22361
22651
 	.align	1
22362
22652
 	.global	ftl_sys_read
22653
+	.syntax unified
22363
22654
 	.thumb
22364
22655
 	.thumb_func
22656
+	.fpu softvfp
22365
22657
 	.type	ftl_sys_read, %function
22366
22658
 ftl_sys_read:
22367
22659
 	.fnstart
22368
22660
 	@ args = 0, pretend = 0, frame = 0
22369
22661
 	@ frame_needed = 0, uses_anonymous_args = 0
22370
-	push	{r4, lr}
22371
-	.save {r4, lr}
22372
-	mov	r4, r1
22662
+	@ link register save eliminated.
22373
22663
 	mov	r3, r2
22664
+	mov	r2, r1
22374
22665
 	add	r1, r0, #256
22375
-	mov	r2, r4
22376
22666
 	movs	r0, #16
22377
-	pop	{r4, lr}
22378
22667
 	b	ftl_read
22379
22668
 	.fnend
22380
22669
 	.size	ftl_sys_read, .-ftl_sys_read
22381
22670
 	.align	1
22382
22671
 	.global	StorageSysDataLoad
22672
+	.syntax unified
22383
22673
 	.thumb
22384
22674
 	.thumb_func
22675
+	.fpu softvfp
22385
22676
 	.type	StorageSysDataLoad, %function
22386
22677
 StorageSysDataLoad:
22387
22678
 	.fnstart
..
..
@@ -22389,11 +22680,11 @@
22389
22680
 	@ frame_needed = 0, uses_anonymous_args = 0
22390
22681
 	push	{r3, r4, r5, lr}
22391
22682
 	.save {r3, r4, r5, lr}
22392
-	mov	r2, #512
22393
-	mov	r5, r0
22394
22683
 	mov	r4, r1
22395
-	mov	r0, r1
22684
+	mov	r5, r0
22685
+	mov	r2, #512
22396
22686
 	movs	r1, #0
22687
+	mov	r0, r4
22397
22688
 	bl	ftl_memset
22398
22689
 	bl	rknand_device_lock
22399
22690
 	mov	r2, r4
..
..
@@ -22408,8 +22699,10 @@
22408
22699
 	.size	StorageSysDataLoad, .-StorageSysDataLoad
22409
22700
 	.align	1
22410
22701
 	.global	FtlRead
22702
+	.syntax unified
22411
22703
 	.thumb
22412
22704
 	.thumb_func
22705
+	.fpu softvfp
22413
22706
 	.type	FtlRead, %function
22414
22707
 FtlRead:
22415
22708
 	.fnstart
..
..
@@ -22421,279 +22714,287 @@
22421
22714
 	.size	FtlRead, .-FtlRead
22422
22715
 	.align	1
22423
22716
 	.global	FtlInit
22717
+	.syntax unified
22424
22718
 	.thumb
22425
22719
 	.thumb_func
22720
+	.fpu softvfp
22426
22721
 	.type	FtlInit, %function
22427
22722
 FtlInit:
22428
22723
 	.fnstart
22429
22724
 	@ args = 0, pretend = 0, frame = 0
22430
22725
 	@ frame_needed = 0, uses_anonymous_args = 0
22431
-	push	{r4, r5, r6, r7, r8, lr}
22432
-	.save {r4, r5, r6, r7, r8, lr}
22726
+	push	{r3, r4, r5, r6, r7, lr}
22727
+	.save {r3, r4, r5, r6, r7, lr}
22433
22728
 	mov	r3, #-1
22434
-	ldr	r2, .L3699
22435
-	ldr	r7, .L3699+4
22436
-	ldr	r4, .L3699+8
22437
-	ldr	r6, .L3699+12
22438
-	ldr	r1, .L3699+16
22439
-	ldr	r0, .L3699+20
22440
-	str	r3, [r7, #504]
22729
+	ldr	r7, .L3575
22730
+	ldr	r2, .L3575+4
22731
+	ldr	r6, .L3575+8
22732
+	ldr	r4, .L3575+12
22733
+	ldr	r1, .L3575+16
22734
+	str	r3, [r7, #500]
22441
22735
 	movs	r3, #0
22442
-	str	r3, [r2, #992]
22443
-	str	r3, [r4, #224]
22736
+	ldr	r0, .L3575+20
22737
+	str	r3, [r2, #1496]
22738
+	str	r3, [r4, #228]
22444
22739
 	bl	printk
22445
-	add	r0, r6, #116
22740
+	add	r0, r6, #124
22446
22741
 	bl	FtlConstantsInit
22447
22742
 	bl	FtlMemInit
22448
22743
 	bl	FtlVariablesInit
22449
-	ldrh	r0, [r6, #2324]
22744
+	ldrh	r0, [r6, #2328]
22450
22745
 	bl	FtlFreeSysBlkQueueInit
22451
22746
 	bl	FtlLoadBbt
22452
-	cbz	r0, .L3684
22453
-	ldr	r0, .L3699+24
22454
-	b	.L3698
22455
-.L3684:
22747
+	cbz	r0, .L3560
22748
+	ldr	r1, .L3575+24
22749
+	ldr	r0, .L3575+28
22750
+.L3574:
22751
+	bl	printk
22752
+.L3561:
22753
+	movs	r0, #0
22754
+	pop	{r3, r4, r5, r6, r7, pc}
22755
+.L3560:
22456
22756
 	bl	FtlSysBlkInit
22457
22757
 	mov	r5, r0
22458
-	cbz	r0, .L3686
22459
-	ldr	r0, .L3699+28
22460
-.L3698:
22461
-	ldr	r1, .L3699+32
22462
-	bl	printk
22463
-	b	.L3685
22464
-.L3686:
22758
+	cbz	r0, .L3562
22759
+	ldr	r1, .L3575+24
22760
+	ldr	r0, .L3575+32
22761
+	b	.L3574
22762
+.L3562:
22465
22763
 	movs	r1, #1
22466
-	str	r1, [r7, #504]
22764
+	str	r1, [r7, #500]
22467
22765
 	bl	ftl_do_gc
22468
-	ldrh	r7, [r4, #312]
22766
+	ldrh	r7, [r4, #316]
22469
22767
 	cmp	r7, #15
22470
-	bhi	.L3687
22471
-	mov	r8, r4
22768
+	bhi	.L3563
22472
22769
 	movw	r6, #65535
22473
-.L3690:
22770
+.L3566:
22474
22771
 	ldrh	r3, [r4, #556]
22475
22772
 	cmp	r3, r6
22476
-	bne	.L3688
22477
-	ldrh	r3, [r8, #1174]
22773
+	bne	.L3564
22774
+	ldrh	r3, [r4, #1174]
22478
22775
 	cmp	r3, r6
22479
-	bne	.L3688
22776
+	bne	.L3564
22480
22777
 	and	r0, r5, #63
22481
22778
 	bl	List_get_gc_head_node
22482
22779
 	uxth	r0, r0
22483
22780
 	bl	FtlGcRefreshBlock
22484
-.L3688:
22485
-	movs	r0, #1
22486
-	mov	r1, r0
22487
-	bl	ftl_do_gc
22488
-	movs	r0, #0
22781
+.L3564:
22489
22782
 	movs	r1, #1
22783
+	mov	r0, r1
22490
22784
 	bl	ftl_do_gc
22491
-	ldrh	r2, [r4, #312]
22785
+	movs	r1, #1
22786
+	movs	r0, #0
22787
+	bl	ftl_do_gc
22788
+	ldrh	r2, [r4, #316]
22492
22789
 	adds	r3, r7, #2
22493
22790
 	cmp	r2, r3
22494
-	bhi	.L3685
22791
+	bhi	.L3561
22495
22792
 	adds	r5, r5, #1
22496
22793
 	cmp	r5, #4096
22497
-	bne	.L3690
22498
-	b	.L3685
22499
-.L3687:
22500
-	ldrb	r3, [r6, #144]	@ zero_extendqisi2
22501
-	cbz	r3, .L3685
22794
+	bne	.L3566
22795
+	b	.L3561
22796
+.L3563:
22797
+	ldrb	r3, [r6, #152]	@ zero_extendqisi2
22798
+	cmp	r3, #0
22799
+	beq	.L3561
22502
22800
 	movs	r4, #128
22503
-.L3692:
22504
-	movs	r0, #1
22505
-	mov	r1, r0
22801
+.L3568:
22802
+	movs	r1, #1
22803
+	mov	r0, r1
22506
22804
 	bl	ftl_do_gc
22507
22805
 	subs	r4, r4, #1
22508
-	bne	.L3692
22509
-.L3685:
22510
-	movs	r0, #0
22511
-	pop	{r4, r5, r6, r7, r8, pc}
22512
-.L3700:
22806
+	bne	.L3568
22807
+	b	.L3561
22808
+.L3576:
22513
22809
 	.align	2
22514
-.L3699:
22515
-	.word	.LANCHOR5
22810
+.L3575:
22516
22811
 	.word	.LANCHOR1
22517
-	.word	.LANCHOR2
22812
+	.word	.LANCHOR4
22518
22813
 	.word	.LANCHOR0
22519
-	.word	.LC77
22814
+	.word	.LANCHOR2
22520
22815
 	.word	.LC76
22816
+	.word	.LC77
22817
+	.word	.LANCHOR3+224
22521
22818
 	.word	.LC161
22522
22819
 	.word	.LC162
22523
-	.word	.LANCHOR3+240
22524
22820
 	.fnend
22525
22821
 	.size	FtlInit, .-FtlInit
22526
22822
 	.align	1
22527
22823
 	.global	rk_ftl_init
22824
+	.syntax unified
22528
22825
 	.thumb
22529
22826
 	.thumb_func
22827
+	.fpu softvfp
22530
22828
 	.type	rk_ftl_init, %function
22531
22829
 rk_ftl_init:
22532
22830
 	.fnstart
22533
22831
 	@ args = 0, pretend = 0, frame = 0
22534
22832
 	@ frame_needed = 0, uses_anonymous_args = 0
22535
-	push	{r4, r5, r6, lr}
22536
-	.save {r4, r5, r6, lr}
22833
+	push	{r3, r4, r5, lr}
22834
+	.save {r3, r4, r5, lr}
22537
22835
 	mov	r0, #2048
22538
-	bl	ftl_malloc
22539
-	ldr	r5, .L3705
22540
-	ldr	r4, .L3705+4
22541
-	movs	r6, #0
22542
-	add	r1, r5, #1000
22543
-	str	r6, [r5, #1000]
22544
-	str	r6, [r4, #1180]
22545
-	str	r0, [r5, #996]
22836
+	ldr	r4, .L3581
22837
+	movs	r5, #0
22838
+	bl	ftl_dma32_malloc
22839
+	add	r1, r4, #1504
22840
+	str	r0, [r4, #1500]
22546
22841
 	addw	r0, r4, #1180
22842
+	str	r5, [r4, #1184]
22843
+	str	r5, [r4, #1180]
22844
+	str	r5, [r4, #1504]
22547
22845
 	bl	rknand_get_reg_addr
22548
22846
 	ldr	r3, [r4, #1180]
22549
-	cbz	r3, .L3704
22847
+	cbz	r3, .L3580
22550
22848
 	bl	rk_nandc_irq_init
22551
-	mov	r1, r6
22552
-	mov	r2, r6
22553
22849
 	mov	r3, #2048
22554
-	ldr	r0, [r5, #996]
22850
+	mov	r2, r5
22851
+	mov	r1, r5
22852
+	ldr	r0, [r4, #1500]
22555
22853
 	bl	FlashSramLoadStore
22556
22854
 	bl	rknand_flash_cs_init
22557
22855
 	ldr	r0, [r4, #1180]
22558
22856
 	bl	FlashInit
22559
22857
 	mov	r4, r0
22560
-	cbnz	r0, .L3703
22858
+	cbnz	r0, .L3579
22561
22859
 	bl	FtlInit
22562
-.L3703:
22860
+.L3579:
22563
22861
 	mov	r1, r4
22564
-	ldr	r0, .L3705+8
22862
+	ldr	r0, .L3581+4
22565
22863
 	bl	printk
22864
+.L3577:
22566
22865
 	mov	r0, r4
22567
-	pop	{r4, r5, r6, pc}
22568
-.L3704:
22569
-	mov	r0, #-1
22570
-	pop	{r4, r5, r6, pc}
22571
-.L3706:
22866
+	pop	{r3, r4, r5, pc}
22867
+.L3580:
22868
+	mov	r4, #-1
22869
+	b	.L3577
22870
+.L3582:
22572
22871
 	.align	2
22573
-.L3705:
22574
-	.word	.LANCHOR5
22872
+.L3581:
22575
22873
 	.word	.LANCHOR4
22576
22874
 	.word	.LC163
22577
22875
 	.fnend
22578
22876
 	.size	rk_ftl_init, .-rk_ftl_init
22579
22877
 	.align	1
22580
22878
 	.global	ftl_fix_nand_power_lost_error
22879
+	.syntax unified
22581
22880
 	.thumb
22582
22881
 	.thumb_func
22882
+	.fpu softvfp
22583
22883
 	.type	ftl_fix_nand_power_lost_error, %function
22584
22884
 ftl_fix_nand_power_lost_error:
22585
22885
 	.fnstart
22586
22886
 	@ args = 0, pretend = 0, frame = 48
22587
22887
 	@ frame_needed = 0, uses_anonymous_args = 0
22588
-	ldr	r3, .L3722
22888
+	ldr	r3, .L3597
22589
22889
 	push	{r4, r5, r6, r7, r8, r9, r10, lr}
22590
22890
 	.save {r4, r5, r6, r7, r8, r9, r10, lr}
22591
22891
 	.pad #48
22592
22892
 	sub	sp, sp, #48
22593
-	ldrb	r2, [r3, #144]	@ zero_extendqisi2
22594
22893
 	mov	r8, r3
22894
+	ldrb	r2, [r3, #152]	@ zero_extendqisi2
22595
22895
 	cmp	r2, #0
22596
-	beq	.L3707
22597
-	ldr	r4, .L3722+4
22598
-	movw	r7, #4097
22599
-	ldr	r6, .L3722+8
22600
-	ldr	r0, .L3722+12
22601
-	ldr	r3, [r4, #296]
22602
-	ldrh	r5, [r6, #840]
22603
-	mov	r1, r5
22604
-	ldrh	r2, [r3, r5, lsl #1]
22896
+	beq	.L3583
22897
+	ldr	r4, .L3597+4
22898
+	movw	r5, #4097
22899
+	ldr	r7, .L3597+8
22900
+	ldr	r0, .L3597+12
22901
+	ldr	r3, [r4, #300]
22902
+	ldrh	r6, [r7, #1342]
22903
+	ldrh	r2, [r3, r6, lsl #1]
22904
+	mov	r1, r6
22605
22905
 	bl	printk
22606
-	ldrh	r0, [r4, #316]
22906
+	ldrh	r0, [r4, #320]
22907
+	lsl	r9, r6, #1
22607
22908
 	bl	FtlGcRefreshOpenBlock
22608
-	ldrh	r0, [r4, #364]
22909
+	ldrh	r0, [r4, #368]
22609
22910
 	bl	FtlGcRefreshOpenBlock
22610
-	add	r0, r4, #316
22911
+	add	r0, r4, #320
22611
22912
 	bl	allocate_new_data_superblock
22612
-	add	r0, r4, #364
22913
+	add	r0, r4, #368
22613
22914
 	bl	allocate_new_data_superblock
22614
-	lsl	r9, r5, #1
22615
-.L3709:
22616
-	subs	r7, r7, #1
22617
-	beq	.L3713
22618
-	movs	r0, #1
22619
-	mov	r1, r0
22915
+.L3585:
22916
+	subs	r5, r5, #1
22917
+	beq	.L3589
22918
+	movs	r1, #1
22919
+	mov	r0, r1
22620
22920
 	bl	ftl_do_gc
22621
-	ldr	r3, [r4, #296]
22921
+	ldr	r3, [r4, #300]
22622
22922
 	ldrh	r3, [r3, r9]
22623
22923
 	cmp	r3, #0
22624
-	bne	.L3709
22625
-.L3713:
22626
-	ldr	r3, [r4, #296]
22627
-	mov	r1, r5
22628
-	ldr	r0, .L3722+12
22629
-	ldrh	r2, [r3, r5, lsl #1]
22924
+	bne	.L3585
22925
+.L3589:
22926
+	ldr	r3, [r4, #300]
22927
+	mov	r1, r6
22928
+	ldr	r0, .L3597+12
22929
+	ldrh	r2, [r3, r6, lsl #1]
22630
22930
 	bl	printk
22631
-	ldr	r3, [r4, #296]
22632
-	ldrh	r7, [r3, r5, lsl #1]
22633
-	cbnz	r7, .L3711
22931
+	ldr	r3, [r4, #300]
22932
+	ldrh	r5, [r3, r6, lsl #1]
22933
+	cbnz	r5, .L3587
22634
22934
 	add	r0, sp, #48
22635
-	mov	r10, #36
22636
22935
 	movw	r9, #65535
22637
-	strh	r5, [r0, #-48]!	@ movhi
22936
+	strh	r6, [r0, #-48]!	@ movhi
22937
+	mov	r10, #36
22638
22938
 	bl	make_superblock
22639
-	ldr	r3, .L3722+4
22640
-	ldrh	ip, [r8, #2320]
22641
-	ldr	r8, [r3, #228]
22642
-	mov	r3, r7
22643
-	mov	lr, r3
22939
+	ldrh	lr, [r8, #2324]
22644
22940
 	add	r0, sp, #14
22645
-.L3714:
22646
-	uxth	r2, r3
22647
-	cmp	r2, ip
22648
-	bcs	.L3721
22649
-	ldrh	r2, [r0, #2]!
22650
-	cmp	r2, r9
22651
-	beq	.L3715
22652
-	mla	r1, r10, r7, r8
22653
-	adds	r7, r7, #1
22654
-	lsls	r2, r2, #10
22655
-	uxth	r7, r7
22656
-	str	r2, [r1, #4]
22657
-	str	lr, [r1, #8]
22658
-	str	lr, [r1, #12]
22659
-.L3715:
22660
-	adds	r3, r3, #1
22661
-	b	.L3714
22662
-.L3721:
22663
-	ldr	r3, [r4, #296]
22664
-	mov	r1, r5
22665
-	ldr	r0, .L3722+16
22666
-	ldrh	r2, [r3, r5, lsl #1]
22941
+	ldr	r8, [r4, #232]
22942
+	mov	r2, r5
22943
+	mov	ip, r5
22944
+.L3590:
22945
+	uxth	r3, r2
22946
+	cmp	lr, r3
22947
+	bhi	.L3592
22948
+	ldr	r3, [r4, #300]
22949
+	mov	r1, r6
22950
+	ldr	r0, .L3597+16
22951
+	ldrh	r2, [r3, r6, lsl #1]
22667
22952
 	bl	printk
22953
+	mov	r2, r5
22668
22954
 	movs	r1, #0
22669
-	mov	r2, r7
22670
-	ldr	r0, [r4, #228]
22955
+	ldr	r0, [r4, #232]
22671
22956
 	bl	FlashEraseBlocks
22672
-	ldr	r0, [r4, #228]
22957
+	mov	r2, r5
22673
22958
 	movs	r1, #1
22674
-	mov	r2, r7
22959
+	ldr	r0, [r4, #232]
22675
22960
 	bl	FlashEraseBlocks
22676
-.L3711:
22961
+.L3587:
22677
22962
 	movw	r3, #65535
22678
-	strh	r3, [r6, #840]	@ movhi
22679
-.L3707:
22963
+	strh	r3, [r7, #1342]	@ movhi
22964
+.L3583:
22680
22965
 	add	sp, sp, #48
22681
22966
 	@ sp needed
22682
22967
 	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
22683
-.L3723:
22968
+.L3592:
22969
+	ldrh	r3, [r0, #2]!
22970
+	cmp	r3, r9
22971
+	beq	.L3591
22972
+	mla	r1, r10, r5, r8
22973
+	adds	r5, r5, #1
22974
+	lsls	r3, r3, #10
22975
+	uxth	r5, r5
22976
+	str	r3, [r1, #4]
22977
+	str	ip, [r1, #8]
22978
+	str	ip, [r1, #12]
22979
+.L3591:
22980
+	adds	r2, r2, #1
22981
+	b	.L3590
22982
+.L3598:
22684
22983
 	.align	2
22685
-.L3722:
22984
+.L3597:
22686
22985
 	.word	.LANCHOR0
22687
22986
 	.word	.LANCHOR2
22688
-	.word	.LANCHOR5
22987
+	.word	.LANCHOR4
22689
22988
 	.word	.LC164
22690
22989
 	.word	.LC165
22691
22990
 	.fnend
22692
22991
 	.size	ftl_fix_nand_power_lost_error, .-ftl_fix_nand_power_lost_error
22693
22992
 	.align	1
22694
22993
 	.global	rk_ftl_garbage_collect
22994
+	.syntax unified
22695
22995
 	.thumb
22696
22996
 	.thumb_func
22997
+	.fpu softvfp
22697
22998
 	.type	rk_ftl_garbage_collect, %function
22698
22999
 rk_ftl_garbage_collect:
22699
23000
 	.fnstart
..
..
@@ -22705,554 +23006,555 @@
22705
23006
 	.size	rk_ftl_garbage_collect, .-rk_ftl_garbage_collect
22706
23007
 	.align	1
22707
23008
 	.global	ftl_write
23009
+	.syntax unified
22708
23010
 	.thumb
22709
23011
 	.thumb_func
23012
+	.fpu softvfp
22710
23013
 	.type	ftl_write, %function
22711
23014
 ftl_write:
22712
23015
 	.fnstart
22713
-	@ args = 0, pretend = 0, frame = 88
23016
+	@ args = 0, pretend = 0, frame = 80
22714
23017
 	@ frame_needed = 0, uses_anonymous_args = 0
22715
23018
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
22716
23019
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
22717
-	.pad #92
22718
-	sub	sp, sp, #92
22719
-	ldr	r9, .L3800+16
22720
-	mov	r8, r1
22721
-	str	r3, [sp, #12]
22722
-	mov	fp, r2
22723
-	ldr	r3, [r9, #224]
22724
-	cmp	r3, #0
22725
-	bne	.L3767
22726
-	ldr	r2, .L3800
22727
-	ldr	r2, [r2, #504]
22728
-	cmp	r2, #1
22729
-	bne	.L3768
22730
-	cmp	r0, #16
22731
-	bne	.L3727
22732
-	add	r0, r1, #256
22733
-	ldr	r2, [sp, #12]
22734
-	mov	r1, fp
22735
-	bl	FtlVendorPartWrite
22736
-	b	.L3726
22737
-.L3727:
22738
-	ldr	r7, .L3800+4
22739
-	ldr	r3, [r7, #2428]
22740
-	cmp	r1, r3
22741
-	bcs	.L3771
22742
-	cmp	fp, r3
22743
-	bhi	.L3771
22744
-	add	r6, r1, fp
22745
-	cmp	r6, r3
22746
-	bhi	.L3771
22747
-	ldrh	r4, [r7, #2394]
22748
-	mov	r3, #2048
22749
-	ldr	r5, .L3800+8
22750
-	mov	r0, r1
22751
-	mov	r1, r4
22752
-	str	r3, [r5, #1004]
22753
-	bl	__aeabi_uidiv
22754
-	mov	r1, r4
22755
-	str	r0, [sp, #4]
22756
-	subs	r0, r6, #1
22757
-	bl	__aeabi_uidiv
22758
-	cmp	fp, r4, lsl #1
22759
-	ldr	r2, [sp, #4]
22760
-	str	r0, [sp, #20]
22761
-	sub	r6, r0, r2
22762
-	add	r3, r6, #1
22763
-	str	r3, [sp, #8]
22764
-	ldr	r2, [sp, #8]
22765
-	ldr	r3, [r9, #484]
22766
-	add	r3, r3, r2
22767
-	ldr	r2, [r7, #2440]
22768
-	str	r3, [r9, #484]
22769
-	ldr	r3, [r9, #500]
22770
-	add	r3, r3, fp
22771
-	str	r3, [r9, #500]
22772
-	ite	cs
22773
-	movcs	r3, #1
22774
-	movcc	r3, #0
22775
-	str	r3, [sp, #28]
23020
+	mov	r10, r3
23021
+	ldr	r3, .L3672
23022
+	mov	r9, r2
23023
+	.pad #84
23024
+	sub	sp, sp, #84
23025
+	mov	r7, r1
23026
+	ldr	r2, [r3, #228]
22776
23027
 	cmp	r2, #0
22777
-	beq	.L3729
22778
-	movs	r3, #36
22779
-	ldr	r7, [r7, #2444]
22780
-	muls	r3, r2, r3
22781
-	ldr	r2, [sp, #4]
22782
-	subs	r3, r3, #36
22783
-	add	r7, r7, r3
22784
-	ldr	r3, [r7, #16]
22785
-	cmp	r2, r3
22786
-	bne	.L3730
22787
-	ldr	r3, [r9, #488]
22788
-	mov	r1, r4
22789
-	mov	r0, r8
22790
-	adds	r3, r3, #1
22791
-	str	r3, [r9, #488]
22792
-	ldr	r3, [r5, #1008]
22793
-	adds	r3, r3, #1
22794
-	str	r3, [r5, #1008]
22795
-	bl	__aeabi_uidivmod
22796
-	ldr	r0, [r7, #8]
22797
-	subs	r4, r4, r1
22798
-	add	r0, r0, r1, lsl #9
22799
-	cmp	r4, fp
22800
-	ldr	r1, [sp, #12]
22801
-	it	cs
22802
-	movcs	r4, fp
22803
-	lsl	r9, r4, #9
22804
-	mov	r2, r9
22805
-	bl	ftl_memcpy
22806
-	cbnz	r6, .L3731
22807
-	ldr	r3, [r5, #1008]
22808
-	cmp	r3, #2
22809
-	ble	.L3767
22810
-.L3731:
22811
-	ldr	r3, [sp, #12]
22812
-	rsb	fp, r4, fp
22813
-	add	r8, r8, r4
22814
-	str	r6, [sp, #8]
22815
-	add	r3, r3, r9
22816
-	str	r3, [sp, #12]
22817
-	ldr	r3, [sp, #4]
22818
-	adds	r3, r3, #1
23028
+	bne	.L3642
23029
+	ldr	r1, .L3672+4
23030
+	ldr	r1, [r1, #500]
23031
+	cmp	r1, #1
23032
+	bne	.L3643
23033
+	cmp	r0, #16
23034
+	bne	.L3602
23035
+	mov	r2, r10
23036
+	mov	r1, r9
23037
+	add	r0, r7, #256
23038
+	bl	FtlVendorPartWrite
23039
+.L3600:
23040
+	add	sp, sp, #84
23041
+	@ sp needed
23042
+	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
23043
+.L3602:
23044
+	ldr	fp, .L3672+16
22819
23045
 	str	r3, [sp, #4]
22820
-.L3730:
22821
-	movs	r3, #0
22822
-	str	r3, [r5, #1008]
22823
-.L3729:
22824
-	ldr	r0, [sp, #4]
22825
-	ldr	r1, [sp, #20]
22826
-	bl	FtlCacheMetchLpa
22827
-	cbz	r0, .L3732
22828
-	bl	FtlCacheWriteBack
22829
-.L3732:
22830
-	ldr	r4, .L3800+4
22831
-	ldr	r7, .L3800+12
22832
-	ldr	r6, [sp, #4]
22833
-	mov	r10, r4
22834
-	str	r7, [r5, #984]
22835
-.L3733:
22836
-	ldr	r3, [sp, #8]
22837
-	ldr	r5, .L3800+16
22838
-	cmp	r3, #0
22839
-	beq	.L3799
22840
-	ldrh	r3, [r7, #4]
22841
-	cbnz	r3, .L3734
22842
-	add	r2, r5, #316
22843
-	ldr	r9, .L3800
23046
+	ldr	r2, [fp, #2432]
22844
23047
 	cmp	r7, r2
22845
-	bne	.L3735
22846
-	ldrh	r7, [r5, #368]
22847
-	cbnz	r7, .L3736
22848
-	add	r0, r5, #364
22849
-	bl	allocate_new_data_superblock
22850
-	str	r7, [r9, #3452]
22851
-.L3736:
22852
-	ldr	r0, .L3800+12
22853
-	bl	allocate_new_data_superblock
22854
-	ldr	r3, [r9, #3452]
22855
-	cbnz	r3, .L3772
22856
-.L3738:
22857
-	ldr	r7, .L3800+12
22858
-	b	.L3737
22859
-.L3735:
22860
-	str	r3, [r9, #3452]
22861
-	ldrh	r3, [r5, #320]
22862
-	cmp	r3, #0
22863
-	bne	.L3738
23048
+	bcs	.L3646
23049
+	cmp	r9, r2
23050
+	bhi	.L3646
23051
+	add	r5, r7, r9
23052
+	cmp	r2, r5
23053
+	bcc	.L3646
23054
+	ldrh	r4, [fp, #2396]
23055
+	mov	r2, #2048
23056
+	ldr	r6, .L3672+8
22864
23057
 	mov	r0, r7
22865
-	bl	allocate_new_data_superblock
22866
-	b	.L3737
22867
-.L3772:
22868
-	ldr	r7, .L3800+20
22869
-.L3737:
22870
-	ldrh	r3, [r7, #4]
22871
-	cbnz	r3, .L3739
22872
-	mov	r0, r7
22873
-	bl	allocate_new_data_superblock
22874
-.L3739:
22875
-	ldr	r3, .L3800+8
22876
-	str	r7, [r3, #984]
22877
-.L3734:
22878
-	ldr	r2, [r5, #3300]
22879
-	ldr	r3, [r4, #2440]
22880
-	ldrh	ip, [r7, #4]
22881
-	subs	r3, r2, r3
22882
-	ldr	r2, [sp, #8]
22883
-	cmp	ip, r3
22884
-	ldr	r9, .L3800+16
22885
-	it	cs
22886
-	movcs	ip, r3
22887
-	cmp	ip, r2
22888
-	mov	r3, ip
22889
-	it	cs
22890
-	movcs	r3, r2
22891
-	str	r3, [sp, #44]
22892
-	movs	r3, #0
22893
-	str	r3, [sp, #24]
22894
-.L3740:
22895
-	ldr	r3, [sp, #24]
22896
-	ldr	r2, [sp, #44]
22897
-	cmp	r3, r2
22898
-	beq	.L3741
22899
-	ldrh	r3, [r7, #4]
22900
-	cmp	r3, #0
22901
-	beq	.L3741
22902
-	ldr	r3, [sp, #28]
22903
-	cbz	r3, .L3742
22904
-	ldr	r3, [sp, #20]
22905
-	cmp	r6, r3
22906
-	bne	.L3742
22907
-	ldr	r3, [sp, #24]
22908
-	cbz	r3, .L3742
22909
-	ldrh	r2, [r4, #2394]
22910
-	add	r3, r8, fp
22911
-	mls	r3, r2, r6, r3
22912
-	cmp	r3, r2
22913
-	bne	.L3741
22914
-.L3742:
22915
-	add	r1, sp, #48
22916
-	movs	r2, #0
22917
-	mov	r0, r6
22918
-	movs	r5, #36
22919
-	bl	log2phys
22920
-	mov	r0, r7
22921
-	bl	get_new_active_ppa
22922
-	ldr	r3, [r4, #2440]
22923
-	ldr	r1, [r4, #2444]
22924
-	ldrh	r2, [r4, #2400]
22925
-	mla	r1, r5, r3, r1
22926
-	mul	ip, r3, r2
22927
-	str	r6, [r1, #16]
22928
-	str	r0, [r1, #4]
22929
-	lsr	r0, ip, #2
22930
-	str	r0, [sp, #36]
22931
-	ldr	r0, [r9, #3348]
22932
-	mov	lr, r0
22933
-	str	r0, [sp, #40]
22934
-	ldr	r0, [sp, #36]
22935
-	add	r0, lr, r0, lsl #2
22936
-	ldrh	lr, [r4, #2398]
22937
-	str	r0, [sp, #16]
22938
-	str	r0, [r1, #12]
22939
-	mul	r3, r3, lr
22940
-	ldr	r0, [r9, #3328]
22941
-	bic	r3, r3, #3
22942
-	add	r3, r3, r0
22943
-	ldr	r0, [sp, #16]
22944
-	str	r3, [r1, #8]
22945
-	movs	r1, #0
22946
-	bl	ftl_memset
23058
+	mov	r1, r4
23059
+	str	r2, [r6, #1508]
23060
+	bl	__aeabi_uidiv
23061
+	mov	r1, r4
23062
+	str	r0, [sp]
23063
+	subs	r0, r5, #1
23064
+	bl	__aeabi_uidiv
22947
23065
 	ldr	r3, [sp, #4]
22948
-	cmp	r6, r3
22949
-	beq	.L3743
22950
-	ldr	r3, [sp, #20]
22951
-	cmp	r6, r3
22952
-	bne	.L3796
22953
-	ldrh	r3, [r4, #2394]
22954
-	add	r5, r8, fp
22955
-	smulbb	r3, r3, r6
22956
-	subs	r5, r5, r3
22957
-	movs	r3, #0
22958
-	str	r3, [sp, #32]
22959
-	uxth	r5, r5
22960
-	b	.L3746
22961
-.L3743:
22962
-	ldrh	r5, [r4, #2394]
22963
-	mov	r0, r8
22964
-	mov	r1, r5
23066
+	cmp	r9, r4, lsl #1
23067
+	ldr	r2, [sp]
23068
+	ldr	r1, [fp, #2444]
23069
+	str	r0, [sp, #12]
23070
+	sub	r5, r0, r2
23071
+	ldr	r2, [r3, #484]
23072
+	add	r8, r5, #1
23073
+	add	r2, r2, r8
23074
+	str	r2, [r3, #484]
23075
+	ldr	r2, [r3, #500]
23076
+	add	r2, r2, r9
23077
+	str	r2, [r3, #500]
23078
+	ite	cs
23079
+	movcs	r2, #1
23080
+	movcc	r2, #0
23081
+	str	r2, [sp, #16]
23082
+	cmp	r1, #0
23083
+	beq	.L3647
23084
+	movs	r2, #36
23085
+	muls	r2, r1, r2
23086
+	ldr	r1, [fp, #2448]
23087
+	subs	r2, r2, #36
23088
+	add	fp, r1, r2
23089
+	ldr	r1, [sp]
23090
+	ldr	r2, [fp, #16]
23091
+	cmp	r1, r2
23092
+	bne	.L3648
23093
+	ldr	r2, [r3, #488]
23094
+	mov	r1, r4
23095
+	mov	r0, r7
23096
+	adds	r2, r2, #1
23097
+	str	r2, [r3, #488]
23098
+	ldr	r3, [r6, #1512]
23099
+	adds	r3, r3, #1
23100
+	str	r3, [r6, #1512]
22965
23101
 	bl	__aeabi_uidivmod
22966
-	subs	r5, r5, r1
22967
-	str	r1, [sp, #32]
22968
-	cmp	r5, fp
23102
+	subs	r4, r4, r1
23103
+	ldr	r0, [fp, #8]
23104
+	cmp	r4, r9
23105
+	mov	r3, r1
22969
23106
 	it	cs
22970
-	movcs	r5, fp
22971
-.L3746:
22972
-	ldrh	r3, [r4, #2394]
22973
-	cmp	r5, r3
22974
-	bne	.L3747
22975
-	ldr	r3, [sp, #4]
22976
-	mov	lr, #36
22977
-	cmp	r6, r3
22978
-	ittet	ne
22979
-	mulne	r1, r6, r5
22980
-	ldrne	r3, [sp, #12]
22981
-	ldreq	r1, [sp, #12]
22982
-	rsbne	r1, r8, r1
22983
-	it	ne
22984
-	addne	r1, r3, r1, lsl #9
22985
-	ldr	r3, [sp, #28]
22986
-	cbz	r3, .L3749
22987
-	ldr	r2, [r10, #2440]
22988
-	ldr	r5, [r10, #2444]
22989
-	mla	r2, lr, r2, r5
22990
-	str	r1, [r2, #8]
22991
-	b	.L3750
22992
-.L3749:
22993
-	ldr	r0, [r10, #2444]
22994
-	ldr	r3, [r10, #2440]
22995
-	ldrh	r2, [r10, #2398]
22996
-	mla	r3, lr, r3, r0
22997
-	ldr	r0, [r3, #8]
22998
-	b	.L3797
22999
-.L3747:
23000
-	ldr	r2, [sp, #48]
23001
-	movs	r3, #36
23002
-	adds	r1, r2, #1
23003
-	beq	.L3751
23004
-	ldr	r1, [r4, #2444]
23005
-	add	r0, sp, #52
23006
-	str	r2, [sp, #56]
23007
-	ldr	r2, [r4, #2440]
23008
-	str	r6, [sp, #68]
23009
-	mla	r3, r3, r2, r1
23010
-	movs	r1, #1
23011
-	ldr	r2, [r3, #8]
23012
-	ldr	r3, [r3, #12]
23013
-	str	r2, [sp, #60]
23014
-	movs	r2, #0
23015
-	str	r3, [sp, #64]
23016
-	bl	FlashReadPages
23017
-	ldr	r3, [sp, #52]
23018
-	adds	r3, r3, #1
23019
-	bne	.L3752
23020
-	ldr	r3, [r9, #680]
23021
-	adds	r3, r3, #1
23022
-	str	r3, [r9, #680]
23023
-	b	.L3754
23024
-.L3801:
23025
-	.align	2
23026
-.L3800:
23027
-	.word	.LANCHOR1
23028
-	.word	.LANCHOR0
23029
-	.word	.LANCHOR5
23030
-	.word	.LANCHOR2+316
23031
-	.word	.LANCHOR2
23032
-	.word	.LANCHOR2+364
23033
-.L3752:
23034
-	ldr	r3, [sp, #16]
23035
-	ldr	r3, [r3, #8]
23036
-	cmp	r3, r6
23037
-	beq	.L3754
23038
-	ldr	r3, [r9, #680]
23039
-	mov	r2, r6
23040
-	ldr	r0, .L3802
23041
-	adds	r3, r3, #1
23042
-	str	r3, [r9, #680]
23043
-	ldr	r3, [sp, #16]
23044
-	ldr	r1, [r3, #8]
23045
-	bl	printk
23046
-	b	.L3754
23047
-.L3751:
23048
-	ldr	r1, [r4, #2444]
23049
-	ldr	r2, [r4, #2440]
23050
-	mla	r2, r3, r2, r1
23051
-	movs	r1, #0
23052
-	ldr	r0, [r2, #8]
23053
-	ldrh	r2, [r4, #2398]
23054
-	bl	ftl_memset
23055
-.L3754:
23056
-	ldr	r3, [sp, #4]
23057
-	mov	lr, #36
23058
-	lsls	r2, r5, #9
23059
-	cmp	r6, r3
23060
-	bne	.L3755
23061
-	ldr	r1, [r4, #2440]
23062
-	ldr	r5, [r4, #2444]
23063
-	ldr	r3, [sp, #32]
23064
-	mla	r1, lr, r1, r5
23065
-	ldr	r0, [r1, #8]
23066
-	ldr	r1, [sp, #12]
23107
+	movcs	r4, r9
23108
+	mov	r1, r10
23109
+	lsl	r8, r4, #9
23067
23110
 	add	r0, r0, r3, lsl #9
23068
-	b	.L3797
23069
-.L3755:
23070
-	ldr	r0, [r4, #2444]
23071
-	ldr	r3, [r4, #2440]
23072
-	ldrh	r1, [r4, #2394]
23073
-	mla	r3, lr, r3, r0
23074
-	muls	r1, r6, r1
23075
-	ldr	r0, [r3, #8]
23076
-	rsb	r1, r8, r1
23077
-	ldr	r3, [sp, #12]
23078
-	add	r1, r3, r1, lsl #9
23079
-	b	.L3797
23080
-.L3796:
23081
-	ldr	r3, [sp, #28]
23082
-	cbz	r3, .L3756
23083
-	ldr	r3, [r4, #2440]
23084
-	ldr	r2, [r4, #2444]
23085
-	mla	r5, r5, r3, r2
23086
-	ldrh	r3, [r4, #2394]
23087
-	ldr	r2, [sp, #12]
23088
-	muls	r3, r6, r3
23089
-	rsb	r3, r8, r3
23090
-	add	r3, r2, r3, lsl #9
23091
-	str	r3, [r5, #8]
23092
-	b	.L3750
23093
-.L3756:
23094
-	ldr	r2, [r4, #2444]
23095
-	ldr	r3, [r4, #2440]
23096
-	ldrh	r1, [r4, #2394]
23097
-	mla	r3, r5, r3, r2
23098
-	ldrh	r2, [r4, #2398]
23099
-	muls	r1, r6, r1
23100
-	ldr	r0, [r3, #8]
23101
-	rsb	r1, r8, r1
23102
-	ldr	r3, [sp, #12]
23103
-	add	r1, r3, r1, lsl #9
23104
-.L3797:
23111
+	mov	r2, r8
23105
23112
 	bl	ftl_memcpy
23106
-.L3750:
23107
-	ldr	r2, [sp, #40]
23108
-	movw	r3, #61589
23109
-	ldr	r1, [sp, #36]
23110
-	strh	r3, [r2, r1, lsl #2]	@ movhi
23111
-	ldr	r2, [sp, #16]
23112
-	ldr	r3, [r9, #512]
23113
-	str	r3, [r2, #4]
23114
-	adds	r3, r3, #1
23115
-	adds	r2, r3, #1
23116
-	ldr	r2, [sp, #16]
23117
-	it	eq
23118
-	moveq	r3, #0
23119
-	str	r3, [r9, #512]
23120
-	ldr	r3, [sp, #16]
23121
-	str	r6, [r3, #8]
23122
-	adds	r6, r6, #1
23123
-	ldr	r3, [sp, #48]
23124
-	str	r3, [r2, #12]
23125
-	ldrh	r3, [r7]
23126
-	strh	r3, [r2, #2]	@ movhi
23127
-	ldr	r3, [r4, #2440]
23128
-	adds	r3, r3, #1
23129
-	str	r3, [r4, #2440]
23130
-	ldr	r3, [sp, #24]
23131
-	adds	r3, r3, #1
23132
-	str	r3, [sp, #24]
23133
-	b	.L3740
23134
-.L3741:
23135
-	ldr	r3, [sp, #8]
23136
-	ldr	r2, [sp, #24]
23137
-	subs	r3, r3, r2
23113
+	cbnz	r5, .L3606
23114
+	ldr	r3, [r6, #1512]
23115
+	cmp	r3, #2
23116
+	bgt	.L3606
23117
+.L3642:
23118
+	movs	r0, #0
23119
+	b	.L3600
23120
+.L3606:
23121
+	add	r3, r10, r8
23122
+	sub	r9, r9, r4
23138
23123
 	str	r3, [sp, #8]
23139
-	ldr	r3, .L3802+4
23140
-	ldr	r2, [r10, #2440]
23141
-	ldr	r3, [r3, #3300]
23142
-	cmp	r2, r3
23143
-	bcs	.L3760
23144
-	ldr	r3, [sp, #28]
23145
-	cbnz	r3, .L3760
23146
-	ldrh	r3, [r7, #4]
23147
-	cbz	r3, .L3760
23148
-.L3762:
23124
+	add	r7, r7, r4
23125
+	ldr	r3, [sp]
23126
+	mov	r8, r5
23127
+	adds	r3, r3, #1
23128
+	str	r3, [sp]
23129
+.L3605:
23149
23130
 	movs	r3, #0
23150
-	str	r3, [sp, #28]
23151
-	b	.L3733
23152
-.L3760:
23131
+	str	r3, [r6, #1512]
23132
+.L3604:
23133
+	ldr	r1, [sp, #12]
23134
+	ldr	r0, [sp]
23135
+	bl	FtlCacheMetchLpa
23136
+	cbz	r0, .L3607
23153
23137
 	bl	FtlCacheWriteBack
23154
-	movs	r3, #0
23155
-	str	r3, [r10, #2440]
23156
-	ldr	r3, [sp, #8]
23157
-	cmp	r3, #1
23158
-	bhi	.L3733
23159
-	b	.L3762
23160
-.L3799:
23161
-	mov	r0, r3
23162
-	ldr	r2, [sp, #4]
23163
-	ldr	r3, [sp, #20]
23138
+.L3607:
23139
+	ldr	r5, .L3672+12
23140
+	ldr	fp, .L3672+16
23141
+	str	r5, [r6, #1488]
23142
+	ldr	r6, [sp]
23143
+.L3608:
23144
+	ldr	r4, .L3672
23145
+	cmp	r8, #0
23146
+	bne	.L3637
23147
+	ldr	r3, [sp, #12]
23148
+	mov	r0, r8
23149
+	ldr	r2, [sp]
23164
23150
 	subs	r1, r3, r2
23165
23151
 	bl	ftl_do_gc
23166
-	ldrh	r3, [r5, #312]
23152
+	ldrh	r3, [r4, #316]
23167
23153
 	cmp	r3, #5
23168
-	bls	.L3775
23154
+	bls	.L3638
23169
23155
 	cmp	r3, #31
23170
-	bhi	.L3767
23171
-	ldr	r3, .L3802+8
23172
-	ldrb	r3, [r3]	@ zero_extendqisi2
23173
-	cbnz	r3, .L3767
23174
-.L3775:
23175
-	ldr	r4, [sp, #8]
23176
-	mov	r8, #128
23177
-	ldr	r6, .L3802+4
23178
-	movw	r7, #65535
23179
-.L3788:
23180
-	ldrh	r3, [r5, #556]
23181
-	cmp	r3, r7
23182
-	bne	.L3766
23183
-	ldrh	r3, [r6, #1174]
23184
-	cmp	r3, r7
23185
-	bne	.L3766
23186
-	ldrh	r3, [r6, #1176]
23187
-	cmp	r3, r7
23188
-	bne	.L3766
23189
-	and	r0, r4, #7
23156
+	bhi	.L3642
23157
+	ldr	r3, .L3672+16
23158
+	ldrb	r3, [r3, #36]	@ zero_extendqisi2
23159
+	cmp	r3, #0
23160
+	bne	.L3642
23161
+.L3638:
23162
+	movw	r5, #65535
23163
+	movs	r6, #128
23164
+.L3641:
23165
+	ldrh	r3, [r4, #556]
23166
+	cmp	r3, r5
23167
+	bne	.L3640
23168
+	ldrh	r3, [r4, #1174]
23169
+	cmp	r3, r5
23170
+	bne	.L3640
23171
+	ldrh	r3, [r4, #1176]
23172
+	cmp	r3, r5
23173
+	bne	.L3640
23174
+	and	r0, r8, #7
23190
23175
 	bl	List_get_gc_head_node
23191
23176
 	uxth	r0, r0
23192
23177
 	bl	FtlGcRefreshBlock
23193
-.L3766:
23194
-	movs	r0, #1
23195
-	strh	r8, [r5, #1122]	@ movhi
23196
-	strh	r8, [r5, #1120]	@ movhi
23197
-	mov	r1, r0
23198
-	bl	ftl_do_gc
23199
-	movs	r0, #0
23178
+.L3640:
23200
23179
 	movs	r1, #1
23180
+	strh	r6, [r4, #1122]	@ movhi
23181
+	mov	r0, r1
23182
+	strh	r6, [r4, #1120]	@ movhi
23201
23183
 	bl	ftl_do_gc
23202
-	ldr	r3, [r5, #224]
23203
-	cbnz	r3, .L3767
23204
-	ldrh	r3, [r6, #312]
23205
-	cmp	r3, #2
23206
-	bhi	.L3767
23207
-	adds	r4, r4, #1
23208
-	cmp	r4, #256
23209
-	bne	.L3788
23210
-	b	.L3767
23211
-.L3771:
23212
-	mov	r0, #-1
23213
-	b	.L3726
23214
-.L3767:
23184
+	movs	r1, #1
23215
23185
 	movs	r0, #0
23216
-	b	.L3726
23217
-.L3768:
23218
-	mov	r0, r3
23219
-.L3726:
23220
-	add	sp, sp, #92
23221
-	@ sp needed
23222
-	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
23223
-.L3803:
23186
+	bl	ftl_do_gc
23187
+	ldr	r3, [r4, #228]
23188
+	cmp	r3, #0
23189
+	bne	.L3642
23190
+	ldrh	r3, [r4, #316]
23191
+	cmp	r3, #2
23192
+	bhi	.L3642
23193
+	add	r8, r8, #1
23194
+	cmp	r8, #256
23195
+	bne	.L3641
23196
+	b	.L3642
23197
+.L3648:
23198
+	str	r10, [sp, #8]
23199
+	b	.L3605
23200
+.L3647:
23201
+	str	r10, [sp, #8]
23202
+	b	.L3604
23203
+.L3637:
23204
+	ldrh	r1, [r5, #4]
23205
+	cbnz	r1, .L3609
23206
+	add	r2, r4, #320
23207
+	ldr	r10, .L3672+4
23208
+	cmp	r5, r2
23209
+	bne	.L3610
23210
+	ldrh	r5, [r4, #372]
23211
+	cbnz	r5, .L3611
23212
+	add	r0, r4, #368
23213
+	bl	allocate_new_data_superblock
23214
+	str	r5, [r10, #3448]
23215
+.L3611:
23216
+	ldr	r5, .L3672+12
23217
+	ldr	r0, .L3672+12
23218
+	bl	allocate_new_data_superblock
23219
+	ldr	r1, [r10, #3448]
23220
+	add	r2, r5, #48
23221
+	cmp	r1, #0
23222
+	it	ne
23223
+	movne	r5, r2
23224
+.L3612:
23225
+	ldrh	r2, [r5, #4]
23226
+	cbnz	r2, .L3613
23227
+	mov	r0, r5
23228
+	bl	allocate_new_data_superblock
23229
+.L3613:
23230
+	ldr	r2, .L3672+8
23231
+	str	r5, [r2, #1488]
23232
+.L3609:
23233
+	ldr	r1, [fp, #2444]
23234
+	ldr	r2, [r4, #3300]
23235
+	ldr	r10, .L3672
23236
+	subs	r2, r2, r1
23237
+	ldrh	r1, [r5, #4]
23238
+	cmp	r2, r8
23239
+	it	cs
23240
+	movcs	r2, r8
23241
+	cmp	r1, r2
23242
+	mov	r3, r1
23243
+	it	cs
23244
+	movcs	r3, r2
23245
+	str	r3, [sp, #36]
23246
+	movs	r3, #0
23247
+	str	r3, [sp, #20]
23248
+.L3614:
23249
+	ldr	r3, [sp, #20]
23250
+	ldr	r2, [sp, #36]
23251
+	cmp	r3, r2
23252
+	bne	.L3633
23253
+.L3615:
23254
+	ldr	r2, .L3672
23255
+	ldr	r1, [fp, #2444]
23256
+	ldr	r3, [sp, #20]
23257
+	ldr	r2, [r2, #3300]
23258
+	sub	r8, r8, r3
23259
+	cmp	r1, r2
23260
+	bcs	.L3634
23261
+	ldr	r3, [sp, #16]
23262
+	cmp	r3, #0
23263
+	bne	.L3634
23264
+	ldrh	r2, [r5, #4]
23265
+	cmp	r2, #0
23266
+	beq	.L3634
23267
+.L3636:
23268
+	movs	r3, #0
23269
+	str	r3, [sp, #16]
23270
+	b	.L3608
23271
+.L3610:
23272
+	str	r1, [r10, #3448]
23273
+	ldrh	r1, [r4, #324]
23274
+	cbnz	r1, .L3650
23275
+	mov	r0, r5
23276
+	bl	allocate_new_data_superblock
23277
+	b	.L3612
23278
+.L3650:
23279
+	mov	r5, r2
23280
+	b	.L3613
23281
+.L3673:
23224
23282
 	.align	2
23225
-.L3802:
23226
-	.word	.LC166
23283
+.L3672:
23227
23284
 	.word	.LANCHOR2
23285
+	.word	.LANCHOR1
23286
+	.word	.LANCHOR4
23287
+	.word	.LANCHOR2+320
23228
23288
 	.word	.LANCHOR0
23289
+.L3633:
23290
+	ldrh	r2, [r5, #4]
23291
+	cmp	r2, #0
23292
+	beq	.L3615
23293
+	ldr	r3, [sp, #16]
23294
+	cbz	r3, .L3616
23295
+	ldr	r3, [sp, #12]
23296
+	cmp	r3, r6
23297
+	bne	.L3616
23298
+	ldr	r3, [sp, #20]
23299
+	cbz	r3, .L3616
23300
+	ldrh	r1, [fp, #2396]
23301
+	add	r2, r7, r9
23302
+	ldr	r3, [sp, #12]
23303
+	mls	r2, r1, r3, r2
23304
+	cmp	r1, r2
23305
+	bne	.L3615
23306
+.L3616:
23307
+	movs	r2, #0
23308
+	add	r1, sp, #40
23309
+	mov	r0, r6
23310
+	movs	r4, #36
23311
+	bl	log2phys
23312
+	mov	r0, r5
23313
+	bl	get_new_active_ppa
23314
+	ldr	r1, [fp, #2444]
23315
+	ldr	r2, [fp, #2448]
23316
+	mla	ip, r4, r1, r2
23317
+	ldrh	r2, [fp, #2402]
23318
+	str	r0, [ip, #4]
23319
+	mul	r0, r2, r1
23320
+	str	r6, [ip, #16]
23321
+	bic	r3, r0, #3
23322
+	str	r3, [sp, #28]
23323
+	ldr	r0, [sp, #28]
23324
+	ldr	r3, [r10, #3348]
23325
+	str	r3, [sp, #32]
23326
+	add	r3, r3, r0
23327
+	ldrh	r0, [fp, #2400]
23328
+	str	r3, [ip, #12]
23329
+	str	r3, [sp, #4]
23330
+	muls	r1, r0, r1
23331
+	ldr	r0, [r10, #3328]
23332
+	bic	r1, r1, #3
23333
+	add	r1, r1, r0
23334
+	mov	r0, r3
23335
+	str	r1, [ip, #8]
23336
+	movs	r1, #0
23337
+	bl	ftl_memset
23338
+	ldr	r3, [sp]
23339
+	cmp	r3, r6
23340
+	beq	.L3617
23341
+	ldr	r3, [sp, #12]
23342
+	cmp	r3, r6
23343
+	bne	.L3668
23344
+	ldrh	r3, [sp, #12]
23345
+	add	r4, r7, r9
23346
+	ldrh	r2, [fp, #2396]
23347
+	smulbb	r2, r2, r3
23348
+	movs	r3, #0
23349
+	str	r3, [sp, #24]
23350
+	subs	r4, r4, r2
23351
+	uxth	r4, r4
23352
+	b	.L3620
23353
+.L3617:
23354
+	ldrh	r4, [fp, #2396]
23355
+	mov	r0, r7
23356
+	mov	r1, r4
23357
+	bl	__aeabi_uidivmod
23358
+	subs	r4, r4, r1
23359
+	str	r1, [sp, #24]
23360
+	cmp	r4, r9
23361
+	it	cs
23362
+	movcs	r4, r9
23363
+.L3620:
23364
+	ldrh	r2, [fp, #2396]
23365
+	cmp	r2, r4
23366
+	bne	.L3621
23367
+	ldr	r3, [sp]
23368
+	ldr	r2, [fp, #2444]
23369
+	ldr	r0, [fp, #2448]
23370
+	cmp	r3, r6
23371
+	itte	ne
23372
+	mulne	r1, r4, r6
23373
+	ldrne	r3, [sp, #8]
23374
+	ldreq	r1, [sp, #8]
23375
+	mov	r4, #36
23376
+	itt	ne
23377
+	subne	r1, r1, r7
23378
+	addne	r1, r3, r1, lsl #9
23379
+	ldr	r3, [sp, #16]
23380
+	cbz	r3, .L3623
23381
+	mla	r2, r4, r2, r0
23382
+	str	r1, [r2, #8]
23383
+.L3624:
23384
+	ldr	r3, [sp, #32]
23385
+	movw	r2, #61589
23386
+	ldr	r1, [sp, #28]
23387
+	strh	r2, [r3, r1]	@ movhi
23388
+	ldr	r3, [sp, #4]
23389
+	ldr	r2, [r10, #512]
23390
+	str	r2, [r3, #4]
23391
+	adds	r2, r2, #1
23392
+	adds	r3, r2, #1
23393
+	ldr	r3, [sp, #4]
23394
+	it	eq
23395
+	moveq	r2, #0
23396
+	str	r2, [r10, #512]
23397
+	ldr	r2, [sp, #40]
23398
+	str	r6, [r3, #8]
23399
+	adds	r6, r6, #1
23400
+	str	r2, [r3, #12]
23401
+	ldrh	r2, [r5]
23402
+	strh	r2, [r3, #2]	@ movhi
23403
+	ldr	r3, [sp, #20]
23404
+	ldr	r2, [fp, #2444]
23405
+	adds	r3, r3, #1
23406
+	adds	r2, r2, #1
23407
+	str	r3, [sp, #20]
23408
+	str	r2, [fp, #2444]
23409
+	b	.L3614
23410
+.L3623:
23411
+	mla	r0, r4, r2, r0
23412
+	ldrh	r2, [fp, #2400]
23413
+.L3671:
23414
+	ldr	r0, [r0, #8]
23415
+	b	.L3669
23416
+.L3621:
23417
+	ldr	r2, [sp, #40]
23418
+	movs	r0, #36
23419
+	adds	r1, r2, #1
23420
+	beq	.L3625
23421
+	ldr	r1, [fp, #2448]
23422
+	str	r2, [sp, #48]
23423
+	ldr	r2, [fp, #2444]
23424
+	str	r6, [sp, #60]
23425
+	mla	r2, r0, r2, r1
23426
+	add	r0, sp, #44
23427
+	ldr	r1, [r2, #8]
23428
+	ldr	r2, [r2, #12]
23429
+	str	r1, [sp, #52]
23430
+	movs	r1, #1
23431
+	str	r2, [sp, #56]
23432
+	movs	r2, #0
23433
+	bl	FlashReadPages
23434
+	ldr	r2, [sp, #44]
23435
+	adds	r2, r2, #1
23436
+	bne	.L3626
23437
+	ldr	r2, [r10, #676]
23438
+	adds	r2, r2, #1
23439
+	str	r2, [r10, #676]
23440
+.L3628:
23441
+	ldr	r3, [sp]
23442
+	lsls	r2, r4, #9
23443
+	cmp	r3, r6
23444
+	bne	.L3629
23445
+	ldr	r0, [fp, #2448]
23446
+	movs	r4, #36
23447
+	ldr	r1, [fp, #2444]
23448
+	ldr	r3, [sp, #24]
23449
+	mla	r1, r4, r1, r0
23450
+	ldr	r0, [r1, #8]
23451
+	ldr	r1, [sp, #8]
23452
+	add	r0, r0, r3, lsl #9
23453
+.L3669:
23454
+	bl	ftl_memcpy
23455
+	b	.L3624
23456
+.L3626:
23457
+	ldr	r3, [sp, #4]
23458
+	ldr	r2, [r3, #8]
23459
+	cmp	r6, r2
23460
+	beq	.L3628
23461
+	ldr	r2, [r10, #676]
23462
+	ldr	r0, .L3674
23463
+	adds	r2, r2, #1
23464
+	str	r2, [r10, #676]
23465
+	mov	r2, r6
23466
+	ldr	r1, [r3, #8]
23467
+	bl	printk
23468
+	b	.L3628
23469
+.L3625:
23470
+	ldr	r1, [fp, #2444]
23471
+	ldr	r2, [fp, #2448]
23472
+	mla	r0, r0, r1, r2
23473
+	ldrh	r2, [fp, #2400]
23474
+	movs	r1, #0
23475
+	ldr	r0, [r0, #8]
23476
+	bl	ftl_memset
23477
+	b	.L3628
23478
+.L3629:
23479
+	ldrh	r1, [fp, #2396]
23480
+	movs	r4, #36
23481
+	ldr	r3, [fp, #2448]
23482
+	ldr	r0, [fp, #2444]
23483
+	muls	r1, r6, r1
23484
+	mla	r0, r4, r0, r3
23485
+	ldr	r3, [sp, #8]
23486
+	subs	r1, r1, r7
23487
+	add	r1, r3, r1, lsl #9
23488
+	b	.L3671
23489
+.L3668:
23490
+	ldr	r3, [sp, #16]
23491
+	cbz	r3, .L3630
23492
+	ldr	r2, [fp, #2444]
23493
+	ldr	r1, [fp, #2448]
23494
+	ldr	r3, [sp, #8]
23495
+	mla	r4, r4, r2, r1
23496
+	ldrh	r2, [fp, #2396]
23497
+	muls	r2, r6, r2
23498
+	subs	r2, r2, r7
23499
+	add	r2, r3, r2, lsl #9
23500
+	str	r2, [r4, #8]
23501
+	b	.L3624
23502
+.L3630:
23503
+	ldrh	r1, [fp, #2396]
23504
+	ldr	r2, [fp, #2444]
23505
+	ldr	r0, [fp, #2448]
23506
+	ldr	r3, [sp, #8]
23507
+	muls	r1, r6, r1
23508
+	mla	r4, r4, r2, r0
23509
+	ldrh	r2, [fp, #2400]
23510
+	subs	r1, r1, r7
23511
+	add	r1, r3, r1, lsl #9
23512
+	ldr	r0, [r4, #8]
23513
+	b	.L3669
23514
+.L3634:
23515
+	bl	FtlCacheWriteBack
23516
+	cmp	r8, #1
23517
+	mov	r2, #0
23518
+	str	r2, [fp, #2444]
23519
+	bhi	.L3608
23520
+	b	.L3636
23521
+.L3646:
23522
+	mov	r0, #-1
23523
+	b	.L3600
23524
+.L3643:
23525
+	mov	r0, r2
23526
+	b	.L3600
23527
+.L3675:
23528
+	.align	2
23529
+.L3674:
23530
+	.word	.LC166
23229
23531
 	.fnend
23230
23532
 	.size	ftl_write, .-ftl_write
23231
23533
 	.align	1
23232
23534
 	.global	ftl_vendor_write
23535
+	.syntax unified
23233
23536
 	.thumb
23234
23537
 	.thumb_func
23538
+	.fpu softvfp
23235
23539
 	.type	ftl_vendor_write, %function
23236
23540
 ftl_vendor_write:
23237
23541
 	.fnstart
23238
23542
 	@ args = 0, pretend = 0, frame = 0
23239
23543
 	@ frame_needed = 0, uses_anonymous_args = 0
23240
-	push	{r4, r5, lr}
23241
-	.save {r4, r5, lr}
23242
-	mov	r5, r0
23243
-	mov	r4, r1
23544
+	@ link register save eliminated.
23244
23545
 	mov	r3, r2
23245
-	mov	r1, r5
23246
-	mov	r2, r4
23546
+	mov	r2, r1
23547
+	mov	r1, r0
23247
23548
 	movs	r0, #16
23248
-	pop	{r4, r5, lr}
23249
23549
 	b	ftl_write
23250
23550
 	.fnend
23251
23551
 	.size	ftl_vendor_write, .-ftl_vendor_write
23252
23552
 	.align	1
23253
23553
 	.global	FlashBootVendorWrite
23554
+	.syntax unified
23254
23555
 	.thumb
23255
23556
 	.thumb_func
23557
+	.fpu softvfp
23256
23558
 	.type	FlashBootVendorWrite, %function
23257
23559
 FlashBootVendorWrite:
23258
23560
 	.fnstart
..
..
@@ -23260,56 +23562,57 @@
23260
23562
 	@ frame_needed = 0, uses_anonymous_args = 0
23261
23563
 	push	{r4, r5, r6, lr}
23262
23564
 	.save {r4, r5, r6, lr}
23263
-	mov	r6, r0
23565
+	mov	r4, r0
23264
23566
 	mov	r5, r1
23265
-	mov	r4, r2
23567
+	mov	r6, r2
23266
23568
 	bl	rknand_device_lock
23267
-	ldr	r3, .L3808
23268
-	ldr	r3, [r3, #504]
23569
+	ldr	r3, .L3680
23570
+	ldr	r3, [r3, #500]
23269
23571
 	cmp	r3, #1
23270
-	bne	.L3807
23271
-	mov	r2, r4
23272
-	mov	r0, r6
23572
+	bne	.L3679
23573
+	mov	r0, r4
23574
+	mov	r2, r6
23273
23575
 	mov	r1, r5
23274
23576
 	bl	ftl_vendor_write
23275
23577
 	mov	r4, r0
23276
-	b	.L3806
23277
-.L3807:
23278
-	mov	r4, #-1
23279
-.L3806:
23578
+.L3678:
23280
23579
 	bl	rknand_device_unlock
23281
23580
 	mov	r0, r4
23282
23581
 	pop	{r4, r5, r6, pc}
23283
-.L3809:
23582
+.L3679:
23583
+	mov	r4, #-1
23584
+	b	.L3678
23585
+.L3681:
23284
23586
 	.align	2
23285
-.L3808:
23587
+.L3680:
23286
23588
 	.word	.LANCHOR1
23287
23589
 	.fnend
23288
23590
 	.size	FlashBootVendorWrite, .-FlashBootVendorWrite
23289
23591
 	.align	1
23290
23592
 	.global	ftl_sys_write
23593
+	.syntax unified
23291
23594
 	.thumb
23292
23595
 	.thumb_func
23596
+	.fpu softvfp
23293
23597
 	.type	ftl_sys_write, %function
23294
23598
 ftl_sys_write:
23295
23599
 	.fnstart
23296
23600
 	@ args = 0, pretend = 0, frame = 0
23297
23601
 	@ frame_needed = 0, uses_anonymous_args = 0
23298
-	push	{r4, lr}
23299
-	.save {r4, lr}
23300
-	mov	r4, r1
23602
+	@ link register save eliminated.
23301
23603
 	mov	r3, r2
23604
+	mov	r2, r1
23302
23605
 	add	r1, r0, #256
23303
-	mov	r2, r4
23304
23606
 	movs	r0, #16
23305
-	pop	{r4, lr}
23306
23607
 	b	ftl_write
23307
23608
 	.fnend
23308
23609
 	.size	ftl_sys_write, .-ftl_sys_write
23309
23610
 	.align	1
23310
23611
 	.global	StorageSysDataStore
23612
+	.syntax unified
23311
23613
 	.thumb
23312
23614
 	.thumb_func
23615
+	.fpu softvfp
23313
23616
 	.type	StorageSysDataStore, %function
23314
23617
 StorageSysDataStore:
23315
23618
 	.fnstart
..
..
@@ -23317,12 +23620,12 @@
23317
23620
 	@ frame_needed = 0, uses_anonymous_args = 0
23318
23621
 	push	{r3, r4, r5, lr}
23319
23622
 	.save {r3, r4, r5, lr}
23320
-	mov	r4, r1
23321
-	mov	r5, r0
23623
+	mov	r5, r1
23624
+	mov	r4, r0
23322
23625
 	bl	rknand_device_lock
23323
-	mov	r2, r4
23626
+	mov	r2, r5
23324
23627
 	movs	r1, #1
23325
-	mov	r0, r5
23628
+	mov	r0, r4
23326
23629
 	bl	ftl_sys_write
23327
23630
 	mov	r4, r0
23328
23631
 	bl	rknand_device_unlock
..
..
@@ -23332,86 +23635,91 @@
23332
23635
 	.size	StorageSysDataStore, .-StorageSysDataStore
23333
23636
 	.align	1
23334
23637
 	.global	FtlDumpSysBlock
23638
+	.syntax unified
23335
23639
 	.thumb
23336
23640
 	.thumb_func
23641
+	.fpu softvfp
23337
23642
 	.type	FtlDumpSysBlock, %function
23338
23643
 FtlDumpSysBlock:
23339
23644
 	.fnstart
23340
23645
 	@ args = 0, pretend = 0, frame = 0
23341
23646
 	@ frame_needed = 0, uses_anonymous_args = 0
23342
-	push	{r4, r5, r6, r7, r8, r9, lr}
23343
-	.save {r4, r5, r6, r7, r8, r9, lr}
23344
-	lsl	r8, r0, #10
23345
-	ldr	r5, .L3820
23647
+	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
23648
+	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
23649
+	lsl	r9, r0, #10
23650
+	ldr	r5, .L3691
23346
23651
 	.pad #28
23347
23652
 	sub	sp, sp, #28
23348
-	ldr	r4, .L3820+4
23349
-	mov	r9, #0
23350
-	ldr	r7, .L3820+8
23351
-	mov	r6, r0
23653
+	mov	r7, r0
23654
+	movs	r6, #0
23655
+	ldr	r4, .L3691+4
23352
23656
 	ldr	r3, [r5, #3316]
23353
-	str	r3, [r4, #1256]
23657
+	ldr	r8, .L3691+12
23658
+	ldr	fp, .L3691+16
23659
+	add	r10, r4, #1256
23660
+	str	r3, [r4, #1264]
23354
23661
 	ldr	r3, [r5, #3340]
23355
-	str	r3, [r4, #1260]
23356
-.L3813:
23357
-	ldrh	r2, [r7, #2390]
23358
-	sxth	r3, r9
23662
+	str	r3, [r4, #1268]
23663
+.L3685:
23664
+	ldrh	r2, [r8, #2392]
23665
+	sxth	r3, r6
23359
23666
 	cmp	r3, r2
23360
-	bge	.L3819
23361
-	movs	r1, #1
23362
-	ldr	r0, .L3820+12
23363
-	orr	r3, r3, r8
23364
-	str	r3, [r4, #1252]
23365
-	mov	r2, r1
23366
-	bl	FlashReadPages
23367
-	ldr	r3, [r4, #1260]
23368
-	ldr	r0, .L3820+16
23369
-	mov	r1, r6
23370
-	ldr	r2, [r3]
23371
-	str	r2, [sp]
23372
-	ldr	r2, [r3, #4]
23373
-	str	r2, [sp, #4]
23374
-	ldr	r2, [r3, #8]
23375
-	str	r2, [sp, #8]
23376
-	ldr	r3, [r3, #12]
23377
-	ldr	r2, [r4, #1248]
23378
-	str	r3, [sp, #12]
23379
-	ldr	r3, [r4, #1256]
23380
-	ldr	r3, [r3]
23381
-	str	r3, [sp, #16]
23382
-	ldr	r3, [r4, #1252]
23383
-	bl	printk
23384
-	ldr	r3, [r4, #1260]
23385
-	ldr	r3, [r3]
23386
-	adds	r3, r3, #1
23387
-	beq	.L3814
23388
-	ldr	r0, .L3820+20
23389
-	movs	r2, #4
23390
-	ldr	r1, [r5, #3316]
23391
-	mov	r3, #768
23392
-	bl	rknand_print_hex
23393
-.L3814:
23394
-	add	r9, r9, #1
23395
-	b	.L3813
23396
-.L3819:
23667
+	blt	.L3687
23397
23668
 	add	sp, sp, #28
23398
23669
 	@ sp needed
23399
-	pop	{r4, r5, r6, r7, r8, r9, pc}
23400
-.L3821:
23670
+	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
23671
+.L3687:
23672
+	movs	r2, #1
23673
+	orr	r3, r3, r9
23674
+	mov	r1, r2
23675
+	mov	r0, r10
23676
+	str	r3, [r4, #1260]
23677
+	bl	FlashReadPages
23678
+	ldr	r2, [r4, #1264]
23679
+	mov	r1, r7
23680
+	ldr	r3, [r4, #1268]
23681
+	mov	r0, fp
23682
+	ldr	r2, [r2]
23683
+	str	r2, [sp, #16]
23684
+	ldr	r2, [r3, #12]
23685
+	str	r2, [sp, #12]
23686
+	ldr	r2, [r3, #8]
23687
+	str	r2, [sp, #8]
23688
+	ldr	r2, [r3, #4]
23689
+	str	r2, [sp, #4]
23690
+	ldr	r3, [r3]
23691
+	ldr	r2, [r4, #1256]
23692
+	str	r3, [sp]
23693
+	ldr	r3, [r4, #1260]
23694
+	bl	printk
23695
+	ldr	r3, [r4, #1268]
23696
+	ldr	r3, [r3]
23697
+	adds	r3, r3, #1
23698
+	beq	.L3686
23699
+	mov	r3, #768
23700
+	movs	r2, #4
23701
+	ldr	r1, [r5, #3316]
23702
+	ldr	r0, .L3691+8
23703
+	bl	rknand_print_hex
23704
+.L3686:
23705
+	adds	r6, r6, #1
23706
+	b	.L3685
23707
+.L3692:
23401
23708
 	.align	2
23402
-.L3820:
23709
+.L3691:
23403
23710
 	.word	.LANCHOR2
23404
23711
 	.word	.LANCHOR4
23405
-	.word	.LANCHOR0
23406
-	.word	.LANCHOR4+1248
23407
-	.word	.LC167
23408
23712
 	.word	.LC168
23713
+	.word	.LANCHOR0
23714
+	.word	.LC167
23409
23715
 	.fnend
23410
23716
 	.size	FtlDumpSysBlock, .-FtlDumpSysBlock
23411
23717
 	.align	1
23412
23718
 	.global	dump_map_info
23719
+	.syntax unified
23413
23720
 	.thumb
23414
23721
 	.thumb_func
23722
+	.fpu softvfp
23415
23723
 	.type	dump_map_info, %function
23416
23724
 dump_map_info:
23417
23725
 	.fnstart
..
..
@@ -23421,282 +23729,286 @@
23421
23729
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
23422
23730
 	.pad #52
23423
23731
 	sub	sp, sp, #52
23424
-	ldr	r4, .L3840
23425
-	addw	fp, r4, #2348
23426
-	ldrh	r7, [r4, #2328]
23427
-	mov	r9, r4
23428
-.L3823:
23429
-	ldrh	r3, [r4, #2330]
23430
-	ldr	r6, .L3840+4
23732
+	ldr	r4, .L3708
23733
+	ldr	r5, .L3708+4
23734
+	ldrh	r7, [r4, #2332]
23735
+	addw	fp, r4, #2350
23736
+.L3694:
23737
+	ldrh	r3, [r4, #2334]
23431
23738
 	cmp	r3, r7
23432
-	bls	.L3837
23433
-	ldr	r1, [r6, #1148]
23739
+	bhi	.L3702
23740
+	ldr	r6, .L3708+8
23741
+	mov	r9, #0
23742
+	ldr	fp, .L3708+24
23743
+	add	r10, r6, #1256
23744
+.L3703:
23745
+	ldrh	r3, [r5, #3452]
23746
+	sxth	r7, r9
23747
+	cmp	r7, r3
23748
+	bge	.L3706
23749
+	lsls	r7, r7, #1
23434
23750
 	mov	r8, #0
23435
-	ldrh	ip, [r9, #2320]
23436
-	mov	r10, #36
23437
-	ldr	r2, [r6, #3304]
23438
-	mov	r5, r8
23439
-	str	r1, [sp, #24]
23440
-	ldr	r3, [r6, #1144]
23441
-	ldrh	r1, [r9, #2400]
23442
-	str	r1, [sp, #28]
23443
-.L3833:
23444
-	uxth	r1, r8
23445
-	cmp	r1, ip
23446
-	bcs	.L3838
23751
+	b	.L3707
23752
+.L3697:
23447
23753
 	mov	r1, r7
23448
23754
 	ldrb	r0, [fp, r8]	@ zero_extendqisi2
23449
23755
 	str	r3, [sp, #44]
23450
23756
 	str	r2, [sp, #40]
23451
-	str	ip, [sp, #36]
23452
23757
 	bl	V2P_block
23453
-	str	r0, [sp, #32]
23758
+	str	r0, [sp, #36]
23454
23759
 	bl	FtlBbmIsBadBlock
23455
-	ldr	r1, [sp, #32]
23456
-	ldr	ip, [sp, #36]
23457
23760
 	ldr	r2, [sp, #40]
23458
23761
 	ldr	r3, [sp, #44]
23459
-	cbnz	r0, .L3824
23460
-	mla	r0, r10, r5, r2
23762
+	cbnz	r0, .L3695
23763
+	ldr	r1, [sp, #36]
23764
+	mla	r0, r10, r6, r9
23461
23765
 	lsls	r1, r1, #10
23766
+	str	r3, [r0, #8]
23462
23767
 	str	r1, [r0, #4]
23463
-	ldr	r1, [sp, #28]
23464
-	muls	r1, r5, r1
23465
-	add	r5, r5, #1
23768
+	ldr	r1, [sp, #32]
23769
+	muls	r1, r6, r1
23466
23770
 	it	mi
23467
23771
 	addmi	r1, r1, #3
23468
-	bic	lr, r1, #3
23469
-	ldr	r1, [sp, #24]
23470
-	uxth	r5, r5
23471
-	str	r3, [r0, #8]
23472
-	add	r1, r1, lr
23772
+	adds	r6, r6, #1
23773
+	bic	ip, r1, #3
23774
+	ldr	r1, [sp, #28]
23775
+	uxth	r6, r6
23776
+	add	r1, r1, ip
23473
23777
 	str	r1, [r0, #12]
23474
-.L3824:
23778
+.L3695:
23475
23779
 	add	r8, r8, #1
23476
-	b	.L3833
23477
-.L3838:
23478
-	cbz	r5, .L3828
23479
-	ldr	r0, [r6, #3304]
23480
-	mov	r1, r5
23481
-	movs	r2, #1
23482
-	mov	r8, #0
23483
-	bl	FlashReadPages
23484
-	mov	r10, #36
23485
-.L3829:
23486
-	uxth	r3, r8
23487
-	cmp	r3, r5
23488
-	bcs	.L3828
23489
-	ldr	r3, [r6, #3304]
23490
-	ldr	r0, .L3840+8
23491
-	mla	r3, r10, r8, r3
23492
-	add	r8, r8, #1
23493
-	adds	r2, r3, #4
23494
-	ldmia	r2, {r2, r3, lr}
23495
-	ldr	r1, [lr, #4]
23496
-	str	r1, [sp]
23497
-	ldr	r1, [lr, #8]
23498
-	str	r1, [sp, #4]
23499
-	ldr	r1, [lr, #12]
23500
-	str	r1, [sp, #8]
23501
-	ldr	r1, [r3]
23502
-	str	r1, [sp, #12]
23503
-	ubfx	r1, r2, #10, #16
23504
-	ldr	r3, [r3, #4]
23505
-	str	r3, [sp, #16]
23506
-	ldr	r3, [lr]
23507
-	bl	printk
23508
-	b	.L3829
23509
-.L3828:
23780
+.L3704:
23781
+	uxth	r1, r8
23782
+	cmp	r2, r1
23783
+	bhi	.L3697
23784
+	cbnz	r6, .L3698
23785
+.L3701:
23510
23786
 	adds	r7, r7, #1
23511
23787
 	uxth	r7, r7
23512
-	b	.L3823
23513
-.L3837:
23514
-	ldr	r7, .L3840+12
23788
+	b	.L3694
23789
+.L3698:
23790
+	ldr	r10, .L3708+28
23791
+	mov	r0, r9
23515
23792
 	mov	r8, #0
23516
-.L3832:
23517
-	ldrh	r2, [r6, #3452]
23518
-	sxth	r3, r8
23519
-	ldr	r5, .L3840+4
23520
-	cmp	r3, r2
23521
-	bge	.L3835
23522
-	lsls	r5, r3, #1
23523
-	mov	r9, #0
23524
-.L3836:
23525
-	ldrh	r2, [r4, #2390]
23526
-	sxth	r3, r9
23527
-	add	r9, r9, #1
23528
-	cmp	r3, r2
23529
-	bge	.L3839
23530
-	ldr	r2, [r6, #3368]
23531
-	movs	r1, #1
23532
-	ldr	r0, .L3840+16
23533
-	ldrh	r2, [r2, r5]
23534
-	orr	r3, r3, r2, lsl #10
23535
-	mov	r2, r1
23536
-	str	r3, [r7, #1252]
23793
+	mov	r9, #36
23794
+	movs	r2, #1
23795
+	mov	r1, r6
23537
23796
 	bl	FlashReadPages
23538
-	ldr	r3, [r7, #1260]
23539
-	ldr	r1, [r6, #3368]
23540
-	ldr	r2, [r7, #1256]
23541
-	ldr	r0, [r3]
23542
-	ldrh	r1, [r1, r5]
23543
-	str	r0, [sp]
23544
-	ldr	r0, [r3, #4]
23545
-	str	r0, [sp, #4]
23546
-	ldr	r0, [r3, #8]
23547
-	str	r0, [sp, #8]
23548
-	ldr	r3, [r3, #12]
23549
-	ldr	r0, .L3840+20
23550
-	str	r3, [sp, #12]
23551
-	ldr	r3, [r2]
23552
-	str	r3, [sp, #16]
23553
-	ldr	r3, [r2, #4]
23554
-	str	r3, [sp, #20]
23555
-	ldr	r2, [r7, #1248]
23556
-	ldr	r3, [r7, #1252]
23557
-	bl	printk
23558
-	b	.L3836
23559
-.L3839:
23797
+.L3699:
23798
+	uxth	r3, r8
23799
+	cmp	r6, r3
23800
+	bls	.L3701
23801
+	ldr	r3, [r5, #3304]
23802
+	mla	r3, r9, r8, r3
23560
23803
 	add	r8, r8, #1
23561
-	b	.L3832
23562
-.L3835:
23804
+	ldr	r1, [r3, #12]
23805
+	ldr	r2, [r3, #4]
23806
+	ldr	r3, [r3, #8]
23807
+	ldr	r0, [r3, #4]
23808
+	str	r0, [sp, #16]
23809
+	mov	r0, r10
23810
+	ldr	r3, [r3]
23811
+	str	r3, [sp, #12]
23812
+	ldr	r3, [r1, #12]
23813
+	str	r3, [sp, #8]
23814
+	ldr	r3, [r1, #8]
23815
+	str	r3, [sp, #4]
23816
+	ldr	r3, [r1, #4]
23817
+	str	r3, [sp]
23818
+	ldr	r3, [r1]
23819
+	ubfx	r1, r2, #10, #16
23820
+	bl	printk
23821
+	b	.L3699
23822
+.L3702:
23823
+	ldr	r1, [r5, #1148]
23824
+	mov	r8, #0
23825
+	ldrh	r2, [r4, #2324]
23826
+	mov	r6, r8
23827
+	ldr	r9, [r5, #3304]
23828
+	mov	r10, #36
23829
+	str	r1, [sp, #28]
23830
+	ldrh	r1, [r4, #2402]
23831
+	ldr	r3, [r5, #1144]
23832
+	str	r1, [sp, #32]
23833
+	b	.L3704
23834
+.L3705:
23835
+	ldr	r2, [r5, #3368]
23836
+	mov	r0, r10
23837
+	ldrh	r2, [r2, r7]
23838
+	orr	r3, r3, r2, lsl #10
23839
+	movs	r2, #1
23840
+	mov	r1, r2
23841
+	str	r3, [r6, #1260]
23842
+	bl	FlashReadPages
23843
+	ldr	r2, [r6, #1264]
23563
23844
 	ldr	r1, [r5, #3368]
23845
+	ldr	r3, [r6, #1268]
23846
+	ldr	r0, [r2, #4]
23847
+	ldrh	r1, [r1, r7]
23848
+	str	r0, [sp, #20]
23849
+	mov	r0, fp
23850
+	ldr	r2, [r2]
23851
+	str	r2, [sp, #16]
23852
+	ldr	r2, [r3, #12]
23853
+	str	r2, [sp, #12]
23854
+	ldr	r2, [r3, #8]
23855
+	str	r2, [sp, #8]
23856
+	ldr	r2, [r3, #4]
23857
+	str	r2, [sp, #4]
23858
+	ldr	r3, [r3]
23859
+	str	r3, [sp]
23860
+	ldr	r3, [r6, #1260]
23861
+	ldr	r2, [r6, #1256]
23862
+	bl	printk
23863
+.L3707:
23864
+	ldrh	r2, [r4, #2392]
23865
+	sxth	r3, r8
23866
+	add	r8, r8, #1
23867
+	cmp	r3, r2
23868
+	blt	.L3705
23869
+	add	r9, r9, #1
23870
+	b	.L3703
23871
+.L3706:
23872
+	ldr	r3, [r4, #2420]
23564
23873
 	movs	r2, #2
23565
-	ldr	r3, [r4, #2416]
23566
-	ldr	r0, .L3840+24
23874
+	ldr	r1, [r5, #3368]
23875
+	ldr	r0, .L3708+12
23567
23876
 	bl	rknand_print_hex
23877
+	ldrh	r3, [r4, #2428]
23878
+	movs	r2, #4
23568
23879
 	ldr	r1, [r5, #3388]
23569
-	ldrh	r3, [r4, #2424]
23570
-	movs	r2, #4
23571
-	ldr	r0, .L3840+28
23880
+	ldr	r0, .L3708+16
23572
23881
 	bl	rknand_print_hex
23573
-	ldr	r0, .L3840+32
23574
-	ldr	r1, [r5, #3392]
23882
+	ldrh	r3, [r4, #2428]
23575
23883
 	movs	r2, #4
23576
-	ldrh	r3, [r4, #2424]
23884
+	ldr	r1, [r5, #3392]
23885
+	ldr	r0, .L3708+20
23577
23886
 	add	sp, sp, #52
23578
23887
 	@ sp needed
23579
23888
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
23580
23889
 	b	rknand_print_hex
23581
-.L3841:
23890
+.L3709:
23582
23891
 	.align	2
23583
-.L3840:
23892
+.L3708:
23584
23893
 	.word	.LANCHOR0
23585
23894
 	.word	.LANCHOR2
23586
-	.word	.LC169
23587
23895
 	.word	.LANCHOR4
23588
-	.word	.LANCHOR4+1248
23589
-	.word	.LC113
23590
23896
 	.word	.LC170
23591
23897
 	.word	.LC171
23592
23898
 	.word	.LC172
23899
+	.word	.LC113
23900
+	.word	.LC169
23593
23901
 	.fnend
23594
23902
 	.size	dump_map_info, .-dump_map_info
23595
23903
 	.align	1
23596
23904
 	.global	flash_boot_enter_slc_mode
23905
+	.syntax unified
23597
23906
 	.thumb
23598
23907
 	.thumb_func
23908
+	.fpu softvfp
23599
23909
 	.type	flash_boot_enter_slc_mode, %function
23600
23910
 flash_boot_enter_slc_mode:
23601
23911
 	.fnstart
23602
23912
 	@ args = 0, pretend = 0, frame = 0
23603
23913
 	@ frame_needed = 0, uses_anonymous_args = 0
23604
23914
 	@ link register save eliminated.
23605
-	ldr	r3, .L3844
23606
-	ldr	r2, [r3, #2264]
23607
-	ldr	r3, .L3844+4
23915
+	ldr	r3, .L3712
23916
+	ldr	r2, [r3, #2268]
23917
+	ldr	r3, .L3712+4
23608
23918
 	cmp	r2, r3
23609
-	bne	.L3842
23919
+	bne	.L3710
23610
23920
 	b	flash_enter_slc_mode
23611
-.L3842:
23921
+.L3710:
23612
23922
 	bx	lr
23613
-.L3845:
23923
+.L3713:
23614
23924
 	.align	2
23615
-.L3844:
23925
+.L3712:
23616
23926
 	.word	.LANCHOR0
23617
23927
 	.word	1446522928
23618
23928
 	.fnend
23619
23929
 	.size	flash_boot_enter_slc_mode, .-flash_boot_enter_slc_mode
23620
23930
 	.align	1
23621
23931
 	.global	flash_boot_exit_slc_mode
23932
+	.syntax unified
23622
23933
 	.thumb
23623
23934
 	.thumb_func
23935
+	.fpu softvfp
23624
23936
 	.type	flash_boot_exit_slc_mode, %function
23625
23937
 flash_boot_exit_slc_mode:
23626
23938
 	.fnstart
23627
23939
 	@ args = 0, pretend = 0, frame = 0
23628
23940
 	@ frame_needed = 0, uses_anonymous_args = 0
23629
23941
 	@ link register save eliminated.
23630
-	ldr	r3, .L3848
23631
-	ldr	r2, [r3, #2264]
23632
-	ldr	r3, .L3848+4
23942
+	ldr	r3, .L3716
23943
+	ldr	r2, [r3, #2268]
23944
+	ldr	r3, .L3716+4
23633
23945
 	cmp	r2, r3
23634
-	bne	.L3846
23946
+	bne	.L3714
23635
23947
 	b	flash_exit_slc_mode
23636
-.L3846:
23948
+.L3714:
23637
23949
 	bx	lr
23638
-.L3849:
23950
+.L3717:
23639
23951
 	.align	2
23640
-.L3848:
23952
+.L3716:
23641
23953
 	.word	.LANCHOR0
23642
23954
 	.word	1446522928
23643
23955
 	.fnend
23644
23956
 	.size	flash_boot_exit_slc_mode, .-flash_boot_exit_slc_mode
23645
23957
 	.align	1
23646
23958
 	.global	write_idblock
23959
+	.syntax unified
23647
23960
 	.thumb
23648
23961
 	.thumb_func
23962
+	.fpu softvfp
23649
23963
 	.type	write_idblock, %function
23650
23964
 write_idblock:
23651
23965
 	.fnstart
23652
-	@ args = 0, pretend = 0, frame = 120
23966
+	@ args = 0, pretend = 0, frame = 112
23653
23967
 	@ frame_needed = 0, uses_anonymous_args = 0
23654
23968
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
23655
23969
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
23656
-	mov	r8, r0
23657
-	ldr	r7, .L3899
23658
-	.pad #132
23659
-	sub	sp, sp, #132
23970
+	mov	r7, r0
23971
+	ldr	r4, .L3766
23972
+	.pad #124
23973
+	sub	sp, sp, #124
23660
23974
 	mov	r0, #256000
23661
-	mov	fp, r1
23662
-	mov	r6, r2
23663
-	ldr	r3, [r7, #44]
23664
-	ldr	r4, [r7, #4]
23665
-	ldrb	r5, [r3, #9]	@ zero_extendqisi2
23975
+	mov	r9, r1
23976
+	mov	r5, r2
23977
+	ldr	r3, [r4, #48]
23978
+	ldr	r8, [r4, #40]
23979
+	ldrb	r6, [r3, #9]	@ zero_extendqisi2
23666
23980
 	bl	ftl_malloc
23667
-	str	r0, [sp, #12]
23981
+	str	r0, [sp, #8]
23668
23982
 	cmp	r0, #0
23669
-	beq	.L3877
23670
-	addw	r2, r8, #511
23671
-	lsr	r10, r2, #9
23672
-	cmp	r10, #8
23673
-	bls	.L3875
23674
-	cmp	r10, #500
23675
-	bhi	.L3877
23676
-	b	.L3852
23677
-.L3875:
23678
-	mov	r10, #8
23679
-.L3852:
23680
-	ldr	r2, [fp]
23681
-	ldr	r3, .L3899+4
23983
+	beq	.L3745
23984
+	addw	r7, r7, #511
23985
+	lsr	fp, r7, #9
23986
+	cmp	fp, #8
23987
+	bls	.L3743
23988
+	cmp	fp, #500
23989
+	bhi	.L3745
23990
+.L3720:
23991
+	ldr	r2, [r9]
23992
+	ldr	r3, .L3766+4
23682
23993
 	cmp	r2, r3
23683
-	bne	.L3877
23684
-	smulbb	r3, r5, r4
23685
-	uxth	r3, r3
23686
-	str	r3, [sp, #16]
23994
+	bne	.L3745
23995
+	smulbb	r6, r6, r8
23996
+	uxth	r3, r6
23687
23997
 	subs	r0, r3, #1
23688
23998
 	mov	r1, r3
23689
-	add	r0, r0, r10
23999
+	add	r0, r0, fp
24000
+	str	r3, [sp, #12]
23690
24001
 	bl	__aeabi_uidiv
24002
+	str	r0, [sp, #32]
24003
+	add	r0, r9, #254976
24004
+	add	r0, r0, #512
23691
24005
 	movs	r3, #0
23692
24006
 	movw	r2, #63871
23693
-	str	r0, [sp, #40]
23694
-	add	r0, fp, #254976
23695
-	add	r0, r0, #512
23696
-.L3856:
24007
+.L3724:
23697
24008
 	ldr	r1, [r0, #-4]!
23698
-	cbnz	r1, .L3853
23699
-	ldr	r1, [fp, r3, lsl #2]
24009
+	cmp	r1, #0
24010
+	bne	.L3721
24011
+	ldr	r1, [r9, r3, lsl #2]
23700
24012
 	adds	r3, r3, #1
23701
24013
 	cmp	r3, #4096
23702
24014
 	add	r2, r2, #-1
..
..
@@ -23704,491 +24016,478 @@
23704
24016
 	movhi	r3, #0
23705
24017
 	cmp	r2, #4096
23706
24018
 	str	r1, [r0, #512]
23707
-	bne	.L3856
23708
-	b	.L3855
23709
-.L3853:
23710
-	ldr	r0, .L3899+8
23711
-	bl	printk
23712
-.L3855:
24019
+	bne	.L3724
24020
+.L3723:
23713
24021
 	movs	r3, #5
23714
-	ldr	r0, .L3899+12
23715
-	mov	r1, r6
24022
+	mov	r1, r5
23716
24023
 	movs	r2, #4
24024
+	ldr	r0, .L3766+8
23717
24025
 	bl	rknand_print_hex
23718
-	ldr	r1, [fp, #512]
23719
-	ldrb	r2, [r7, #1]	@ zero_extendqisi2
23720
-	subs	r4, r6, #4
23721
-	ldr	r0, .L3899+16
24026
+	ldrb	r2, [r4, #37]	@ zero_extendqisi2
24027
+	subs	r5, r5, #4
24028
+	ldr	r1, [r9, #512]
24029
+	ldr	r0, .L3766+12
23722
24030
 	bl	printk
23723
-	ldr	r2, .L3899+20
23724
-	ldrh	r3, [r7, #142]
23725
-	mov	r1, r10
23726
-	ldr	r0, .L3899+24
23727
-	ldr	r2, [r2, #1204]
23728
-	ldr	r5, .L3899
24031
+	ldr	r2, .L3766+16
24032
+	mov	r1, fp
24033
+	ldrh	r3, [r4, #150]
24034
+	ldr	r0, .L3766+20
24035
+	ldr	r2, [r2, #1212]
23729
24036
 	str	r2, [sp]
23730
-	mov	r2, r10
24037
+	mov	r2, fp
23731
24038
 	bl	printk
23732
-	ldrb	r3, [r7, #1]	@ zero_extendqisi2
23733
-	ldr	r2, [fp, #512]
24039
+	ldrb	r3, [r4, #37]	@ zero_extendqisi2
24040
+	ldr	r2, [r9, #512]
24041
+	ldr	r4, .L3766
23734
24042
 	cmp	r2, r3
23735
24043
 	it	hi
23736
-	strhi	r3, [fp, #512]
23737
-	lsl	r3, r10, #7
23738
-	str	r3, [sp, #44]
24044
+	strhi	r3, [r9, #512]
24045
+	lsl	r3, fp, #7
24046
+	str	r3, [sp, #40]
23739
24047
 	movs	r3, #0
23740
-	str	r3, [sp, #24]
23741
24048
 	str	r3, [sp, #20]
23742
-.L3873:
23743
-	ldr	r2, [r4, #4]
23744
-	ldrb	r3, [r5, #1]	@ zero_extendqisi2
23745
-	ldr	r7, .L3899
24049
+	str	r3, [sp, #16]
24050
+.L3741:
24051
+	ldr	r2, [r5, #4]
24052
+	ldrb	r3, [r4, #37]	@ zero_extendqisi2
23746
24053
 	cmp	r2, r3
23747
-	bcs	.L3858
23748
-	ldr	r3, .L3899+20
23749
-	ldr	r3, [r3, #1204]
24054
+	bcs	.L3726
24055
+	ldr	r3, .L3766+16
24056
+	ldr	r3, [r3, #1212]
23750
24057
 	cmp	r2, r3
23751
-	bcc	.L3858
23752
-	ldr	r3, [sp, #40]
24058
+	bcc	.L3726
24059
+	ldr	r3, [sp, #32]
23753
24060
 	cmp	r3, #1
23754
-	bls	.L3859
23755
-	ldr	r3, [sp, #20]
23756
-	cbz	r3, .L3859
23757
-	ldr	r3, [r4]
24061
+	bls	.L3727
24062
+	ldr	r3, [sp, #16]
24063
+	cbz	r3, .L3727
24064
+	ldr	r3, [r5]
23758
24065
 	adds	r3, r3, #1
23759
24066
 	cmp	r2, r3
23760
-	beq	.L3858
23761
-.L3859:
23762
-	movs	r1, #0
24067
+	beq	.L3726
24068
+.L3727:
23763
24069
 	mov	r2, #512
23764
-	ldr	r0, [sp, #12]
24070
+	movs	r1, #0
24071
+	ldr	r0, [sp, #8]
23765
24072
 	bl	memset
23766
-	ldr	r6, [r4, #4]
23767
-	mov	r2, r10
23768
-	ldr	r0, .L3899+28
23769
-	ldr	r3, [sp, #16]
24073
+	ldr	r6, [r5, #4]
24074
+	mov	r2, fp
24075
+	ldr	r3, [sp, #12]
24076
+	ldr	r7, [r4, #40]
24077
+	ldr	r0, .L3766+24
23770
24078
 	muls	r6, r3, r6
23771
-	ldr	r3, [r7, #44]
23772
-	ldr	r7, [r7, #4]
23773
-	ldrb	r9, [r3, #9]	@ zero_extendqisi2
24079
+	ldr	r3, [r4, #48]
24080
+	ldrb	r10, [r3, #9]	@ zero_extendqisi2
23774
24081
 	mov	r1, r6
23775
24082
 	bl	printk
23776
24083
 	movs	r0, #0
24084
+	smulbb	r7, r7, r10
23777
24085
 	bl	flash_boot_enter_slc_mode
23778
-	mov	r1, r9
24086
+	mov	r1, r10
23779
24087
 	mov	r0, r6
23780
24088
 	bl	__aeabi_uidiv
23781
-	smulbb	r7, r7, r9
23782
24089
 	uxth	r7, r7
24090
+	movs	r2, #0
23783
24091
 	mov	r1, r0
23784
-	movs	r0, #0
23785
-	mov	r2, r0
24092
+	mov	r0, r2
23786
24093
 	bl	FlashEraseBlock
23787
-	cmp	r10, r7
23788
-	bls	.L3878
23789
-	movs	r0, #0
23790
-	adds	r1, r6, r7
24094
+	cmp	r7, fp
24095
+	bcs	.L3746
24096
+	movs	r2, #0
23791
24097
 	mov	r8, #2
23792
-	mov	r2, r0
24098
+	adds	r1, r6, r7
24099
+	mov	r0, r2
23793
24100
 	bl	FlashEraseBlock
23794
-	b	.L3860
23795
-.L3878:
23796
-	mov	r8, #1
23797
-.L3860:
24101
+.L3728:
23798
24102
 	movs	r0, #0
23799
24103
 	bl	flash_boot_exit_slc_mode
23800
-	ldr	r3, [r5, #44]
24104
+	ldr	r3, [r4, #48]
23801
24105
 	ldrh	r0, [r3, #10]
23802
24106
 	ldrb	r1, [r3, #12]	@ zero_extendqisi2
23803
24107
 	lsls	r0, r0, #2
23804
24108
 	mul	r0, r8, r0
24109
+	mov	r8, #0
23805
24110
 	bl	__aeabi_idiv
23806
24111
 	mov	r1, r7
23807
-	mov	r8, #0
23808
-	str	r0, [sp, #48]
24112
+	str	r0, [sp, #44]
23809
24113
 	mov	r0, r6
23810
24114
 	bl	__aeabi_uidivmod
23811
-	mov	ip, r1
23812
24115
 	subs	r3, r6, r1
23813
-	str	fp, [sp, #28]
23814
-	str	r3, [sp, #32]
23815
-.L3861:
23816
-	ldr	r3, [sp, #48]
23817
-	ldr	r7, .L3899
23818
-	cmp	r8, r3
23819
-	bcs	.L3897
23820
-	add	r3, r8, ip
23821
-	ubfx	r3, r3, #2, #16
23822
-	cbz	r3, .L3862
23823
-	adds	r2, r3, #1
23824
-	add	r1, r5, r2, lsl #1
23825
-	ldrh	r7, [r1, #148]
23826
-	ldrb	r1, [r5, #144]	@ zero_extendqisi2
23827
-	cbz	r1, .L3863
23828
-	ldr	r1, [r5, #2264]
23829
-	ldr	r0, .L3899+32
23830
-	cmp	r1, r0
23831
-	it	eq
23832
-	moveq	r7, r2
23833
-.L3863:
23834
-	add	r7, r7, #1073741824
23835
-	subs	r7, r7, #1
23836
-	lsls	r7, r7, #2
23837
-	str	r7, [sp, #64]
23838
-.L3862:
23839
-	movw	r2, #61424
23840
-	str	r2, [sp, #68]
23841
-	add	r2, r5, r3, lsl #1
23842
-	ldrh	r7, [r2, #148]
23843
-	ldrb	r2, [r5, #144]	@ zero_extendqisi2
23844
-	cbz	r2, .L3864
23845
-	ldr	r2, [r5, #2264]
23846
-	ldr	r1, .L3899+32
23847
-	cmp	r2, r1
23848
-	it	eq
23849
-	moveq	r7, r3
23850
-.L3864:
23851
-	ldr	r3, [sp, #32]
23852
-	add	r8, r8, #4
23853
-	str	ip, [sp, #56]
23854
-	uxth	r8, r8
23855
-	mla	r2, r9, r7, r3
23856
-	ldr	r3, .L3899
23857
-	ldrb	r3, [r3, #2312]	@ zero_extendqisi2
23858
-	str	r2, [sp, #52]
24116
+	str	r1, [sp, #28]
23859
24117
 	str	r3, [sp, #36]
23860
-	ldr	r3, .L3899+20
23861
-	ldrb	r0, [r3, #1210]	@ zero_extendqisi2
23862
-	bl	FlashBchSel
24118
+	str	r9, [sp, #24]
24119
+.L3729:
24120
+	ldr	r3, [sp, #44]
24121
+	cmp	r3, r8
24122
+	bhi	.L3733
24123
+	mov	r1, r6
24124
+	movs	r3, #0
24125
+	mov	r2, fp
24126
+	ldr	r0, .L3766+28
24127
+	bl	printk
24128
+	ldr	r6, [r5, #4]
24129
+	mov	r2, fp
24130
+	ldr	r3, [sp, #12]
24131
+	mov	r8, #0
24132
+	ldr	r1, [r4, #40]
24133
+	ldr	r0, .L3766+32
24134
+	muls	r6, r3, r6
24135
+	ldr	r3, [r4, #48]
24136
+	ldrb	r3, [r3, #9]	@ zero_extendqisi2
24137
+	str	r3, [sp, #24]
24138
+	ldrh	r3, [sp, #24]
24139
+	smulbb	r1, r1, r3
24140
+	uxth	r7, r1
24141
+	mov	r1, r6
24142
+	bl	printk
24143
+	mov	r1, r7
24144
+	mov	r0, r6
24145
+	bl	__aeabi_uidivmod
24146
+	subs	r3, r6, r1
24147
+	ldr	r10, [sp, #8]
24148
+	str	r3, [sp, #44]
24149
+	ldr	r3, [sp, #24]
24150
+	str	r1, [sp, #28]
24151
+	muls	r3, r1, r3
24152
+	ubfx	r3, r3, #2, #2
24153
+.L3734:
24154
+	cmp	r8, fp
24155
+	bcc	.L3736
24156
+	movs	r3, #0
24157
+	mov	r1, r6
24158
+	mov	r2, fp
24159
+	ldr	r0, .L3766+36
24160
+	bl	printk
24161
+	ldr	r0, [sp, #8]
24162
+	mov	r3, r9
24163
+	movs	r6, #0
24164
+.L3739:
24165
+	mov	r7, r0
24166
+	mov	r8, r3
24167
+	ldr	r1, [r7]
24168
+	adds	r0, r0, #4
24169
+	ldr	r2, [r8]
24170
+	adds	r3, r3, #4
24171
+	cmp	r1, r2
24172
+	beq	.L3737
24173
+	mov	r2, #512
24174
+	movs	r1, #0
24175
+	ldr	r0, [sp, #8]
24176
+	bl	memset
24177
+	ldr	r3, [r8]
24178
+	ldr	r1, [sp, #16]
24179
+	ldr	r0, .L3766+40
24180
+	str	r3, [sp, #4]
24181
+	ldr	r3, [r7]
24182
+	str	r3, [sp]
24183
+	mov	r3, r6
24184
+	bic	r6, r6, #255
24185
+	ldr	r2, [r5, #4]
24186
+	lsls	r6, r6, #2
24187
+	bl	printk
24188
+	mov	r3, #256
24189
+	movs	r2, #4
24190
+	add	r1, r9, r6
24191
+	ldr	r0, .L3766+44
24192
+	bl	rknand_print_hex
24193
+	ldr	r1, [sp, #8]
24194
+	mov	r3, #256
24195
+	movs	r2, #4
24196
+	ldr	r0, .L3766+48
24197
+	add	r1, r1, r6
24198
+	bl	rknand_print_hex
23863
24199
 	movs	r0, #0
23864
24200
 	bl	flash_boot_enter_slc_mode
23865
-	ldr	r3, .L3899
23866
-	ldr	r3, [r3, #44]
23867
-	ldrb	r1, [r3, #9]	@ zero_extendqisi2
23868
-	ldr	r2, [sp, #52]
24201
+	ldr	r1, [r5, #4]
24202
+	movs	r2, #0
24203
+	ldr	r3, [sp, #12]
23869
24204
 	mov	r0, r2
23870
-	bl	__aeabi_uidiv
23871
-	add	r3, sp, #64
23872
-	mov	r1, r0
23873
-	ldr	r2, [sp, #28]
23874
-	movs	r0, #0
23875
-	bl	FlashProgPage
24205
+	muls	r1, r3, r1
24206
+	bl	FlashEraseBlock
24207
+	ldr	r3, [sp, #32]
24208
+	cmp	r3, #1
24209
+	bls	.L3738
24210
+	ldr	r1, [r5, #4]
24211
+	movs	r2, #0
24212
+	ldr	r3, [sp, #12]
24213
+	mov	r0, r2
24214
+	mla	r1, r1, r3, r3
24215
+	bl	FlashEraseBlock
24216
+.L3738:
23876
24217
 	movs	r0, #0
23877
24218
 	bl	flash_boot_exit_slc_mode
23878
-	ldr	r0, [sp, #36]
23879
-	bl	FlashBchSel
23880
-	mov	r1, r9
23881
-	ldr	r0, [sp, #32]
23882
-	bl	__aeabi_uidiv
23883
-	adds	r2, r7, #1
23884
-	uxth	r2, r2
23885
-	mov	r1, r0
23886
-	movs	r0, #0
23887
-	bl	FlashPageProgMsbFFData
23888
-	ldr	r3, [sp, #28]
23889
-	ldr	ip, [sp, #56]
23890
-	add	r3, r3, #2048
23891
-	str	r3, [sp, #28]
23892
-	b	.L3861
23893
-.L3900:
24219
+	ldr	r1, [r5, #4]
24220
+	ldr	r0, .L3766+52
24221
+	bl	printk
24222
+.L3726:
24223
+	ldr	r3, [sp, #16]
24224
+	adds	r5, r5, #4
24225
+	adds	r3, r3, #1
24226
+	cmp	r3, #5
24227
+	str	r3, [sp, #16]
24228
+	bne	.L3741
24229
+	ldr	r0, [sp, #8]
24230
+	bl	ftl_free
24231
+	ldr	r3, [sp, #20]
24232
+	clz	r0, r3
24233
+	lsrs	r0, r0, #5
24234
+	negs	r0, r0
24235
+.L3718:
24236
+	add	sp, sp, #124
24237
+	@ sp needed
24238
+	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
24239
+.L3743:
24240
+	mov	fp, #8
24241
+	b	.L3720
24242
+.L3721:
24243
+	ldr	r0, .L3766+56
24244
+	bl	printk
24245
+	b	.L3723
24246
+.L3746:
24247
+	mov	r8, #1
24248
+	b	.L3728
24249
+.L3767:
23894
24250
 	.align	2
23895
-.L3899:
24251
+.L3766:
23896
24252
 	.word	.LANCHOR0
23897
24253
 	.word	-52655045
23898
-	.word	.LC173
23899
24254
 	.word	.LC174
23900
24255
 	.word	.LC175
23901
24256
 	.word	.LANCHOR4
23902
24257
 	.word	.LC176
23903
24258
 	.word	.LC177
23904
-	.word	1446522928
23905
-.L3897:
23906
-	mov	r1, r6
23907
-	mov	r2, r10
23908
-	movs	r3, #0
23909
-	ldr	r0, .L3901
23910
-	bl	printk
23911
-	ldr	r6, [r4, #4]
23912
-	ldr	r0, .L3901+4
23913
-	mov	r9, #0
23914
-	ldr	r3, [sp, #16]
23915
-	muls	r6, r3, r6
23916
-	ldr	r3, [r7, #44]
23917
-	ldrb	r3, [r3, #9]	@ zero_extendqisi2
23918
-	mov	r1, r6
23919
-	str	r3, [sp, #28]
23920
-	ldr	r3, [r7, #4]
23921
-	ldrh	r2, [sp, #28]
23922
-	smulbb	r8, r3, r2
23923
-	mov	r2, r10
23924
-	bl	printk
23925
-	mov	r0, r6
23926
-	uxth	r8, r8
23927
-	mov	r1, r8
23928
-	bl	__aeabi_uidivmod
23929
-	subs	r3, r6, r1
23930
-	str	r3, [sp, #48]
23931
-	ldr	r3, [sp, #28]
23932
-	str	r1, [sp, #32]
23933
-	mul	ip, r3, r1
23934
-	ldr	r3, [sp, #12]
23935
-	ubfx	ip, ip, #2, #2
23936
-	str	r3, [sp, #36]
23937
-.L3866:
23938
-	cmp	r9, r10
23939
-	bcs	.L3898
23940
-	ldr	r3, [sp, #32]
23941
-	rsb	r8, ip, #4
23942
-	ldrb	r1, [r5, #144]	@ zero_extendqisi2
23943
-	add	r3, r9, r3
23944
-	uxth	r8, r8
23945
-	ubfx	r3, r3, #2, #16
23946
-	add	r2, r5, r3, lsl #1
23947
-	ldrh	r2, [r2, #148]
23948
-	cbz	r1, .L3867
23949
-	ldr	r1, [r5, #2264]
23950
-	ldr	r0, .L3901+8
23951
-	cmp	r1, r0
23952
-	it	eq
23953
-	moveq	r2, r3
23954
-.L3867:
23955
-	ldr	r3, [sp, #48]
23956
-	add	r9, r9, r8
23957
-	ldr	r1, [sp, #28]
23958
-	add	r3, ip, r3
23959
-	ldrb	ip, [r7, #2312]	@ zero_extendqisi2
23960
-	uxth	r9, r9
23961
-	mla	r3, r1, r2, r3
23962
-	ldr	r2, [r7, #44]
23963
-	str	ip, [sp, #52]
23964
-	ldrb	r1, [r2, #9]	@ zero_extendqisi2
23965
-	ldr	r2, .L3901+12
23966
-	str	r3, [sp, #60]
23967
-	str	r1, [sp, #56]
23968
-	ldrb	r0, [r2, #1210]	@ zero_extendqisi2
23969
-	bl	FlashBchSel
23970
-	movs	r0, #0
23971
-	bl	flash_boot_enter_slc_mode
23972
-	ldr	r3, [sp, #60]
23973
-	ldr	r1, [sp, #56]
23974
-	mov	r0, r3
23975
-	bl	__aeabi_uidiv
23976
-	mov	r1, r0
23977
-	movs	r0, #0
23978
-	ldr	r2, [sp, #36]
23979
-	mov	r3, r0
23980
-	bl	FlashReadPage
23981
-	movs	r0, #0
23982
-	bl	flash_boot_exit_slc_mode
23983
-	ldr	ip, [sp, #52]
23984
-	mov	r0, ip
23985
-	bl	FlashBchSel
23986
-	mov	ip, #0
23987
-	ldr	r3, [sp, #36]
23988
-	add	r3, r3, r8, lsl #9
23989
-	str	r3, [sp, #36]
23990
-	b	.L3866
23991
-.L3898:
23992
-	mov	r1, r6
23993
-	movs	r3, #0
23994
-	ldr	r0, .L3901+16
23995
-	mov	r2, r10
23996
-	bl	printk
23997
-	movs	r6, #0
23998
-	mov	r3, fp
23999
-	ldr	r0, [sp, #12]
24000
-.L3872:
24001
-	mov	r8, r0
24002
-	mov	r7, r3
24003
-	ldr	r1, [r8]
24004
-	adds	r0, r0, #4
24005
-	ldr	r2, [r7]
24006
-	adds	r3, r3, #4
24007
-	cmp	r1, r2
24008
-	beq	.L3869
24009
-	movs	r1, #0
24010
-	mov	r2, #512
24011
-	ldr	r0, [sp, #12]
24012
-	bl	memset
24013
-	ldr	r3, [r8]
24014
-	ldr	r0, .L3901+20
24015
-	str	r3, [sp]
24016
-	ldr	r3, [r7]
24017
-	bic	r7, r6, #255
24018
-	ldr	r1, [sp, #20]
24019
-	lsls	r7, r7, #2
24020
-	str	r3, [sp, #4]
24021
-	mov	r3, r6
24022
-	ldr	r2, [r4, #4]
24023
-	bl	printk
24024
-	ldr	r0, .L3901+24
24025
-	add	r1, fp, r7
24026
-	movs	r2, #4
24027
-	mov	r3, #256
24028
-	bl	rknand_print_hex
24029
-	movs	r2, #4
24030
-	ldr	r0, .L3901+28
24031
-	ldr	r3, [sp, #12]
24032
-	adds	r1, r3, r7
24033
-	mov	r3, #256
24034
-	bl	rknand_print_hex
24035
-	movs	r0, #0
24036
-	bl	flash_boot_enter_slc_mode
24037
-	ldr	r1, [r4, #4]
24038
-	movs	r0, #0
24039
-	mov	r2, r0
24040
-	ldr	r3, [sp, #16]
24041
-	muls	r1, r3, r1
24042
-	bl	FlashEraseBlock
24043
-	ldr	r3, [sp, #40]
24044
-	cmp	r3, #1
24045
-	bls	.L3870
24046
-	ldr	r1, [r4, #4]
24047
-	movs	r0, #0
24048
-	ldr	r3, [sp, #16]
24049
-	mov	r2, r0
24050
-	mla	r1, r1, r3, r3
24051
-	bl	FlashEraseBlock
24052
-.L3870:
24053
-	movs	r0, #0
24054
-	bl	flash_boot_exit_slc_mode
24055
-	ldr	r0, .L3901+32
24056
-	ldr	r1, [r4, #4]
24057
-	bl	printk
24058
-	ldr	r3, [sp, #44]
24059
-	cmp	r6, r3
24060
-	bcc	.L3858
24061
-	b	.L3871
24062
-.L3869:
24063
-	ldr	r2, [sp, #44]
24064
-	adds	r6, r6, #1
24065
-	cmp	r6, r2
24066
-	bne	.L3872
24067
-.L3871:
24068
-	ldr	r3, [sp, #24]
24069
-	adds	r3, r3, #1
24070
-	str	r3, [sp, #24]
24071
-.L3858:
24072
-	ldr	r3, [sp, #20]
24073
-	adds	r4, r4, #4
24074
-	adds	r3, r3, #1
24075
-	str	r3, [sp, #20]
24076
-	cmp	r3, #5
24077
-	bne	.L3873
24078
-	ldr	r0, [sp, #12]
24079
-	bl	ftl_free
24080
-	ldr	r3, [sp, #24]
24081
-	clz	r0, r3
24082
-	lsrs	r0, r0, #5
24083
-	negs	r0, r0
24084
-	b	.L3851
24085
-.L3877:
24086
-	mov	r0, #-1
24087
-.L3851:
24088
-	add	sp, sp, #132
24089
-	@ sp needed
24090
-	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
24091
-.L3902:
24092
-	.align	2
24093
-.L3901:
24094
24259
 	.word	.LC178
24095
24260
 	.word	.LC179
24096
-	.word	1446522928
24097
-	.word	.LANCHOR4
24098
24261
 	.word	.LC180
24099
24262
 	.word	.LC181
24100
24263
 	.word	.LC182
24101
24264
 	.word	.LC183
24102
24265
 	.word	.LC184
24266
+	.word	.LC173
24267
+.L3733:
24268
+	ldr	r3, [sp, #28]
24269
+	add	r2, r3, r8
24270
+	lsrs	r2, r2, #2
24271
+	beq	.L3730
24272
+	ldrb	r0, [r4, #152]	@ zero_extendqisi2
24273
+	adds	r1, r2, #1
24274
+	add	r3, r4, r1, lsl #1
24275
+	ldrh	r3, [r3, #156]
24276
+	cbz	r0, .L3731
24277
+	ldr	r0, [r4, #2268]
24278
+	ldr	r7, .L3768
24279
+	cmp	r0, r7
24280
+	it	eq
24281
+	moveq	r3, r1
24282
+.L3731:
24283
+	add	r3, r3, #1073741824
24284
+	subs	r3, r3, #1
24285
+	lsls	r3, r3, #2
24286
+	str	r3, [sp, #56]
24287
+.L3730:
24288
+	movw	r3, #61424
24289
+	str	r3, [sp, #60]
24290
+	add	r3, r4, r2, lsl #1
24291
+	ldrh	r7, [r3, #156]
24292
+	ldrb	r3, [r4, #152]	@ zero_extendqisi2
24293
+	cbz	r3, .L3732
24294
+	ldr	r3, [r4, #2268]
24295
+	ldr	r1, .L3768
24296
+	cmp	r3, r1
24297
+	it	eq
24298
+	moveq	r7, r2
24299
+.L3732:
24300
+	ldr	r3, [sp, #36]
24301
+	add	r8, r8, #4
24302
+	ldr	r2, .L3768+4
24303
+	uxth	r8, r8
24304
+	mla	r3, r7, r10, r3
24305
+	ldrb	r0, [r2, #1218]	@ zero_extendqisi2
24306
+	adds	r7, r7, #1
24307
+	uxth	r7, r7
24308
+	str	r3, [sp, #52]
24309
+	ldrb	r3, [r4, #2316]	@ zero_extendqisi2
24310
+	str	r3, [sp, #48]
24311
+	bl	FlashBchSel
24312
+	movs	r0, #0
24313
+	bl	flash_boot_enter_slc_mode
24314
+	ldr	r2, [r4, #48]
24315
+	ldr	r3, [sp, #52]
24316
+	ldrb	r1, [r2, #9]	@ zero_extendqisi2
24317
+	mov	r0, r3
24318
+	bl	__aeabi_uidiv
24319
+	add	r3, sp, #56
24320
+	ldr	r2, [sp, #24]
24321
+	mov	r1, r0
24322
+	movs	r0, #0
24323
+	bl	FlashProgPage
24324
+	movs	r0, #0
24325
+	bl	flash_boot_exit_slc_mode
24326
+	ldr	r0, [sp, #48]
24327
+	bl	FlashBchSel
24328
+	mov	r1, r10
24329
+	ldr	r0, [sp, #36]
24330
+	bl	__aeabi_uidiv
24331
+	mov	r2, r7
24332
+	mov	r1, r0
24333
+	movs	r0, #0
24334
+	bl	FlashPageProgMsbFFData
24335
+	ldr	r3, [sp, #24]
24336
+	add	r3, r3, #2048
24337
+	str	r3, [sp, #24]
24338
+	b	.L3729
24339
+.L3736:
24340
+	rsb	r7, r3, #4
24341
+	ldrb	r0, [r4, #152]	@ zero_extendqisi2
24342
+	uxth	r2, r7
24343
+	str	r2, [sp, #36]
24344
+	ldr	r2, [sp, #28]
24345
+	add	r2, r2, r8
24346
+	lsrs	r2, r2, #2
24347
+	add	r1, r4, r2, lsl #1
24348
+	ldrh	r1, [r1, #156]
24349
+	cbz	r0, .L3735
24350
+	ldr	r0, [r4, #2268]
24351
+	ldr	r7, .L3768
24352
+	cmp	r0, r7
24353
+	it	eq
24354
+	moveq	r1, r2
24355
+.L3735:
24356
+	ldr	r2, [sp, #44]
24357
+	add	r3, r3, r2
24358
+	ldr	r2, [sp, #24]
24359
+	mla	r3, r1, r2, r3
24360
+	ldr	r2, [r4, #48]
24361
+	ldrb	r1, [r2, #9]	@ zero_extendqisi2
24362
+	ldr	r2, .L3768+4
24363
+	str	r3, [sp, #52]
24364
+	ldrb	r3, [r4, #2316]	@ zero_extendqisi2
24365
+	ldrb	r0, [r2, #1218]	@ zero_extendqisi2
24366
+	str	r1, [sp, #48]
24367
+	mov	r7, r3
24368
+	bl	FlashBchSel
24369
+	movs	r0, #0
24370
+	bl	flash_boot_enter_slc_mode
24371
+	ldr	r3, [sp, #52]
24372
+	ldr	r1, [sp, #48]
24373
+	mov	r0, r3
24374
+	bl	__aeabi_uidiv
24375
+	movs	r3, #0
24376
+	mov	r2, r10
24377
+	mov	r1, r0
24378
+	mov	r0, r3
24379
+	bl	FlashReadPage
24380
+	movs	r0, #0
24381
+	bl	flash_boot_exit_slc_mode
24382
+	mov	r0, r7
24383
+	bl	FlashBchSel
24384
+	ldr	r3, [sp, #36]
24385
+	add	r8, r8, r3
24386
+	add	r10, r10, r3, lsl #9
24387
+	uxth	r8, r8
24388
+	movs	r3, #0
24389
+	b	.L3734
24390
+.L3737:
24391
+	ldr	r2, [sp, #40]
24392
+	adds	r6, r6, #1
24393
+	cmp	r2, r6
24394
+	bne	.L3739
24395
+	ldr	r3, [sp, #20]
24396
+	adds	r3, r3, #1
24397
+	str	r3, [sp, #20]
24398
+	b	.L3726
24399
+.L3745:
24400
+	mov	r0, #-1
24401
+	b	.L3718
24402
+.L3769:
24403
+	.align	2
24404
+.L3768:
24405
+	.word	1446522928
24406
+	.word	.LANCHOR4
24103
24407
 	.fnend
24104
24408
 	.size	write_idblock, .-write_idblock
24105
24409
 	.align	1
24106
24410
 	.global	write_loader_lba
24411
+	.syntax unified
24107
24412
 	.thumb
24108
24413
 	.thumb_func
24414
+	.fpu softvfp
24109
24415
 	.type	write_loader_lba, %function
24110
24416
 write_loader_lba:
24111
24417
 	.fnstart
24112
24418
 	@ args = 0, pretend = 0, frame = 40
24113
24419
 	@ frame_needed = 0, uses_anonymous_args = 0
24114
24420
 	cmp	r0, #64
24115
-	push	{r4, r5, r6, r7, r8, r9, lr}
24116
-	.save {r4, r5, r6, r7, r8, r9, lr}
24421
+	push	{r4, r5, r6, r7, r8, lr}
24422
+	.save {r4, r5, r6, r7, r8, lr}
24117
24423
 	mov	r5, r0
24118
-	.pad #52
24119
-	sub	sp, sp, #52
24424
+	.pad #48
24425
+	sub	sp, sp, #48
24120
24426
 	mov	r6, r1
24121
24427
 	mov	r8, r2
24122
-	ldr	r4, .L3925
24123
-	bne	.L3904
24428
+	ldr	r4, .L3793
24429
+	bne	.L3771
24124
24430
 	ldr	r2, [r2]
24125
-	ldr	r3, .L3925+4
24431
+	ldr	r3, .L3793+4
24126
24432
 	cmp	r2, r3
24127
-	bne	.L3904
24128
-	mov	r0, #256000
24433
+	bne	.L3771
24129
24434
 	movs	r3, #1
24130
-	strb	r3, [r4, #1012]
24435
+	mov	r0, #256000
24436
+	strb	r3, [r4, #1516]
24131
24437
 	bl	ftl_malloc
24132
-	movs	r1, #0
24133
24438
 	mov	r2, #256000
24134
-	str	r0, [r4, #1016]
24439
+	movs	r1, #0
24440
+	str	r0, [r4, #1520]
24135
24441
 	bl	ftl_memset
24136
-	str	r5, [r4, #1020]
24137
-.L3904:
24442
+	str	r5, [r4, #1524]
24443
+.L3771:
24138
24444
 	str	r6, [sp]
24139
24445
 	mov	r3, r5
24140
-	ldr	r0, .L3925+8
24141
-	ldr	r1, [r4, #1016]
24142
24446
 	ldr	r2, [r8]
24447
+	ldr	r1, [r4, #1520]
24448
+	ldr	r0, .L3793+8
24143
24449
 	bl	printk
24144
-	ldrb	r3, [r4, #1012]	@ zero_extendqisi2
24145
-	ldr	r9, .L3925
24450
+	ldrb	r3, [r4, #1516]	@ zero_extendqisi2
24146
24451
 	cmp	r3, #0
24147
-	beq	.L3903
24452
+	beq	.L3770
24148
24453
 	sub	r0, r5, #64
24149
-	ldr	r7, [r9, #1016]
24454
+	ldr	r7, [r4, #1520]
24150
24455
 	cmp	r0, #500
24151
-	bcs	.L3906
24456
+	bcs	.L3773
24152
24457
 	rsb	r2, r5, #564
24153
-	add	r0, r7, r0, lsl #9
24154
-	cmp	r2, r6
24155
24458
 	mov	r1, r8
24459
+	cmp	r2, r6
24460
+	add	r0, r7, r0, lsl #9
24156
24461
 	it	cs
24157
24462
 	movcs	r2, r6
24158
24463
 	lsls	r2, r2, #9
24159
24464
 	bl	ftl_memcpy
24160
-	b	.L3907
24161
-.L3906:
24162
-	cmp	r5, #564
24163
-	bcs	.L3915
24164
-.L3907:
24165
-	ldr	r3, [r4, #1020]
24166
-	cmp	r3, r5
24167
-	beq	.L3913
24168
-	ldr	r2, .L3925
24465
+.L3774:
24466
+	ldr	r3, [r4, #1524]
24467
+	cmp	r5, r3
24468
+	beq	.L3783
24169
24469
 	movs	r3, #0
24470
+	strb	r3, [r4, #1516]
24170
24471
 	mov	r8, r3
24171
-	strb	r3, [r2, #1012]
24172
-	cbz	r7, .L3914
24472
+	cbz	r7, .L3784
24173
24473
 	mov	r0, r7
24174
24474
 	bl	ftl_free
24175
-.L3914:
24176
-	str	r8, [r4, #1016]
24177
-.L3913:
24178
-	add	r5, r5, r6
24179
-	str	r5, [r4, #1020]
24180
-	b	.L3903
24181
-.L3915:
24182
-	ldr	r3, .L3925+12
24183
-	ldr	r0, [r9, #1020]
24184
-	ldr	r3, [r3, #44]
24475
+.L3784:
24476
+	str	r8, [r4, #1520]
24477
+	b	.L3783
24478
+.L3773:
24479
+	cmp	r5, #564
24480
+	bcc	.L3774
24481
+	ldr	r3, .L3793+12
24482
+	ldr	r0, [r4, #1524]
24483
+	ldr	r3, [r3, #48]
24185
24484
 	subs	r0, r0, #64
24186
24485
 	cmp	r0, #500
24486
+	ldrb	r3, [r3, #9]	@ zero_extendqisi2
24187
24487
 	it	cs
24188
24488
 	movcs	r0, #500
24189
-	ldrb	r3, [r3, #9]	@ zero_extendqisi2
24190
24489
 	cmp	r3, #4
24191
-	beq	.L3916
24490
+	beq	.L3775
24192
24491
 	movs	r3, #2
24193
24492
 	str	r3, [sp, #8]
24194
24493
 	movs	r3, #3
..
..
@@ -24199,50 +24498,52 @@
24199
24498
 	str	r3, [sp, #20]
24200
24499
 	movs	r3, #6
24201
24500
 	str	r3, [sp, #24]
24202
-	b	.L3909
24203
-.L3916:
24204
-	movs	r3, #0
24205
-.L3908:
24206
-	add	r1, sp, #8
24207
-	lsls	r2, r3, #1
24208
-	cmp	r0, #256
24209
-	it	ls
24210
-	movls	r2, r3
24211
-	str	r2, [r1, r3, lsl #2]
24212
-	adds	r3, r3, #1
24213
-	cmp	r3, #5
24214
-	bne	.L3908
24215
-.L3909:
24501
+.L3776:
24216
24502
 	movw	r3, #63872
24217
-.L3912:
24503
+.L3782:
24218
24504
 	ldr	r2, [r7, r3, lsl #2]
24219
-	cbz	r2, .L3910
24505
+	cbz	r2, .L3780
24220
24506
 	adds	r3, r3, #128
24221
24507
 	lsls	r0, r3, #2
24222
-	b	.L3911
24223
-.L3910:
24224
-	subs	r3, r3, #1
24225
-	cmp	r3, #4096
24226
-	bne	.L3912
24227
-	lsls	r0, r0, #9
24228
-.L3911:
24508
+.L3781:
24229
24509
 	mov	r1, r7
24230
24510
 	add	r2, sp, #8
24231
-	bl	write_idblock
24232
-	ldr	r0, [r4, #1016]
24233
24511
 	movs	r7, #0
24234
-	strb	r7, [r4, #1012]
24512
+	bl	write_idblock
24513
+	ldr	r0, [r4, #1520]
24514
+	strb	r7, [r4, #1516]
24235
24515
 	bl	ftl_free
24236
-	str	r7, [r4, #1016]
24237
-	b	.L3913
24238
-.L3903:
24239
-	add	sp, sp, #52
24516
+	str	r7, [r4, #1520]
24517
+.L3783:
24518
+	add	r5, r5, r6
24519
+	str	r5, [r4, #1524]
24520
+.L3770:
24521
+	add	sp, sp, #48
24240
24522
 	@ sp needed
24241
-	pop	{r4, r5, r6, r7, r8, r9, pc}
24242
-.L3926:
24523
+	pop	{r4, r5, r6, r7, r8, pc}
24524
+.L3775:
24525
+	movs	r2, #0
24526
+	add	r3, sp, #8
24527
+.L3779:
24528
+	cmp	r0, #256
24529
+	itet	hi
24530
+	lslhi	r1, r2, #1
24531
+	strls	r2, [r3, r2, lsl #2]
24532
+	strhi	r1, [r3, r2, lsl #2]
24533
+	adds	r2, r2, #1
24534
+	cmp	r2, #5
24535
+	bne	.L3779
24536
+	b	.L3776
24537
+.L3780:
24538
+	subs	r3, r3, #1
24539
+	cmp	r3, #4096
24540
+	bne	.L3782
24541
+	lsls	r0, r0, #9
24542
+	b	.L3781
24543
+.L3794:
24243
24544
 	.align	2
24244
-.L3925:
24245
-	.word	.LANCHOR5
24545
+.L3793:
24546
+	.word	.LANCHOR4
24246
24547
 	.word	-52655045
24247
24548
 	.word	.LC185
24248
24549
 	.word	.LANCHOR0
..
..
@@ -24250,8 +24551,10 @@
24250
24551
 	.size	write_loader_lba, .-write_loader_lba
24251
24552
 	.align	1
24252
24553
 	.global	FtlWrite
24554
+	.syntax unified
24253
24555
 	.thumb
24254
24556
 	.thumb_func
24557
+	.fpu softvfp
24255
24558
 	.type	FtlWrite, %function
24256
24559
 FtlWrite:
24257
24560
 	.fnstart
..
..
@@ -24259,534 +24562,526 @@
24259
24562
 	@ frame_needed = 0, uses_anonymous_args = 0
24260
24563
 	push	{r4, r5, r6, r7, r8, lr}
24261
24564
 	.save {r4, r5, r6, r7, r8, lr}
24262
-	mov	r5, r3
24565
+	mov	r7, r3
24263
24566
 	sub	r3, r1, #64
24264
-	mov	r7, r0
24567
+	mov	r5, r0
24265
24568
 	cmp	r3, #1984
24266
24569
 	mov	r4, r1
24267
24570
 	mov	r6, r2
24268
-	bcs	.L3928
24269
-	cbnz	r0, .L3928
24270
-	mov	r0, r1
24271
-	mov	r1, r2
24272
-	mov	r2, r5
24571
+	bcs	.L3796
24572
+	cbnz	r0, .L3796
24573
+	mov	r2, r7
24574
+	mov	r1, r6
24575
+	mov	r0, r4
24273
24576
 	bl	write_loader_lba
24274
-.L3928:
24275
-	mov	r0, r7
24276
-	mov	r1, r4
24577
+.L3796:
24578
+	mov	r3, r7
24277
24579
 	mov	r2, r6
24278
-	mov	r3, r5
24580
+	mov	r1, r4
24581
+	mov	r0, r5
24279
24582
 	pop	{r4, r5, r6, r7, r8, lr}
24280
24583
 	b	ftl_write
24281
24584
 	.fnend
24282
24585
 	.size	FtlWrite, .-FtlWrite
24283
24586
 	.align	1
24284
24587
 	.global	rknand_sys_storage_ioctl
24588
+	.syntax unified
24285
24589
 	.thumb
24286
24590
 	.thumb_func
24591
+	.fpu softvfp
24287
24592
 	.type	rknand_sys_storage_ioctl, %function
24288
24593
 rknand_sys_storage_ioctl:
24289
24594
 	.fnstart
24290
24595
 	@ args = 0, pretend = 0, frame = 520
24291
24596
 	@ frame_needed = 0, uses_anonymous_args = 0
24292
-	ldr	r3, .L3988
24597
+	ldr	r3, .L3856
24293
24598
 	push	{r4, r5, r6, r7, lr}
24294
24599
 	.save {r4, r5, r6, r7, lr}
24295
-	cmp	r1, r3
24600
+	mov	r4, r1
24296
24601
 	.pad #524
24297
24602
 	sub	sp, sp, #524
24298
-	mov	r4, r1
24299
24603
 	mov	r5, r2
24300
-	beq	.L3931
24301
-	bhi	.L3932
24604
+	cmp	r1, r3
24605
+	beq	.L3799
24606
+	bhi	.L3800
24302
24607
 	subw	r3, r3, #2086
24303
24608
 	cmp	r1, r3
24304
-	beq	.L3933
24305
-	bhi	.L3934
24609
+	beq	.L3801
24610
+	bhi	.L3802
24306
24611
 	subs	r3, r3, #238
24307
24612
 	cmp	r1, r3
24308
-	beq	.L3935
24613
+	beq	.L3803
24309
24614
 	adds	r3, r3, #237
24310
24615
 	cmp	r1, r3
24311
-	beq	.L3936
24312
-	b	.L3966
24313
-.L3934:
24314
-	ldr	r3, .L3988+4
24616
+	beq	.L3804
24617
+.L3834:
24618
+	mvn	r4, #21
24619
+	b	.L3797
24620
+.L3802:
24621
+	ldr	r3, .L3856+4
24315
24622
 	cmp	r1, r3
24316
-	beq	.L3937
24623
+	beq	.L3805
24317
24624
 	adds	r3, r3, #1
24318
24625
 	cmp	r1, r3
24319
-	beq	.L3938
24626
+	beq	.L3806
24320
24627
 	subs	r3, r3, #124
24321
24628
 	cmp	r1, r3
24322
-	bne	.L3966
24323
-	b	.L3986
24324
-.L3932:
24325
-	ldr	r3, .L3988+8
24326
-	cmp	r1, r3
24327
-	mov	r6, r3
24328
-	beq	.L3940
24329
-	bhi	.L3941
24330
-	subw	r3, r3, #2526
24331
-	cmp	r1, r3
24332
-	beq	.L3931
24333
-	adds	r3, r3, #10
24334
-	cmp	r1, r3
24335
-	beq	.L3931
24336
-	b	.L3966
24337
-.L3941:
24338
-	ldr	r3, .L3988+12
24339
-	cmp	r1, r3
24340
-	beq	.L3940
24341
-	bcc	.L3942
24342
-	adds	r3, r3, #1
24343
-	cmp	r1, r3
24344
-	beq	.L3942
24345
-	b	.L3966
24346
-.L3936:
24347
-	ldr	r0, .L3988+16
24629
+	bne	.L3834
24630
+	ldr	r0, .L3856+8
24348
24631
 	bl	printk
24632
+	mov	r2, #520
24349
24633
 	mov	r1, r5
24350
-	mov	r2, #520
24351
-	mov	r0, sp
24352
-	bl	rk_copy_from_user
24353
-	cbz	r0, .L3943
24354
-.L3949:
24355
-	ldr	r0, .L3988+20
24356
-	bl	printk
24357
-	b	.L3983
24358
-.L3943:
24359
-	ldr	r2, [sp]
24360
-	ldr	r3, .L3988+24
24361
-	cmp	r2, r3
24362
-	beq	.L3944
24363
-.L3946:
24364
-	mov	r4, #-1
24365
-	b	.L3945
24366
-.L3944:
24367
-	ldr	r3, [sp, #4]
24368
-	cmp	r3, #512
24369
-	bhi	.L3946
24370
-	ldr	r4, .L3988+28
24371
-	mov	r2, #512
24372
-	mov	r0, sp
24373
-	ldr	r1, [r4, #1024]
24374
-	bl	memcpy
24375
-	ldr	r2, [r4, #1028]
24376
-	ldr	r3, .L3988+32
24377
-	cmp	r2, r3
24378
-	beq	.L3947
24379
-	movs	r1, #0
24380
-	add	r0, sp, #64
24381
-	movs	r2, #128
24382
-	str	r1, [sp, #8]
24383
-	str	r1, [sp, #12]
24384
-	bl	memset
24385
-.L3947:
24386
-	movs	r1, #0
24387
-	add	r0, sp, #256
24388
-	mov	r2, #256
24389
-	str	r1, [sp, #16]
24390
-	bl	memset
24391
-.L3978:
24392
-	mov	r0, r5
24393
-	mov	r1, sp
24394
-	mov	r2, #520
24395
-	bl	rk_copy_to_user
24396
-	cmp	r0, #0
24397
-	bne	.L3983
24398
-	b	.L3982
24399
-.L3933:
24400
-	ldr	r0, .L3988+36
24401
-	bl	printk
24402
-	mov	r1, r5
24403
-	mov	r2, #520
24404
24634
 	mov	r0, sp
24405
24635
 	bl	rk_copy_from_user
24406
24636
 	cmp	r0, #0
24407
-	bne	.L3949
24637
+	bne	.L3817
24408
24638
 	ldr	r2, [sp]
24409
-	ldr	r3, .L3988+24
24639
+	ldr	r3, .L3856+12
24410
24640
 	cmp	r2, r3
24411
-	bne	.L3946
24412
-	ldr	r3, [sp, #4]
24413
-	cmp	r3, #512
24414
-	bhi	.L3946
24415
-	ldr	r2, .L3988+28
24416
-	ldr	r3, .L3988+32
24417
-	ldr	r1, [r2, #1028]
24418
-	cmp	r1, r3
24419
-	bne	.L3967
24420
-	ldr	r3, [sp, #12]
24421
-	subs	r1, r3, #1
24422
-	cmp	r1, #127
24423
-	bhi	.L3968
24424
-	ldr	r4, [r2, #1024]
24425
-	add	r1, sp, #64
24426
-	add	r0, r4, #64
24427
-	str	r3, [r4, #12]
24428
-	ldr	r2, [sp, #12]
24429
-	bl	memcpy
24430
-	movs	r0, #1
24431
-	mov	r1, r4
24432
-	b	.L3981
24433
-.L3938:
24434
-	ldr	r0, .L3988+40
24435
-	bl	printk
24436
-	mov	r1, r5
24437
-	mov	r2, #520
24438
-	mov	r0, sp
24439
-	bl	rk_copy_from_user
24440
-	cmp	r0, #0
24441
-	bne	.L3949
24442
-	ldr	r2, [sp]
24443
-	ldr	r3, .L3988+44
24444
-	cmp	r2, r3
24445
-	bne	.L3946
24446
-	ldr	r3, [sp, #4]
24447
-	cmp	r3, #512
24448
-	bhi	.L3946
24449
-	ldr	r5, .L3988+28
24450
-	ldr	r3, [r5, #1032]
24451
-	cbnz	r3, .L3950
24452
-.L3953:
24453
-	movs	r0, #0
24454
-	b	.L3930
24455
-.L3950:
24456
-	ldr	r3, [r5, #1036]
24457
-	ldr	r2, .L3988+48
24458
-	ldr	r1, [r3]
24459
-	cmp	r1, r2
24460
-	beq	.L3951
24461
-	str	r2, [r3]
24462
-	mov	r2, #504
24463
-	ldr	r3, .L3988+28
24464
-	ldr	r3, [r3, #1036]
24465
-	str	r2, [r3, #4]
24466
-	movs	r2, #0
24467
-	str	r2, [r3, #8]
24468
-	str	r2, [r3, #12]
24469
-.L3951:
24470
-	ldr	r1, [r5, #1036]
24471
-	movs	r4, #0
24472
-	mov	r0, r4
24473
-	str	r4, [r1, #16]
24474
-	bl	StorageSysDataStore
24475
-	ldr	r3, [r5, #1024]
24476
-	ldr	r2, .L3988+24
24477
-	ldr	r1, [r3]
24478
-	cmp	r1, r2
24479
-	it	ne
24480
-	strne	r2, [r3]
24481
-	ldr	r6, [r5, #1024]
24482
-	itt	ne
24483
-	movne	r2, #504
24484
-	ldrne	r3, .L3988+28
24485
-	add	r0, r6, #64
24486
-	itt	ne
24487
-	ldrne	r3, [r3, #1024]
24488
-	strne	r4, [r3, #8]
24489
-	mov	r4, #0
24490
-	it	ne
24491
-	strne	r2, [r3, #4]
24492
-	movs	r2, #128
24493
-	mov	r1, r4
24494
-	str	r4, [r6, #12]
24495
-	bl	memset
24496
-	movs	r0, #1
24497
-	mov	r1, r6
24498
-	bl	StorageSysDataStore
24499
-	str	r4, [r5, #1032]
24500
-	str	r4, [r5, #1028]
24501
-	b	.L3945
24502
-.L3937:
24503
-	ldr	r0, .L3988+52
24504
-	bl	printk
24505
-	mov	r1, r5
24506
-	mov	r2, #520
24507
-	mov	r0, sp
24508
-	bl	rk_copy_from_user
24509
-	cmp	r0, #0
24510
-	bne	.L3949
24511
-	ldr	r2, [sp]
24512
-	ldr	r3, .L3988+56
24513
-	cmp	r2, r3
24514
-	bne	.L3946
24515
-	ldr	r3, [sp, #4]
24516
-	cmp	r3, #512
24517
-	bhi	.L3946
24518
-	ldr	r5, .L3988+28
24519
-	ldr	r3, [r5, #1032]
24520
-	cmp	r3, #1
24521
-	beq	.L3953
24522
-	ldr	r2, [r5, #1036]
24523
-	ldr	r3, .L3988+48
24524
-	ldr	r1, [r2]
24525
-	cmp	r1, r3
24526
-	beq	.L3954
24527
-	str	r3, [r2]
24528
-	mov	r2, #504
24529
-	ldr	r3, [r5, #1036]
24530
-	str	r2, [r3, #4]
24531
-	movs	r2, #0
24532
-	str	r2, [r3, #8]
24533
-	str	r2, [r3, #12]
24534
-.L3954:
24535
-	ldr	r1, [r5, #1036]
24536
-	movs	r3, #1
24537
-	movs	r0, #0
24538
-	str	r3, [r1, #16]
24539
-	bl	StorageSysDataStore
24540
-	ldr	r3, [r5, #1024]
24541
-	ldr	r2, .L3988+24
24542
-	ldr	r1, [r3]
24543
-	cmp	r1, r2
24544
-	beq	.L3955
24545
-	str	r2, [r3]
24546
-	mov	r2, #504
24547
-	ldr	r3, .L3988+28
24548
-	ldr	r3, [r3, #1024]
24549
-	str	r2, [r3, #4]
24550
-	movs	r2, #0
24551
-	str	r2, [r3, #8]
24552
-.L3955:
24553
-	ldr	r6, [r5, #1024]
24554
-	movs	r4, #0
24555
-	movs	r2, #128
24556
-	mov	r1, r4
24557
-	add	r0, r6, #64
24558
-	str	r4, [r6, #12]
24559
-	bl	memset
24560
-	movs	r0, #1
24561
-	mov	r1, r6
24562
-	bl	StorageSysDataStore
24563
-	movs	r3, #1
24564
-	str	r3, [r5, #1032]
24565
-	b	.L3945
24566
-.L3986:
24567
-	ldr	r0, .L3988+60
24568
-	bl	printk
24569
-	mov	r1, r5
24570
-	mov	r2, #520
24571
-	mov	r0, sp
24572
-	bl	rk_copy_from_user
24573
-	cmp	r0, #0
24574
-	bne	.L3949
24575
-	ldr	r2, [sp]
24576
-	ldr	r3, .L3988+64
24577
-	cmp	r2, r3
24578
-	bne	.L3946
24641
+	bne	.L3814
24579
24642
 	ldr	r2, [sp, #4]
24580
24643
 	cmp	r2, #512
24581
-	bhi	.L3946
24644
+	bhi	.L3814
24645
+	ldr	r1, .L3856+16
24646
+.L3854:
24582
24647
 	add	r0, sp, #8
24583
-	ldr	r1, .L3988+68
24584
-	b	.L3984
24585
-.L3931:
24586
-	ldr	r0, .L3988+72
24587
-	cmp	r4, r0
24588
-	mov	r7, r0
24589
-	bne	.L3957
24590
-	ldr	r0, .L3988+76
24591
-	b	.L3980
24592
-.L3989:
24593
-	.align	2
24594
-.L3988:
24595
-	.word	1074031656
24596
-	.word	1074029694
24597
-	.word	1074034192
24598
-	.word	1074034194
24599
-	.word	.LC186
24600
-	.word	.LC187
24601
-	.word	1263358532
24602
-	.word	.LANCHOR5
24603
-	.word	-1067903959
24604
-	.word	.LC188
24605
-	.word	.LC189
24606
-	.word	1112753220
24607
-	.word	1146313043
24608
-	.word	.LC190
24609
-	.word	1112755781
24610
-	.word	.LC191
24611
-	.word	1094995539
24612
-	.word	.LANCHOR5+1040
24613
-	.word	1074031666
24614
-	.word	.LC192
24615
-.L3957:
24616
-	ldr	r3, .L3990
24617
-	cmp	r4, r3
24618
-	ite	eq
24619
-	ldreq	r0, .L3990+4
24620
-	ldrne	r0, .L3990+8
24621
-.L3980:
24648
+	bl	memcpy
24649
+	b	.L3848
24650
+.L3800:
24651
+	ldr	r6, .L3856+20
24652
+	cmp	r1, r6
24653
+	beq	.L3808
24654
+	bhi	.L3809
24655
+	ldr	r3, .L3856+24
24656
+	cmp	r1, r3
24657
+	beq	.L3799
24658
+	adds	r3, r3, #10
24659
+	cmp	r1, r3
24660
+	bne	.L3834
24661
+.L3799:
24662
+	ldr	r7, .L3856+24
24663
+	cmp	r4, r7
24664
+	bne	.L3824
24665
+	ldr	r0, .L3856+28
24666
+.L3850:
24622
24667
 	bl	printk
24623
-	mov	r1, r5
24624
24668
 	mov	r2, #520
24669
+	mov	r1, r5
24625
24670
 	mov	r0, sp
24626
24671
 	bl	rk_copy_from_user
24627
24672
 	cmp	r0, #0
24628
-	bne	.L3949
24673
+	bne	.L3817
24629
24674
 	ldr	r2, [sp]
24630
-	ldr	r3, .L3990+12
24675
+	ldr	r3, .L3856+32
24631
24676
 	cmp	r2, r3
24632
-	bne	.L3983
24633
-	ldr	r3, .L3990
24634
-	ldr	r6, .L3990+16
24677
+	bne	.L3853
24678
+	ldr	r3, .L3856+36
24679
+	ldr	r6, .L3856+40
24635
24680
 	cmp	r4, r3
24636
-	bne	.L3960
24637
-	ldr	r3, [r6, #1024]
24638
-	mov	r0, r5
24639
-	mov	r1, sp
24681
+	bne	.L3827
24682
+	ldr	r3, [r6, #1528]
24640
24683
 	movs	r2, #16
24684
+	mov	r1, sp
24685
+	mov	r0, r5
24641
24686
 	ldr	r3, [r3, #20]
24642
24687
 	str	r3, [sp, #4]
24643
24688
 	strb	r3, [sp, #8]
24644
24689
 	bl	rk_copy_to_user
24645
24690
 	cmp	r0, #0
24646
-	beq	.L3930
24647
-	b	.L3983
24648
-.L3960:
24649
-	ldr	r3, [r6, #1552]
24650
-	cmp	r3, #10
24651
-	bhi	.L3983
24652
-	ldr	r1, [r6, #1024]
24653
-	ldr	r3, [sp, #4]
24654
-	ldr	r2, [r1, #24]
24655
-	cmp	r2, r3
24656
-	beq	.L3961
24657
-	cbz	r2, .L3961
24658
-	mov	r1, r3
24659
-	ldr	r0, .L3990+20
24660
-	bl	printk
24661
-	ldr	r3, [r6, #1552]
24662
-	adds	r3, r3, #1
24663
-	str	r3, [r6, #1552]
24664
-.L3983:
24665
-	mvn	r0, #13
24666
-	b	.L3930
24667
-.L3961:
24668
-	movs	r2, #0
24669
-	cmp	r4, r7
24670
-	str	r2, [r6, #1552]
24671
-	mov	r0, #1
24672
-	itet	eq
24673
-	moveq	r3, r2
24674
-	movne	r2, #1
24675
-	moveq	r2, r3
24676
-	str	r3, [r1, #24]
24677
-	str	r2, [r1, #20]
24678
-	bl	StorageSysDataStore
24679
-	adds	r0, r0, #1
24680
-	bne	.L3982
24681
-	b	.L3987
24682
-.L3940:
24683
-	ldr	r0, .L3990+24
24684
-	bl	printk
24685
-	mov	r1, r5
24686
-	mov	r2, #520
24687
-	mov	r0, sp
24688
-	bl	rk_copy_from_user
24689
-	cmp	r0, #0
24690
-	bne	.L3949
24691
-	ldr	r2, [sp]
24692
-	ldr	r3, .L3990+28
24693
-	cmp	r2, r3
24694
-	bne	.L3946
24695
-	ldr	r2, [sp, #4]
24696
-	cmp	r2, #504
24697
-	bhi	.L3946
24698
-	ldr	r3, .L3990+16
24699
-	cmp	r4, r6
24700
-	add	r0, sp, #8
24701
-	ite	eq
24702
-	ldreq	r1, [r3, #1556]
24703
-	ldrne	r1, [r3, #1560]
24704
-	adds	r1, r1, #8
24705
-.L3984:
24706
-	bl	memcpy
24707
-	b	.L3978
24708
-.L3942:
24709
-	ldr	r0, .L3990+32
24710
-	bl	printk
24711
-	mov	r1, r5
24712
-	mov	r2, #520
24713
-	mov	r0, sp
24714
-	bl	rk_copy_from_user
24715
-	cmp	r0, #0
24716
-	bne	.L3949
24717
-	ldr	r2, [sp]
24718
-	ldr	r3, .L3990+28
24719
-	cmp	r2, r3
24720
-	bne	.L3946
24721
-	ldr	r2, [sp, #4]
24722
-	cmp	r2, #504
24723
-	bhi	.L3946
24724
-	ldr	r3, .L3990+36
24725
-	adds	r2, r2, #8
24726
-	cmp	r4, r3
24727
-	ldr	r4, .L3990+16
24728
-	bne	.L3965
24729
-	mov	r1, sp
24730
-	ldr	r0, [r4, #1556]
24731
-	bl	memcpy
24732
-	movs	r0, #2
24733
-	ldr	r1, [r4, #1556]
24734
-	b	.L3981
24735
-.L3965:
24736
-	mov	r1, sp
24737
-	ldr	r0, [r4, #1560]
24738
-	bl	memcpy
24739
-	ldr	r1, [r4, #1560]
24740
-	movs	r0, #3
24741
-.L3981:
24742
-	bl	StorageSysDataStore
24743
-	mov	r4, r0
24744
-	b	.L3945
24745
-.L3935:
24746
-	bl	rknand_dev_flush
24747
-.L3982:
24691
+	bne	.L3853
24692
+.L3818:
24748
24693
 	movs	r4, #0
24749
-	b	.L3945
24750
-.L3987:
24751
-	mvn	r4, #1
24752
-.L3945:
24753
-	ldr	r0, .L3990+40
24754
-	mov	r1, r4
24755
-	bl	printk
24694
+.L3797:
24756
24695
 	mov	r0, r4
24757
-	b	.L3930
24758
-.L3966:
24759
-	mvn	r0, #21
24760
-	b	.L3930
24761
-.L3967:
24762
-	mvn	r0, #1
24763
-	b	.L3930
24764
-.L3968:
24765
-	mvn	r0, #2
24766
-.L3930:
24767
24696
 	add	sp, sp, #524
24768
24697
 	@ sp needed
24769
24698
 	pop	{r4, r5, r6, r7, pc}
24770
-.L3991:
24699
+.L3809:
24700
+	ldr	r3, .L3856+44
24701
+	cmp	r1, r3
24702
+	beq	.L3808
24703
+	bcc	.L3810
24704
+	adds	r3, r3, #1
24705
+	cmp	r1, r3
24706
+	bne	.L3834
24707
+.L3810:
24708
+	ldr	r0, .L3856+48
24709
+	bl	printk
24710
+	mov	r2, #520
24711
+	mov	r1, r5
24712
+	mov	r0, sp
24713
+	bl	rk_copy_from_user
24714
+	cbnz	r0, .L3817
24715
+	ldr	r2, [sp]
24716
+	ldr	r3, .L3856+52
24717
+	cmp	r2, r3
24718
+	bne	.L3814
24719
+	ldr	r2, [sp, #4]
24720
+	cmp	r2, #504
24721
+	bhi	.L3814
24722
+	ldr	r3, .L3856+56
24723
+	mov	r1, sp
24724
+	adds	r2, r2, #8
24725
+	cmp	r4, r3
24726
+	ldr	r4, .L3856+40
24727
+	bne	.L3833
24728
+	ldr	r0, [r4, #2060]
24729
+	bl	memcpy
24730
+	ldr	r1, [r4, #2060]
24731
+	movs	r0, #2
24732
+	b	.L3851
24733
+.L3804:
24734
+	ldr	r0, .L3856+60
24735
+	bl	printk
24736
+	mov	r2, #520
24737
+	mov	r1, r5
24738
+	mov	r0, sp
24739
+	bl	rk_copy_from_user
24740
+	cbz	r0, .L3811
24741
+.L3817:
24742
+	ldr	r0, .L3856+64
24743
+	bl	printk
24744
+.L3853:
24745
+	mvn	r4, #13
24746
+	b	.L3797
24747
+.L3811:
24748
+	ldr	r2, [sp]
24749
+	ldr	r3, .L3856+68
24750
+	cmp	r2, r3
24751
+	beq	.L3812
24752
+.L3814:
24753
+	mov	r4, #-1
24754
+.L3813:
24755
+	mov	r1, r4
24756
+	ldr	r0, .L3856+72
24757
+	bl	printk
24758
+	b	.L3797
24759
+.L3812:
24760
+	ldr	r3, [sp, #4]
24761
+	cmp	r3, #512
24762
+	bhi	.L3814
24763
+	ldr	r4, .L3856+40
24764
+	mov	r2, #512
24765
+	mov	r0, sp
24766
+	ldr	r1, [r4, #1528]
24767
+	bl	memcpy
24768
+	ldr	r2, [r4, #1532]
24769
+	ldr	r3, .L3856+76
24770
+	cmp	r2, r3
24771
+	beq	.L3815
24772
+	movs	r1, #0
24773
+	movs	r2, #128
24774
+	add	r0, sp, #64
24775
+	str	r1, [sp, #8]
24776
+	str	r1, [sp, #12]
24777
+	bl	memset
24778
+.L3815:
24779
+	mov	r2, #256
24780
+	movs	r1, #0
24781
+	add	r0, sp, r2
24782
+	str	r1, [sp, #16]
24783
+	bl	memset
24784
+.L3848:
24785
+	mov	r2, #520
24786
+	mov	r1, sp
24787
+	mov	r0, r5
24788
+	bl	rk_copy_to_user
24789
+	cmp	r0, #0
24790
+	bne	.L3853
24791
+.L3852:
24792
+	movs	r4, #0
24793
+	b	.L3813
24794
+.L3801:
24795
+	ldr	r0, .L3856+80
24796
+	bl	printk
24797
+	mov	r2, #520
24798
+	mov	r1, r5
24799
+	mov	r0, sp
24800
+	bl	rk_copy_from_user
24801
+	cmp	r0, #0
24802
+	bne	.L3817
24803
+	ldr	r2, [sp]
24804
+	ldr	r3, .L3856+68
24805
+	cmp	r2, r3
24806
+	bne	.L3814
24807
+	ldr	r3, [sp, #4]
24808
+	cmp	r3, #512
24809
+	bhi	.L3814
24810
+	ldr	r2, .L3856+40
24811
+	ldr	r3, .L3856+76
24812
+	ldr	r1, [r2, #1532]
24813
+	cmp	r1, r3
24814
+	bne	.L3835
24815
+	ldr	r3, [sp, #12]
24816
+	subs	r1, r3, #1
24817
+	cmp	r1, #127
24818
+	bhi	.L3836
24819
+	ldr	r4, [r2, #1528]
24820
+	add	r1, sp, #64
24821
+	str	r3, [r4, #12]
24822
+	add	r0, r4, #64
24823
+	ldr	r2, [sp, #12]
24824
+	bl	memcpy
24825
+	mov	r1, r4
24826
+	movs	r0, #1
24827
+.L3851:
24828
+	bl	StorageSysDataStore
24829
+	mov	r4, r0
24830
+	b	.L3813
24831
+.L3806:
24832
+	ldr	r0, .L3856+84
24833
+	bl	printk
24834
+	mov	r2, #520
24835
+	mov	r1, r5
24836
+	mov	r0, sp
24837
+	bl	rk_copy_from_user
24838
+	cmp	r0, #0
24839
+	bne	.L3817
24840
+	ldr	r2, [sp]
24841
+	ldr	r3, .L3856+88
24842
+	cmp	r2, r3
24843
+	bne	.L3814
24844
+	ldr	r3, [sp, #4]
24845
+	cmp	r3, #512
24846
+	bhi	.L3814
24847
+	ldr	r5, .L3856+40
24848
+	ldr	r3, [r5, #1536]
24849
+	cmp	r3, #0
24850
+	beq	.L3818
24851
+	ldr	r3, [r5, #1540]
24852
+	ldr	r2, .L3856+92
24853
+	ldr	r1, [r3]
24854
+	cmp	r1, r2
24855
+	beq	.L3819
24856
+	str	r2, [r3]
24857
+	mov	r2, #504
24858
+	ldr	r3, [r5, #1540]
24859
+	str	r2, [r3, #4]
24860
+	movs	r2, #0
24861
+	str	r2, [r3, #8]
24862
+	str	r2, [r3, #12]
24863
+.L3819:
24864
+	ldr	r1, [r5, #1540]
24865
+	movs	r4, #0
24866
+	mov	r0, r4
24867
+	str	r4, [r1, #16]
24868
+	bl	StorageSysDataStore
24869
+	ldr	r3, [r5, #1528]
24870
+	ldr	r2, .L3856+68
24871
+	ldr	r1, [r3]
24872
+	cmp	r1, r2
24873
+	beq	.L3820
24874
+	str	r2, [r3]
24875
+	mov	r2, #504
24876
+	ldr	r3, [r5, #1528]
24877
+	str	r2, [r3, #4]
24878
+	str	r4, [r3, #8]
24879
+.L3820:
24880
+	ldr	r6, [r5, #1528]
24881
+	movs	r4, #0
24882
+	movs	r2, #128
24883
+	mov	r1, r4
24884
+	str	r4, [r6, #12]
24885
+	add	r0, r6, #64
24886
+	bl	memset
24887
+	mov	r1, r6
24888
+	movs	r0, #1
24889
+	bl	StorageSysDataStore
24890
+	str	r4, [r5, #1536]
24891
+	str	r4, [r5, #1532]
24892
+	b	.L3813
24893
+.L3857:
24771
24894
 	.align	2
24772
-.L3990:
24895
+.L3856:
24896
+	.word	1074031656
24897
+	.word	1074029694
24898
+	.word	.LC191
24899
+	.word	1094995539
24900
+	.word	.LANCHOR4+1544
24901
+	.word	1074034192
24902
+	.word	1074031666
24903
+	.word	.LC192
24904
+	.word	1280262987
24905
+	.word	1074031676
24906
+	.word	.LANCHOR4
24907
+	.word	1074034194
24908
+	.word	.LC197
24909
+	.word	1145980246
24910
+	.word	1074034193
24911
+	.word	.LC186
24912
+	.word	.LC187
24913
+	.word	1263358532
24914
+	.word	.LC198
24915
+	.word	-1067903959
24916
+	.word	.LC188
24917
+	.word	.LC189
24918
+	.word	1112753220
24919
+	.word	1146313043
24920
+.L3805:
24921
+	ldr	r0, .L3858
24922
+	bl	printk
24923
+	mov	r2, #520
24924
+	mov	r1, r5
24925
+	mov	r0, sp
24926
+	bl	rk_copy_from_user
24927
+	cmp	r0, #0
24928
+	bne	.L3817
24929
+	ldr	r2, [sp]
24930
+	ldr	r3, .L3858+4
24931
+	cmp	r2, r3
24932
+	bne	.L3814
24933
+	ldr	r3, [sp, #4]
24934
+	cmp	r3, #512
24935
+	bhi	.L3814
24936
+	ldr	r5, .L3858+8
24937
+	ldr	r3, [r5, #1536]
24938
+	cmp	r3, #1
24939
+	beq	.L3818
24940
+	ldr	r2, [r5, #1540]
24941
+	ldr	r3, .L3858+12
24942
+	ldr	r1, [r2]
24943
+	cmp	r1, r3
24944
+	beq	.L3821
24945
+	str	r3, [r2]
24946
+	mov	r2, #504
24947
+	ldr	r3, [r5, #1540]
24948
+	str	r2, [r3, #4]
24949
+	movs	r2, #0
24950
+	str	r2, [r3, #8]
24951
+	str	r2, [r3, #12]
24952
+.L3821:
24953
+	ldr	r1, [r5, #1540]
24954
+	movs	r3, #1
24955
+	movs	r0, #0
24956
+	str	r3, [r1, #16]
24957
+	bl	StorageSysDataStore
24958
+	ldr	r3, [r5, #1528]
24959
+	ldr	r2, .L3858+16
24960
+	ldr	r1, [r3]
24961
+	cmp	r1, r2
24962
+	beq	.L3822
24963
+	str	r2, [r3]
24964
+	mov	r2, #504
24965
+	ldr	r3, [r5, #1528]
24966
+	str	r2, [r3, #4]
24967
+	movs	r2, #0
24968
+	str	r2, [r3, #8]
24969
+.L3822:
24970
+	ldr	r6, [r5, #1528]
24971
+	movs	r4, #0
24972
+	movs	r2, #128
24973
+	mov	r1, r4
24974
+	str	r4, [r6, #12]
24975
+	add	r0, r6, #64
24976
+	bl	memset
24977
+	mov	r1, r6
24978
+	movs	r0, #1
24979
+	bl	StorageSysDataStore
24980
+	movs	r3, #1
24981
+	str	r3, [r5, #1536]
24982
+	b	.L3813
24983
+.L3824:
24984
+	ldr	r3, .L3858+20
24985
+	cmp	r4, r3
24986
+	ite	eq
24987
+	ldreq	r0, .L3858+24
24988
+	ldrne	r0, .L3858+28
24989
+	b	.L3850
24990
+.L3827:
24991
+	ldr	r3, [r6, #2056]
24992
+	cmp	r3, #10
24993
+	bhi	.L3853
24994
+	ldr	r3, [r6, #1528]
24995
+	ldr	r1, [sp, #4]
24996
+	ldr	r2, [r3, #24]
24997
+	cmp	r2, r1
24998
+	beq	.L3828
24999
+	cbz	r2, .L3828
25000
+	ldr	r0, .L3858+32
25001
+	bl	printk
25002
+	ldr	r3, [r6, #2056]
25003
+	adds	r3, r3, #1
25004
+	str	r3, [r6, #2056]
25005
+	b	.L3853
25006
+.L3828:
25007
+	cmp	r4, r7
25008
+	mov	r2, #0
25009
+	str	r2, [r6, #2056]
25010
+	itt	ne
25011
+	movne	r2, #1
25012
+	strne	r1, [r3, #24]
25013
+	mov	r0, #1
25014
+	it	eq
25015
+	streq	r2, [r3, #20]
25016
+	mov	r1, r3
25017
+	ite	eq
25018
+	streq	r2, [r3, #24]
25019
+	strne	r2, [r3, #20]
25020
+	bl	StorageSysDataStore
25021
+	adds	r0, r0, #1
25022
+	bne	.L3852
25023
+	mvn	r4, #1
25024
+	b	.L3813
25025
+.L3808:
25026
+	ldr	r0, .L3858+36
25027
+	bl	printk
25028
+	mov	r2, #520
25029
+	mov	r1, r5
25030
+	mov	r0, sp
25031
+	bl	rk_copy_from_user
25032
+	cmp	r0, #0
25033
+	bne	.L3817
25034
+	ldr	r2, [sp]
25035
+	ldr	r3, .L3858+40
25036
+	cmp	r2, r3
25037
+	bne	.L3814
25038
+	ldr	r2, [sp, #4]
25039
+	cmp	r2, #504
25040
+	bhi	.L3814
25041
+	ldr	r3, .L3858+8
25042
+	cmp	r4, r6
25043
+	ite	eq
25044
+	ldreq	r1, [r3, #2060]
25045
+	ldrne	r1, [r3, #2064]
25046
+	adds	r1, r1, #8
25047
+	b	.L3854
25048
+.L3833:
25049
+	ldr	r0, [r4, #2064]
25050
+	bl	memcpy
25051
+	ldr	r1, [r4, #2064]
25052
+	movs	r0, #3
25053
+	b	.L3851
25054
+.L3803:
25055
+	bl	rknand_dev_flush
25056
+	b	.L3852
25057
+.L3835:
25058
+	mvn	r4, #1
25059
+	b	.L3797
25060
+.L3836:
25061
+	mvn	r4, #2
25062
+	b	.L3797
25063
+.L3859:
25064
+	.align	2
25065
+.L3858:
25066
+	.word	.LC190
25067
+	.word	1112755781
25068
+	.word	.LANCHOR4
25069
+	.word	1146313043
25070
+	.word	1263358532
24773
25071
 	.word	1074031676
24774
25072
 	.word	.LC193
24775
25073
 	.word	.LC194
24776
-	.word	1280262987
24777
-	.word	.LANCHOR5
24778
25074
 	.word	.LC195
24779
25075
 	.word	.LC196
24780
25076
 	.word	1145980246
24781
-	.word	.LC197
24782
-	.word	1074034193
24783
-	.word	.LC198
24784
25077
 	.fnend
24785
25078
 	.size	rknand_sys_storage_ioctl, .-rknand_sys_storage_ioctl
24786
25079
 	.align	1
24787
25080
 	.global	rk_ftl_storage_sys_init
25081
+	.syntax unified
24788
25082
 	.thumb
24789
25083
 	.thumb_func
25084
+	.fpu softvfp
24790
25085
 	.type	rk_ftl_storage_sys_init, %function
24791
25086
 rk_ftl_storage_sys_init:
24792
25087
 	.fnstart
..
..
@@ -24794,67 +25089,68 @@
24794
25089
 	@ frame_needed = 0, uses_anonymous_args = 0
24795
25090
 	push	{r3, r4, r5, r6, r7, lr}
24796
25091
 	.save {r3, r4, r5, r6, r7, lr}
24797
-	mov	r2, #512
24798
-	ldr	r4, .L4001
24799
25092
 	mov	r3, #-1
25093
+	ldr	r4, .L3869
24800
25094
 	movs	r5, #0
24801
-	add	r0, r4, #1040
24802
-	ldr	r1, [r4, #996]
24803
-	str	r3, [r4, #1020]
25095
+	mov	r2, #512
25096
+	ldr	r1, [r4, #1500]
25097
+	add	r0, r4, #1544
25098
+	str	r3, [r4, #1524]
25099
+	strb	r5, [r4, #1516]
24804
25100
 	add	r3, r1, #512
24805
-	str	r3, [r4, #1024]
24806
-	str	r1, [r4, #1036]
25101
+	str	r1, [r4, #1540]
25102
+	str	r3, [r4, #1528]
24807
25103
 	add	r3, r1, #1024
24808
25104
 	add	r1, r1, #1536
24809
-	str	r3, [r4, #1556]
24810
-	strb	r5, [r4, #1012]
24811
-	str	r5, [r4, #1016]
24812
-	str	r5, [r4, #1564]
24813
-	str	r1, [r4, #1560]
25105
+	str	r3, [r4, #2060]
25106
+	str	r5, [r4, #1520]
25107
+	str	r5, [r4, #2068]
25108
+	str	r1, [r4, #2064]
24814
25109
 	bl	ftl_memcpy
24815
-	ldr	r6, [r4, #1036]
24816
-	str	r5, [r4, #1028]
24817
-	str	r5, [r4, #1552]
24818
-	ldr	r3, [r6, #16]
25110
+	ldr	r6, [r4, #1540]
25111
+	str	r5, [r4, #1532]
25112
+	str	r5, [r4, #2056]
24819
25113
 	ldr	r7, [r6, #508]
24820
-	str	r3, [r4, #1032]
24821
-	cbz	r7, .L3993
24822
-	mov	r0, r6
25114
+	ldr	r3, [r6, #16]
25115
+	str	r3, [r4, #1536]
25116
+	cbz	r7, .L3861
24823
25117
 	mov	r1, #508
25118
+	mov	r0, r6
24824
25119
 	bl	js_hash
24825
25120
 	cmp	r7, r0
24826
-	beq	.L3993
25121
+	beq	.L3861
24827
25122
 	str	r5, [r6, #16]
24828
-	ldr	r0, .L4001+4
24829
-	str	r5, [r4, #1032]
25123
+	ldr	r0, .L3869+4
25124
+	str	r5, [r4, #1536]
24830
25125
 	bl	printk
24831
-.L3993:
24832
-	ldr	r3, [r4, #1032]
24833
-	cbz	r3, .L3994
24834
-	ldr	r2, .L4001+8
24835
-	ldr	r3, .L4001
24836
-	str	r2, [r3, #1028]
24837
-.L3994:
24838
-	ldr	r1, [r4, #1556]
25126
+.L3861:
25127
+	ldr	r3, [r4, #1536]
25128
+	cbz	r3, .L3862
25129
+	ldr	r3, .L3869+8
25130
+	str	r3, [r4, #1532]
25131
+.L3862:
25132
+	ldr	r1, [r4, #2060]
24839
25133
 	movs	r0, #2
24840
25134
 	bl	StorageSysDataLoad
24841
-	ldr	r1, [r4, #1560]
25135
+	ldr	r1, [r4, #2064]
24842
25136
 	movs	r0, #3
24843
25137
 	bl	StorageSysDataLoad
24844
25138
 	pop	{r3, r4, r5, r6, r7, lr}
24845
25139
 	b	rknand_sys_storage_init
24846
-.L4002:
25140
+.L3870:
24847
25141
 	.align	2
24848
-.L4001:
24849
-	.word	.LANCHOR5
25142
+.L3869:
25143
+	.word	.LANCHOR4
24850
25144
 	.word	.LC199
24851
25145
 	.word	-1067903959
24852
25146
 	.fnend
24853
25147
 	.size	rk_ftl_storage_sys_init, .-rk_ftl_storage_sys_init
24854
25148
 	.align	1
24855
25149
 	.global	StorageSysDataDeInit
25150
+	.syntax unified
24856
25151
 	.thumb
24857
25152
 	.thumb_func
25153
+	.fpu softvfp
24858
25154
 	.type	StorageSysDataDeInit, %function
24859
25155
 StorageSysDataDeInit:
24860
25156
 	.fnstart
..
..
@@ -24867,104 +25163,104 @@
24867
25163
 	.size	StorageSysDataDeInit, .-StorageSysDataDeInit
24868
25164
 	.align	1
24869
25165
 	.global	rk_ftl_vendor_storage_init
25166
+	.syntax unified
24870
25167
 	.thumb
24871
25168
 	.thumb_func
25169
+	.fpu softvfp
24872
25170
 	.type	rk_ftl_vendor_storage_init, %function
24873
25171
 rk_ftl_vendor_storage_init:
24874
25172
 	.fnstart
24875
25173
 	@ args = 0, pretend = 0, frame = 0
24876
25174
 	@ frame_needed = 0, uses_anonymous_args = 0
24877
-	push	{r4, r5, r6, r7, r8, r9, r10, lr}
24878
-	.save {r4, r5, r6, r7, r8, r9, r10, lr}
25175
+	push	{r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
25176
+	.save {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
24879
25177
 	mov	r0, #65536
25178
+	ldr	r6, .L3880
24880
25179
 	bl	ftl_malloc
24881
-	ldr	r6, .L4013
24882
-	str	r0, [r6, #1568]
25180
+	str	r0, [r6, #2072]
24883
25181
 	cmp	r0, #0
24884
-	beq	.L4010
25182
+	beq	.L3878
25183
+	ldr	r10, .L3880+4
24885
25184
 	mov	r8, #0
24886
-	ldr	r9, .L4013+8
24887
-	mov	r10, r6
25185
+	ldr	r9, .L3880+8
24888
25186
 	mov	r4, r8
24889
25187
 	mov	r7, r8
24890
-.L4008:
24891
-	lsls	r0, r7, #7
25188
+.L3876:
25189
+	ldr	r2, [r6, #2072]
24892
25190
 	movs	r1, #128
24893
-	ldr	r2, [r6, #1568]
25191
+	lsls	r0, r7, #7
24894
25192
 	bl	FlashBootVendorRead
24895
25193
 	cmp	r0, #0
24896
-	bne	.L4006
24897
-	ldr	r3, [r10, #1568]
24898
-	ldr	r0, .L4013+4
24899
-	add	r2, r3, #65280
24900
-	adds	r2, r2, #252
24901
-	ldr	r1, [r3]
24902
-	ldr	r3, [r3, #4]
24903
-	ldr	r2, [r2]
25194
+	bne	.L3874
25195
+	ldr	r1, [r6, #2072]
25196
+	movw	fp, #65532
25197
+	mov	r0, r10
25198
+	ldr	r3, [r1, #4]
25199
+	ldr	r2, [r1, fp]
25200
+	ldr	r1, [r1]
24904
25201
 	bl	printk
24905
-	ldr	r5, [r10, #1568]
25202
+	ldr	r5, [r6, #2072]
24906
25203
 	ldr	r3, [r5]
24907
25204
 	cmp	r3, r9
24908
-	bne	.L4007
24909
-	add	r3, r5, #65280
25205
+	bne	.L3875
25206
+	ldr	r3, [r5, fp]
24910
25207
 	ldr	r2, [r5, #4]
24911
-	adds	r3, r3, #252
24912
-	ldr	r3, [r3]
24913
25208
 	cmp	r3, r2
24914
-	bne	.L4007
24915
-	cmp	r4, r3
24916
-	itt	cc
24917
-	movcc	r8, r7
24918
-	movcc	r4, r3
24919
-.L4007:
24920
-	cbnz	r7, .L4012
24921
-	movs	r7, #1
24922
-	b	.L4008
24923
-.L4012:
24924
-	cbz	r4, .L4009
24925
-	lsl	r0, r8, #7
24926
-	movs	r1, #128
25209
+	bne	.L3875
25210
+	cmp	r3, r4
25211
+	itt	hi
25212
+	movhi	r8, r7
25213
+	movhi	r4, r3
25214
+.L3875:
25215
+	adds	r7, r7, #1
25216
+	cmp	r7, #2
25217
+	bne	.L3876
25218
+	cbz	r4, .L3877
24927
25219
 	mov	r2, r5
25220
+	movs	r1, #128
25221
+	lsl	r0, r8, #7
24928
25222
 	bl	FlashBootVendorRead
24929
-	cbnz	r0, .L4006
24930
-	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
24931
-.L4009:
24932
-	mov	r0, r5
24933
-	mov	r1, r4
25223
+	cbnz	r0, .L3874
25224
+	pop	{r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
25225
+.L3877:
24934
25226
 	mov	r2, #65536
25227
+	mov	r1, r4
25228
+	mov	r0, r5
24935
25229
 	bl	memset
24936
-	ldr	r3, .L4013+8
24937
-	str	r7, [r5, #4]
25230
+	movs	r3, #1
25231
+	movw	r2, #65532
25232
+	str	r3, [r5, #4]
24938
25233
 	mov	r0, r4
24939
-	str	r3, [r5]
24940
-	movw	r3, #65532
24941
-	str	r7, [r5, r3]
25234
+	str	r9, [r5]
25235
+	str	r3, [r5, r2]
24942
25236
 	movw	r3, #64504
24943
25237
 	strh	r4, [r5, #12]	@ movhi
24944
25238
 	strh	r3, [r5, #14]	@ movhi
24945
-	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
24946
-.L4006:
24947
-	ldr	r0, [r6, #1568]
25239
+	pop	{r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
25240
+.L3874:
25241
+	ldr	r0, [r6, #2072]
24948
25242
 	bl	kfree
24949
25243
 	movs	r3, #0
24950
25244
 	mov	r0, #-1
24951
-	str	r3, [r6, #1568]
24952
-	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
24953
-.L4010:
25245
+	str	r3, [r6, #2072]
25246
+	pop	{r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
25247
+.L3878:
24954
25248
 	mvn	r0, #11
24955
-	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
24956
-.L4014:
25249
+	pop	{r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
25250
+.L3881:
24957
25251
 	.align	2
24958
-.L4013:
24959
-	.word	.LANCHOR5
25252
+.L3880:
25253
+	.word	.LANCHOR4
24960
25254
 	.word	.LC200
24961
25255
 	.word	1380668996
24962
25256
 	.fnend
24963
25257
 	.size	rk_ftl_vendor_storage_init, .-rk_ftl_vendor_storage_init
24964
25258
 	.align	1
24965
25259
 	.global	rk_ftl_vendor_read
25260
+	.syntax unified
24966
25261
 	.thumb
24967
25262
 	.thumb_func
25263
+	.fpu softvfp
24968
25264
 	.type	rk_ftl_vendor_read, %function
24969
25265
 rk_ftl_vendor_read:
24970
25266
 	.fnstart
..
..
@@ -24972,46 +25268,50 @@
24972
25268
 	@ frame_needed = 0, uses_anonymous_args = 0
24973
25269
 	push	{r3, r4, r5, r6, r7, lr}
24974
25270
 	.save {r3, r4, r5, r6, r7, lr}
24975
-	ldr	r3, .L4021
24976
-	ldr	r5, [r3, #1568]
24977
-	cbz	r5, .L4020
24978
-	ldrh	r7, [r5, #10]
24979
-	movs	r3, #0
24980
-.L4017:
24981
-	cmp	r3, r7
24982
-	bcs	.L4020
24983
-	add	r6, r5, r3, lsl #3
24984
-	ldrh	r4, [r6, #16]
24985
-	cmp	r4, r0
24986
-	bne	.L4018
24987
-	ldrh	r3, [r6, #20]
25271
+	mov	r7, r0
25272
+	ldr	r3, .L3888
24988
25273
 	mov	r0, r1
24989
-	cmp	r2, r3
25274
+	ldr	r5, [r3, #2072]
25275
+	cbz	r5, .L3887
25276
+	ldrh	r6, [r5, #10]
25277
+	movs	r3, #0
25278
+.L3884:
25279
+	cmp	r3, r6
25280
+	bcc	.L3886
25281
+.L3887:
25282
+	mov	r0, #-1
25283
+	pop	{r3, r4, r5, r6, r7, pc}
25284
+.L3886:
25285
+	add	r1, r5, r3, lsl #3
25286
+	ldrh	r4, [r1, #16]
25287
+	cmp	r4, r7
25288
+	bne	.L3885
25289
+	ldrh	r4, [r1, #20]
25290
+	ldrh	r1, [r1, #18]
25291
+	cmp	r4, r2
24990
25292
 	it	cs
24991
-	movcs	r2, r3
24992
-	ldrh	r3, [r6, #18]
24993
-	mov	r4, r2
24994
-	add	r3, r3, #1024
24995
-	adds	r1, r5, r3
25293
+	movcs	r4, r2
25294
+	add	r1, r1, #1024
25295
+	mov	r2, r4
25296
+	add	r1, r1, r5
24996
25297
 	bl	memcpy
24997
25298
 	mov	r0, r4
24998
25299
 	pop	{r3, r4, r5, r6, r7, pc}
24999
-.L4018:
25300
+.L3885:
25000
25301
 	adds	r3, r3, #1
25001
-	b	.L4017
25002
-.L4020:
25003
-	mov	r0, #-1
25004
-	pop	{r3, r4, r5, r6, r7, pc}
25005
-.L4022:
25302
+	b	.L3884
25303
+.L3889:
25006
25304
 	.align	2
25007
-.L4021:
25008
-	.word	.LANCHOR5
25305
+.L3888:
25306
+	.word	.LANCHOR4
25009
25307
 	.fnend
25010
25308
 	.size	rk_ftl_vendor_read, .-rk_ftl_vendor_read
25011
25309
 	.align	1
25012
25310
 	.global	rk_ftl_vendor_write
25311
+	.syntax unified
25013
25312
 	.thumb
25014
25313
 	.thumb_func
25314
+	.fpu softvfp
25015
25315
 	.type	rk_ftl_vendor_write, %function
25016
25316
 rk_ftl_vendor_write:
25017
25317
 	.fnstart
..
..
@@ -25019,119 +25319,89 @@
25019
25319
 	@ frame_needed = 0, uses_anonymous_args = 0
25020
25320
 	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
25021
25321
 	.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
25022
-	mov	r9, r2
25023
-	ldr	r2, .L4045
25322
+	mov	r8, r2
25323
+	ldr	r2, .L3910
25024
25324
 	.pad #28
25025
25325
 	sub	sp, sp, #28
25026
-	mov	ip, r0
25027
25326
 	mov	r3, r1
25028
-	ldr	r4, [r2, #1568]
25327
+	ldr	r4, [r2, #2072]
25029
25328
 	cmp	r4, #0
25030
-	beq	.L4038
25031
-	add	r7, r9, #63
25032
-	ldrh	r1, [r4, #8]
25329
+	beq	.L3905
25033
25330
 	ldrh	r2, [r4, #10]
25034
-	bic	r7, r7, #63
25035
-	movs	r6, #0
25331
+	add	r6, r8, #63
25332
+	ldrh	r1, [r4, #8]
25333
+	bic	r6, r6, #63
25334
+	movs	r7, #0
25036
25335
 	str	r1, [sp, #4]
25037
-.L4025:
25038
-	cmp	r6, r2
25039
-	bcs	.L4043
25040
-	add	r5, r4, r6, lsl #3
25041
-	ldrh	r1, [r5, #16]
25042
-	cmp	r1, ip
25043
-	bne	.L4026
25044
-	ldrh	r1, [r5, #20]
25045
-	add	fp, r4, #1024
25046
-	adds	r1, r1, #63
25047
-	bic	r1, r1, #63
25048
-	str	r1, [sp, #8]
25049
-	cmp	r9, r1
25050
-	bls	.L4027
25336
+.L3892:
25337
+	cmp	r7, r2
25338
+	bcc	.L3900
25051
25339
 	ldrh	r1, [r4, #14]
25052
-	cmp	r1, r7
25053
-	bcc	.L4038
25054
-	ldrh	r8, [r5, #18]
25055
-	subs	r2, r2, #1
25056
-	str	r2, [sp, #12]
25057
-.L4028:
25058
-	ldr	r2, [sp, #12]
25059
-	adds	r5, r5, #8
25060
-	cmp	r6, r2
25061
-	bcs	.L4044
25062
-	ldrh	r2, [r5, #16]
25063
-	add	r0, fp, r8
25064
-	ldrh	r1, [r5, #18]
25065
-	adds	r6, r6, #1
25066
-	strh	r8, [r5, #10]	@ movhi
25067
-	strh	r2, [r5, #8]	@ movhi
25068
-	add	r1, r1, fp
25069
-	ldrh	r2, [r5, #20]
25070
-	str	r3, [sp, #20]
25071
-	add	r10, r2, #63
25072
-	str	ip, [sp, #16]
25073
-	bic	r10, r10, #63
25074
-	strh	r2, [r5, #12]	@ movhi
25075
-	add	r8, r8, r10
25076
-	mov	r2, r10
25077
-	bl	memcpy
25078
-	ldr	r3, [sp, #20]
25079
-	ldr	ip, [sp, #16]
25080
-	b	.L4028
25081
-.L4044:
25082
-	add	r6, r4, r6, lsl #3
25083
-	uxth	r8, r8
25084
-	add	r0, fp, r8
25085
-	mov	r1, r3
25086
-	strh	r8, [r6, #18]	@ movhi
25087
-	mov	r2, r9
25088
-	strh	ip, [r6, #16]	@ movhi
25089
-	uxth	r7, r7
25090
-	strh	r9, [r6, #20]	@ movhi
25091
-	add	r8, r8, r7
25092
-	bl	memcpy
25093
-	ldrh	r5, [r4, #14]
25094
-	strh	r8, [r4, #12]	@ movhi
25095
-	ldr	r3, [sp, #8]
25096
-	add	r3, r3, r5
25097
-	subs	r7, r3, r7
25098
-	strh	r7, [r4, #14]	@ movhi
25099
-	b	.L4042
25100
-.L4027:
25101
-	ldrh	r0, [r5, #18]
25102
-	mov	r1, r3
25103
-	mov	r2, r9
25104
-	add	r0, r0, fp
25105
-	bl	memcpy
25106
-	strh	r9, [r5, #20]	@ movhi
25107
-	b	.L4042
25108
-.L4026:
25109
-	adds	r6, r6, #1
25110
-	b	.L4025
25111
-.L4043:
25112
-	ldrh	r1, [r4, #14]
25113
-	cmp	r1, r7
25114
-	bcc	.L4038
25340
+	cmp	r6, r1
25341
+	bhi	.L3905
25115
25342
 	add	r2, r4, r2, lsl #3
25116
-	uxth	r7, r7
25117
-	subs	r1, r1, r7
25118
-	strh	ip, [r2, #16]	@ movhi
25343
+	uxth	r6, r6
25344
+	strh	r0, [r2, #16]	@ movhi
25119
25345
 	ldrh	r0, [r4, #12]
25120
-	strh	r9, [r2, #20]	@ movhi
25346
+	strh	r8, [r2, #20]	@ movhi
25121
25347
 	strh	r0, [r2, #18]	@ movhi
25122
-	add	r0, r0, r7
25123
-	strh	r1, [r4, #14]	@ movhi
25124
-	mov	r1, r3
25348
+	add	r0, r0, r6
25349
+	subs	r6, r1, r6
25125
25350
 	strh	r0, [r4, #12]	@ movhi
25351
+	strh	r6, [r4, #14]	@ movhi
25352
+	mov	r1, r3
25126
25353
 	ldrh	r0, [r2, #18]
25127
-	mov	r2, r9
25354
+	mov	r2, r8
25128
25355
 	add	r0, r0, #1024
25129
25356
 	add	r0, r0, r4
25130
25357
 	bl	memcpy
25131
25358
 	ldrh	r3, [r4, #10]
25132
25359
 	adds	r3, r3, #1
25133
25360
 	strh	r3, [r4, #10]	@ movhi
25134
-.L4042:
25361
+	b	.L3909
25362
+.L3900:
25363
+	add	r5, r4, r7, lsl #3
25364
+	ldrh	r1, [r5, #16]
25365
+	cmp	r1, r0
25366
+	str	r1, [sp, #8]
25367
+	bne	.L3893
25368
+	ldrh	r1, [r5, #20]
25369
+	add	fp, r4, #1024
25370
+	adds	r1, r1, #63
25371
+	bic	r1, r1, #63
25372
+	cmp	r8, r1
25373
+	str	r1, [sp, #12]
25374
+	bls	.L3894
25375
+	ldrh	r1, [r4, #14]
25376
+	cmp	r6, r1
25377
+	bhi	.L3905
25378
+	ldrh	r10, [r5, #18]
25379
+	subs	r2, r2, #1
25380
+	str	r2, [sp, #16]
25381
+.L3895:
25382
+	ldr	r2, [sp, #16]
25383
+	adds	r5, r5, #8
25384
+	cmp	r7, r2
25385
+	bcc	.L3896
25386
+	ldrh	r2, [sp, #8]
25387
+	add	r7, r4, r7, lsl #3
25388
+	uxth	r5, r10
25389
+	mov	r1, r3
25390
+	strh	r8, [r7, #20]	@ movhi
25391
+	uxtah	r0, fp, r10
25392
+	strh	r2, [r7, #16]	@ movhi
25393
+	mov	r2, r8
25394
+	strh	r5, [r7, #18]	@ movhi
25395
+	bl	memcpy
25396
+	uxth	r3, r6
25397
+	ldrh	r6, [r4, #14]
25398
+	add	r5, r5, r3
25399
+	subs	r6, r6, r3
25400
+	ldr	r3, [sp, #12]
25401
+	strh	r5, [r4, #12]	@ movhi
25402
+	add	r6, r6, r3
25403
+	strh	r6, [r4, #14]	@ movhi
25404
+.L3909:
25135
25405
 	ldr	r3, [r4, #4]
25136
25406
 	movw	r2, #65532
25137
25407
 	movs	r1, #128
..
..
@@ -25150,23 +25420,54 @@
25150
25420
 	lsls	r0, r3, #7
25151
25421
 	bl	FlashBootVendorWrite
25152
25422
 	movs	r0, #0
25153
-	b	.L4024
25154
-.L4038:
25155
-	mov	r0, #-1
25156
-.L4024:
25423
+.L3890:
25157
25424
 	add	sp, sp, #28
25158
25425
 	@ sp needed
25159
25426
 	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
25160
-.L4046:
25427
+.L3896:
25428
+	ldrh	r9, [r5, #20]
25429
+	add	r0, fp, r10
25430
+	ldrh	r2, [r5, #16]
25431
+	adds	r7, r7, #1
25432
+	ldrh	r1, [r5, #18]
25433
+	strh	r9, [r5, #12]	@ movhi
25434
+	add	r9, r9, #63
25435
+	bic	r9, r9, #63
25436
+	strh	r2, [r5, #8]	@ movhi
25437
+	strh	r10, [r5, #10]	@ movhi
25438
+	mov	r2, r9
25439
+	add	r1, r1, fp
25440
+	str	r3, [sp, #20]
25441
+	add	r10, r10, r9
25442
+	bl	memcpy
25443
+	ldr	r3, [sp, #20]
25444
+	b	.L3895
25445
+.L3894:
25446
+	ldrh	r0, [r5, #18]
25447
+	mov	r2, r8
25448
+	mov	r1, r3
25449
+	add	r0, r0, fp
25450
+	bl	memcpy
25451
+	strh	r8, [r5, #20]	@ movhi
25452
+	b	.L3909
25453
+.L3893:
25454
+	adds	r7, r7, #1
25455
+	b	.L3892
25456
+.L3905:
25457
+	mov	r0, #-1
25458
+	b	.L3890
25459
+.L3911:
25161
25460
 	.align	2
25162
-.L4045:
25163
-	.word	.LANCHOR5
25461
+.L3910:
25462
+	.word	.LANCHOR4
25164
25463
 	.fnend
25165
25464
 	.size	rk_ftl_vendor_write, .-rk_ftl_vendor_write
25166
25465
 	.align	1
25167
25466
 	.global	rk_ftl_vendor_storage_ioctl
25467
+	.syntax unified
25168
25468
 	.thumb
25169
25469
 	.thumb_func
25470
+	.fpu softvfp
25170
25471
 	.type	rk_ftl_vendor_storage_ioctl, %function
25171
25472
 rk_ftl_vendor_storage_ioctl:
25172
25473
 	.fnstart
..
..
@@ -25180,83 +25481,83 @@
25180
25481
 	bl	ftl_malloc
25181
25482
 	mov	r4, r0
25182
25483
 	cmp	r0, #0
25183
-	beq	.L4056
25184
-	ldr	r3, .L4063
25484
+	beq	.L3920
25485
+	ldr	r3, .L3927
25185
25486
 	cmp	r6, r3
25186
-	beq	.L4050
25487
+	beq	.L3915
25187
25488
 	adds	r3, r3, #1
25188
25489
 	cmp	r6, r3
25189
-	beq	.L4051
25190
-	b	.L4062
25191
-.L4050:
25192
-	mov	r1, r5
25490
+	beq	.L3916
25491
+.L3926:
25492
+	mvn	r5, #13
25493
+	b	.L3914
25494
+.L3915:
25193
25495
 	movs	r2, #8
25496
+	mov	r1, r5
25194
25497
 	bl	rk_copy_from_user
25195
25498
 	cmp	r0, #0
25196
-	bne	.L4062
25499
+	bne	.L3926
25197
25500
 	ldr	r2, [r4]
25198
-	ldr	r3, .L4063+4
25501
+	ldr	r3, .L3927+4
25199
25502
 	cmp	r2, r3
25200
-	beq	.L4053
25201
-.L4054:
25503
+	beq	.L3918
25504
+.L3919:
25202
25505
 	mov	r5, #-1
25203
-	b	.L4049
25204
-.L4053:
25205
-	ldrh	r0, [r4, #4]
25206
-	add	r1, r4, #8
25506
+.L3914:
25507
+	mov	r0, r4
25508
+	bl	kfree
25509
+.L3912:
25510
+	mov	r0, r5
25511
+	pop	{r4, r5, r6, pc}
25512
+.L3918:
25207
25513
 	ldrh	r2, [r4, #6]
25514
+	add	r1, r4, #8
25515
+	ldrh	r0, [r4, #4]
25208
25516
 	bl	rk_ftl_vendor_read
25209
25517
 	adds	r3, r0, #1
25210
-	beq	.L4054
25518
+	beq	.L3919
25211
25519
 	uxth	r2, r0
25212
25520
 	strh	r0, [r4, #6]	@ movhi
25213
25521
 	mov	r1, r4
25214
-	mov	r0, r5
25215
25522
 	adds	r2, r2, #8
25523
+	mov	r0, r5
25216
25524
 	bl	rk_copy_to_user
25217
25525
 	cmp	r0, #0
25218
-	ite	eq
25219
-	moveq	r5, #0
25220
-	mvnne	r5, #13
25221
-	b	.L4049
25222
-.L4051:
25223
-	mov	r1, r5
25526
+	bne	.L3926
25527
+.L3922:
25528
+	mov	r5, r0
25529
+	b	.L3914
25530
+.L3916:
25224
25531
 	movs	r2, #8
25532
+	mov	r1, r5
25225
25533
 	bl	rk_copy_from_user
25226
-	cbnz	r0, .L4062
25534
+	cmp	r0, #0
25535
+	bne	.L3926
25227
25536
 	ldr	r2, [r4]
25228
-	ldr	r3, .L4063+4
25537
+	ldr	r3, .L3927+4
25229
25538
 	cmp	r2, r3
25230
-	bne	.L4054
25539
+	bne	.L3919
25231
25540
 	ldrh	r2, [r4, #6]
25232
25541
 	movw	r3, #4087
25233
25542
 	cmp	r2, r3
25234
-	bhi	.L4054
25235
-	mov	r0, r4
25236
-	mov	r1, r5
25543
+	bhi	.L3919
25237
25544
 	adds	r2, r2, #8
25238
-	bl	rk_copy_from_user
25239
-	cbnz	r0, .L4062
25240
-	ldrh	r0, [r4, #4]
25241
-	add	r1, r4, #8
25242
-	ldrh	r2, [r4, #6]
25243
-	bl	rk_ftl_vendor_write
25244
-	mov	r5, r0
25245
-	b	.L4049
25246
-.L4062:
25247
-	mvn	r5, #13
25248
-.L4049:
25545
+	mov	r1, r5
25249
25546
 	mov	r0, r4
25250
-	bl	kfree
25251
-	b	.L4048
25252
-.L4056:
25547
+	bl	rk_copy_from_user
25548
+	cmp	r0, #0
25549
+	bne	.L3926
25550
+	ldrh	r2, [r4, #6]
25551
+	add	r1, r4, #8
25552
+	ldrh	r0, [r4, #4]
25553
+	bl	rk_ftl_vendor_write
25554
+	b	.L3922
25555
+.L3920:
25253
25556
 	mov	r5, #-1
25254
-.L4048:
25255
-	mov	r0, r5
25256
-	pop	{r4, r5, r6, pc}
25257
-.L4064:
25557
+	b	.L3912
25558
+.L3928:
25258
25559
 	.align	2
25259
-.L4063:
25560
+.L3927:
25260
25561
 	.word	1074034177
25261
25562
 	.word	1448232273
25262
25563
 	.fnend
..
..
@@ -25270,6 +25571,8 @@
25270
25571
 	.global	gSnSectorData
25271
25572
 	.global	gpDrmKeyInfo
25272
25573
 	.global	gpBootConfig
25574
+	.global	ftl_dma32_buffer_size
25575
+	.global	ftl_dma32_buffer
25273
25576
 	.global	gLoaderBootInfo
25274
25577
 	.global	RK29_NANDC1_REG_BASE
25275
25578
 	.global	RK29_NANDC_REG_BASE
..
..
@@ -25505,18 +25808,11 @@
25505
25808
 	.global	IDByte
25506
25809
 	.global	read_retry_cur_offset
25507
25810
 	.section	.rodata
25508
-	.align	2
25509
-.LANCHOR3 = . + 0
25510
-	.type	__func__.20390, %object
25511
-	.size	__func__.20390, 11
25512
-__func__.20390:
25811
+	.set	.LANCHOR3,. + 0
25812
+	.type	__func__.23812, %object
25813
+	.size	__func__.23812, 11
25814
+__func__.23812:
25513
25815
 	.ascii	"FtlMemInit\000"
25514
-.LC0:
25515
-	.byte	60
25516
-	.byte	40
25517
-	.byte	24
25518
-	.byte	16
25519
-	.space	1
25520
25816
 	.type	samsung_14nm_slc_rr, %object
25521
25817
 	.size	samsung_14nm_slc_rr, 26
25522
25818
 samsung_14nm_slc_rr:
..
..
@@ -25546,7 +25842,6 @@
25546
25842
 	.byte	-125
25547
25843
 	.byte	-115
25548
25844
 	.byte	100
25549
-	.space	2
25550
25845
 	.type	samsung_14nm_mlc_rr, %object
25551
25846
 	.size	samsung_14nm_mlc_rr, 104
25552
25847
 samsung_14nm_mlc_rr:
..
..
@@ -25654,452 +25949,33 @@
25654
25949
 	.byte	18
25655
25950
 	.byte	9
25656
25951
 	.byte	8
25657
-	.type	__func__.21169, %object
25658
-	.size	__func__.21169, 17
25659
-__func__.21169:
25952
+	.type	__func__.24591, %object
25953
+	.size	__func__.24591, 17
25954
+__func__.24591:
25660
25955
 	.ascii	"FtlDumpBlockInfo\000"
25661
-	.space	3
25662
-	.type	__func__.21188, %object
25663
-	.size	__func__.21188, 16
25664
-__func__.21188:
25956
+	.type	__func__.24610, %object
25957
+	.size	__func__.24610, 16
25958
+__func__.24610:
25665
25959
 	.ascii	"FtlScanAllBlock\000"
25666
-	.type	__func__.21456, %object
25667
-	.size	__func__.21456, 17
25668
-__func__.21456:
25960
+	.type	__func__.24878, %object
25961
+	.size	__func__.24878, 17
25962
+__func__.24878:
25669
25963
 	.ascii	"ftl_scan_all_ppa\000"
25670
-	.space	3
25671
-	.type	__func__.21137, %object
25672
-	.size	__func__.21137, 12
25673
-__func__.21137:
25964
+	.type	__func__.24559, %object
25965
+	.size	__func__.24559, 12
25966
+__func__.24559:
25674
25967
 	.ascii	"FtlCheckVpc\000"
25675
-	.type	__func__.21436, %object
25676
-	.size	__func__.21436, 21
25677
-__func__.21436:
25968
+	.type	__func__.24858, %object
25969
+	.size	__func__.24858, 21
25970
+__func__.24858:
25678
25971
 	.ascii	"FtlVpcCheckAndModify\000"
25679
-	.space	3
25680
-	.type	__func__.20463, %object
25681
-	.size	__func__.20463, 8
25682
-__func__.20463:
25972
+	.type	__func__.23885, %object
25973
+	.size	__func__.23885, 8
25974
+__func__.23885:
25683
25975
 	.ascii	"FtlInit\000"
25684
-	.section	.rodata.str1.1,"aMS",%progbits,1
25685
-.LC1:
25686
-	.ascii	"FlashEraseBlocks pageAddr error %x\012\000"
25687
-.LC2:
25688
-	.ascii	"phyBlk = 0x%x die = %d block_in_die = 0x%x 0x%8x\012"
25689
-	.ascii	"\000"
25690
-.LC3:
25691
-	.ascii	"FtlFreeSysBlkQueueOut free count = %d\012\000"
25692
-.LC4:
25693
-	.ascii	"FtlFreeSysBlkQueueOut = %x, free count = %d, error\012"
25694
-	.ascii	"\000"
25695
-.LC5:
25696
-	.ascii	"FtlFreeSysBlkQueueOut = %x, free count = %d\012\000"
25697
-.LC6:
25698
-	.ascii	"FLASH INFO:\012\000"
25699
-.LC7:
25700
-	.ascii	"FLASH ID: %x\012\000"
25701
-.LC8:
25702
-	.ascii	"Device Capacity: %d MB\012\000"
25703
-.LC9:
25704
-	.ascii	"FMWAIT: %x %x %x %x\012\000"
25705
-.LC10:
25706
-	.ascii	"FTL INFO:\012\000"
25707
-.LC11:
25708
-	.ascii	"g_MaxLpn = 0x%x\012\000"
25709
-.LC12:
25710
-	.ascii	"g_VaildLpn = 0x%x\012\000"
25711
-.LC13:
25712
-	.ascii	"read_page_count = 0x%x\012\000"
25713
-.LC14:
25714
-	.ascii	"discard_page_count = 0x%x\012\000"
25715
-.LC15:
25716
-	.ascii	"write_page_count = 0x%x\012\000"
25717
-.LC16:
25718
-	.ascii	"cache_write_count = 0x%x\012\000"
25719
-.LC17:
25720
-	.ascii	"l2p_write_count = 0x%x\012\000"
25721
-.LC18:
25722
-	.ascii	"gc_page_count = 0x%x\012\000"
25723
-.LC19:
25724
-	.ascii	"totle_write = %d MB\012\000"
25725
-.LC20:
25726
-	.ascii	"totle_read = %d MB\012\000"
25727
-.LC21:
25728
-	.ascii	"GSV = 0x%x\012\000"
25729
-.LC22:
25730
-	.ascii	"GDV = 0x%x\012\000"
25731
-.LC23:
25732
-	.ascii	"bad blk num = %d %d\012\000"
25733
-.LC24:
25734
-	.ascii	"free_superblocks = 0x%x\012\000"
25735
-.LC25:
25736
-	.ascii	"mlc_EC = 0x%x\012\000"
25737
-.LC26:
25738
-	.ascii	"slc_EC = 0x%x\012\000"
25739
-.LC27:
25740
-	.ascii	"avg_EC = 0x%x\012\000"
25741
-.LC28:
25742
-	.ascii	"sys_EC = 0x%x\012\000"
25743
-.LC29:
25744
-	.ascii	"max_EC = 0x%x\012\000"
25745
-.LC30:
25746
-	.ascii	"min_EC = 0x%x\012\000"
25747
-.LC31:
25748
-	.ascii	"PLT = 0x%x\012\000"
25749
-.LC32:
25750
-	.ascii	"POT = 0x%x\012\000"
25751
-.LC33:
25752
-	.ascii	"MaxSector = 0x%x\012\000"
25753
-.LC34:
25754
-	.ascii	"init_sys_blks_pp = 0x%x\012\000"
25755
-.LC35:
25756
-	.ascii	"sys_blks_pp = 0x%x\012\000"
25757
-.LC36:
25758
-	.ascii	"free sysblock = 0x%x\012\000"
25759
-.LC37:
25760
-	.ascii	"data_blks_pp = 0x%x\012\000"
25761
-.LC38:
25762
-	.ascii	"data_op_blks_pp = 0x%x\012\000"
25763
-.LC39:
25764
-	.ascii	"max_data_blks = 0x%x\012\000"
25765
-.LC40:
25766
-	.ascii	"Sys.id = 0x%x\012\000"
25767
-.LC41:
25768
-	.ascii	"Bbt.id = 0x%x\012\000"
25769
-.LC42:
25770
-	.ascii	"ACT.page = 0x%x\012\000"
25771
-.LC43:
25772
-	.ascii	"ACT.plane = 0x%x\012\000"
25773
-.LC44:
25774
-	.ascii	"ACT.id = 0x%x\012\000"
25775
-.LC45:
25776
-	.ascii	"ACT.mode = 0x%x\012\000"
25777
-.LC46:
25778
-	.ascii	"ACT.a_pages = 0x%x\012\000"
25779
-.LC47:
25780
-	.ascii	"ACT VPC = 0x%x\012\000"
25781
-.LC48:
25782
-	.ascii	"BUF.page = 0x%x\012\000"
25783
-.LC49:
25784
-	.ascii	"BUF.plane = 0x%x\012\000"
25785
-.LC50:
25786
-	.ascii	"BUF.id = 0x%x\012\000"
25787
-.LC51:
25788
-	.ascii	"BUF.mode = 0x%x\012\000"
25789
-.LC52:
25790
-	.ascii	"BUF.a_pages = 0x%x\012\000"
25791
-.LC53:
25792
-	.ascii	"BUF VPC = 0x%x\012\000"
25793
-.LC54:
25794
-	.ascii	"TMP.page = 0x%x\012\000"
25795
-.LC55:
25796
-	.ascii	"TMP.plane = 0x%x\012\000"
25797
-.LC56:
25798
-	.ascii	"TMP.id = 0x%x\012\000"
25799
-.LC57:
25800
-	.ascii	"TMP.mode = 0x%x\012\000"
25801
-.LC58:
25802
-	.ascii	"TMP.a_pages = 0x%x\012\000"
25803
-.LC59:
25804
-	.ascii	"GC.page = 0x%x\012\000"
25805
-.LC60:
25806
-	.ascii	"GC.plane = 0x%x\012\000"
25807
-.LC61:
25808
-	.ascii	"GC.id = 0x%x\012\000"
25809
-.LC62:
25810
-	.ascii	"GC.mode = 0x%x\012\000"
25811
-.LC63:
25812
-	.ascii	"GC.a_pages = 0x%x\012\000"
25813
-.LC64:
25814
-	.ascii	"WR_CHK = 0x%x %x %x %x\012\000"
25815
-.LC65:
25816
-	.ascii	"Read Err = 0x%x\012\000"
25817
-.LC66:
25818
-	.ascii	"Prog Err = 0x%x\012\000"
25819
-.LC67:
25820
-	.ascii	"gc_free_blk_th= 0x%x\012\000"
25821
-.LC68:
25822
-	.ascii	"gc_merge_free_blk_th= 0x%x\012\000"
25823
-.LC69:
25824
-	.ascii	"gc_skip_write_count= 0x%x\012\000"
25825
-.LC70:
25826
-	.ascii	"gc_blk_index= 0x%x\012\000"
25827
-.LC71:
25828
-	.ascii	"free min EC= 0x%x\012\000"
25829
-.LC72:
25830
-	.ascii	"free max EC= 0x%x\012\000"
25831
-.LC73:
25832
-	.ascii	"GC__SB VPC = 0x%x\012\000"
25833
-.LC74:
25834
-	.ascii	"%d. [0x%x]=0x%x 0x%x  0x%x\012\000"
25835
-.LC75:
25836
-	.ascii	"free %d. [0x%x] 0x%x  0x%x\012\000"
25837
-.LC76:
25838
-	.ascii	"%s\012\000"
25839
-.LC77:
25840
-	.ascii	"FTL version: 5.0.63 20200923\000"
25841
-.LC78:
25842
-	.ascii	"swblk %x ,avg = %x max= %x vpc= %x,ec=%x ,max ec=%x"
25843
-	.ascii	"\012\000"
25844
-.LC79:
25845
-	.ascii	"FtlGcRefreshBlock  0x%x\012\000"
25846
-.LC80:
25847
-	.ascii	"FtlGcMarkBadPhyBlk %d 0x%x\012\000"
25848
-.LC81:
25849
-	.ascii	"%s error allocating memory. return -1\012\000"
25850
-.LC82:
25851
-	.ascii	"%s %p:0x%x:\000"
25852
-.LC83:
25853
-	.ascii	"%x \000"
25854
-.LC84:
25855
-	.ascii	"\000"
25856
-.LC85:
25857
-	.ascii	"otp error! %d\000"
25858
-.LC86:
25859
-	.ascii	"rr\000"
25860
-.LC87:
25861
-	.ascii	"%d statReg->V6.mtrans_cnt=%d flReg.V6.page_num=%d\012"
25862
-	.ascii	"\000"
25863
-.LC88:
25864
-	.ascii	"nandc:\000"
25865
-.LC89:
25866
-	.ascii	"%d flReg.d32=%x %x\012\000"
25867
-.LC90:
25868
-	.ascii	"sdr read ok %x ecc=%d\012\000"
25869
-.LC91:
25870
-	.ascii	"sync para %d\012\000"
25871
-.LC92:
25872
-	.ascii	"TOG mode Read error %x %x\012\000"
25873
-.LC93:
25874
-	.ascii	"read retry status %x %x %x\012\000"
25875
-.LC94:
25876
-	.ascii	"micron RR %d row=%x,count %d,status=%d\012\000"
25877
-.LC95:
25878
-	.ascii	"samsung RR %d row=%x,count %d,status=%d\012\000"
25879
-.LC96:
25880
-	.ascii	"ECC:%d\012\000"
25881
-.LC97:
25882
-	.ascii	"No.%d FLASH ID:%x %x %x %x %x %x\012\000"
25883
-.LC98:
25884
-	.ascii	"FlashLoadPhyInfo fail %x!!\012\000"
25885
-.LC99:
25886
-	.ascii	"Read pageadd=%x  ecc=%x err=%x\012\000"
25887
-.LC100:
25888
-	.ascii	"data:\000"
25889
-.LC101:
25890
-	.ascii	"spare:\000"
25891
-.LC102:
25892
-	.ascii	"ReadRetry pageadd=%x ecc=%x err=%x\012\000"
25893
-.LC103:
25894
-	.ascii	"FLFB:%d %d\012\000"
25895
-.LC104:
25896
-	.ascii	"prog error: = %x\012\000"
25897
-.LC105:
25898
-	.ascii	"prog read error: = %x\012\000"
25899
-.LC106:
25900
-	.ascii	"prog read REFRESH: = %x\012\000"
25901
-.LC107:
25902
-	.ascii	"prog read s error: = %x %x %x\012\000"
25903
-.LC108:
25904
-	.ascii	"prog read d error: = %x %x %x\012\000"
25905
-.LC109:
25906
-	.ascii	"id = %x,%x addr= %x,spare= %x %x %x %x data= %x\012"
25907
-	.ascii	"\000"
25908
-.LC110:
25909
-	.ascii	"...%s enter...\012\000"
25910
-.LC111:
25911
-	.ascii	"superBlkID = %x vpc=%x\012\000"
25912
-.LC112:
25913
-	.ascii	"flashmode = %x pagenum = %x %x\012\000"
25914
-.LC113:
25915
-	.ascii	"id = %x,%x addr= %x,spare= %x %x %x %x data=%x %x\012"
25916
-	.ascii	"\000"
25917
-.LC114:
25918
-	.ascii	"blk = %x vpc=%x mode = %x\012\000"
25919
-.LC115:
25920
-	.ascii	"mlc id = %x,%x addr= %x,spare= %x %x %x %x data=%x "
25921
-	.ascii	"%x\012\000"
25922
-.LC116:
25923
-	.ascii	"slc id = %x,%x addr= %x,spare= %x %x %x %x data=%x "
25924
-	.ascii	"%x\012\000"
25925
-.LC117:
25926
-	.ascii	"ftl_scan_all_ppa blk %x page %x flag: %x\012\000"
25927
-.LC118:
25928
-	.ascii	"ftl_scan_all_ppa blk %x page %x flag: %x .........."
25929
-	.ascii	"..... is bad block\012\000"
25930
-.LC119:
25931
-	.ascii	"addr= %x, status= %d,spare= %x %x %x %x data=%x %x\012"
25932
-	.ascii	"\000"
25933
-.LC120:
25934
-	.ascii	"%s finished\012\000"
25935
-.LC121:
25936
-	.ascii	"FlashMakeFactorBbt %d\012\000"
25937
-.LC122:
25938
-	.ascii	"bad block:%d %d\012\000"
25939
-.LC123:
25940
-	.ascii	"FMFB:%d %d\012\000"
25941
-.LC124:
25942
-	.ascii	"E:bad block:%d\012\000"
25943
-.LC125:
25944
-	.ascii	"FMFB:Save %d %d\012\000"
25945
-.LC126:
25946
-	.ascii	"FtlBbmTblFlush id=%x,page=%x,previd=%x cnt=%d\012\000"
25947
-.LC127:
25948
-	.ascii	"FtlBbmTblFlush error:%x\012\000"
25949
-.LC128:
25950
-	.ascii	"FtlBbmTblFlush error = %x error count = %d\012\000"
25951
-.LC129:
25952
-	.ascii	"FtlGcFreeBadSuperBlk 0x%x\012\000"
25953
-.LC130:
25954
-	.ascii	"decrement_vpc_count %x = %d\012\000"
25955
-.LC131:
25956
-	.ascii	"decrement_vpc_count %x = %d in free list\012\000"
25957
-.LC132:
25958
-	.ascii	"FtlVpcTblFlush error = %x error count = %d\012\000"
25959
-.LC133:
25960
-	.ascii	"page map lost: %x %x\012\000"
25961
-.LC134:
25962
-	.ascii	"FtlMapWritePage error = %x\012\000"
25963
-.LC135:
25964
-	.ascii	"FtlMapWritePage error = %x error count = %d\012\000"
25965
-.LC136:
25966
-	.ascii	"FtlVendorPartRead refresh = %x phyAddr = %x\012\000"
25967
-.LC137:
25968
-	.ascii	"no ect\000"
25969
-.LC138:
25970
-	.ascii	"slc mode\000"
25971
-.LC139:
25972
-	.ascii	"BBT:\000"
25973
-.LC140:
25974
-	.ascii	"region_id = %x phyAddr = %x\012\000"
25975
-.LC141:
25976
-	.ascii	"map_ppn:\000"
25977
-.LC142:
25978
-	.ascii	"load_l2p_region refresh = %x phyAddr = %x\012\000"
25979
-.LC143:
25980
-	.ascii	"FtlCheckVpc2 %x = %x  %x\012\000"
25981
-.LC144:
25982
-	.ascii	"free blk vpc error %x = %x  %x\012\000"
25983
-.LC145:
25984
-	.ascii	"error_flag %x\012\000"
25985
-.LC146:
25986
-	.ascii	"Ftlscanalldata = %x\012\000"
25987
-.LC147:
25988
-	.ascii	"scan lpa = %x ppa= %x\012\000"
25989
-.LC148:
25990
-	.ascii	"lba = %x,addr= %x,spare= %x %x %x %x data=%x %x\012"
25991
-	.ascii	"\000"
25992
-.LC149:
25993
-	.ascii	"RSB refresh addr %x\012\000"
25994
-.LC150:
25995
-	.ascii	"spuer block %x vpn is 0\012 \000"
25996
-.LC151:
25997
-	.ascii	"g_recovery_ppa %x ver %x\012 \000"
25998
-.LC152:
25999
-	.ascii	"FtlCheckVpc %x = %x  %x\012\000"
26000
-.LC153:
26001
-	.ascii	"FtlGcScanTempBlk Error ID %x %x!!!!!!! \012\000"
26002
-.LC154:
26003
-	.ascii	"FtlGcScanTempBlkError ID %x %x!!!!!!!\012\000"
26004
-.LC155:
26005
-	.ascii	"GC des block %x done\012\000"
26006
-.LC156:
26007
-	.ascii	"too many bad block  = %d %d\012\000"
26008
-.LC157:
26009
-	.ascii	"%d GC datablk  = %x vpc %x %x\012\000"
26010
-.LC158:
26011
-	.ascii	"SWL %x, FSB = %x vpc= %x,ec=%x th=%x\012\000"
26012
-.LC159:
26013
-	.ascii	"Ftlwrite decrement_vpc_count %x = %d\012\000"
26014
-.LC160:
26015
-	.ascii	"rk_ftl_de_init %x\012\000"
26016
-.LC161:
26017
-	.ascii	"...%s: no bad block mapping table, format device\012"
26018
-	.ascii	"\000"
26019
-.LC162:
26020
-	.ascii	"...%s FtlSysBlkInit error ,format device!\012\000"
26021
-.LC163:
26022
-	.ascii	"FtlInit %x\012\000"
26023
-.LC164:
26024
-	.ascii	"fix power lost blk = %x vpc=%x\012\000"
26025
-.LC165:
26026
-	.ascii	"erase power lost blk = %x vpc=%x\012\000"
26027
-.LC166:
26028
-	.ascii	"FtlWrite: lpa error:%x %x\012\000"
26029
-.LC167:
26030
-	.ascii	"id = %x,%x addr= %x,spare= %x %x %x %x data = %x\012"
26031
-	.ascii	"\000"
26032
-.LC168:
26033
-	.ascii	":\000"
26034
-.LC169:
26035
-	.ascii	"phyBlk = %x,addr= %x,spare= %x %x %x %x data=%x %x\012"
26036
-	.ascii	"\000"
26037
-.LC170:
26038
-	.ascii	"Mblk:\000"
26039
-.LC171:
26040
-	.ascii	"L2P:\000"
26041
-.LC172:
26042
-	.ascii	"L2PC:\000"
26043
-.LC173:
26044
-	.ascii	"write_idblock fix data %x %x\012\000"
26045
-.LC174:
26046
-	.ascii	"idblk:\000"
26047
-.LC175:
26048
-	.ascii	"idb reverse %x %x\012\000"
26049
-.LC176:
26050
-	.ascii	"write_idblock totle_sec %x %x %x %x\012\000"
26051
-.LC177:
26052
-	.ascii	"IDBlockWriteData %x %x\012\000"
26053
-.LC178:
26054
-	.ascii	"IDBlockWriteData %x %x ret= %x\012\000"
26055
-.LC179:
26056
-	.ascii	"IdBlockReadData %x %x\012\000"
26057
-.LC180:
26058
-	.ascii	"IdBlockReadData %x %x ret= %x\012\000"
26059
-.LC181:
26060
-	.ascii	"write and check error:%d idb=%x,offset=%x,r=%x,w=%x"
26061
-	.ascii	"\012\000"
26062
-.LC182:
26063
-	.ascii	"write\000"
26064
-.LC183:
26065
-	.ascii	"read\000"
26066
-.LC184:
26067
-	.ascii	"write_idblock error %d\012\000"
26068
-.LC185:
26069
-	.ascii	"wl_lba %p %x %x %x\012\000"
26070
-.LC186:
26071
-	.ascii	"RKNAND_GET_DRM_KEY\012\000"
26072
-.LC187:
26073
-	.ascii	"rk_copy_from_user error\012\000"
26074
-.LC188:
26075
-	.ascii	"RKNAND_STORE_DRM_KEY\012\000"
26076
-.LC189:
26077
-	.ascii	"RKNAND_DIASBLE_SECURE_BOOT\012\000"
26078
-.LC190:
26079
-	.ascii	"RKNAND_ENASBLE_SECURE_BOOT\012\000"
26080
-.LC191:
26081
-	.ascii	"RKNAND_GET_SN_SECTOR\012\000"
26082
-.LC192:
26083
-	.ascii	"RKNAND_LOADER_UNLOCK\012\000"
26084
-.LC193:
26085
-	.ascii	"RKNAND_LOADER_STATUS\012\000"
26086
-.LC194:
26087
-	.ascii	"RKNAND_LOADER_LOCK\012\000"
26088
-.LC195:
26089
-	.ascii	"LockKey not match %d\012\000"
26090
-.LC196:
26091
-	.ascii	"RKNAND_GET_VENDOR_SECTOR\012\000"
26092
-.LC197:
26093
-	.ascii	"RKNAND_STORE_VENDOR_SECTOR\012\000"
26094
-.LC198:
26095
-	.ascii	"return ret = %lx\012\000"
26096
-.LC199:
26097
-	.ascii	"secureBootEn check error\012\000"
26098
-.LC200:
26099
-	.ascii	"\0013vendor storage %x,%x,%x\012\000"
26100
25976
 	.data
26101
25977
 	.align	2
26102
-.LANCHOR1 = . + 0
25978
+	.set	.LANCHOR1,. + 0
26103
25979
 	.type	random_seed, %object
26104
25980
 	.size	random_seed, 256
26105
25981
 random_seed:
..
..
@@ -26279,7 +26155,6 @@
26279
26155
 	.byte	126
26280
26156
 	.byte	124
26281
26157
 	.byte	0
26282
-	.space	3
26283
26158
 	.type	Toshiba15RefValue, %object
26284
26159
 	.size	Toshiba15RefValue, 95
26285
26160
 Toshiba15RefValue:
..
..
@@ -26378,7 +26253,6 @@
26378
26253
 	.byte	116
26379
26254
 	.byte	114
26380
26255
 	.byte	0
26381
-	.space	1
26382
26256
 	.type	ToshibaRefValue, %object
26383
26257
 	.size	ToshibaRefValue, 8
26384
26258
 ToshibaRefValue:
..
..
@@ -28875,10 +28749,17 @@
28875
28749
 	.word	1
28876
28750
 	.bss
28877
28751
 	.align	2
28878
-.LANCHOR0 = . + 0
28879
-.LANCHOR2 = . + 4344
28880
-.LANCHOR4 = . + 8688
28881
-.LANCHOR5 = . + 17376
28752
+	.set	.LANCHOR0,. + 0
28753
+	.set	.LANCHOR2,. + 4344
28754
+	.set	.LANCHOR4,. + 8688
28755
+	.type	gNandChipMap, %object
28756
+	.size	gNandChipMap, 32
28757
+gNandChipMap:
28758
+	.space	32
28759
+	.type	p_blk_mode_table, %object
28760
+	.size	p_blk_mode_table, 4
28761
+p_blk_mode_table:
28762
+	.space	4
28882
28763
 	.type	g_slc2KBNand, %object
28883
28764
 	.size	g_slc2KBNand, 1
28884
28765
 g_slc2KBNand:
..
..
@@ -28897,10 +28778,6 @@
28897
28778
 gNandRandomizer:
28898
28779
 	.space	1
28899
28780
 	.space	3
28900
-	.type	gNandChipMap, %object
28901
-	.size	gNandChipMap, 32
28902
-gNandChipMap:
28903
-	.space	32
28904
28781
 	.type	gpNandParaInfo, %object
28905
28782
 	.size	gpNandParaInfo, 4
28906
28783
 gpNandParaInfo:
..
..
@@ -28909,6 +28786,15 @@
28909
28786
 	.size	gNandOptPara, 32
28910
28787
 gNandOptPara:
28911
28788
 	.space	32
28789
+	.type	g_retryMode, %object
28790
+	.size	g_retryMode, 1
28791
+g_retryMode:
28792
+	.space	1
28793
+	.type	g_maxRegNum, %object
28794
+	.size	g_maxRegNum, 1
28795
+g_maxRegNum:
28796
+	.space	1
28797
+	.space	2
28912
28798
 	.type	gpNandc, %object
28913
28799
 	.size	gpNandc, 4
28914
28800
 gpNandc:
..
..
@@ -28966,19 +28852,10 @@
28966
28852
 	.size	FlashWaitBusyScheduleEn, 4
28967
28853
 FlashWaitBusyScheduleEn:
28968
28854
 	.space	4
28969
-	.type	g_retryMode, %object
28970
-	.size	g_retryMode, 1
28971
-g_retryMode:
28972
-	.space	1
28973
-	.type	g_maxRegNum, %object
28974
-	.size	g_maxRegNum, 1
28975
-g_maxRegNum:
28976
-	.space	1
28977
28855
 	.type	gReadRetryInfo, %object
28978
28856
 	.size	gReadRetryInfo, 852
28979
28857
 gReadRetryInfo:
28980
28858
 	.space	852
28981
-	.space	2
28982
28859
 	.type	read_retry_cur_offset, %object
28983
28860
 	.size	read_retry_cur_offset, 4
28984
28861
 read_retry_cur_offset:
..
..
@@ -29100,7 +28977,6 @@
29100
28977
 	.size	c_ftl_nand_planes_per_die, 2
29101
28978
 c_ftl_nand_planes_per_die:
29102
28979
 	.space	2
29103
-	.space	2
29104
28980
 	.type	p_plane_order_table, %object
29105
28981
 	.size	p_plane_order_table, 32
29106
28982
 p_plane_order_table:
..
..
@@ -29152,6 +29028,7 @@
29152
29028
 	.type	c_ftl_nand_reserved_blks, %object
29153
29029
 	.size	c_ftl_nand_reserved_blks, 2
29154
29030
 c_ftl_nand_reserved_blks:
29031
+	.space	2
29155
29032
 	.space	2
29156
29033
 	.type	DeviceCapacity, %object
29157
29034
 	.size	DeviceCapacity, 4
..
..
@@ -29300,10 +29177,6 @@
29300
29177
 	.size	g_VaildLpn, 4
29301
29178
 g_VaildLpn:
29302
29179
 	.space	4
29303
-	.type	p_blk_mode_table, %object
29304
-	.size	p_blk_mode_table, 4
29305
-p_blk_mode_table:
29306
-	.space	4
29307
29180
 	.type	g_totle_read_page_count, %object
29308
29181
 	.size	g_totle_read_page_count, 4
29309
29182
 g_totle_read_page_count:
..
..
@@ -29377,14 +29250,14 @@
29377
29250
 	.size	g_gc_superblock, 48
29378
29251
 g_gc_superblock:
29379
29252
 	.space	48
29380
-	.type	g_all_blk_used_slc_mode, %object
29381
-	.size	g_all_blk_used_slc_mode, 4
29382
-g_all_blk_used_slc_mode:
29383
-	.space	4
29384
29253
 	.type	g_sys_ext_data, %object
29385
29254
 	.size	g_sys_ext_data, 512
29386
29255
 g_sys_ext_data:
29387
29256
 	.space	512
29257
+	.type	g_all_blk_used_slc_mode, %object
29258
+	.size	g_all_blk_used_slc_mode, 4
29259
+g_all_blk_used_slc_mode:
29260
+	.space	4
29388
29261
 	.type	g_gc_free_blk_threshold, %object
29389
29262
 	.size	g_gc_free_blk_threshold, 2
29390
29263
 g_gc_free_blk_threshold:
..
..
@@ -29666,6 +29539,14 @@
29666
29539
 	.size	RK29_NANDC_REG_BASE, 4
29667
29540
 RK29_NANDC_REG_BASE:
29668
29541
 	.space	4
29542
+	.type	ftl_dma32_buffer_size, %object
29543
+	.size	ftl_dma32_buffer_size, 4
29544
+ftl_dma32_buffer_size:
29545
+	.space	4
29546
+	.type	ftl_dma32_buffer, %object
29547
+	.size	ftl_dma32_buffer, 4
29548
+ftl_dma32_buffer:
29549
+	.space	4
29669
29550
 	.type	gFlashPageBuffer0, %object
29670
29551
 	.size	gFlashPageBuffer0, 4
29671
29552
 gFlashPageBuffer0:
..
..
@@ -29727,11 +29608,11 @@
29727
29608
 	.size	gMultiPageReadEn, 1
29728
29609
 gMultiPageReadEn:
29729
29610
 	.space	1
29730
-	.space	2
29731
29611
 	.type	FbbtBlk, %object
29732
29612
 	.size	FbbtBlk, 16
29733
29613
 FbbtBlk:
29734
29614
 	.space	16
29615
+	.space	2
29735
29616
 	.type	req_sys, %object
29736
29617
 	.size	req_sys, 36
29737
29618
 req_sys:
..
..
@@ -29748,11 +29629,6 @@
29748
29629
 	.size	g_ect_tbl_power_up_flush, 2
29749
29630
 g_ect_tbl_power_up_flush:
29750
29631
 	.space	2
29751
-	.space	2
29752
-	.type	check_valid_page_count_table, %object
29753
-	.size	check_valid_page_count_table, 8192
29754
-check_valid_page_count_table:
29755
-	.space	8192
29756
29632
 	.type	g_power_lost_ecc_error_blk, %object
29757
29633
 	.size	g_power_lost_ecc_error_blk, 2
29758
29634
 g_power_lost_ecc_error_blk:
..
..
@@ -29760,6 +29636,7 @@
29760
29636
 	.type	g_power_lost_recovery_flag, %object
29761
29637
 	.size	g_power_lost_recovery_flag, 2
29762
29638
 g_power_lost_recovery_flag:
29639
+	.space	2
29763
29640
 	.space	2
29764
29641
 	.type	g_recovery_page_num, %object
29765
29642
 	.size	g_recovery_page_num, 4
..
..
@@ -29863,6 +29740,10 @@
29863
29740
 	.size	g_vendor, 4
29864
29741
 g_vendor:
29865
29742
 	.space	4
29743
+	.type	check_valid_page_count_table, %object
29744
+	.size	check_valid_page_count_table, 8192
29745
+check_valid_page_count_table:
29746
+	.space	8192
29866
29747
 	.type	g_gc_refresh_block_temp_tbl, %object
29867
29748
 	.size	g_gc_refresh_block_temp_tbl, 34
29868
29749
 g_gc_refresh_block_temp_tbl:
..
..
@@ -29892,3 +29773,419 @@
29892
29773
 	.size	gFlashSdrModeEn, 1
29893
29774
 gFlashSdrModeEn:
29894
29775
 	.space	1
29776
+	.section	.rodata.str1.1,"aMS",%progbits,1
29777
+.LC1:
29778
+	.ascii	"FlashEraseBlocks pageAddr error %x\012\000"
29779
+.LC2:
29780
+	.ascii	"phyBlk = 0x%x die = %d block_in_die = 0x%x 0x%8x\012"
29781
+	.ascii	"\000"
29782
+.LC3:
29783
+	.ascii	"FtlFreeSysBlkQueueOut free count = %d\012\000"
29784
+.LC4:
29785
+	.ascii	"FtlFreeSysBlkQueueOut = %x, free count = %d, error\012"
29786
+	.ascii	"\000"
29787
+.LC5:
29788
+	.ascii	"FtlFreeSysBlkQueueOut = %x, free count = %d\012\000"
29789
+.LC6:
29790
+	.ascii	"FLASH INFO:\012\000"
29791
+.LC7:
29792
+	.ascii	"FLASH ID: %x\012\000"
29793
+.LC8:
29794
+	.ascii	"Device Capacity: %d MB\012\000"
29795
+.LC9:
29796
+	.ascii	"FMWAIT: %x %x %x %x\012\000"
29797
+.LC10:
29798
+	.ascii	"FTL INFO:\012\000"
29799
+.LC11:
29800
+	.ascii	"g_MaxLpn = 0x%x\012\000"
29801
+.LC12:
29802
+	.ascii	"g_VaildLpn = 0x%x\012\000"
29803
+.LC13:
29804
+	.ascii	"read_page_count = 0x%x\012\000"
29805
+.LC14:
29806
+	.ascii	"discard_page_count = 0x%x\012\000"
29807
+.LC15:
29808
+	.ascii	"write_page_count = 0x%x\012\000"
29809
+.LC16:
29810
+	.ascii	"cache_write_count = 0x%x\012\000"
29811
+.LC17:
29812
+	.ascii	"l2p_write_count = 0x%x\012\000"
29813
+.LC18:
29814
+	.ascii	"gc_page_count = 0x%x\012\000"
29815
+.LC19:
29816
+	.ascii	"totle_write = %d MB\012\000"
29817
+.LC20:
29818
+	.ascii	"totle_read = %d MB\012\000"
29819
+.LC21:
29820
+	.ascii	"GSV = 0x%x\012\000"
29821
+.LC22:
29822
+	.ascii	"GDV = 0x%x\012\000"
29823
+.LC23:
29824
+	.ascii	"bad blk num = %d %d\012\000"
29825
+.LC24:
29826
+	.ascii	"free_superblocks = 0x%x\012\000"
29827
+.LC25:
29828
+	.ascii	"mlc_EC = 0x%x\012\000"
29829
+.LC26:
29830
+	.ascii	"slc_EC = 0x%x\012\000"
29831
+.LC27:
29832
+	.ascii	"avg_EC = 0x%x\012\000"
29833
+.LC28:
29834
+	.ascii	"sys_EC = 0x%x\012\000"
29835
+.LC29:
29836
+	.ascii	"max_EC = 0x%x\012\000"
29837
+.LC30:
29838
+	.ascii	"min_EC = 0x%x\012\000"
29839
+.LC31:
29840
+	.ascii	"PLT = 0x%x\012\000"
29841
+.LC32:
29842
+	.ascii	"POT = 0x%x\012\000"
29843
+.LC33:
29844
+	.ascii	"MaxSector = 0x%x\012\000"
29845
+.LC34:
29846
+	.ascii	"init_sys_blks_pp = 0x%x\012\000"
29847
+.LC35:
29848
+	.ascii	"sys_blks_pp = 0x%x\012\000"
29849
+.LC36:
29850
+	.ascii	"free sysblock = 0x%x\012\000"
29851
+.LC37:
29852
+	.ascii	"data_blks_pp = 0x%x\012\000"
29853
+.LC38:
29854
+	.ascii	"data_op_blks_pp = 0x%x\012\000"
29855
+.LC39:
29856
+	.ascii	"max_data_blks = 0x%x\012\000"
29857
+.LC40:
29858
+	.ascii	"Sys.id = 0x%x\012\000"
29859
+.LC41:
29860
+	.ascii	"Bbt.id = 0x%x\012\000"
29861
+.LC42:
29862
+	.ascii	"ACT.page = 0x%x\012\000"
29863
+.LC43:
29864
+	.ascii	"ACT.plane = 0x%x\012\000"
29865
+.LC44:
29866
+	.ascii	"ACT.id = 0x%x\012\000"
29867
+.LC45:
29868
+	.ascii	"ACT.mode = 0x%x\012\000"
29869
+.LC46:
29870
+	.ascii	"ACT.a_pages = 0x%x\012\000"
29871
+.LC47:
29872
+	.ascii	"ACT VPC = 0x%x\012\000"
29873
+.LC48:
29874
+	.ascii	"BUF.page = 0x%x\012\000"
29875
+.LC49:
29876
+	.ascii	"BUF.plane = 0x%x\012\000"
29877
+.LC50:
29878
+	.ascii	"BUF.id = 0x%x\012\000"
29879
+.LC51:
29880
+	.ascii	"BUF.mode = 0x%x\012\000"
29881
+.LC52:
29882
+	.ascii	"BUF.a_pages = 0x%x\012\000"
29883
+.LC53:
29884
+	.ascii	"BUF VPC = 0x%x\012\000"
29885
+.LC54:
29886
+	.ascii	"TMP.page = 0x%x\012\000"
29887
+.LC55:
29888
+	.ascii	"TMP.plane = 0x%x\012\000"
29889
+.LC56:
29890
+	.ascii	"TMP.id = 0x%x\012\000"
29891
+.LC57:
29892
+	.ascii	"TMP.mode = 0x%x\012\000"
29893
+.LC58:
29894
+	.ascii	"TMP.a_pages = 0x%x\012\000"
29895
+.LC59:
29896
+	.ascii	"GC.page = 0x%x\012\000"
29897
+.LC60:
29898
+	.ascii	"GC.plane = 0x%x\012\000"
29899
+.LC61:
29900
+	.ascii	"GC.id = 0x%x\012\000"
29901
+.LC62:
29902
+	.ascii	"GC.mode = 0x%x\012\000"
29903
+.LC63:
29904
+	.ascii	"GC.a_pages = 0x%x\012\000"
29905
+.LC64:
29906
+	.ascii	"WR_CHK = 0x%x %x %x %x\012\000"
29907
+.LC65:
29908
+	.ascii	"Read Err = 0x%x\012\000"
29909
+.LC66:
29910
+	.ascii	"Prog Err = 0x%x\012\000"
29911
+.LC67:
29912
+	.ascii	"gc_free_blk_th= 0x%x\012\000"
29913
+.LC68:
29914
+	.ascii	"gc_merge_free_blk_th= 0x%x\012\000"
29915
+.LC69:
29916
+	.ascii	"gc_skip_write_count= 0x%x\012\000"
29917
+.LC70:
29918
+	.ascii	"gc_blk_index= 0x%x\012\000"
29919
+.LC71:
29920
+	.ascii	"free min EC= 0x%x\012\000"
29921
+.LC72:
29922
+	.ascii	"free max EC= 0x%x\012\000"
29923
+.LC73:
29924
+	.ascii	"GC__SB VPC = 0x%x\012\000"
29925
+.LC74:
29926
+	.ascii	"%d. [0x%x]=0x%x 0x%x  0x%x\012\000"
29927
+.LC75:
29928
+	.ascii	"free %d. [0x%x] 0x%x  0x%x\012\000"
29929
+.LC76:
29930
+	.ascii	"FTL version: 5.0.63 20210616\000"
29931
+.LC77:
29932
+	.ascii	"%s\012\000"
29933
+.LC78:
29934
+	.ascii	"swblk %x ,avg = %x max= %x vpc= %x,ec=%x ,max ec=%x"
29935
+	.ascii	"\012\000"
29936
+.LC79:
29937
+	.ascii	"FtlGcRefreshBlock  0x%x\012\000"
29938
+.LC80:
29939
+	.ascii	"FtlGcMarkBadPhyBlk %d 0x%x\012\000"
29940
+.LC81:
29941
+	.ascii	"%s error allocating memory. return -1\012\000"
29942
+.LC82:
29943
+	.ascii	"%s %p:0x%x:\000"
29944
+.LC83:
29945
+	.ascii	"%x \000"
29946
+.LC84:
29947
+	.ascii	"\000"
29948
+.LC85:
29949
+	.ascii	"otp error! %d\000"
29950
+.LC86:
29951
+	.ascii	"rr\000"
29952
+.LC87:
29953
+	.ascii	"%d statReg->V6.mtrans_cnt=%d flReg.V6.page_num=%d\012"
29954
+	.ascii	"\000"
29955
+.LC88:
29956
+	.ascii	"nandc:\000"
29957
+.LC89:
29958
+	.ascii	"%d flReg.d32=%x %x\012\000"
29959
+.LC90:
29960
+	.ascii	"sdr read ok %x ecc=%d\012\000"
29961
+.LC91:
29962
+	.ascii	"sync para %d\012\000"
29963
+.LC92:
29964
+	.ascii	"TOG mode Read error %x %x\012\000"
29965
+.LC93:
29966
+	.ascii	"read retry status %x %x %x\012\000"
29967
+.LC94:
29968
+	.ascii	"micron RR %d row=%x,count %d,status=%d\012\000"
29969
+.LC95:
29970
+	.ascii	"samsung RR %d row=%x,count %d,status=%d\012\000"
29971
+.LC96:
29972
+	.ascii	"ECC:%d\012\000"
29973
+.LC97:
29974
+	.ascii	"No.%d FLASH ID:%x %x %x %x %x %x\012\000"
29975
+.LC98:
29976
+	.ascii	"FlashLoadPhyInfo fail %x!!\012\000"
29977
+.LC99:
29978
+	.ascii	"Read pageadd=%x  ecc=%x err=%x\012\000"
29979
+.LC100:
29980
+	.ascii	"data:\000"
29981
+.LC101:
29982
+	.ascii	"spare:\000"
29983
+.LC102:
29984
+	.ascii	"ReadRetry pageadd=%x ecc=%x err=%x\012\000"
29985
+.LC103:
29986
+	.ascii	"FLFB:%d %d\012\000"
29987
+.LC104:
29988
+	.ascii	"prog error: = %x\012\000"
29989
+.LC105:
29990
+	.ascii	"prog read error: = %x\012\000"
29991
+.LC106:
29992
+	.ascii	"prog read REFRESH: = %x\012\000"
29993
+.LC107:
29994
+	.ascii	"prog read s error: = %x %x %x\012\000"
29995
+.LC108:
29996
+	.ascii	"prog read d error: = %x %x %x\012\000"
29997
+.LC109:
29998
+	.ascii	"id = %x,%x addr= %x,spare= %x %x %x %x data= %x\012"
29999
+	.ascii	"\000"
30000
+.LC110:
30001
+	.ascii	"...%s enter...\012\000"
30002
+.LC111:
30003
+	.ascii	"superBlkID = %x vpc=%x\012\000"
30004
+.LC112:
30005
+	.ascii	"flashmode = %x pagenum = %x %x\012\000"
30006
+.LC113:
30007
+	.ascii	"id = %x,%x addr= %x,spare= %x %x %x %x data=%x %x\012"
30008
+	.ascii	"\000"
30009
+.LC114:
30010
+	.ascii	"blk = %x vpc=%x mode = %x\012\000"
30011
+.LC115:
30012
+	.ascii	"mlc id = %x,%x addr= %x,spare= %x %x %x %x data=%x "
30013
+	.ascii	"%x\012\000"
30014
+.LC116:
30015
+	.ascii	"slc id = %x,%x addr= %x,spare= %x %x %x %x data=%x "
30016
+	.ascii	"%x\012\000"
30017
+.LC117:
30018
+	.ascii	"ftl_scan_all_ppa blk %x page %x flag: %x\012\000"
30019
+.LC118:
30020
+	.ascii	"ftl_scan_all_ppa blk %x page %x flag: %x .........."
30021
+	.ascii	"..... is bad block\012\000"
30022
+.LC119:
30023
+	.ascii	"addr= %x, status= %d,spare= %x %x %x %x data=%x %x\012"
30024
+	.ascii	"\000"
30025
+.LC120:
30026
+	.ascii	"%s finished\012\000"
30027
+.LC121:
30028
+	.ascii	"FlashMakeFactorBbt %d\012\000"
30029
+.LC122:
30030
+	.ascii	"bad block:%d %d\012\000"
30031
+.LC123:
30032
+	.ascii	"FMFB:%d %d\012\000"
30033
+.LC124:
30034
+	.ascii	"E:bad block:%d\012\000"
30035
+.LC125:
30036
+	.ascii	"FMFB:Save %d %d\012\000"
30037
+.LC126:
30038
+	.ascii	"FtlBbmTblFlush id=%x,page=%x,previd=%x cnt=%d\012\000"
30039
+.LC127:
30040
+	.ascii	"FtlBbmTblFlush error:%x\012\000"
30041
+.LC128:
30042
+	.ascii	"FtlBbmTblFlush error = %x error count = %d\012\000"
30043
+.LC129:
30044
+	.ascii	"FtlGcFreeBadSuperBlk 0x%x\012\000"
30045
+.LC130:
30046
+	.ascii	"decrement_vpc_count %x = %d\012\000"
30047
+.LC131:
30048
+	.ascii	"decrement_vpc_count %x = %d in free list\012\000"
30049
+.LC132:
30050
+	.ascii	"FtlVpcTblFlush error = %x error count = %d\012\000"
30051
+.LC133:
30052
+	.ascii	"page map lost: %x %x\012\000"
30053
+.LC134:
30054
+	.ascii	"FtlMapWritePage error = %x\012\000"
30055
+.LC135:
30056
+	.ascii	"FtlMapWritePage error = %x error count = %d\012\000"
30057
+.LC136:
30058
+	.ascii	"FtlVendorPartRead refresh = %x phyAddr = %x\012\000"
30059
+.LC137:
30060
+	.ascii	"no ect\000"
30061
+.LC138:
30062
+	.ascii	"slc mode\000"
30063
+.LC139:
30064
+	.ascii	"BBT:\000"
30065
+.LC140:
30066
+	.ascii	"region_id = %x phyAddr = %x\012\000"
30067
+.LC141:
30068
+	.ascii	"map_ppn:\000"
30069
+.LC142:
30070
+	.ascii	"load_l2p_region refresh = %x phyAddr = %x\012\000"
30071
+.LC143:
30072
+	.ascii	"FtlCheckVpc2 %x = %x  %x\012\000"
30073
+.LC144:
30074
+	.ascii	"free blk vpc error %x = %x  %x\012\000"
30075
+.LC145:
30076
+	.ascii	"error_flag %x\012\000"
30077
+.LC146:
30078
+	.ascii	"Ftlscanalldata = %x\012\000"
30079
+.LC147:
30080
+	.ascii	"scan lpa = %x ppa= %x\012\000"
30081
+.LC148:
30082
+	.ascii	"lba = %x,addr= %x,spare= %x %x %x %x data=%x %x\012"
30083
+	.ascii	"\000"
30084
+.LC149:
30085
+	.ascii	"RSB refresh addr %x\012\000"
30086
+.LC150:
30087
+	.ascii	"spuer block %x vpn is 0\012 \000"
30088
+.LC151:
30089
+	.ascii	"g_recovery_ppa %x ver %x\012 \000"
30090
+.LC152:
30091
+	.ascii	"FtlCheckVpc %x = %x  %x\012\000"
30092
+.LC153:
30093
+	.ascii	"FtlGcScanTempBlk Error ID %x %x!!!!!!! \012\000"
30094
+.LC154:
30095
+	.ascii	"FtlGcScanTempBlkError ID %x %x!!!!!!!\012\000"
30096
+.LC155:
30097
+	.ascii	"GC des block %x done\012\000"
30098
+.LC156:
30099
+	.ascii	"too many bad block  = %d %d\012\000"
30100
+.LC157:
30101
+	.ascii	"%d GC datablk  = %x vpc %x %x\012\000"
30102
+.LC158:
30103
+	.ascii	"SWL %x, FSB = %x vpc= %x,ec=%x th=%x\012\000"
30104
+.LC159:
30105
+	.ascii	"Ftlwrite decrement_vpc_count %x = %d\012\000"
30106
+.LC160:
30107
+	.ascii	"rk_ftl_de_init %x\012\000"
30108
+.LC161:
30109
+	.ascii	"...%s: no bad block mapping table, format device\012"
30110
+	.ascii	"\000"
30111
+.LC162:
30112
+	.ascii	"...%s FtlSysBlkInit error ,format device!\012\000"
30113
+.LC163:
30114
+	.ascii	"FtlInit %x\012\000"
30115
+.LC164:
30116
+	.ascii	"fix power lost blk = %x vpc=%x\012\000"
30117
+.LC165:
30118
+	.ascii	"erase power lost blk = %x vpc=%x\012\000"
30119
+.LC166:
30120
+	.ascii	"FtlWrite: lpa error:%x %x\012\000"
30121
+.LC167:
30122
+	.ascii	"id = %x,%x addr= %x,spare= %x %x %x %x data = %x\012"
30123
+	.ascii	"\000"
30124
+.LC168:
30125
+	.ascii	":\000"
30126
+.LC169:
30127
+	.ascii	"phyBlk = %x,addr= %x,spare= %x %x %x %x data=%x %x\012"
30128
+	.ascii	"\000"
30129
+.LC170:
30130
+	.ascii	"Mblk:\000"
30131
+.LC171:
30132
+	.ascii	"L2P:\000"
30133
+.LC172:
30134
+	.ascii	"L2PC:\000"
30135
+.LC173:
30136
+	.ascii	"write_idblock fix data %x %x\012\000"
30137
+.LC174:
30138
+	.ascii	"idblk:\000"
30139
+.LC175:
30140
+	.ascii	"idb reverse %x %x\012\000"
30141
+.LC176:
30142
+	.ascii	"write_idblock totle_sec %x %x %x %x\012\000"
30143
+.LC177:
30144
+	.ascii	"IDBlockWriteData %x %x\012\000"
30145
+.LC178:
30146
+	.ascii	"IDBlockWriteData %x %x ret= %x\012\000"
30147
+.LC179:
30148
+	.ascii	"IdBlockReadData %x %x\012\000"
30149
+.LC180:
30150
+	.ascii	"IdBlockReadData %x %x ret= %x\012\000"
30151
+.LC181:
30152
+	.ascii	"write and check error:%d idb=%x,offset=%x,r=%x,w=%x"
30153
+	.ascii	"\012\000"
30154
+.LC182:
30155
+	.ascii	"write\000"
30156
+.LC183:
30157
+	.ascii	"read\000"
30158
+.LC184:
30159
+	.ascii	"write_idblock error %d\012\000"
30160
+.LC185:
30161
+	.ascii	"wl_lba %p %x %x %x\012\000"
30162
+.LC186:
30163
+	.ascii	"RKNAND_GET_DRM_KEY\012\000"
30164
+.LC187:
30165
+	.ascii	"rk_copy_from_user error\012\000"
30166
+.LC188:
30167
+	.ascii	"RKNAND_STORE_DRM_KEY\012\000"
30168
+.LC189:
30169
+	.ascii	"RKNAND_DIASBLE_SECURE_BOOT\012\000"
30170
+.LC190:
30171
+	.ascii	"RKNAND_ENASBLE_SECURE_BOOT\012\000"
30172
+.LC191:
30173
+	.ascii	"RKNAND_GET_SN_SECTOR\012\000"
30174
+.LC192:
30175
+	.ascii	"RKNAND_LOADER_UNLOCK\012\000"
30176
+.LC193:
30177
+	.ascii	"RKNAND_LOADER_STATUS\012\000"
30178
+.LC194:
30179
+	.ascii	"RKNAND_LOADER_LOCK\012\000"
30180
+.LC195:
30181
+	.ascii	"LockKey not match %d\012\000"
30182
+.LC196:
30183
+	.ascii	"RKNAND_GET_VENDOR_SECTOR\012\000"
30184
+.LC197:
30185
+	.ascii	"RKNAND_STORE_VENDOR_SECTOR\012\000"
30186
+.LC198:
30187
+	.ascii	"return ret = %lx\012\000"
30188
+.LC199:
30189
+	.ascii	"secureBootEn check error\012\000"
30190
+.LC200:
30191
+	.ascii	"\0013vendor storage %x,%x,%x\012\000"