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2024-02-20 ea08eeccae9297f7aabd2ef7f0c2517ac4549acc

 kernel/drivers/power/reset/at91-sama5d2_shdwc.c
..
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@@ -19,6 +19,7 @@
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19
  */
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20
 
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 #include <linux/clk.h>
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+#include <linux/clk/at91_pmc.h>
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 #include <linux/io.h>
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 #include <linux/module.h>
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 #include <linux/of.h>
..
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@@ -56,20 +57,38 @@
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57
 
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 #define SHDW_WK_PIN(reg, cfg)	((reg) & AT91_SHDW_WKUPIS((cfg)->wkup_pin_input))
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 #define SHDW_RTCWK(reg, cfg)	(((reg) >> ((cfg)->sr_rtcwk_shift)) & 0x1)
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+#define SHDW_RTTWK(reg, cfg)	(((reg) >> ((cfg)->sr_rttwk_shift)) & 0x1)
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 #define SHDW_RTCWKEN(cfg)	(1 << ((cfg)->mr_rtcwk_shift))
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+#define SHDW_RTTWKEN(cfg)	(1 << ((cfg)->mr_rttwk_shift))
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63
 
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 #define DBC_PERIOD_US(x)	DIV_ROUND_UP_ULL((1000000 * (x)), \
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 							SLOW_CLOCK_FREQ)
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66
 
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-struct shdwc_config {
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+#define SHDW_CFG_NOT_USED	(32)
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+
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+struct shdwc_reg_config {
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 	u8 wkup_pin_input;
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 	u8 mr_rtcwk_shift;
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+	u8 mr_rttwk_shift;
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 	u8 sr_rtcwk_shift;
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+	u8 sr_rttwk_shift;
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+};
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+
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+struct pmc_reg_config {
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+	u8 mckr;
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+};
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+
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+struct reg_config {
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+	struct shdwc_reg_config shdwc;
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+	struct pmc_reg_config pmc;
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 };
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85
 
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 struct shdwc {
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-	const struct shdwc_config *cfg;
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-	void __iomem *at91_shdwc_base;
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+	const struct reg_config *rcfg;
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+	struct clk *sclk;
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+	void __iomem *shdwc_base;
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+	void __iomem *mpddrc_base;
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+	void __iomem *pmc_base;
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 };
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93
 
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 /*
..
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@@ -77,8 +96,6 @@
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  * since pm_power_off itself is global.
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  */
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 static struct shdwc *at91_shdwc;
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-static struct clk *sclk;
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-static void __iomem *mpddrc_base;
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99
 
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 static const unsigned long long sdwc_dbc_period[] = {
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 	0, 3, 32, 512, 4096, 32768,
..
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@@ -87,10 +104,11 @@
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 static void __init at91_wakeup_status(struct platform_device *pdev)
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 {
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 	struct shdwc *shdw = platform_get_drvdata(pdev);
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+	const struct reg_config *rcfg = shdw->rcfg;
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 	u32 reg;
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 	char *reason = "unknown";
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110
 
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-	reg = readl(shdw->at91_shdwc_base + AT91_SHDW_SR);
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+	reg = readl(shdw->shdwc_base + AT91_SHDW_SR);
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112
 
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 	dev_dbg(&pdev->dev, "%s: status = %#x\n", __func__, reg);
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114
 
..
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@@ -98,21 +116,17 @@
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 	if (!reg)
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 		return;
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118
 
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-	if (SHDW_WK_PIN(reg, shdw->cfg))
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+	if (SHDW_WK_PIN(reg, &rcfg->shdwc))
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 		reason = "WKUP pin";
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-	else if (SHDW_RTCWK(reg, shdw->cfg))
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+	else if (SHDW_RTCWK(reg, &rcfg->shdwc))
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 		reason = "RTC";
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+	else if (SHDW_RTTWK(reg, &rcfg->shdwc))
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+		reason = "RTT";
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125
 
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 	pr_info("AT91: Wake-Up source: %s\n", reason);
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127
 }
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128
 
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 static void at91_poweroff(void)
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-{
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-	writel(AT91_SHDW_KEY | AT91_SHDW_SHDW,
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-	       at91_shdwc->at91_shdwc_base + AT91_SHDW_CR);
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-}
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-
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-static void at91_lpddr_poweroff(void)
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 {
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 	asm volatile(
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 		/* Align to cache lines */
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@@ -122,16 +136,30 @@
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136
 		"	ldr	r6, [%2, #" __stringify(AT91_SHDW_CR) "]\n\t"
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137
 
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 		/* Power down SDRAM0 */
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+		"	tst	%0, #0\n\t"
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+		"	beq	1f\n\t"
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 		"	str	%1, [%0, #" __stringify(AT91_DDRSDRC_LPR) "]\n\t"
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+
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+		/* Switch the master clock source to slow clock. */
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+		"1:	ldr	r6, [%4, %5]\n\t"
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+		"	bic	r6, r6,  #" __stringify(AT91_PMC_CSS) "\n\t"
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+		"	str	r6, [%4, %5]\n\t"
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+		/* Wait for clock switch. */
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+		"2:	ldr	r6, [%4, #" __stringify(AT91_PMC_SR) "]\n\t"
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+		"	tst	r6, #"	    __stringify(AT91_PMC_MCKRDY) "\n\t"
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+		"	beq	2b\n\t"
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+
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 		/* Shutdown CPU */
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 		"	str	%3, [%2, #" __stringify(AT91_SHDW_CR) "]\n\t"
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154
 
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 		"	b	.\n\t"
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 		:
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-		: "r" (mpddrc_base),
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+		: "r" (at91_shdwc->mpddrc_base),
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 		  "r" cpu_to_le32(AT91_DDRSDRC_LPDDR2_PWOFF),
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-		  "r" (at91_shdwc->at91_shdwc_base),
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-		  "r" cpu_to_le32(AT91_SHDW_KEY | AT91_SHDW_SHDW)
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+		  "r" (at91_shdwc->shdwc_base),
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+		  "r" cpu_to_le32(AT91_SHDW_KEY | AT91_SHDW_SHDW),
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+		  "r" (at91_shdwc->pmc_base),
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+		  "r" (at91_shdwc->rcfg->pmc.mckr)
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 		: "r6");
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 }
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165
 
..
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@@ -198,6 +226,7 @@
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 static void at91_shdwc_dt_configure(struct platform_device *pdev)
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 {
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 	struct shdwc *shdw = platform_get_drvdata(pdev);
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+	const struct reg_config *rcfg = shdw->rcfg;
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 	struct device_node *np = pdev->dev.of_node;
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 	u32 mode = 0, tmp, input;
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232
 
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@@ -210,30 +239,63 @@
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 		mode |= AT91_SHDW_WKUPDBC(at91_shdwc_debouncer_value(pdev, tmp));
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240
 
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 	if (of_property_read_bool(np, "atmel,wakeup-rtc-timer"))
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-		mode |= SHDW_RTCWKEN(shdw->cfg);
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+		mode |= SHDW_RTCWKEN(&rcfg->shdwc);
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+
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+	if (of_property_read_bool(np, "atmel,wakeup-rtt-timer"))
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+		mode |= SHDW_RTTWKEN(&rcfg->shdwc);
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246
 
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 	dev_dbg(&pdev->dev, "%s: mode = %#x\n", __func__, mode);
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-	writel(mode, shdw->at91_shdwc_base + AT91_SHDW_MR);
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+	writel(mode, shdw->shdwc_base + AT91_SHDW_MR);
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249
 
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 	input = at91_shdwc_get_wakeup_input(pdev, np);
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-	writel(input, shdw->at91_shdwc_base + AT91_SHDW_WUIR);
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+	writel(input, shdw->shdwc_base + AT91_SHDW_WUIR);
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252
 }
221
253
 
222
-static const struct shdwc_config sama5d2_shdwc_config = {
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-	.wkup_pin_input = 0,
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-	.mr_rtcwk_shift = 17,
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-	.sr_rtcwk_shift = 5,
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+static const struct reg_config sama5d2_reg_config = {
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+	.shdwc = {
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+		.wkup_pin_input = 0,
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+		.mr_rtcwk_shift = 17,
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+		.mr_rttwk_shift	= SHDW_CFG_NOT_USED,
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+		.sr_rtcwk_shift = 5,
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+		.sr_rttwk_shift = SHDW_CFG_NOT_USED,
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+	},
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+	.pmc = {
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+		.mckr		= 0x30,
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+	},
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+};
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+
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+static const struct reg_config sam9x60_reg_config = {
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+	.shdwc = {
269
+		.wkup_pin_input = 0,
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+		.mr_rtcwk_shift = 17,
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+		.mr_rttwk_shift = 16,
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+		.sr_rtcwk_shift = 5,
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+		.sr_rttwk_shift = 4,
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+	},
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+	.pmc = {
276
+		.mckr		= 0x28,
277
+	},
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278
 };
227
279
 
228
280
 static const struct of_device_id at91_shdwc_of_match[] = {
229
281
 	{
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282
 		.compatible = "atmel,sama5d2-shdwc",
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-		.data = &sama5d2_shdwc_config,
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+		.data = &sama5d2_reg_config,
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+	},
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+	{
286
+		.compatible = "microchip,sam9x60-shdwc",
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+		.data = &sam9x60_reg_config,
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288
 	}, {
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 		/*sentinel*/
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 	}
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291
 };
236
292
 MODULE_DEVICE_TABLE(of, at91_shdwc_of_match);
293
+
294
+static const struct of_device_id at91_pmc_ids[] = {
295
+	{ .compatible = "atmel,sama5d2-pmc" },
296
+	{ .compatible = "microchip,sam9x60-pmc" },
297
+	{ /* Sentinel. */ }
298
+};
237
299
 
238
300
 static int __init at91_shdwc_probe(struct platform_device *pdev)
239
301
 {
..
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@@ -256,20 +318,20 @@
256
318
 	platform_set_drvdata(pdev, at91_shdwc);
257
319
 
258
320
 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
259
-	at91_shdwc->at91_shdwc_base = devm_ioremap_resource(&pdev->dev, res);
260
-	if (IS_ERR(at91_shdwc->at91_shdwc_base)) {
321
+	at91_shdwc->shdwc_base = devm_ioremap_resource(&pdev->dev, res);
322
+	if (IS_ERR(at91_shdwc->shdwc_base)) {
261
323
 		dev_err(&pdev->dev, "Could not map reset controller address\n");
262
-		return PTR_ERR(at91_shdwc->at91_shdwc_base);
324
+		return PTR_ERR(at91_shdwc->shdwc_base);
263
325
 	}
264
326
 
265
327
 	match = of_match_node(at91_shdwc_of_match, pdev->dev.of_node);
266
-	at91_shdwc->cfg = match->data;
328
+	at91_shdwc->rcfg = match->data;
267
329
 
268
-	sclk = devm_clk_get(&pdev->dev, NULL);
269
-	if (IS_ERR(sclk))
270
-		return PTR_ERR(sclk);
330
+	at91_shdwc->sclk = devm_clk_get(&pdev->dev, NULL);
331
+	if (IS_ERR(at91_shdwc->sclk))
332
+		return PTR_ERR(at91_shdwc->sclk);
271
333
 
272
-	ret = clk_prepare_enable(sclk);
334
+	ret = clk_prepare_enable(at91_shdwc->sclk);
273
335
 	if (ret) {
274
336
 		dev_err(&pdev->dev, "Could not enable slow clock\n");
275
337
 		return ret;
..
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@@ -279,41 +341,70 @@
279
341
 
280
342
 	at91_shdwc_dt_configure(pdev);
281
343
 
282
-	pm_power_off = at91_poweroff;
344
+	np = of_find_matching_node(NULL, at91_pmc_ids);
345
+	if (!np) {
346
+		ret = -ENODEV;
347
+		goto clk_disable;
348
+	}
283
349
 
284
-	np = of_find_compatible_node(NULL, NULL, "atmel,sama5d3-ddramc");
285
-	if (!np)
286
-		return 0;
287
-
288
-	mpddrc_base = of_iomap(np, 0);
350
+	at91_shdwc->pmc_base = of_iomap(np, 0);
289
351
 	of_node_put(np);
290
352
 
291
-	if (!mpddrc_base)
292
-		return 0;
353
+	if (!at91_shdwc->pmc_base) {
354
+		ret = -ENOMEM;
355
+		goto clk_disable;
356
+	}
293
357
 
294
-	ddr_type = readl(mpddrc_base + AT91_DDRSDRC_MDR) & AT91_DDRSDRC_MD;
295
-	if ((ddr_type == AT91_DDRSDRC_MD_LPDDR2) ||
296
-	    (ddr_type == AT91_DDRSDRC_MD_LPDDR3))
297
-		pm_power_off = at91_lpddr_poweroff;
298
-	else
299
-		iounmap(mpddrc_base);
358
+	np = of_find_compatible_node(NULL, NULL, "atmel,sama5d3-ddramc");
359
+	if (!np) {
360
+		ret = -ENODEV;
361
+		goto unmap;
362
+	}
363
+
364
+	at91_shdwc->mpddrc_base = of_iomap(np, 0);
365
+	of_node_put(np);
366
+
367
+	if (!at91_shdwc->mpddrc_base) {
368
+		ret = -ENOMEM;
369
+		goto unmap;
370
+	}
371
+
372
+	pm_power_off = at91_poweroff;
373
+
374
+	ddr_type = readl(at91_shdwc->mpddrc_base + AT91_DDRSDRC_MDR) &
375
+			 AT91_DDRSDRC_MD;
376
+	if (ddr_type != AT91_DDRSDRC_MD_LPDDR2 &&
377
+	    ddr_type != AT91_DDRSDRC_MD_LPDDR3) {
378
+		iounmap(at91_shdwc->mpddrc_base);
379
+		at91_shdwc->mpddrc_base = NULL;
380
+	}
300
381
 
301
382
 	return 0;
383
+
384
+unmap:
385
+	iounmap(at91_shdwc->pmc_base);
386
+clk_disable:
387
+	clk_disable_unprepare(at91_shdwc->sclk);
388
+
389
+	return ret;
302
390
 }
303
391
 
304
392
 static int __exit at91_shdwc_remove(struct platform_device *pdev)
305
393
 {
306
394
 	struct shdwc *shdw = platform_get_drvdata(pdev);
307
395
 
308
-	if (pm_power_off == at91_poweroff ||
309
-	    pm_power_off == at91_lpddr_poweroff)
396
+	if (pm_power_off == at91_poweroff)
310
397
 		pm_power_off = NULL;
311
398
 
312
399
 	/* Reset values to disable wake-up features  */
313
-	writel(0, shdw->at91_shdwc_base + AT91_SHDW_MR);
314
-	writel(0, shdw->at91_shdwc_base + AT91_SHDW_WUIR);
400
+	writel(0, shdw->shdwc_base + AT91_SHDW_MR);
401
+	writel(0, shdw->shdwc_base + AT91_SHDW_WUIR);
315
402
 
316
-	clk_disable_unprepare(sclk);
403
+	if (shdw->mpddrc_base)
404
+		iounmap(shdw->mpddrc_base);
405
+	iounmap(shdw->pmc_base);
406
+
407
+	clk_disable_unprepare(shdw->sclk);
317
408
 
318
409
 	return 0;
319
410
 }