write in 30M

hc

2024-02-20 ea08eeccae9297f7aabd2ef7f0c2517ac4549acc

 kernel/drivers/pinctrl/pinctrl-artpec6.c
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@@ -688,8 +688,9 @@
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 	}
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 }
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-int artpec6_pmx_enable(struct pinctrl_dev *pctldev, unsigned int function,
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-		       unsigned int group)
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+static int artpec6_pmx_set(struct pinctrl_dev *pctldev,
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+			   unsigned int function,
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+			   unsigned int group)
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 {
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 	struct artpec6_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);
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@@ -700,18 +701,6 @@
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 	artpec6_pmx_select_func(pctldev, function, group, true);
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 	return 0;
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-}
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-
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-void artpec6_pmx_disable(struct pinctrl_dev *pctldev, unsigned int function,
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-			 unsigned int group)
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-{
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-	struct artpec6_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);
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-
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-	dev_dbg(pmx->dev, "disabling %s function for pin group %s\n",
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-		artpec6_pmx_get_fname(pctldev, function),
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-		artpec6_get_group_name(pctldev, group));
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-
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-	artpec6_pmx_select_func(pctldev, function, group, false);
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 }
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 static int artpec6_pmx_request_gpio(struct pinctrl_dev *pctldev,
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@@ -737,7 +726,7 @@
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 	.get_functions_count	= artpec6_pmx_get_functions_count,
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 	.get_function_name	= artpec6_pmx_get_fname,
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 	.get_function_groups	= artpec6_pmx_get_fgroups,
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-	.set_mux		= artpec6_pmx_enable,
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+	.set_mux		= artpec6_pmx_set,
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 	.gpio_request_enable = artpec6_pmx_request_gpio,
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 };
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@@ -809,7 +798,7 @@
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 	enum pin_config_param param;
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 	unsigned int arg;
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 	unsigned int regval;
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-	unsigned int *reg;
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+	void __iomem *reg;
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 	int i;
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 	/* Check for valid pin */
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@@ -947,7 +936,6 @@
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 static int artpec6_pmx_probe(struct platform_device *pdev)
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 {
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 	struct artpec6_pmx *pmx;
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-	struct resource *res;
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 	pmx = devm_kzalloc(&pdev->dev, sizeof(*pmx), GFP_KERNEL);
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 	if (!pmx)
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@@ -955,8 +943,7 @@
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 	pmx->dev = &pdev->dev;
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-	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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-	pmx->base = devm_ioremap_resource(&pdev->dev, res);
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+	pmx->base = devm_platform_ioremap_resource(pdev, 0);
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 	if (IS_ERR(pmx->base))
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 		return PTR_ERR(pmx->base);