write in 30M

hc

2024-02-20 ea08eeccae9297f7aabd2ef7f0c2517ac4549acc

 kernel/drivers/misc/cardreader/rtsx_pcr.h
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@@ -1,19 +1,7 @@
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+/* SPDX-License-Identifier: GPL-2.0-or-later */
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 /* Driver for Realtek PCI-Express card reader
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  *
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  * Copyright(c) 2009-2013 Realtek Semiconductor Corp. All rights reserved.
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- *
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- * This program is free software; you can redistribute it and/or modify it
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- * under the terms of the GNU General Public License as published by the
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- * Free Software Foundation; either version 2, or (at your option) any
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- * later version.
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- *
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- * This program is distributed in the hope that it will be useful, but
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- * WITHOUT ANY WARRANTY; without even the implied warranty of
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- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
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- * General Public License for more details.
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- *
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- * You should have received a copy of the GNU General Public License along
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- * with this program; if not, see <http://www.gnu.org/licenses/>.
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  *
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  * Author:
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  *   Wei WANG <wei_wang@realsil.com.cn>
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@@ -30,7 +18,24 @@
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 #define RTS522A_PM_CTRL3		0xFF7E
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 #define RTS524A_PME_FORCE_CTL		0xFF78
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+#define REG_EFUSE_BYPASS		0x08
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+#define REG_EFUSE_POR			0x04
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+#define REG_EFUSE_POWER_MASK		0x03
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+#define REG_EFUSE_POWERON		0x03
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+#define REG_EFUSE_POWEROFF		0x00
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+#define RTS5250_CLK_CFG3		0xFF79
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+#define RTS525A_CFG_MEM_PD		0xF0
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 #define RTS524A_PM_CTRL3		0xFF7E
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+#define RTS525A_BIOS_CFG		0xFF2D
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+#define RTS525A_LOAD_BIOS_FLAG	0x01
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+#define RTS525A_CLEAR_BIOS_FLAG	0x00
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+
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+#define RTS525A_EFUSE_CTL		0xFC32
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+#define REG_EFUSE_ENABLE		0x80
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+#define REG_EFUSE_MODE			0x40
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+#define RTS525A_EFUSE_ADD		0xFC33
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+#define REG_EFUSE_ADD_MASK		0x3F
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+#define RTS525A_EFUSE_DATA		0xFC35
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 #define LTR_ACTIVE_LATENCY_DEF		0x883C
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 #define LTR_IDLE_LATENCY_DEF		0x892C
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@@ -41,10 +46,14 @@
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 #define LTR_L1OFF_SNOOZE_SSPWRGATE_5249_DEF	0xAC
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 #define LTR_L1OFF_SNOOZE_SSPWRGATE_5250_DEF	0xF8
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 #define CMD_TIMEOUT_DEF		100
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-#define ASPM_MASK_NEG		0xFC
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 #define MASK_8_BIT_DEF		0xFF
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 #define SSC_CLOCK_STABLE_WAIT	130
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+
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+#define RTS524A_OCP_THD_800	0x04
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+#define RTS525A_OCP_THD_800	0x05
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+#define RTS522A_OCP_THD_800	0x06
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+
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 int __rtsx_pci_write_phy_register(struct rtsx_pcr *pcr, u8 addr, u16 val);
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 int __rtsx_pci_read_phy_register(struct rtsx_pcr *pcr, u8 addr, u16 *val);
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@@ -60,6 +69,8 @@
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 void rts525a_init_params(struct rtsx_pcr *pcr);
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 void rtl8411b_init_params(struct rtsx_pcr *pcr);
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 void rts5260_init_params(struct rtsx_pcr *pcr);
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+void rts5261_init_params(struct rtsx_pcr *pcr);
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+void rts5228_init_params(struct rtsx_pcr *pcr);
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 static inline u8 map_sd_drive(int idx)
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 {
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@@ -77,6 +88,8 @@
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 #define rts5209_vendor_setting1_valid(reg)	(!((reg) & 0x80))
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 #define rts5209_vendor_setting2_valid(reg)	((reg) & 0x80)
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+#define rtsx_check_mmc_support(reg)		((reg) & 0x10)
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+#define rtsx_reg_to_rtd3(reg)				((reg) & 0x02)
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 #define rtsx_reg_to_aspm(reg)			(((reg) >> 28) & 0x03)
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 #define rtsx_reg_to_sd30_drive_sel_1v8(reg)	(((reg) >> 26) & 0x03)
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 #define rtsx_reg_to_sd30_drive_sel_3v3(reg)	(((reg) >> 5) & 0x03)
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@@ -107,6 +120,8 @@
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 void rtsx_pci_enable_ocp(struct rtsx_pcr *pcr);
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 int rtsx_pci_get_ocpstat(struct rtsx_pcr *pcr, u8 *val);
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 void rtsx_pci_clear_ocpstat(struct rtsx_pcr *pcr);
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+void rtsx_pci_enable_oobs_polling(struct rtsx_pcr *pcr);
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+void rtsx_pci_disable_oobs_polling(struct rtsx_pcr *pcr);
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 int rtsx_sd_power_off_card3v3(struct rtsx_pcr *pcr);
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 int rtsx_ms_power_off_card3v3(struct rtsx_pcr *pcr);
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