write in 30M

hc

2024-02-20 ea08eeccae9297f7aabd2ef7f0c2517ac4549acc

 kernel/drivers/mfd/rk630.c
..
..
@@ -13,7 +13,7 @@
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13
 #include <linux/gpio/consumer.h>
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 #include <linux/mfd/rk630.h>
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15
 
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-static int rk630_macphy_enable(struct rk630 *rk630)
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+static int rk630_macphy_enable(struct rk630 *rk630, unsigned long rate)
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 {
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 	u32 val;
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 	int ret;
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@@ -68,8 +68,23 @@
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 		return ret;
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 	}
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70
 
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-	/* mode sel: RMII && clock sel: 24M && BGS value: OTP && id */
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-	val = (2 << 14) | (0 << 12) | (0x1 << 8) | (6 << 5) | 1;
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+	/* mode sel: RMII && BGS value: OTP && id */
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+	val = (2 << 14) | (0 << 12) | (0x1 << 8) | 1;
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+	switch (rate) {
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+	case 24000000:
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+		val |= 0x6 << 5;
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+		break;
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+	case 25000000:
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+		val |= 0x4 << 5;
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+		break;
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+	case 27000000:
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+		val |= 0x5 << 5;
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+		break;
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+	default:
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+		dev_err(rk630->dev, "Unsupported clock rate: %ld\n", rate);
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+		return -EINVAL;
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+	}
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+
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 	ret = regmap_write(rk630->grf, GRF_REG(0x404), val | 0xffff0000);
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 	if (ret != 0) {
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 		dev_err(rk630->dev, "Could not write to GRF: %d\n", ret);
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@@ -100,6 +115,10 @@
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 	{
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 		.name = "rk630-tve",
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 		.of_compatible = "rockchip,rk630-tve",
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+	},
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+	{
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+		.name = "rk630-rtc",
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+		.of_compatible = "rockchip,rk630-rtc",
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 	},
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 	{
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 		.name = "rk630-macphy",
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@@ -164,11 +183,57 @@
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 };
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 EXPORT_SYMBOL_GPL(rk630_cru_regmap_config);
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185
 
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+static const struct regmap_range rk630_rtc_readable_ranges[] = {
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+	regmap_reg_range(RTC_SET_SECONDS, RTC_CNT_3),
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+};
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+
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+static const struct regmap_access_table rk630_rtc_readable_table = {
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+	.yes_ranges = rk630_rtc_readable_ranges,
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+	.n_yes_ranges = ARRAY_SIZE(rk630_rtc_readable_ranges),
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+};
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+
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+const struct regmap_config rk630_rtc_regmap_config = {
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+	.name = "rtc",
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+	.reg_bits = 32,
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+	.val_bits = 32,
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+	.reg_stride = 4,
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+	.max_register = RTC_MAX_REGISTER,
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+	.reg_format_endian = REGMAP_ENDIAN_NATIVE,
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+	.val_format_endian = REGMAP_ENDIAN_NATIVE,
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+	.rd_table = &rk630_rtc_readable_table,
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+};
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+EXPORT_SYMBOL_GPL(rk630_rtc_regmap_config);
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+
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 int rk630_core_probe(struct rk630 *rk630)
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 {
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 	bool macphy_enabled = false;
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+	struct clk *ref_clk;
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 	struct device_node *np;
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+	unsigned long rate;
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 	int ret;
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+
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+	if (!rk630->irq) {
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+		dev_err(rk630->dev, "No interrupt support, no core IRQ\n");
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+		return -EINVAL;
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+	}
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+
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+	ref_clk = devm_clk_get(rk630->dev, "ref");
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+	if (IS_ERR(ref_clk)) {
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+		dev_err(rk630->dev, "failed to get ref clk source\n");
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+		return PTR_ERR(ref_clk);
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+	}
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+
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+	ret = clk_prepare_enable(ref_clk);
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+	if (ret < 0) {
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+		dev_err(rk630->dev, "failed to enable ref clk - %d\n", ret);
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+		return ret;
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+	}
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+	rate = clk_get_rate(ref_clk);
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+
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+	ret = devm_add_action_or_reset(rk630->dev, (void (*) (void *))clk_disable_unprepare,
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+				       ref_clk);
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+	if (ret)
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+		return ret;
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237
 
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 	rk630->reset_gpio = devm_gpiod_get(rk630->dev, "reset", 0);
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 	if (IS_ERR(rk630->reset_gpio)) {
..
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@@ -182,6 +247,16 @@
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 	gpiod_direction_output(rk630->reset_gpio, 1);
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 	usleep_range(50000, 60000);
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 	gpiod_direction_output(rk630->reset_gpio, 0);
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+
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+	/**
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+	 * If rtc output clamp is enabled, rtc regs can't be accessed,
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+	 * RK630 irq add will failed.
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+	 */
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+	regmap_update_bits(rk630->grf, PLUMAGE_GRF_SOC_CON0,
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+			   RTC_CLAMP_EN_MASK, RTC_CLAMP_EN(1));
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+
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+	/* disable ext_off\vbat_det\msec\sys_int\periodic interrupt by default */
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+	regmap_write(rk630->rtc, RTC_INT1_EN, 0);
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 	ret = devm_mfd_add_devices(rk630->dev, PLATFORM_DEVID_NONE,
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 				   rk630_devs, ARRAY_SIZE(rk630_devs),
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@@ -204,7 +279,7 @@
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 	}
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280
 
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 	if (macphy_enabled)
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-		rk630_macphy_enable(rk630);
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+		rk630_macphy_enable(rk630, rate);
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 	else
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 		rk630_macphy_disable(rk630);
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