| .. | .. |
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| 64 | 64 | num_chips * ORION_IRQS_PER_CHIP, |
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| 65 | 65 | &irq_generic_chip_ops, NULL); |
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| 66 | 66 | if (!orion_irq_domain) |
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| 67 | | - panic("%s: unable to add irq domain\n", np->name); |
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| 67 | + panic("%pOFn: unable to add irq domain\n", np); |
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| 68 | 68 | |
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| 69 | 69 | ret = irq_alloc_domain_generic_chips(orion_irq_domain, |
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| 70 | | - ORION_IRQS_PER_CHIP, 1, np->name, |
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| 70 | + ORION_IRQS_PER_CHIP, 1, np->full_name, |
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| 71 | 71 | handle_level_irq, clr, 0, |
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| 72 | 72 | IRQ_GC_INIT_MASK_CACHE); |
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| 73 | 73 | if (ret) |
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| 74 | | - panic("%s: unable to alloc irq domain gc\n", np->name); |
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| 74 | + panic("%pOFn: unable to alloc irq domain gc\n", np); |
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| 75 | 75 | |
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| 76 | 76 | for (n = 0, base = 0; n < num_chips; n++, base += ORION_IRQS_PER_CHIP) { |
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| 77 | 77 | struct irq_chip_generic *gc = |
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| .. | .. |
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| 80 | 80 | of_address_to_resource(np, n, &r); |
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| 81 | 81 | |
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| 82 | 82 | if (!request_mem_region(r.start, resource_size(&r), np->name)) |
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| 83 | | - panic("%s: unable to request mem region %d", |
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| 84 | | - np->name, n); |
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| 83 | + panic("%pOFn: unable to request mem region %d", |
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| 84 | + np, n); |
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| 85 | 85 | |
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| 86 | 86 | gc->reg_base = ioremap(r.start, resource_size(&r)); |
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| 87 | 87 | if (!gc->reg_base) |
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| 88 | | - panic("%s: unable to map resource %d", np->name, n); |
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| 88 | + panic("%pOFn: unable to map resource %d", np, n); |
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| 89 | 89 | |
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| 90 | 90 | gc->chip_types[0].regs.mask = ORION_IRQ_MASK; |
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| 91 | 91 | gc->chip_types[0].chip.irq_mask = irq_gc_mask_clr_bit; |
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| .. | .. |
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| 150 | 150 | domain = irq_domain_add_linear(np, nrirqs, |
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| 151 | 151 | &irq_generic_chip_ops, NULL); |
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| 152 | 152 | if (!domain) { |
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| 153 | | - pr_err("%s: unable to add irq domain\n", np->name); |
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| 153 | + pr_err("%pOFn: unable to add irq domain\n", np); |
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| 154 | 154 | return -ENOMEM; |
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| 155 | 155 | } |
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| 156 | 156 | |
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| 157 | 157 | ret = irq_alloc_domain_generic_chips(domain, nrirqs, 1, np->name, |
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| 158 | 158 | handle_edge_irq, clr, 0, IRQ_GC_INIT_MASK_CACHE); |
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| 159 | 159 | if (ret) { |
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| 160 | | - pr_err("%s: unable to alloc irq domain gc\n", np->name); |
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| 160 | + pr_err("%pOFn: unable to alloc irq domain gc\n", np); |
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| 161 | 161 | return ret; |
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| 162 | 162 | } |
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| 163 | 163 | |
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| 164 | 164 | ret = of_address_to_resource(np, 0, &r); |
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| 165 | 165 | if (ret) { |
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| 166 | | - pr_err("%s: unable to get resource\n", np->name); |
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| 166 | + pr_err("%pOFn: unable to get resource\n", np); |
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| 167 | 167 | return ret; |
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| 168 | 168 | } |
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| 169 | 169 | |
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| .. | .. |
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| 175 | 175 | /* Map the parent interrupt for the chained handler */ |
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| 176 | 176 | irq = irq_of_parse_and_map(np, 0); |
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| 177 | 177 | if (irq <= 0) { |
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| 178 | | - pr_err("%s: unable to parse irq\n", np->name); |
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| 178 | + pr_err("%pOFn: unable to parse irq\n", np); |
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| 179 | 179 | return -EINVAL; |
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| 180 | 180 | } |
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| 181 | 181 | |
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| 182 | 182 | gc = irq_get_domain_generic_chip(domain, 0); |
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| 183 | 183 | gc->reg_base = ioremap(r.start, resource_size(&r)); |
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| 184 | 184 | if (!gc->reg_base) { |
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| 185 | | - pr_err("%s: unable to map resource\n", np->name); |
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| 185 | + pr_err("%pOFn: unable to map resource\n", np); |
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| 186 | 186 | return -ENOMEM; |
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| 187 | 187 | } |
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| 188 | 188 | |
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