write in 30M

hc

2024-02-20 ea08eeccae9297f7aabd2ef7f0c2517ac4549acc

 kernel/drivers/irqchip/irq-atmel-aic5.c
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@@ -128,7 +128,7 @@
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 	irq_reg_writel(bgc, 1, AT91_AIC5_ISCR);
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 	irq_gc_unlock(bgc);
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-	return 0;
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+	return 1;
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 }
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 static int aic5_set_type(struct irq_data *d, unsigned type)
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@@ -310,9 +310,16 @@
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 	aic_common_rtc_irq_fixup();
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 }
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+static void __init sam9x60_aic_irq_fixup(void)
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+{
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+	aic_common_rtc_irq_fixup();
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+	aic_common_rtt_irq_fixup();
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+}
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+
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 static const struct of_device_id aic5_irq_fixups[] __initconst = {
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 	{ .compatible = "atmel,sama5d3", .data = sama5d3_aic_irq_fixup },
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 	{ .compatible = "atmel,sama5d4", .data = sama5d3_aic_irq_fixup },
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+	{ .compatible = "microchip,sam9x60", .data = sam9x60_aic_irq_fixup },
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 	{ /* sentinel */ },
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 };
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@@ -390,3 +397,12 @@
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 	return aic5_of_init(node, parent, NR_SAMA5D4_IRQS);
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 }
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 IRQCHIP_DECLARE(sama5d4_aic5, "atmel,sama5d4-aic", sama5d4_aic5_of_init);
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+
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+#define NR_SAM9X60_IRQS		50
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+
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+static int __init sam9x60_aic5_of_init(struct device_node *node,
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+				       struct device_node *parent)
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+{
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+	return aic5_of_init(node, parent, NR_SAM9X60_IRQS);
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+}
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+IRQCHIP_DECLARE(sam9x60_aic5, "microchip,sam9x60-aic", sam9x60_aic5_of_init);