| .. | .. |
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| 1 | +// SPDX-License-Identifier: GPL-2.0-only |
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| 1 | 2 | /* |
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| 2 | 3 | * omap iommu: tlb and pagetable primitives |
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| 3 | 4 | * |
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| 4 | 5 | * Copyright (C) 2008-2010 Nokia Corporation |
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| 5 | | - * Copyright (C) 2013-2017 Texas Instruments Incorporated - http://www.ti.com/ |
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| 6 | + * Copyright (C) 2013-2017 Texas Instruments Incorporated - https://www.ti.com/ |
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| 6 | 7 | * |
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| 7 | 8 | * Written by Hiroshi DOYU <Hiroshi.DOYU@nokia.com>, |
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| 8 | 9 | * Paul Mundt and Toshihiro Kobayashi |
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| 9 | | - * |
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| 10 | | - * This program is free software; you can redistribute it and/or modify |
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| 11 | | - * it under the terms of the GNU General Public License version 2 as |
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| 12 | | - * published by the Free Software Foundation. |
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| 13 | 10 | */ |
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| 14 | 11 | |
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| 15 | 12 | #include <linux/dma-mapping.h> |
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| .. | .. |
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| 38 | 35 | |
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| 39 | 36 | static const struct iommu_ops omap_iommu_ops; |
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| 40 | 37 | |
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| 41 | | -#define to_iommu(dev) \ |
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| 42 | | - ((struct omap_iommu *)platform_get_drvdata(to_platform_device(dev))) |
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| 38 | +#define to_iommu(dev) ((struct omap_iommu *)dev_get_drvdata(dev)) |
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| 43 | 39 | |
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| 44 | 40 | /* bitmap of the page sizes currently supported */ |
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| 45 | 41 | #define OMAP_IOMMU_PGSIZES (SZ_4K | SZ_64K | SZ_1M | SZ_16M) |
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| .. | .. |
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| 69 | 65 | /** |
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| 70 | 66 | * omap_iommu_save_ctx - Save registers for pm off-mode support |
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| 71 | 67 | * @dev: client device |
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| 68 | + * |
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| 69 | + * This should be treated as an deprecated API. It is preserved only |
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| 70 | + * to maintain existing functionality for OMAP3 ISP driver. |
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| 72 | 71 | **/ |
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| 73 | 72 | void omap_iommu_save_ctx(struct device *dev) |
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| 74 | 73 | { |
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| 75 | | - struct omap_iommu_arch_data *arch_data = dev->archdata.iommu; |
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| 74 | + struct omap_iommu_arch_data *arch_data = dev_iommu_priv_get(dev); |
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| 76 | 75 | struct omap_iommu *obj; |
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| 77 | 76 | u32 *p; |
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| 78 | 77 | int i; |
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| .. | .. |
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| 96 | 95 | /** |
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| 97 | 96 | * omap_iommu_restore_ctx - Restore registers for pm off-mode support |
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| 98 | 97 | * @dev: client device |
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| 98 | + * |
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| 99 | + * This should be treated as an deprecated API. It is preserved only |
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| 100 | + * to maintain existing functionality for OMAP3 ISP driver. |
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| 99 | 101 | **/ |
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| 100 | 102 | void omap_iommu_restore_ctx(struct device *dev) |
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| 101 | 103 | { |
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| 102 | | - struct omap_iommu_arch_data *arch_data = dev->archdata.iommu; |
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| 104 | + struct omap_iommu_arch_data *arch_data = dev_iommu_priv_get(dev); |
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| 103 | 105 | struct omap_iommu *obj; |
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| 104 | 106 | u32 *p; |
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| 105 | 107 | int i; |
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| .. | .. |
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| 154 | 156 | { |
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| 155 | 157 | u32 l, pa; |
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| 156 | 158 | |
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| 157 | | - if (!obj->iopgd || !IS_ALIGNED((u32)obj->iopgd, SZ_16K)) |
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| 159 | + if (!obj->iopgd || !IS_ALIGNED((unsigned long)obj->iopgd, SZ_16K)) |
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| 158 | 160 | return -EINVAL; |
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| 159 | 161 | |
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| 160 | 162 | pa = virt_to_phys(obj->iopgd); |
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| .. | .. |
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| 190 | 192 | |
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| 191 | 193 | static int iommu_enable(struct omap_iommu *obj) |
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| 192 | 194 | { |
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| 193 | | - int err; |
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| 194 | | - struct platform_device *pdev = to_platform_device(obj->dev); |
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| 195 | | - struct iommu_platform_data *pdata = dev_get_platdata(&pdev->dev); |
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| 195 | + int ret; |
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| 196 | 196 | |
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| 197 | | - if (pdata && pdata->deassert_reset) { |
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| 198 | | - err = pdata->deassert_reset(pdev, pdata->reset_name); |
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| 199 | | - if (err) { |
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| 200 | | - dev_err(obj->dev, "deassert_reset failed: %d\n", err); |
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| 201 | | - return err; |
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| 202 | | - } |
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| 203 | | - } |
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| 197 | + ret = pm_runtime_get_sync(obj->dev); |
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| 198 | + if (ret < 0) |
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| 199 | + pm_runtime_put_noidle(obj->dev); |
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| 204 | 200 | |
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| 205 | | - pm_runtime_get_sync(obj->dev); |
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| 206 | | - |
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| 207 | | - err = omap2_iommu_enable(obj); |
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| 208 | | - |
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| 209 | | - return err; |
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| 201 | + return ret < 0 ? ret : 0; |
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| 210 | 202 | } |
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| 211 | 203 | |
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| 212 | 204 | static void iommu_disable(struct omap_iommu *obj) |
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| 213 | 205 | { |
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| 214 | | - struct platform_device *pdev = to_platform_device(obj->dev); |
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| 215 | | - struct iommu_platform_data *pdata = dev_get_platdata(&pdev->dev); |
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| 216 | | - |
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| 217 | | - omap2_iommu_disable(obj); |
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| 218 | | - |
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| 219 | 206 | pm_runtime_put_sync(obj->dev); |
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| 220 | | - |
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| 221 | | - if (pdata && pdata->assert_reset) |
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| 222 | | - pdata->assert_reset(pdev, pdata->reset_name); |
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| 223 | 207 | } |
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| 224 | 208 | |
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| 225 | 209 | /* |
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| .. | .. |
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| 439 | 423 | bytes = iopgsz_to_bytes(cr.cam & 3); |
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| 440 | 424 | |
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| 441 | 425 | if ((start <= da) && (da < start + bytes)) { |
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| 442 | | - dev_dbg(obj->dev, "%s: %08x<=%08x(%x)\n", |
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| 426 | + dev_dbg(obj->dev, "%s: %08x<=%08x(%zx)\n", |
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| 443 | 427 | __func__, start, da, bytes); |
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| 444 | 428 | iotlb_load_cr(obj, &cr); |
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| 445 | 429 | iommu_write_reg(obj, 1, MMU_FLUSH_ENTRY); |
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| .. | .. |
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| 905 | 889 | |
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| 906 | 890 | dma_unmap_single(obj->dev, obj->pd_dma, IOPGD_TABLE_SIZE, |
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| 907 | 891 | DMA_TO_DEVICE); |
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| 908 | | - iommu_disable(obj); |
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| 909 | 892 | obj->pd_dma = 0; |
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| 910 | 893 | obj->iopgd = NULL; |
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| 894 | + iommu_disable(obj); |
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| 911 | 895 | |
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| 912 | 896 | spin_unlock(&obj->iommu_lock); |
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| 913 | 897 | |
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| 914 | 898 | dev_dbg(obj->dev, "%s: %s\n", __func__, obj->name); |
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| 899 | +} |
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| 900 | + |
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| 901 | +static void omap_iommu_save_tlb_entries(struct omap_iommu *obj) |
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| 902 | +{ |
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| 903 | + struct iotlb_lock lock; |
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| 904 | + struct cr_regs cr; |
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| 905 | + struct cr_regs *tmp; |
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| 906 | + int i; |
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| 907 | + |
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| 908 | + /* check if there are any locked tlbs to save */ |
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| 909 | + iotlb_lock_get(obj, &lock); |
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| 910 | + obj->num_cr_ctx = lock.base; |
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| 911 | + if (!obj->num_cr_ctx) |
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| 912 | + return; |
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| 913 | + |
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| 914 | + tmp = obj->cr_ctx; |
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| 915 | + for_each_iotlb_cr(obj, obj->num_cr_ctx, i, cr) |
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| 916 | + * tmp++ = cr; |
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| 917 | +} |
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| 918 | + |
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| 919 | +static void omap_iommu_restore_tlb_entries(struct omap_iommu *obj) |
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| 920 | +{ |
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| 921 | + struct iotlb_lock l; |
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| 922 | + struct cr_regs *tmp; |
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| 923 | + int i; |
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| 924 | + |
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| 925 | + /* no locked tlbs to restore */ |
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| 926 | + if (!obj->num_cr_ctx) |
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| 927 | + return; |
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| 928 | + |
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| 929 | + l.base = 0; |
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| 930 | + tmp = obj->cr_ctx; |
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| 931 | + for (i = 0; i < obj->num_cr_ctx; i++, tmp++) { |
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| 932 | + l.vict = i; |
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| 933 | + iotlb_lock_set(obj, &l); |
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| 934 | + iotlb_load_cr(obj, tmp); |
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| 935 | + } |
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| 936 | + l.base = obj->num_cr_ctx; |
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| 937 | + l.vict = i; |
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| 938 | + iotlb_lock_set(obj, &l); |
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| 939 | +} |
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| 940 | + |
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| 941 | +/** |
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| 942 | + * omap_iommu_domain_deactivate - deactivate attached iommu devices |
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| 943 | + * @domain: iommu domain attached to the target iommu device |
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| 944 | + * |
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| 945 | + * This API allows the client devices of IOMMU devices to suspend |
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| 946 | + * the IOMMUs they control at runtime, after they are idled and |
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| 947 | + * suspended all activity. System Suspend will leverage the PM |
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| 948 | + * driver late callbacks. |
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| 949 | + **/ |
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| 950 | +int omap_iommu_domain_deactivate(struct iommu_domain *domain) |
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| 951 | +{ |
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| 952 | + struct omap_iommu_domain *omap_domain = to_omap_domain(domain); |
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| 953 | + struct omap_iommu_device *iommu; |
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| 954 | + struct omap_iommu *oiommu; |
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| 955 | + int i; |
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| 956 | + |
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| 957 | + if (!omap_domain->dev) |
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| 958 | + return 0; |
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| 959 | + |
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| 960 | + iommu = omap_domain->iommus; |
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| 961 | + iommu += (omap_domain->num_iommus - 1); |
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| 962 | + for (i = 0; i < omap_domain->num_iommus; i++, iommu--) { |
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| 963 | + oiommu = iommu->iommu_dev; |
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| 964 | + pm_runtime_put_sync(oiommu->dev); |
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| 965 | + } |
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| 966 | + |
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| 967 | + return 0; |
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| 968 | +} |
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| 969 | +EXPORT_SYMBOL_GPL(omap_iommu_domain_deactivate); |
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| 970 | + |
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| 971 | +/** |
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| 972 | + * omap_iommu_domain_activate - activate attached iommu devices |
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| 973 | + * @domain: iommu domain attached to the target iommu device |
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| 974 | + * |
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| 975 | + * This API allows the client devices of IOMMU devices to resume the |
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| 976 | + * IOMMUs they control at runtime, before they can resume operations. |
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| 977 | + * System Resume will leverage the PM driver late callbacks. |
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| 978 | + **/ |
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| 979 | +int omap_iommu_domain_activate(struct iommu_domain *domain) |
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| 980 | +{ |
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| 981 | + struct omap_iommu_domain *omap_domain = to_omap_domain(domain); |
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| 982 | + struct omap_iommu_device *iommu; |
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| 983 | + struct omap_iommu *oiommu; |
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| 984 | + int i; |
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| 985 | + |
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| 986 | + if (!omap_domain->dev) |
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| 987 | + return 0; |
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| 988 | + |
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| 989 | + iommu = omap_domain->iommus; |
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| 990 | + for (i = 0; i < omap_domain->num_iommus; i++, iommu++) { |
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| 991 | + oiommu = iommu->iommu_dev; |
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| 992 | + pm_runtime_get_sync(oiommu->dev); |
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| 993 | + } |
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| 994 | + |
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| 995 | + return 0; |
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| 996 | +} |
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| 997 | +EXPORT_SYMBOL_GPL(omap_iommu_domain_activate); |
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| 998 | + |
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| 999 | +/** |
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| 1000 | + * omap_iommu_runtime_suspend - disable an iommu device |
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| 1001 | + * @dev: iommu device |
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| 1002 | + * |
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| 1003 | + * This function performs all that is necessary to disable an |
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| 1004 | + * IOMMU device, either during final detachment from a client |
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| 1005 | + * device, or during system/runtime suspend of the device. This |
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| 1006 | + * includes programming all the appropriate IOMMU registers, and |
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| 1007 | + * managing the associated omap_hwmod's state and the device's |
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| 1008 | + * reset line. This function also saves the context of any |
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| 1009 | + * locked TLBs if suspending. |
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| 1010 | + **/ |
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| 1011 | +static __maybe_unused int omap_iommu_runtime_suspend(struct device *dev) |
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| 1012 | +{ |
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| 1013 | + struct platform_device *pdev = to_platform_device(dev); |
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| 1014 | + struct iommu_platform_data *pdata = dev_get_platdata(dev); |
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| 1015 | + struct omap_iommu *obj = to_iommu(dev); |
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| 1016 | + int ret; |
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| 1017 | + |
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| 1018 | + /* save the TLBs only during suspend, and not for power down */ |
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| 1019 | + if (obj->domain && obj->iopgd) |
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| 1020 | + omap_iommu_save_tlb_entries(obj); |
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| 1021 | + |
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| 1022 | + omap2_iommu_disable(obj); |
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| 1023 | + |
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| 1024 | + if (pdata && pdata->device_idle) |
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| 1025 | + pdata->device_idle(pdev); |
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| 1026 | + |
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| 1027 | + if (pdata && pdata->assert_reset) |
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| 1028 | + pdata->assert_reset(pdev, pdata->reset_name); |
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| 1029 | + |
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| 1030 | + if (pdata && pdata->set_pwrdm_constraint) { |
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| 1031 | + ret = pdata->set_pwrdm_constraint(pdev, false, &obj->pwrst); |
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| 1032 | + if (ret) { |
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| 1033 | + dev_warn(obj->dev, "pwrdm_constraint failed to be reset, status = %d\n", |
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| 1034 | + ret); |
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| 1035 | + } |
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| 1036 | + } |
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| 1037 | + |
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| 1038 | + return 0; |
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| 1039 | +} |
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| 1040 | + |
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| 1041 | +/** |
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| 1042 | + * omap_iommu_runtime_resume - enable an iommu device |
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| 1043 | + * @dev: iommu device |
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| 1044 | + * |
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| 1045 | + * This function performs all that is necessary to enable an |
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| 1046 | + * IOMMU device, either during initial attachment to a client |
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| 1047 | + * device, or during system/runtime resume of the device. This |
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| 1048 | + * includes programming all the appropriate IOMMU registers, and |
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| 1049 | + * managing the associated omap_hwmod's state and the device's |
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| 1050 | + * reset line. The function also restores any locked TLBs if |
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| 1051 | + * resuming after a suspend. |
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| 1052 | + **/ |
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| 1053 | +static __maybe_unused int omap_iommu_runtime_resume(struct device *dev) |
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| 1054 | +{ |
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| 1055 | + struct platform_device *pdev = to_platform_device(dev); |
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| 1056 | + struct iommu_platform_data *pdata = dev_get_platdata(dev); |
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| 1057 | + struct omap_iommu *obj = to_iommu(dev); |
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| 1058 | + int ret = 0; |
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| 1059 | + |
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| 1060 | + if (pdata && pdata->set_pwrdm_constraint) { |
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| 1061 | + ret = pdata->set_pwrdm_constraint(pdev, true, &obj->pwrst); |
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| 1062 | + if (ret) { |
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| 1063 | + dev_warn(obj->dev, "pwrdm_constraint failed to be set, status = %d\n", |
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| 1064 | + ret); |
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| 1065 | + } |
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| 1066 | + } |
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| 1067 | + |
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| 1068 | + if (pdata && pdata->deassert_reset) { |
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| 1069 | + ret = pdata->deassert_reset(pdev, pdata->reset_name); |
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| 1070 | + if (ret) { |
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| 1071 | + dev_err(dev, "deassert_reset failed: %d\n", ret); |
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| 1072 | + return ret; |
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| 1073 | + } |
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| 1074 | + } |
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| 1075 | + |
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| 1076 | + if (pdata && pdata->device_enable) |
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| 1077 | + pdata->device_enable(pdev); |
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| 1078 | + |
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| 1079 | + /* restore the TLBs only during resume, and not for power up */ |
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| 1080 | + if (obj->domain) |
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| 1081 | + omap_iommu_restore_tlb_entries(obj); |
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| 1082 | + |
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| 1083 | + ret = omap2_iommu_enable(obj); |
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| 1084 | + |
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| 1085 | + return ret; |
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| 1086 | +} |
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| 1087 | + |
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| 1088 | +/** |
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| 1089 | + * omap_iommu_suspend_prepare - prepare() dev_pm_ops implementation |
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| 1090 | + * @dev: iommu device |
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| 1091 | + * |
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| 1092 | + * This function performs the necessary checks to determine if the IOMMU |
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| 1093 | + * device needs suspending or not. The function checks if the runtime_pm |
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| 1094 | + * status of the device is suspended, and returns 1 in that case. This |
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| 1095 | + * results in the PM core to skip invoking any of the Sleep PM callbacks |
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| 1096 | + * (suspend, suspend_late, resume, resume_early etc). |
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| 1097 | + */ |
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| 1098 | +static int omap_iommu_prepare(struct device *dev) |
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| 1099 | +{ |
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| 1100 | + if (pm_runtime_status_suspended(dev)) |
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| 1101 | + return 1; |
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| 1102 | + return 0; |
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| 915 | 1103 | } |
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| 916 | 1104 | |
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| 917 | 1105 | static bool omap_iommu_can_register(struct platform_device *pdev) |
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| .. | .. |
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| 988 | 1176 | if (!obj) |
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| 989 | 1177 | return -ENOMEM; |
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| 990 | 1178 | |
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| 1179 | + /* |
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| 1180 | + * self-manage the ordering dependencies between omap_device_enable/idle |
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| 1181 | + * and omap_device_assert/deassert_hardreset API |
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| 1182 | + */ |
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| 1183 | + if (pdev->dev.pm_domain) { |
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| 1184 | + dev_dbg(&pdev->dev, "device pm_domain is being reset\n"); |
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| 1185 | + pdev->dev.pm_domain = NULL; |
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| 1186 | + } |
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| 1187 | + |
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| 991 | 1188 | obj->name = dev_name(&pdev->dev); |
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| 992 | 1189 | obj->nr_tlb_entries = 32; |
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| 993 | 1190 | err = of_property_read_u32(of, "ti,#tlb-entries", &obj->nr_tlb_entries); |
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| .. | .. |
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| 1000 | 1197 | |
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| 1001 | 1198 | obj->dev = &pdev->dev; |
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| 1002 | 1199 | obj->ctx = (void *)obj + sizeof(*obj); |
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| 1200 | + obj->cr_ctx = devm_kzalloc(&pdev->dev, |
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| 1201 | + sizeof(*obj->cr_ctx) * obj->nr_tlb_entries, |
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| 1202 | + GFP_KERNEL); |
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| 1203 | + if (!obj->cr_ctx) |
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| 1204 | + return -ENOMEM; |
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| 1003 | 1205 | |
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| 1004 | 1206 | spin_lock_init(&obj->iommu_lock); |
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| 1005 | 1207 | spin_lock_init(&obj->page_table_lock); |
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| .. | .. |
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| 1034 | 1236 | goto out_group; |
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| 1035 | 1237 | |
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| 1036 | 1238 | iommu_device_set_ops(&obj->iommu, &omap_iommu_ops); |
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| 1239 | + iommu_device_set_fwnode(&obj->iommu, &of->fwnode); |
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| 1037 | 1240 | |
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| 1038 | 1241 | err = iommu_device_register(&obj->iommu); |
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| 1039 | 1242 | if (err) |
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| 1040 | 1243 | goto out_sysfs; |
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| 1041 | 1244 | } |
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| 1042 | 1245 | |
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| 1043 | | - pm_runtime_irq_safe(obj->dev); |
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| 1044 | 1246 | pm_runtime_enable(obj->dev); |
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| 1045 | 1247 | |
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| 1046 | 1248 | omap_iommu_debugfs_add(obj); |
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| 1047 | 1249 | |
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| 1048 | 1250 | dev_info(&pdev->dev, "%s registered\n", obj->name); |
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| 1251 | + |
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| 1252 | + /* Re-probe bus to probe device attached to this IOMMU */ |
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| 1253 | + bus_iommu_probe(&platform_bus_type); |
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| 1049 | 1254 | |
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| 1050 | 1255 | return 0; |
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| 1051 | 1256 | |
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| .. | .. |
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| 1076 | 1281 | return 0; |
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| 1077 | 1282 | } |
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| 1078 | 1283 | |
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| 1284 | +static const struct dev_pm_ops omap_iommu_pm_ops = { |
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| 1285 | + .prepare = omap_iommu_prepare, |
|---|
| 1286 | + SET_LATE_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, |
|---|
| 1287 | + pm_runtime_force_resume) |
|---|
| 1288 | + SET_RUNTIME_PM_OPS(omap_iommu_runtime_suspend, |
|---|
| 1289 | + omap_iommu_runtime_resume, NULL) |
|---|
| 1290 | +}; |
|---|
| 1291 | + |
|---|
| 1079 | 1292 | static const struct of_device_id omap_iommu_of_match[] = { |
|---|
| 1080 | 1293 | { .compatible = "ti,omap2-iommu" }, |
|---|
| 1081 | 1294 | { .compatible = "ti,omap4-iommu" }, |
|---|
| .. | .. |
|---|
| 1089 | 1302 | .remove = omap_iommu_remove, |
|---|
| 1090 | 1303 | .driver = { |
|---|
| 1091 | 1304 | .name = "omap-iommu", |
|---|
| 1305 | + .pm = &omap_iommu_pm_ops, |
|---|
| 1092 | 1306 | .of_match_table = of_match_ptr(omap_iommu_of_match), |
|---|
| 1093 | 1307 | }, |
|---|
| 1094 | 1308 | }; |
|---|
| .. | .. |
|---|
| 1109 | 1323 | } |
|---|
| 1110 | 1324 | |
|---|
| 1111 | 1325 | static int omap_iommu_map(struct iommu_domain *domain, unsigned long da, |
|---|
| 1112 | | - phys_addr_t pa, size_t bytes, int prot) |
|---|
| 1326 | + phys_addr_t pa, size_t bytes, int prot, gfp_t gfp) |
|---|
| 1113 | 1327 | { |
|---|
| 1114 | 1328 | struct omap_iommu_domain *omap_domain = to_omap_domain(domain); |
|---|
| 1115 | 1329 | struct device *dev = omap_domain->dev; |
|---|
| .. | .. |
|---|
| 1122 | 1336 | |
|---|
| 1123 | 1337 | omap_pgsz = bytes_to_iopgsz(bytes); |
|---|
| 1124 | 1338 | if (omap_pgsz < 0) { |
|---|
| 1125 | | - dev_err(dev, "invalid size to map: %d\n", bytes); |
|---|
| 1339 | + dev_err(dev, "invalid size to map: %zu\n", bytes); |
|---|
| 1126 | 1340 | return -EINVAL; |
|---|
| 1127 | 1341 | } |
|---|
| 1128 | 1342 | |
|---|
| 1129 | | - dev_dbg(dev, "mapping da 0x%lx to pa %pa size 0x%x\n", da, &pa, bytes); |
|---|
| 1343 | + dev_dbg(dev, "mapping da 0x%lx to pa %pa size 0x%zx\n", da, &pa, bytes); |
|---|
| 1130 | 1344 | |
|---|
| 1131 | 1345 | iotlb_init_entry(&e, da, pa, omap_pgsz); |
|---|
| 1132 | 1346 | |
|---|
| .. | .. |
|---|
| 1153 | 1367 | } |
|---|
| 1154 | 1368 | |
|---|
| 1155 | 1369 | static size_t omap_iommu_unmap(struct iommu_domain *domain, unsigned long da, |
|---|
| 1156 | | - size_t size) |
|---|
| 1370 | + size_t size, struct iommu_iotlb_gather *gather) |
|---|
| 1157 | 1371 | { |
|---|
| 1158 | 1372 | struct omap_iommu_domain *omap_domain = to_omap_domain(domain); |
|---|
| 1159 | 1373 | struct device *dev = omap_domain->dev; |
|---|
| .. | .. |
|---|
| 1163 | 1377 | size_t bytes = 0; |
|---|
| 1164 | 1378 | int i; |
|---|
| 1165 | 1379 | |
|---|
| 1166 | | - dev_dbg(dev, "unmapping da 0x%lx size %u\n", da, size); |
|---|
| 1380 | + dev_dbg(dev, "unmapping da 0x%lx size %zu\n", da, size); |
|---|
| 1167 | 1381 | |
|---|
| 1168 | 1382 | iommu = omap_domain->iommus; |
|---|
| 1169 | 1383 | for (i = 0; i < omap_domain->num_iommus; i++, iommu++) { |
|---|
| .. | .. |
|---|
| 1184 | 1398 | |
|---|
| 1185 | 1399 | static int omap_iommu_count(struct device *dev) |
|---|
| 1186 | 1400 | { |
|---|
| 1187 | | - struct omap_iommu_arch_data *arch_data = dev->archdata.iommu; |
|---|
| 1401 | + struct omap_iommu_arch_data *arch_data = dev_iommu_priv_get(dev); |
|---|
| 1188 | 1402 | int count = 0; |
|---|
| 1189 | 1403 | |
|---|
| 1190 | 1404 | while (arch_data->iommu_dev) { |
|---|
| .. | .. |
|---|
| 1245 | 1459 | static int |
|---|
| 1246 | 1460 | omap_iommu_attach_dev(struct iommu_domain *domain, struct device *dev) |
|---|
| 1247 | 1461 | { |
|---|
| 1462 | + struct omap_iommu_arch_data *arch_data = dev_iommu_priv_get(dev); |
|---|
| 1248 | 1463 | struct omap_iommu_domain *omap_domain = to_omap_domain(domain); |
|---|
| 1249 | | - struct omap_iommu_arch_data *arch_data = dev->archdata.iommu; |
|---|
| 1250 | 1464 | struct omap_iommu_device *iommu; |
|---|
| 1251 | 1465 | struct omap_iommu *oiommu; |
|---|
| 1252 | 1466 | int ret = 0; |
|---|
| .. | .. |
|---|
| 1310 | 1524 | static void _omap_iommu_detach_dev(struct omap_iommu_domain *omap_domain, |
|---|
| 1311 | 1525 | struct device *dev) |
|---|
| 1312 | 1526 | { |
|---|
| 1313 | | - struct omap_iommu_arch_data *arch_data = dev->archdata.iommu; |
|---|
| 1527 | + struct omap_iommu_arch_data *arch_data = dev_iommu_priv_get(dev); |
|---|
| 1314 | 1528 | struct omap_iommu_device *iommu = omap_domain->iommus; |
|---|
| 1315 | 1529 | struct omap_iommu *oiommu; |
|---|
| 1316 | 1530 | int i; |
|---|
| .. | .. |
|---|
| 1427 | 1641 | return ret; |
|---|
| 1428 | 1642 | } |
|---|
| 1429 | 1643 | |
|---|
| 1430 | | -static int omap_iommu_add_device(struct device *dev) |
|---|
| 1644 | +static struct iommu_device *omap_iommu_probe_device(struct device *dev) |
|---|
| 1431 | 1645 | { |
|---|
| 1432 | 1646 | struct omap_iommu_arch_data *arch_data, *tmp; |
|---|
| 1433 | | - struct omap_iommu *oiommu; |
|---|
| 1434 | | - struct iommu_group *group; |
|---|
| 1435 | | - struct device_node *np; |
|---|
| 1436 | 1647 | struct platform_device *pdev; |
|---|
| 1648 | + struct omap_iommu *oiommu; |
|---|
| 1649 | + struct device_node *np; |
|---|
| 1437 | 1650 | int num_iommus, i; |
|---|
| 1438 | | - int ret; |
|---|
| 1439 | 1651 | |
|---|
| 1440 | 1652 | /* |
|---|
| 1441 | | - * Allocate the archdata iommu structure for DT-based devices. |
|---|
| 1653 | + * Allocate the per-device iommu structure for DT-based devices. |
|---|
| 1442 | 1654 | * |
|---|
| 1443 | 1655 | * TODO: Simplify this when removing non-DT support completely from the |
|---|
| 1444 | 1656 | * IOMMU users. |
|---|
| 1445 | 1657 | */ |
|---|
| 1446 | 1658 | if (!dev->of_node) |
|---|
| 1447 | | - return 0; |
|---|
| 1659 | + return ERR_PTR(-ENODEV); |
|---|
| 1448 | 1660 | |
|---|
| 1449 | 1661 | /* |
|---|
| 1450 | 1662 | * retrieve the count of IOMMU nodes using phandle size as element size |
|---|
| .. | .. |
|---|
| 1453 | 1665 | num_iommus = of_property_count_elems_of_size(dev->of_node, "iommus", |
|---|
| 1454 | 1666 | sizeof(phandle)); |
|---|
| 1455 | 1667 | if (num_iommus < 0) |
|---|
| 1456 | | - return 0; |
|---|
| 1668 | + return ERR_PTR(-ENODEV); |
|---|
| 1457 | 1669 | |
|---|
| 1458 | 1670 | arch_data = kcalloc(num_iommus + 1, sizeof(*arch_data), GFP_KERNEL); |
|---|
| 1459 | 1671 | if (!arch_data) |
|---|
| 1460 | | - return -ENOMEM; |
|---|
| 1672 | + return ERR_PTR(-ENOMEM); |
|---|
| 1461 | 1673 | |
|---|
| 1462 | 1674 | for (i = 0, tmp = arch_data; i < num_iommus; i++, tmp++) { |
|---|
| 1463 | 1675 | np = of_parse_phandle(dev->of_node, "iommus", i); |
|---|
| 1464 | 1676 | if (!np) { |
|---|
| 1465 | 1677 | kfree(arch_data); |
|---|
| 1466 | | - return -EINVAL; |
|---|
| 1678 | + return ERR_PTR(-EINVAL); |
|---|
| 1467 | 1679 | } |
|---|
| 1468 | 1680 | |
|---|
| 1469 | 1681 | pdev = of_find_device_by_node(np); |
|---|
| 1470 | | - if (WARN_ON(!pdev)) { |
|---|
| 1682 | + if (!pdev) { |
|---|
| 1471 | 1683 | of_node_put(np); |
|---|
| 1472 | 1684 | kfree(arch_data); |
|---|
| 1473 | | - return -EINVAL; |
|---|
| 1685 | + return ERR_PTR(-ENODEV); |
|---|
| 1474 | 1686 | } |
|---|
| 1475 | 1687 | |
|---|
| 1476 | 1688 | oiommu = platform_get_drvdata(pdev); |
|---|
| 1477 | 1689 | if (!oiommu) { |
|---|
| 1478 | 1690 | of_node_put(np); |
|---|
| 1479 | 1691 | kfree(arch_data); |
|---|
| 1480 | | - return -EINVAL; |
|---|
| 1692 | + return ERR_PTR(-EINVAL); |
|---|
| 1481 | 1693 | } |
|---|
| 1482 | 1694 | |
|---|
| 1483 | 1695 | tmp->iommu_dev = oiommu; |
|---|
| 1696 | + tmp->dev = &pdev->dev; |
|---|
| 1484 | 1697 | |
|---|
| 1485 | 1698 | of_node_put(np); |
|---|
| 1486 | 1699 | } |
|---|
| 1700 | + |
|---|
| 1701 | + dev_iommu_priv_set(dev, arch_data); |
|---|
| 1487 | 1702 | |
|---|
| 1488 | 1703 | /* |
|---|
| 1489 | 1704 | * use the first IOMMU alone for the sysfs device linking. |
|---|
| .. | .. |
|---|
| 1491 | 1706 | * maintained for both IOMMUs |
|---|
| 1492 | 1707 | */ |
|---|
| 1493 | 1708 | oiommu = arch_data->iommu_dev; |
|---|
| 1494 | | - ret = iommu_device_link(&oiommu->iommu, dev); |
|---|
| 1495 | | - if (ret) { |
|---|
| 1496 | | - kfree(arch_data); |
|---|
| 1497 | | - return ret; |
|---|
| 1498 | | - } |
|---|
| 1499 | 1709 | |
|---|
| 1500 | | - dev->archdata.iommu = arch_data; |
|---|
| 1501 | | - |
|---|
| 1502 | | - /* |
|---|
| 1503 | | - * IOMMU group initialization calls into omap_iommu_device_group, which |
|---|
| 1504 | | - * needs a valid dev->archdata.iommu pointer |
|---|
| 1505 | | - */ |
|---|
| 1506 | | - group = iommu_group_get_for_dev(dev); |
|---|
| 1507 | | - if (IS_ERR(group)) { |
|---|
| 1508 | | - iommu_device_unlink(&oiommu->iommu, dev); |
|---|
| 1509 | | - dev->archdata.iommu = NULL; |
|---|
| 1510 | | - kfree(arch_data); |
|---|
| 1511 | | - return PTR_ERR(group); |
|---|
| 1512 | | - } |
|---|
| 1513 | | - iommu_group_put(group); |
|---|
| 1514 | | - |
|---|
| 1515 | | - return 0; |
|---|
| 1710 | + return &oiommu->iommu; |
|---|
| 1516 | 1711 | } |
|---|
| 1517 | 1712 | |
|---|
| 1518 | | -static void omap_iommu_remove_device(struct device *dev) |
|---|
| 1713 | +static void omap_iommu_release_device(struct device *dev) |
|---|
| 1519 | 1714 | { |
|---|
| 1520 | | - struct omap_iommu_arch_data *arch_data = dev->archdata.iommu; |
|---|
| 1715 | + struct omap_iommu_arch_data *arch_data = dev_iommu_priv_get(dev); |
|---|
| 1521 | 1716 | |
|---|
| 1522 | 1717 | if (!dev->of_node || !arch_data) |
|---|
| 1523 | 1718 | return; |
|---|
| 1524 | 1719 | |
|---|
| 1525 | | - iommu_device_unlink(&arch_data->iommu_dev->iommu, dev); |
|---|
| 1526 | | - iommu_group_remove_device(dev); |
|---|
| 1527 | | - |
|---|
| 1528 | | - dev->archdata.iommu = NULL; |
|---|
| 1720 | + dev_iommu_priv_set(dev, NULL); |
|---|
| 1529 | 1721 | kfree(arch_data); |
|---|
| 1530 | 1722 | |
|---|
| 1531 | 1723 | } |
|---|
| 1532 | 1724 | |
|---|
| 1533 | 1725 | static struct iommu_group *omap_iommu_device_group(struct device *dev) |
|---|
| 1534 | 1726 | { |
|---|
| 1535 | | - struct omap_iommu_arch_data *arch_data = dev->archdata.iommu; |
|---|
| 1727 | + struct omap_iommu_arch_data *arch_data = dev_iommu_priv_get(dev); |
|---|
| 1536 | 1728 | struct iommu_group *group = ERR_PTR(-EINVAL); |
|---|
| 1729 | + |
|---|
| 1730 | + if (!arch_data) |
|---|
| 1731 | + return ERR_PTR(-ENODEV); |
|---|
| 1537 | 1732 | |
|---|
| 1538 | 1733 | if (arch_data->iommu_dev) |
|---|
| 1539 | 1734 | group = iommu_group_ref_get(arch_data->iommu_dev->group); |
|---|
| .. | .. |
|---|
| 1549 | 1744 | .map = omap_iommu_map, |
|---|
| 1550 | 1745 | .unmap = omap_iommu_unmap, |
|---|
| 1551 | 1746 | .iova_to_phys = omap_iommu_iova_to_phys, |
|---|
| 1552 | | - .add_device = omap_iommu_add_device, |
|---|
| 1553 | | - .remove_device = omap_iommu_remove_device, |
|---|
| 1747 | + .probe_device = omap_iommu_probe_device, |
|---|
| 1748 | + .release_device = omap_iommu_release_device, |
|---|
| 1554 | 1749 | .device_group = omap_iommu_device_group, |
|---|
| 1555 | 1750 | .pgsize_bitmap = OMAP_IOMMU_PGSIZES, |
|---|
| 1556 | 1751 | }; |
|---|
| .. | .. |
|---|
| 1558 | 1753 | static int __init omap_iommu_init(void) |
|---|
| 1559 | 1754 | { |
|---|
| 1560 | 1755 | struct kmem_cache *p; |
|---|
| 1561 | | - const unsigned long flags = SLAB_HWCACHE_ALIGN; |
|---|
| 1756 | + const slab_flags_t flags = SLAB_HWCACHE_ALIGN; |
|---|
| 1562 | 1757 | size_t align = 1 << 10; /* L2 pagetable alignement */ |
|---|
| 1563 | 1758 | struct device_node *np; |
|---|
| 1564 | 1759 | int ret; |
|---|