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2024-02-20 ea08eeccae9297f7aabd2ef7f0c2517ac4549acc

 kernel/drivers/gpio/gpio-sodaville.c
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..
@@ -1,26 +1,22 @@
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+// SPDX-License-Identifier: GPL-2.0
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 /*
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  *  GPIO interface for Intel Sodaville SoCs.
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  *
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  *  Copyright (c) 2010, 2011 Intel Corporation
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  *
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  *  Author: Hans J. Koch <hjk@linutronix.de>
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- *
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- *  This program is free software; you can redistribute it and/or modify
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- *  it under the terms of the GNU General Public License 2 as published
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- *  by the Free Software Foundation.
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- *
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  */
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9
 
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 #include <linux/errno.h>
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+#include <linux/gpio/driver.h>
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 #include <linux/init.h>
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+#include <linux/interrupt.h>
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 #include <linux/io.h>
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 #include <linux/irq.h>
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-#include <linux/interrupt.h>
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 #include <linux/kernel.h>
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+#include <linux/of_irq.h>
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 #include <linux/pci.h>
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 #include <linux/platform_device.h>
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-#include <linux/of_irq.h>
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-#include <linux/gpio/driver.h>
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20
 
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 #define DRV_NAME		"sdv_gpio"
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 #define SDV_NUM_PUB_GPIOS	12
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@@ -80,18 +76,15 @@
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 static irqreturn_t sdv_gpio_pub_irq_handler(int irq, void *data)
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 {
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 	struct sdv_gpio_chip_data *sd = data;
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-	u32 irq_stat = readl(sd->gpio_pub_base + GPSTR);
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+	unsigned long irq_stat = readl(sd->gpio_pub_base + GPSTR);
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+	int irq_bit;
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 	irq_stat &= readl(sd->gpio_pub_base + GPIO_INT);
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 	if (!irq_stat)
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 		return IRQ_NONE;
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-	while (irq_stat) {
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-		u32 irq_bit = __fls(irq_stat);
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-
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-		irq_stat &= ~BIT(irq_bit);
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+	for_each_set_bit(irq_bit, &irq_stat, 32)
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 		generic_handle_irq(irq_find_mapping(sd->id, irq_bit));
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-	}
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 	return IRQ_HANDLED;
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 }
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@@ -155,8 +148,10 @@
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 	 * we unmask & ACK the IRQ before the source of the interrupt is gone
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 	 * then the interrupt is active again.
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 	 */
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-	sd->gc = irq_alloc_generic_chip("sdv-gpio", 1, sd->irq_base,
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-			sd->gpio_pub_base, handle_fasteoi_irq);
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+	sd->gc = devm_irq_alloc_generic_chip(&pdev->dev, "sdv-gpio", 1,
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+					     sd->irq_base,
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+					     sd->gpio_pub_base,
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+					     handle_fasteoi_irq);
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 	if (!sd->gc)
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 		return -ENOMEM;
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157
 
..
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@@ -186,70 +181,52 @@
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 					const struct pci_device_id *pci_id)
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 {
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 	struct sdv_gpio_chip_data *sd;
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-	unsigned long addr;
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-	const void *prop;
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-	int len;
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 	int ret;
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 	u32 mux_val;
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-	sd = kzalloc(sizeof(struct sdv_gpio_chip_data), GFP_KERNEL);
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+	sd = devm_kzalloc(&pdev->dev, sizeof(*sd), GFP_KERNEL);
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 	if (!sd)
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 		return -ENOMEM;
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-	ret = pci_enable_device(pdev);
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+
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+	ret = pcim_enable_device(pdev);
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 	if (ret) {
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 		dev_err(&pdev->dev, "can't enable device.\n");
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-		goto done;
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+		return ret;
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 	}
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-	ret = pci_request_region(pdev, GPIO_BAR, DRV_NAME);
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+	ret = pcim_iomap_regions(pdev, 1 << GPIO_BAR, DRV_NAME);
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 	if (ret) {
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 		dev_err(&pdev->dev, "can't alloc PCI BAR #%d\n", GPIO_BAR);
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-		goto disable_pci;
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+		return ret;
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 	}
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-	addr = pci_resource_start(pdev, GPIO_BAR);
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-	if (!addr) {
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-		ret = -ENODEV;
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-		goto release_reg;
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-	}
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-	sd->gpio_pub_base = ioremap(addr, pci_resource_len(pdev, GPIO_BAR));
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+	sd->gpio_pub_base = pcim_iomap_table(pdev)[GPIO_BAR];
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-	prop = of_get_property(pdev->dev.of_node, "intel,muxctl", &len);
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-	if (prop && len == 4) {
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-		mux_val = of_read_number(prop, 1);
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+	ret = of_property_read_u32(pdev->dev.of_node, "intel,muxctl", &mux_val);
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+	if (!ret)
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 		writel(mux_val, sd->gpio_pub_base + GPMUXCTL);
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-	}
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 	ret = bgpio_init(&sd->chip, &pdev->dev, 4,
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 			sd->gpio_pub_base + GPINR, sd->gpio_pub_base + GPOUTR,
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 			NULL, sd->gpio_pub_base + GPOER, NULL, 0);
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 	if (ret)
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-		goto unmap;
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+		return ret;
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+
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 	sd->chip.ngpio = SDV_NUM_PUB_GPIOS;
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-	ret = gpiochip_add_data(&sd->chip, sd);
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+	ret = devm_gpiochip_add_data(&pdev->dev, &sd->chip, sd);
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 	if (ret < 0) {
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 		dev_err(&pdev->dev, "gpiochip_add() failed.\n");
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-		goto unmap;
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+		return ret;
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 	}
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 	ret = sdv_register_irqsupport(sd, pdev);
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 	if (ret)
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-		goto unmap;
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+		return ret;
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 	pci_set_drvdata(pdev, sd);
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 	dev_info(&pdev->dev, "Sodaville GPIO driver registered.\n");
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 	return 0;
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-
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-unmap:
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-	iounmap(sd->gpio_pub_base);
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-release_reg:
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-	pci_release_region(pdev, GPIO_BAR);
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-disable_pci:
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-	pci_disable_device(pdev);
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-done:
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-	kfree(sd);
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-	return ret;
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 }
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 static const struct pci_device_id sdv_gpio_pci_ids[] = {