write in 30M

hc

2024-02-20 ea08eeccae9297f7aabd2ef7f0c2517ac4549acc

 kernel/drivers/gpio/gpio-mmio.c
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@@ -1,13 +1,9 @@
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+// SPDX-License-Identifier: GPL-2.0+
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 /*
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  * Generic driver for memory-mapped GPIO controllers.
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  *
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  * Copyright 2008 MontaVista Software, Inc.
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  * Copyright 2008,2010 Anton Vorontsov <cbouatmailru@gmail.com>
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- *
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- * This program is free software; you can redistribute  it and/or modify it
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- * under  the terms of  the GNU General  Public License as published by the
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- * Free Software Foundation;  either version 2 of the  License, or (at your
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- * option) any later version.
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  *
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  * ....``.```~~~~````.`.`.`.`.```````'',,,.........`````......`.......
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  * ...``                                                         ```````..
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@@ -138,17 +134,6 @@
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 	unsigned long pinmask = bgpio_line2mask(gc, gpio);
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 	bool dir = !!(gc->bgpio_dir & pinmask);
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-	/*
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-	 * If the direction is OUT we read the value from the SET
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-	 * register, and if the direction is IN we read the value
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-	 * from the DAT register.
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-	 *
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-	 * If the direction bits are inverted, naturally this gets
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-	 * inverted too.
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-	 */
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-	if (gc->bgpio_dir_inverted)
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-		dir = !dir;
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-
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 	if (dir)
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 		return !!(gc->read_reg(gc->reg_set) & pinmask);
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 	else
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@@ -168,14 +153,8 @@
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 	/* Make sure we first clear any bits that are zero when we read the register */
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 	*bits &= ~*mask;
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-	/* Exploit the fact that we know which directions are set */
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-	if (gc->bgpio_dir_inverted) {
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-		set_mask = *mask & ~gc->bgpio_dir;
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-		get_mask = *mask & gc->bgpio_dir;
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-	} else {
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-		set_mask = *mask & gc->bgpio_dir;
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-		get_mask = *mask & ~gc->bgpio_dir;
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-	}
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+	set_mask = *mask & gc->bgpio_dir;
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+	get_mask = *mask & ~gc->bgpio_dir;
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 	if (set_mask)
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 		*bits |= gc->read_reg(gc->reg_set) & set_mask;
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@@ -216,8 +195,7 @@
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 	*bits &= ~*mask;
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 	/* Create a mirrored mask */
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-	bit = -1;
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-	while ((bit = find_next_bit(mask, gc->ngpio, bit + 1)) < gc->ngpio)
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+	for_each_set_bit(bit, mask, gc->ngpio)
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 		readmask |= bgpio_line2mask(gc, bit);
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 	/* Read the register */
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@@ -227,8 +205,7 @@
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 	 * Mirror the result into the "bits" result, this will give line 0
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 	 * in bit 0 ... line 31 in bit 31 for a 32bit register.
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 	 */
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-	bit = -1;
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-	while ((bit = find_next_bit(&val, gc->ngpio, bit + 1)) < gc->ngpio)
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+	for_each_set_bit(bit, &val, gc->ngpio)
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 		*bits |= bgpio_line2mask(gc, bit);
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 	return 0;
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@@ -293,15 +270,11 @@
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 	*set_mask = 0;
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 	*clear_mask = 0;
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272
 
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-	for (i = 0; i < gc->bgpio_bits; i++) {
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-		if (*mask == 0)
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-			break;
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-		if (__test_and_clear_bit(i, mask)) {
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-			if (test_bit(i, bits))
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-				*set_mask |= bgpio_line2mask(gc, i);
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-			else
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-				*clear_mask |= bgpio_line2mask(gc, i);
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-		}
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+	for_each_set_bit(i, mask, gc->bgpio_bits) {
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+		if (test_bit(i, bits))
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+			*set_mask |= bgpio_line2mask(gc, i);
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+		else
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+			*clear_mask |= bgpio_line2mask(gc, i);
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 	}
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 }
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@@ -376,11 +349,12 @@
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 	spin_lock_irqsave(&gc->bgpio_lock, flags);
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-	if (gc->bgpio_dir_inverted)
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-		gc->bgpio_dir |= bgpio_line2mask(gc, gpio);
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-	else
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-		gc->bgpio_dir &= ~bgpio_line2mask(gc, gpio);
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-	gc->write_reg(gc->reg_dir, gc->bgpio_dir);
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+	gc->bgpio_dir &= ~bgpio_line2mask(gc, gpio);
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+
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+	if (gc->reg_dir_in)
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+		gc->write_reg(gc->reg_dir_in, ~gc->bgpio_dir);
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+	if (gc->reg_dir_out)
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+		gc->write_reg(gc->reg_dir_out, gc->bgpio_dir);
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 	spin_unlock_irqrestore(&gc->bgpio_lock, flags);
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@@ -389,29 +363,55 @@
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363
 
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 static int bgpio_get_dir(struct gpio_chip *gc, unsigned int gpio)
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 {
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-	/* Return 0 if output, 1 of input */
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-	if (gc->bgpio_dir_inverted)
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-		return !!(gc->read_reg(gc->reg_dir) & bgpio_line2mask(gc, gpio));
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-	else
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-		return !(gc->read_reg(gc->reg_dir) & bgpio_line2mask(gc, gpio));
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+	/* Return 0 if output, 1 if input */
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+	if (gc->bgpio_dir_unreadable) {
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+		if (gc->bgpio_dir & bgpio_line2mask(gc, gpio))
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+			return GPIO_LINE_DIRECTION_OUT;
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+		return GPIO_LINE_DIRECTION_IN;
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+	}
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+
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+	if (gc->reg_dir_out) {
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+		if (gc->read_reg(gc->reg_dir_out) & bgpio_line2mask(gc, gpio))
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+			return GPIO_LINE_DIRECTION_OUT;
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+		return GPIO_LINE_DIRECTION_IN;
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+	}
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+
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+	if (gc->reg_dir_in)
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+		if (!(gc->read_reg(gc->reg_dir_in) & bgpio_line2mask(gc, gpio)))
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+			return GPIO_LINE_DIRECTION_OUT;
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+
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+	return GPIO_LINE_DIRECTION_IN;
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 }
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-static int bgpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
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+static void bgpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
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 {
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 	unsigned long flags;
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-	gc->set(gc, gpio, val);
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-
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 	spin_lock_irqsave(&gc->bgpio_lock, flags);
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-	if (gc->bgpio_dir_inverted)
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-		gc->bgpio_dir &= ~bgpio_line2mask(gc, gpio);
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-	else
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-		gc->bgpio_dir |= bgpio_line2mask(gc, gpio);
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-	gc->write_reg(gc->reg_dir, gc->bgpio_dir);
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+	gc->bgpio_dir |= bgpio_line2mask(gc, gpio);
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+
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+	if (gc->reg_dir_in)
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+		gc->write_reg(gc->reg_dir_in, ~gc->bgpio_dir);
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+	if (gc->reg_dir_out)
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+		gc->write_reg(gc->reg_dir_out, gc->bgpio_dir);
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 	spin_unlock_irqrestore(&gc->bgpio_lock, flags);
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+}
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401
 
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+static int bgpio_dir_out_dir_first(struct gpio_chip *gc, unsigned int gpio,
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+				   int val)
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+{
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+	bgpio_dir_out(gc, gpio, val);
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+	gc->set(gc, gpio, val);
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+	return 0;
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+}
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+
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+static int bgpio_dir_out_val_first(struct gpio_chip *gc, unsigned int gpio,
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+				   int val)
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+{
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+	gc->set(gc, gpio, val);
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+	bgpio_dir_out(gc, gpio, val);
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 	return 0;
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 }
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@@ -541,19 +541,15 @@
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 				 void __iomem *dirin,
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 				 unsigned long flags)
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 {
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-	if (dirout && dirin) {
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-		return -EINVAL;
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-	} else if (dirout) {
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-		gc->reg_dir = dirout;
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-		gc->direction_output = bgpio_dir_out;
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+	if (dirout || dirin) {
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+		gc->reg_dir_out = dirout;
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+		gc->reg_dir_in = dirin;
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+		if (flags & BGPIOF_NO_SET_ON_INPUT)
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+			gc->direction_output = bgpio_dir_out_dir_first;
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+		else
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+			gc->direction_output = bgpio_dir_out_val_first;
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 		gc->direction_input = bgpio_dir_in;
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 		gc->get_direction = bgpio_get_dir;
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-	} else if (dirin) {
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-		gc->reg_dir = dirin;
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-		gc->direction_output = bgpio_dir_out;
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-		gc->direction_input = bgpio_dir_in;
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-		gc->get_direction = bgpio_get_dir;
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-		gc->bgpio_dir_inverted = true;
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 	} else {
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 		if (flags & BGPIOF_NO_OUTPUT)
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 			gc->direction_output = bgpio_dir_out_err;
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@@ -592,11 +588,11 @@
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  * @dirout: MMIO address for the register to set the line as OUTPUT. It is assumed
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  *	that setting a line to 1 in this register will turn that line into an
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  *	output line. Conversely, setting the line to 0 will turn that line into
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- *	an input. Either this or @dirin can be defined, but never both.
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+ *	an input.
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  * @dirin: MMIO address for the register to set this line as INPUT. It is assumed
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  *	that setting a line to 1 in this register will turn that line into an
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  *	input line. Conversely, setting the line to 0 will turn that line into
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- *	an output. Either this or @dirout can be defined, but never both.
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+ *	an output.
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  * @flags: Different flags that will affect the behaviour of the device, such as
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  *	endianness etc.
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  */
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@@ -638,8 +634,28 @@
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 	if (gc->set == bgpio_set_set &&
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 			!(flags & BGPIOF_UNREADABLE_REG_SET))
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 		gc->bgpio_data = gc->read_reg(gc->reg_set);
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-	if (gc->reg_dir && !(flags & BGPIOF_UNREADABLE_REG_DIR))
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-		gc->bgpio_dir = gc->read_reg(gc->reg_dir);
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+
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+	if (flags & BGPIOF_UNREADABLE_REG_DIR)
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+		gc->bgpio_dir_unreadable = true;
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+
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+	/*
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+	 * Inspect hardware to find initial direction setting.
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+	 */
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+	if ((gc->reg_dir_out || gc->reg_dir_in) &&
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+	    !(flags & BGPIOF_UNREADABLE_REG_DIR)) {
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+		if (gc->reg_dir_out)
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+			gc->bgpio_dir = gc->read_reg(gc->reg_dir_out);
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+		else if (gc->reg_dir_in)
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+			gc->bgpio_dir = ~gc->read_reg(gc->reg_dir_in);
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+		/*
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+		 * If we have two direction registers, synchronise
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+		 * input setting to output setting, the library
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+		 * can not handle a line being input and output at
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+		 * the same time.
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+		 */
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+		if (gc->reg_dir_out && gc->reg_dir_in)
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+			gc->write_reg(gc->reg_dir_in, ~gc->bgpio_dir);
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+	}
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 	return ret;
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 }