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2024-02-20 ea08eeccae9297f7aabd2ef7f0c2517ac4549acc 
 kernel/drivers/gpio/gpio-gpio-mm.c
....@@ -1,15 +1,7 @@
1
+// SPDX-License-Identifier: GPL-2.0-only
12 /*
23  * GPIO driver for the Diamond Systems GPIO-MM
34  * Copyright (C) 2016 William Breathitt Gray
4
- *
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- * This program is free software; you can redistribute it and/or modify
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- * it under the terms of the GNU General Public License, version 2, as
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- * published by the Free Software Foundation.
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- *
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- * This program is distributed in the hope that it will be useful, but
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- * WITHOUT ANY WARRANTY; without even the implied warranty of
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- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
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- * General Public License for more details.
135  *
146  * This driver supports the following Diamond Systems devices: GPIO-MM and
157  * GPIO-MM-12.
....@@ -60,7 +52,10 @@
6052 	const unsigned int port = offset / 8;
6153 	const unsigned int mask = BIT(offset % 8);
6254 
63
-	return !!(gpiommgpio->io_state[port] & mask);
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+	if (gpiommgpio->io_state[port] & mask)
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+		return GPIO_LINE_DIRECTION_IN;
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+
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+	return GPIO_LINE_DIRECTION_OUT;
6459 }
6560 
6661 static int gpiomm_gpio_direction_input(struct gpio_chip *chip,
....@@ -172,46 +167,25 @@
172167 	return !!(port_state & mask);
173168 }
174169 
170
+static const size_t ports[] = { 0, 1, 2, 4, 5, 6 };
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+
175172 static int gpiomm_gpio_get_multiple(struct gpio_chip *chip, unsigned long *mask,
176173 	unsigned long *bits)
177174 {
178175 	struct gpiomm_gpio *const gpiommgpio = gpiochip_get_data(chip);
179
-	size_t i;
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-	static const size_t ports[] = { 0, 1, 2, 4, 5, 6 };
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-	const unsigned int gpio_reg_size = 8;
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-	unsigned int bits_offset;
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-	size_t word_index;
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-	unsigned int word_offset;
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-	unsigned long word_mask;
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-	const unsigned long port_mask = GENMASK(gpio_reg_size - 1, 0);
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+	unsigned long offset;
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+	unsigned long gpio_mask;
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+	unsigned int port_addr;
187179 	unsigned long port_state;
188180 
189181 	/* clear bits array to a clean slate */
190182 	bitmap_zero(bits, chip->ngpio);
191183 
192
-	/* get bits are evaluated a gpio port register at a time */
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-	for (i = 0; i < ARRAY_SIZE(ports); i++) {
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-		/* gpio offset in bits array */
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-		bits_offset = i * gpio_reg_size;
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+	for_each_set_clump8(offset, gpio_mask, mask, ARRAY_SIZE(ports) * 8) {
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+		port_addr = gpiommgpio->base + ports[offset / 8];
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+		port_state = inb(port_addr) & gpio_mask;
196187 
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-		/* word index for bits array */
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-		word_index = BIT_WORD(bits_offset);
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-
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-		/* gpio offset within current word of bits array */
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-		word_offset = bits_offset % BITS_PER_LONG;
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-
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-		/* mask of get bits for current gpio within current word */
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-		word_mask = mask[word_index] & (port_mask << word_offset);
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-		if (!word_mask) {
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-			/* no get bits in this port so skip to next one */
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-			continue;
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-		}
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-
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-		/* read bits from current gpio port */
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-		port_state = inb(gpiommgpio->base + ports[i]);
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-
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-		/* store acquired bits at respective bits array offset */
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-		bits[word_index] |= port_state << word_offset;
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+		bitmap_set_value8(bits, port_state, offset);
215189 	}
216190 
217191 	return 0;
....@@ -242,37 +216,27 @@
242216 	unsigned long *mask, unsigned long *bits)
243217 {
244218 	struct gpiomm_gpio *const gpiommgpio = gpiochip_get_data(chip);
245
-	unsigned int i;
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-	const unsigned int gpio_reg_size = 8;
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-	unsigned int port;
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-	unsigned int out_port;
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-	unsigned int bitmask;
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+	unsigned long offset;
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+	unsigned long gpio_mask;
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+	size_t index;
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+	unsigned int port_addr;
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+	unsigned long bitmask;
250224 	unsigned long flags;
251225 
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-	/* set bits are evaluated a gpio register size at a time */
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-	for (i = 0; i < chip->ngpio; i += gpio_reg_size) {
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-		/* no more set bits in this mask word; skip to the next word */
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-		if (!mask[BIT_WORD(i)]) {
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-			i = (BIT_WORD(i) + 1) * BITS_PER_LONG - gpio_reg_size;
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-			continue;
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-		}
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+	for_each_set_clump8(offset, gpio_mask, mask, ARRAY_SIZE(ports) * 8) {
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+		index = offset / 8;
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+		port_addr = gpiommgpio->base + ports[index];
259229 
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-		port = i / gpio_reg_size;
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-		out_port = (port > 2) ? port + 1 : port;
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-		bitmask = mask[BIT_WORD(i)] & bits[BIT_WORD(i)];
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+		bitmask = bitmap_get_value8(bits, offset) & gpio_mask;
263231 
264232 		spin_lock_irqsave(&gpiommgpio->lock, flags);
265233 
266234 		/* update output state data and set device gpio register */
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-		gpiommgpio->out_state[port] &= ~mask[BIT_WORD(i)];
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-		gpiommgpio->out_state[port] |= bitmask;
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-		outb(gpiommgpio->out_state[port], gpiommgpio->base + out_port);
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+		gpiommgpio->out_state[index] &= ~gpio_mask;
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+		gpiommgpio->out_state[index] |= bitmask;
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+		outb(gpiommgpio->out_state[index], port_addr);
270238 
271239 		spin_unlock_irqrestore(&gpiommgpio->lock, flags);
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-
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-		/* prepare for next gpio register set */
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-		mask[BIT_WORD(i)] >>= gpio_reg_size;
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-		bits[BIT_WORD(i)] >>= gpio_reg_size;
276240 	}
277241 }
278242