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2024-02-20 ea08eeccae9297f7aabd2ef7f0c2517ac4549acc

 kernel/drivers/edac/pnd2_edac.c
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..
@@ -1,16 +1,8 @@
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+// SPDX-License-Identifier: GPL-2.0-only
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 /*
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  * Driver for Pondicherry2 memory controller.
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  *
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  * Copyright (c) 2016, Intel Corporation.
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- *
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- * This program is free software; you can redistribute it and/or modify it
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- * under the terms and conditions of the GNU General Public License,
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- * version 2, as published by the Free Software Foundation.
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- *
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- * This program is distributed in the hope it will be useful, but WITHOUT
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- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
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- * more details.
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  *
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  * [Derived from sb_edac.c]
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  *
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@@ -206,7 +198,7 @@
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 	switch (sz) {
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 	case 8:
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 		ret = _apl_rd_reg(port, off + 4, op, (u32 *)(data + 4));
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-		/* fall through */
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+		fallthrough;
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 	case 4:
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 		ret |= _apl_rd_reg(port, off, op, (u32 *)data);
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 		pnd2_printk(KERN_DEBUG, "%s=%x%08x ret=%d\n", name,
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@@ -1163,7 +1155,7 @@
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 	u32 optypenum = GET_BITFIELD(m->status, 4, 6);
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 	int rc;
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-	tp_event = uc_err ? (ripv ? HW_EVENT_ERR_FATAL : HW_EVENT_ERR_UNCORRECTED) :
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+	tp_event = uc_err ? (ripv ? HW_EVENT_ERR_UNCORRECTED : HW_EVENT_ERR_FATAL) :
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 						 HW_EVENT_ERR_CORRECTED;
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 	/*
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@@ -1239,7 +1231,7 @@
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 		if (!(chan_mask & BIT(i)))
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 			continue;
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-		dimm = EDAC_DIMM_PTR(mci->layers, mci->dimms, mci->n_layers, i, 0, 0);
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+		dimm = edac_get_dimm(mci, i, 0, 0);
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 		if (!dimm) {
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 			edac_dbg(0, "No allocated DIMM for channel %d\n", i);
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 			continue;
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@@ -1319,7 +1311,7 @@
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 			if (!ranks_of_dimm[j])
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 				continue;
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-			dimm = EDAC_DIMM_PTR(mci->layers, mci->dimms, mci->n_layers, i, j, 0);
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+			dimm = edac_get_dimm(mci, i, j, 0);
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 			if (!dimm) {
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 				edac_dbg(0, "No allocated DIMM for channel %d DIMM %d\n", i, j);
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 				continue;
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@@ -1404,11 +1396,8 @@
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 	struct dram_addr daddr;
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 	char *type;
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-	if (edac_get_report_status() == EDAC_REPORTING_DISABLED)
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-		return NOTIFY_DONE;
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-
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 	mci = pnd2_mci;
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-	if (!mci)
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+	if (!mci || (mce->kflags & MCE_HANDLED_CEC))
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 		return NOTIFY_DONE;
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 	/*
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@@ -1437,11 +1426,13 @@
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 	pnd2_mce_output_error(mci, mce, &daddr);
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 	/* Advice mcelog that the error were handled */
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-	return NOTIFY_STOP;
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+	mce->kflags |= MCE_HANDLED_EDAC;
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+	return NOTIFY_OK;
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 }
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 static struct notifier_block pnd2_mce_dec = {
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 	.notifier_call	= pnd2_mce_check_error,
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+	.priority	= MCE_PRIO_EDAC,
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 };
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 #ifdef CONFIG_EDAC_DEBUG
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@@ -1545,8 +1536,8 @@
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 };
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 static const struct x86_cpu_id pnd2_cpuids[] = {
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-	{ X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_GOLDMONT, 0, (kernel_ulong_t)&apl_ops },
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-	{ X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_GOLDMONT_X, 0, (kernel_ulong_t)&dnv_ops },
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+	X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT,	&apl_ops),
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+	X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT_D,	&dnv_ops),
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 	{ }
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 };
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 MODULE_DEVICE_TABLE(x86cpu, pnd2_cpuids);
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@@ -1563,6 +1554,9 @@
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 	if (owner && strncmp(owner, EDAC_MOD_STR, sizeof(EDAC_MOD_STR)))
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 		return -EBUSY;
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+	if (cpu_feature_enabled(X86_FEATURE_HYPERVISOR))
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+		return -ENODEV;
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+
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 	id = x86_match_cpu(pnd2_cpuids);
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 	if (!id)
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 		return -ENODEV;