| .. | .. | 
|---|
|  | 1 | +/* SPDX-License-Identifier: GPL-2.0 */ | 
|---|
| 1 | 2 | /* | 
|---|
| 2 | 3 | * Driver for the Synopsys DesignWare AHB DMA Controller | 
|---|
| 3 | 4 | * | 
|---|
| 4 | 5 | * Copyright (C) 2005-2007 Atmel Corporation | 
|---|
| 5 | 6 | * Copyright (C) 2010-2011 ST Microelectronics | 
|---|
| 6 | 7 | * Copyright (C) 2016 Intel Corporation | 
|---|
| 7 |  | - * | 
|---|
| 8 |  | - * This program is free software; you can redistribute it and/or modify | 
|---|
| 9 |  | - * it under the terms of the GNU General Public License version 2 as | 
|---|
| 10 |  | - * published by the Free Software Foundation. | 
|---|
| 11 | 8 | */ | 
|---|
| 12 | 9 |  | 
|---|
| 13 | 10 | #include <linux/bitops.h> | 
|---|
| .. | .. | 
|---|
| 128 | 125 |  | 
|---|
| 129 | 126 | /* Bitfields in DWC_PARAMS */ | 
|---|
| 130 | 127 | #define DWC_PARAMS_MBLK_EN	11		/* multi block transfer */ | 
|---|
|  | 128 | +#define DWC_PARAMS_HC_LLP	13		/* set LLP register to zero */ | 
|---|
|  | 129 | +#define DWC_PARAMS_MSIZE	16		/* max group transaction size */ | 
|---|
| 131 | 130 |  | 
|---|
| 132 | 131 | /* bursts size */ | 
|---|
| 133 | 132 | enum dw_dma_msize { | 
|---|
| .. | .. | 
|---|
| 222 | 221 |  | 
|---|
| 223 | 222 | /* iDMA 32-bit support */ | 
|---|
| 224 | 223 |  | 
|---|
|  | 224 | +/* bursts size */ | 
|---|
|  | 225 | +enum idma32_msize { | 
|---|
|  | 226 | +	IDMA32_MSIZE_1, | 
|---|
|  | 227 | +	IDMA32_MSIZE_2, | 
|---|
|  | 228 | +	IDMA32_MSIZE_4, | 
|---|
|  | 229 | +	IDMA32_MSIZE_8, | 
|---|
|  | 230 | +	IDMA32_MSIZE_16, | 
|---|
|  | 231 | +	IDMA32_MSIZE_32, | 
|---|
|  | 232 | +}; | 
|---|
|  | 233 | + | 
|---|
| 225 | 234 | /* Bitfields in CTL_HI */ | 
|---|
| 226 | 235 | #define IDMA32C_CTLH_BLOCK_TS_MASK	GENMASK(16, 0) | 
|---|
| 227 | 236 | #define IDMA32C_CTLH_BLOCK_TS(x)	((x) & IDMA32C_CTLH_BLOCK_TS_MASK) | 
|---|
| .. | .. | 
|---|
| 276 | 285 | /* hardware configuration */ | 
|---|
| 277 | 286 | unsigned int		block_size; | 
|---|
| 278 | 287 | bool			nollp; | 
|---|
|  | 288 | +	u32			max_burst; | 
|---|
| 279 | 289 |  | 
|---|
| 280 | 290 | /* custom slave configuration */ | 
|---|
| 281 | 291 | struct dw_dma_slave	dws; | 
|---|
| .. | .. | 
|---|
| 312 | 322 | u8			all_chan_mask; | 
|---|
| 313 | 323 | u8			in_use; | 
|---|
| 314 | 324 |  | 
|---|
|  | 325 | +	/* Channel operations */ | 
|---|
|  | 326 | +	void	(*initialize_chan)(struct dw_dma_chan *dwc); | 
|---|
|  | 327 | +	void	(*suspend_chan)(struct dw_dma_chan *dwc, bool drain); | 
|---|
|  | 328 | +	void	(*resume_chan)(struct dw_dma_chan *dwc, bool drain); | 
|---|
|  | 329 | +	u32	(*prepare_ctllo)(struct dw_dma_chan *dwc); | 
|---|
|  | 330 | +	void	(*encode_maxburst)(struct dw_dma_chan *dwc, u32 *maxburst); | 
|---|
|  | 331 | +	u32	(*bytes2block)(struct dw_dma_chan *dwc, size_t bytes, | 
|---|
|  | 332 | +			       unsigned int width, size_t *len); | 
|---|
|  | 333 | +	size_t	(*block2bytes)(struct dw_dma_chan *dwc, u32 block, u32 width); | 
|---|
|  | 334 | + | 
|---|
|  | 335 | +	/* Device operations */ | 
|---|
|  | 336 | +	void (*set_device_name)(struct dw_dma *dw, int id); | 
|---|
|  | 337 | +	void (*disable)(struct dw_dma *dw); | 
|---|
|  | 338 | +	void (*enable)(struct dw_dma *dw); | 
|---|
|  | 339 | + | 
|---|
| 315 | 340 | /* platform data */ | 
|---|
| 316 | 341 | struct dw_dma_platform_data	*pdata; | 
|---|
| 317 | 342 | }; | 
|---|