write in 30M

hc

2024-02-20 ea08eeccae9297f7aabd2ef7f0c2517ac4549acc

 kernel/drivers/devfreq/rockchip_dmc_dbg.c
..
..
@@ -74,59 +74,10 @@
74
74
 
75
75
 struct dram_info {
76
76
 	unsigned int version;
77
-	char dramtype[12];
77
+	char dramtype[10];
78
78
 	unsigned int dramfreq;
79
79
 	unsigned int channel_num;
80
80
 	struct dram_cap_info ch[2];
81
-	unsigned int dramid[3];
82
-};
83
-
84
-struct lpddrx_id {
85
-	unsigned int dramid;
86
-	char *name;
87
-};
88
-
89
-static const struct lpddrx_id lp23_manuf_id[] = {
90
-	{ 0x1, "Samsung" },
91
-	{ 0x2, "Qimonda" },
92
-	{ 0x3, "Elpida" },
93
-	{ 0x4, "Etron" },
94
-	{ 0x5, "Nanya" },
95
-	{ 0x6, "SK hynix" },
96
-	{ 0x7, "Mosel" },
97
-	{ 0x8, "Winbond" },
98
-	{ 0x9, "ESMT" },
99
-	{ 0xa, "Zentel" },
100
-	{ 0xb, "Spansion" },
101
-	{ 0xc, "SST" },
102
-	{ 0xd, "ZMOS" },
103
-	{ 0xe, "Intel" },
104
-	{ 0x12, "Being Advanced Memory Corp" },
105
-	{ 0x1a, "Xi'an UniIC Semiconductors Co., Ltd" },
106
-	{ 0x1b, "ISSI" },
107
-	{ 0x1c, "JSC" },
108
-	{ 0xaa, "Tezzaron" },
109
-	{ 0xc2, "Macronix" },
110
-	{ 0xf8, "Fidelix" },
111
-	{ 0xfc, "eveRAM" },
112
-	{ 0xfd, "AP Memory" },
113
-	{ 0xfe, "Numonyx" },
114
-	{ 0xff, "Micron" }
115
-};
116
-
117
-static const struct lpddrx_id lp4_manuf_id[] = {
118
-	{ 0x1, "Samsung" },
119
-	{ 0x5, "Nanya" },
120
-	{ 0x6, "SK hynix" },
121
-	{ 0x8, "Winbond" },
122
-	{ 0x9, "ESMT" },
123
-	{ 0x13, "CXMT" },
124
-	{ 0x1a, "Xi'an UniIC Semiconductors Co., Ltd" },
125
-	{ 0x1c, "JSC" },
126
-	{ 0xf8, "Fidelix" },
127
-	{ 0xf9, "Ultra Memory" },
128
-	{ 0xfd, "AP Memory" },
129
-	{ 0xff, "Micron" }
130
81
 };
131
82
 
132
83
 static const char * const power_save_msg[] = {
..
..
@@ -241,9 +192,9 @@
241
192
 {
242
193
 	struct arm_smccc_res res;
243
194
 	struct dram_info *p_dram_info;
244
-	struct file *fp = NULL;
245
-	char cur_freq[20] = { 0 };
246
-	char governor[20] = { 0 };
195
+	struct file *fp  = NULL;
196
+	char cur_freq[20] = {0};
197
+	char governor[20] = {0};
247
198
 	loff_t pos;
248
199
 	u32 i;
249
200
 
..
..
@@ -254,11 +205,6 @@
254
205
 			   res.a0);
255
206
 		return -ENOMEM;
256
207
 	}
257
-	if (res.a1) {
258
-		seq_printf(m, "ddrdbg function get dram info error:%lx\n",
259
-			   res.a1);
260
-		return -EPERM;
261
-	}
262
208
 
263
209
 	if (!dmcdbg_data.inited_flag) {
264
210
 		seq_puts(m, "dmcdbg_data no int\n");
..
..
@@ -267,57 +213,25 @@
267
213
 	p_dram_info = (struct dram_info *)dmcdbg_data.share_memory;
268
214
 
269
215
 	/* dram type information */
270
-	seq_printf(m, "DramType:	%s\n", p_dram_info->dramtype);
271
-	if (p_dram_info->version >= 0x2) {
272
-		if ((strcmp(p_dram_info->dramtype, "LPDDR2") == 0) ||
273
-		    (strcmp(p_dram_info->dramtype, "LPDDR3") == 0)) {
274
-			for (i = 0; i < ARRAY_SIZE(lp23_manuf_id); i++) {
275
-				if (lp23_manuf_id[i].dramid == p_dram_info->dramid[0]) {
276
-					seq_printf(m,
277
-						   "Dram ID:	%s(MR5=0x%x,MR6=0x%x,MR7=0x%x)\n",
278
-						   lp23_manuf_id[i].name,
279
-						   p_dram_info->dramid[0],
280
-						   p_dram_info->dramid[1],
281
-						   p_dram_info->dramid[2]);
282
-					break;
283
-				}
284
-			}
285
-			if (i == ARRAY_SIZE(lp23_manuf_id))
286
-				seq_printf(m,
287
-					   "Dram ID:	Unknown(MR5=0x%x,MR6=0x%x,MR7=0x%x)\n",
288
-					   p_dram_info->dramid[0],
289
-					   p_dram_info->dramid[1],
290
-					   p_dram_info->dramid[2]);
291
-		} else if ((strcmp(p_dram_info->dramtype, "LPDDR4") == 0) ||
292
-			   (strcmp(p_dram_info->dramtype, "LPDDR4X") == 0)) {
293
-			for (i = 0; i < ARRAY_SIZE(lp4_manuf_id); i++) {
294
-				if (lp4_manuf_id[i].dramid == p_dram_info->dramid[0]) {
295
-					seq_printf(m,
296
-						   "Dram ID:	%s(MR5=0x%x,MR6=0x%x,MR7=0x%x)\n",
297
-						   lp4_manuf_id[i].name,
298
-						   p_dram_info->dramid[0],
299
-						   p_dram_info->dramid[1],
300
-						   p_dram_info->dramid[2]);
301
-					break;
302
-				}
303
-			}
304
-			if (i == ARRAY_SIZE(lp4_manuf_id))
305
-				seq_printf(m,
306
-					   "Dram ID:	Unknown(MR5=0x%x,MR6=0x%x,MR7=0x%x)\n",
307
-					   p_dram_info->dramid[0],
308
-					   p_dram_info->dramid[1],
309
-					   p_dram_info->dramid[2]);
310
-		} else {
311
-			seq_printf(m, "Dram ID:	None\n");
312
-		}
313
-	}
216
+	seq_printf(m,
217
+		   "DramType:	%s\n"
218
+		   ,
219
+		   p_dram_info->dramtype
220
+		   );
221
+
314
222
 	/* dram capacity information */
315
-	seq_printf(m, "\n"
316
-		      "DramCapacity:\n");
223
+	seq_printf(m,
224
+		   "\n"
225
+		   "DramCapacity:\n"
226
+		   );
317
227
 
318
228
 	for (i = 0; i < p_dram_info->channel_num; i++) {
319
229
 		if (p_dram_info->channel_num == 2)
320
-			seq_printf(m, "Channel [%d]:\n", i);
230
+			seq_printf(m,
231
+				   "Channel [%d]:\n"
232
+				   ,
233
+				   i
234
+				   );
321
235
 
322
236
 		seq_printf(m,
323
237
 			   "CS Count:	%d\n"
..
..
@@ -327,7 +241,8 @@
327
241
 			   "CS0_Row:	%d\n"
328
242
 			   "CS1_Row:	%d\n"
329
243
 			   "DieBusWidth:	%d bit\n"
330
-			   "TotalSize:	%d MB\n",
244
+			   "TotalSize:	%d MB\n"
245
+			   ,
331
246
 			   p_dram_info->ch[i].rank,
332
247
 			   p_dram_info->ch[i].buswidth,
333
248
 			   p_dram_info->ch[i].col,
..
..
@@ -335,7 +250,8 @@
335
250
 			   p_dram_info->ch[i].cs0_row,
336
251
 			   p_dram_info->ch[i].cs1_row,
337
252
 			   p_dram_info->ch[i].die_buswidth,
338
-			   p_dram_info->ch[i].size);
253
+			   p_dram_info->ch[i].size
254
+			   );
339
255
 	}
340
256
 
341
257
 	/* check devfreq/dmc device */
..
..
@@ -344,8 +260,10 @@
344
260
 		seq_printf(m,
345
261
 			   "\n"
346
262
 			   "devfreq/dmc:	Disable\n"
347
-			   "DramFreq:	%d\n",
348
-			   p_dram_info->dramfreq);
263
+			   "DramFreq:	%d\n"
264
+			   ,
265
+			   p_dram_info->dramfreq
266
+			   );
349
267
 	} else {
350
268
 		pos = 0;
351
269
 		kernel_read(fp, cur_freq, sizeof(cur_freq), &pos);
..
..
@@ -364,11 +282,15 @@
364
282
 			   "\n"
365
283
 			   "devfreq/dmc:	Enable\n"
366
284
 			   "governor:	%s\n"
367
-			   "cur_freq:	%s\n",
368
-			   governor, cur_freq);
285
+			   "cur_freq:	%s\n"
286
+			   ,
287
+			   governor,
288
+			   cur_freq
289
+			   );
369
290
 		seq_printf(m,
370
291
 			   "NOTE:\n"
371
-			   "more information about dmc can get from /sys/class/devfreq/dmc.\n");
292
+			   "more information about dmc can get from /sys/class/devfreq/dmc.\n"
293
+			   );
372
294
 	}
373
295
 
374
296
 	return 0;
..
..
@@ -418,15 +340,19 @@
418
340
 	}
419
341
 	p_power = (struct power_save_info *)dmcdbg_data.share_memory;
420
342
 
421
-	seq_printf(m, "low power information:\n"
422
-		      "\n"
423
-		      "[number]name: value\n");
343
+	seq_printf(m,
344
+		   "low power information:\n"
345
+		   "\n"
346
+		   "[number]name: value\n"
347
+		   );
424
348
 
425
349
 	p_uint = (unsigned int *)p_power;
426
350
 	for (i = 0; i < ARRAY_SIZE(power_save_msg); i++)
427
351
 		seq_printf(m,
428
-			   "[%d]%s: %d\n",
429
-			   i, power_save_msg[i], *(p_uint + i));
352
+			   "[%d]%s: %d\n"
353
+			   ,
354
+			   i, power_save_msg[i], *(p_uint + i)
355
+			   );
430
356
 
431
357
 	seq_printf(m,
432
358
 		   "\n"
..
..
@@ -438,7 +364,8 @@
438
364
 		   "Support for setting multiple parameters at the same time.\n"
439
365
 		   "echo number=value,number=value,... > /proc/dmcdbg/powersave\n"
440
366
 		   "eg:\n"
441
-		   "  echo 0=1,1=32 > /proc/dmcdbg/powersave\n");
367
+		   "  echo 0=1,1=32 > /proc/dmcdbg/powersave\n"
368
+		   );
442
369
 
443
370
 	return 0;
444
371
 }
..
..
@@ -575,34 +502,48 @@
575
502
 	}
576
503
 	p_drvodt = (struct drv_odt_info *)dmcdbg_data.share_memory;
577
504
 
578
-	seq_printf(m, "drv and odt information:\n"
579
-		      "\n"
580
-		      "[number]name: value (ohm)\n");
505
+	seq_printf(m,
506
+		   "drv and odt information:\n"
507
+		   "\n"
508
+		   "[number]name: value (ohm)\n"
509
+	);
581
510
 
582
511
 	p_uint = (unsigned int *)p_drvodt;
583
512
 	for (i = 0; i < ARRAY_SIZE(drv_odt_msg); i++) {
584
513
 		if (*(p_uint + (i * 3)) == DRV_ODT_UNKNOWN)
585
514
 			seq_printf(m,
586
-				   "[%2d]%s: NULL (unknown) %c\n",
515
+				   "[%2d]%s: NULL (unknown) %c\n"
516
+				   ,
587
517
 				   i, drv_odt_msg[i],
588
-				   (*(p_uint + (i * 3) + 2) == DRV_ODT_SUSPEND_FIX) ? '\0' : '*');
518
+				   (*(p_uint + (i * 3) + 2) ==
519
+				    DRV_ODT_SUSPEND_FIX) ? '\0' : '*'
520
+			);
589
521
 		else if (*(p_uint + (i * 3) + 1) == DRV_ODT_UNKNOWN)
590
522
 			seq_printf(m,
591
-				   "[%2d]%s: %d (unknown) %c\n",
523
+				   "[%2d]%s: %d (unknown) %c\n"
524
+				   ,
592
525
 				   i, drv_odt_msg[i], *(p_uint + (i * 3)),
593
-				   (*(p_uint + (i * 3) + 2) == DRV_ODT_SUSPEND_FIX) ? '\0' : '*');
526
+				   (*(p_uint + (i * 3) + 2) ==
527
+				    DRV_ODT_SUSPEND_FIX) ? '\0' : '*'
528
+			);
594
529
 		else if (i < (ARRAY_SIZE(drv_odt_msg) - 2))
595
530
 			seq_printf(m,
596
-				   "[%2d]%s: %d (%d ohm) %c\n",
531
+				   "[%2d]%s: %d (%d ohm) %c\n"
532
+				   ,
597
533
 				   i, drv_odt_msg[i], *(p_uint + (i * 3)),
598
534
 				   *(p_uint + (i * 3) + 1),
599
-				   (*(p_uint + (i * 3) + 2) == DRV_ODT_SUSPEND_FIX) ? '\0' : '*');
535
+				   (*(p_uint + (i * 3) + 2) ==
536
+				    DRV_ODT_SUSPEND_FIX) ? '\0' : '*'
537
+			);
600
538
 		else
601
539
 			seq_printf(m,
602
-				   "[%2d]%s: %d (%d %%) %c\n",
540
+				   "[%2d]%s: %d (%d %%) %c\n"
541
+				   ,
603
542
 				   i, drv_odt_msg[i], *(p_uint + (i * 3)),
604
543
 				   *(p_uint + (i * 3) + 1),
605
-				   (*(p_uint + (i * 3) + 2) == DRV_ODT_SUSPEND_FIX) ? '\0' : '*');
544
+				   (*(p_uint + (i * 3) + 2) ==
545
+				    DRV_ODT_SUSPEND_FIX) ? '\0' : '*'
546
+			);
606
547
 	}
607
548
 
608
549
 	seq_printf(m,
..
..
@@ -617,7 +558,8 @@
617
558
 		   "eg: set soc side ca drv up and down to 20\n"
618
559
 		   "  echo 6=20,7=20 > /proc/dmcdbg/drvodt\n"
619
560
 		   "Note: Please update both up and down at the same time.\n"
620
-		   "      (*) mean unsupported setting value\n");
561
+		   "      (*) mean unsupported setting value\n"
562
+	);
621
563
 
622
564
 	return 0;
623
565
 }
..
..
@@ -752,20 +694,28 @@
752
694
 		return -EPERM;
753
695
 	}
754
696
 
755
-	seq_printf(m, "de-skew information:\n"
756
-		      "\n"
757
-		      "[group_number]name: value\n");
697
+	seq_printf(m,
698
+		   "de-skew information:\n"
699
+		   "\n"
700
+		   "[group_number]name: value\n"
701
+	);
758
702
 
759
703
 	for (group = 0; group < dmcdbg_data.skew_group_num; group++) {
760
704
 		if (dmcdbg_data.skew_group[group].note != NULL)
761
-			seq_printf(m, "%s\n",
762
-				   dmcdbg_data.skew_group[group].note);
705
+			seq_printf(m,
706
+				"%s\n"
707
+				,
708
+				dmcdbg_data.skew_group[group].note
709
+			);
763
710
 		p_uint = (unsigned int *)dmcdbg_data.skew_group[group].p_skew_info;
764
711
 		for (i = 0; i < dmcdbg_data.skew_group[group].skew_num; i++)
765
-			seq_printf(m, "[%c%d_%d]%s: %d\n",
766
-				   (i < 10) ? ' ' : '\0', group, i,
767
-				   dmcdbg_data.skew_group[group].p_skew_timing[i],
768
-				   *(p_uint + i));
712
+			seq_printf(m,
713
+				"[%c%d_%d]%s: %d\n"
714
+				,
715
+				(i < 10) ? ' ' : '\0', group, i,
716
+				dmcdbg_data.skew_group[group].p_skew_timing[i],
717
+				*(p_uint + i)
718
+			);
769
719
 	}
770
720
 
771
721
 	seq_printf(m,
..
..
@@ -778,7 +728,8 @@
778
728
 		   "Support for setting multiple parameters simultaneously.\n"
779
729
 		   "echo group_number=value,group_number=value,... > /proc/dmcdbg/deskew\n"
780
730
 		   "eg:\n"
781
-		   "  echo 0_1=8,1_2=8 > /proc/dmcdbg/deskew\n");
731
+		   "  echo 0_1=8,1_2=8 > /proc/dmcdbg/deskew\n"
732
+	);
782
733
 
783
734
 	return 0;
784
735
 }
..
..
@@ -925,13 +876,18 @@
925
876
 	}
926
877
 	p_regsinfo = (struct registers_info *)dmcdbg_data.share_memory;
927
878
 
928
-	seq_printf(m, "registers base address information:\n"
929
-		      "\n");
879
+	seq_printf(m,
880
+		   "registers base address information:\n"
881
+		   "\n"
882
+	);
930
883
 
931
884
 	for (i = 0; i < p_regsinfo->regs_num; i++) {
932
-		seq_printf(m, "%s=0x%x\n",
885
+		seq_printf(m,
886
+			   "%s=0x%x\n"
887
+			   ,
933
888
 			   p_regsinfo->regs[i].regs_name,
934
-			   p_regsinfo->regs[i].regs_addr);
889
+			   p_regsinfo->regs[i].regs_addr
890
+			   );
935
891
 	}
936
892
 
937
893
 	return 0;
..
..
@@ -948,56 +904,6 @@
948
904
 	.llseek		= seq_lseek,
949
905
 	.release	= single_release,
950
906
 };
951
-
952
-static int rk_dmcdbg_sip_smc_match_ver(struct platform_device *pdev,
953
-				       u32 match_ver)
954
-{
955
-	struct arm_smccc_res res;
956
-
957
-	/* check ddr_debug_func version */
958
-	res = sip_smc_dram(0, DDRDBG_FUNC_GET_VERSION,
959
-			   ROCKCHIP_SIP_CONFIG_DRAM_DEBUG);
960
-	dev_notice(&pdev->dev, "current ATF ddr_debug_func version 0x%lx.\n",
961
-		   res.a1);
962
-	/*
963
-	 * [15:8] major version, [7:0] minor version
964
-	 * major version must match both kernel dmcdbg and ATF ddr_debug_func.
965
-	 */
966
-	if (res.a0 || res.a1 < match_ver || ((res.a1 & 0xff00) != (match_ver & 0xff00))) {
967
-		dev_err(&pdev->dev,
968
-			"version invalid, need update to 0x%x or newer, the major version unmatch!\n",
969
-			match_ver);
970
-
971
-		return -ENXIO;
972
-	}
973
-
974
-	return 0;
975
-}
976
-
977
-static int proc_dmcdbg_init(struct platform_device *pdev)
978
-{
979
-	struct arm_smccc_res res;
980
-
981
-	/* request share memory for pass parameter */
982
-	res = sip_smc_request_share_mem(DMCDBG_PAGE_NUMS,
983
-					SHARE_PAGE_TYPE_DDRDBG);
984
-	if (res.a0 != 0) {
985
-		dev_err(&pdev->dev, "request share mem error!\n");
986
-		return -ENOMEM;
987
-	}
988
-
989
-	dmcdbg_data.share_memory = (void __iomem *)res.a1;
990
-	dmcdbg_data.inited_flag = 1;
991
-
992
-	/* create parent dir in /proc */
993
-	proc_dmcdbg_dir = proc_mkdir(PROC_DMCDBG_DIR_NAME, NULL);
994
-	if (!proc_dmcdbg_dir) {
995
-		dev_err(&pdev->dev, "create proc dir error!\n");
996
-		return -ENOENT;
997
-	}
998
-
999
-	return 0;
1000
-}
1001
907
 
1002
908
 static int proc_regsinfo_init(void)
1003
909
 {
..
..
@@ -1062,18 +968,42 @@
1062
968
 static __maybe_unused int rv1126_dmcdbg_init(struct platform_device *pdev,
1063
969
 					     struct rockchip_dmcdbg *dmcdbg)
1064
970
 {
1065
-	u32 version = 0x102;
1066
-	int ret;
971
+	struct arm_smccc_res res;
1067
972
 
1068
-	ret = rk_dmcdbg_sip_smc_match_ver(pdev, version);
1069
-	if (ret)
1070
-		return ret;
973
+	/* check ddr_debug_func version */
974
+	res = sip_smc_dram(0, DDRDBG_FUNC_GET_VERSION,
975
+			   ROCKCHIP_SIP_CONFIG_DRAM_DEBUG);
976
+	dev_notice(&pdev->dev, "current ATF ddr_debug_func version 0x%lx.\n",
977
+		   res.a1);
978
+	/*
979
+	 * [15:8] major version, [7:0] minor version
980
+	 * major version must match both kernel dmcdbg and ATF ddr_debug_func.
981
+	 */
982
+	if (res.a0 || res.a1 < 0x101 || ((res.a1 & 0xff00) != 0x100)) {
983
+		dev_err(&pdev->dev,
984
+			"version invalid,need update,the major version unmatch!\n");
985
+		return -ENXIO;
986
+	}
1071
987
 
1072
-	ret = proc_dmcdbg_init(pdev);
1073
-	if (ret)
1074
-		return ret;
988
+	/* request share memory for pass parameter */
989
+	res = sip_smc_request_share_mem(DMCDBG_PAGE_NUMS,
990
+					SHARE_PAGE_TYPE_DDRDBG);
991
+	if (res.a0 != 0) {
992
+		dev_err(&pdev->dev, "request share mem error\n");
993
+		return -ENOMEM;
994
+	}
995
+
996
+	dmcdbg_data.share_memory = (void __iomem *)res.a1;
997
+	dmcdbg_data.inited_flag = 1;
1075
998
 
1076
999
 	rv1126_get_skew_parameter();
1000
+
1001
+	/* create parent dir in /proc */
1002
+	proc_dmcdbg_dir = proc_mkdir(PROC_DMCDBG_DIR_NAME, NULL);
1003
+	if (!proc_dmcdbg_dir) {
1004
+		dev_err(&pdev->dev, "create proc dir error!");
1005
+		return -ENOENT;
1006
+	}
1077
1007
 
1078
1008
 	proc_dmcinfo_init();
1079
1009
 	proc_powersave_init();
..
..
@@ -1083,54 +1013,8 @@
1083
1013
 	return 0;
1084
1014
 }
1085
1015
 
1086
-static __maybe_unused int px30_dmcdbg_init(struct platform_device *pdev,
1087
-					   struct rockchip_dmcdbg *dmcdbg)
1088
-{
1089
-	u32 version = 0x101;
1090
-	int ret;
1091
-
1092
-	ret = rk_dmcdbg_sip_smc_match_ver(pdev, version);
1093
-	if (ret)
1094
-		return ret;
1095
-
1096
-	ret = proc_dmcdbg_init(pdev);
1097
-	if (ret)
1098
-		return ret;
1099
-
1100
-	proc_dmcinfo_init();
1101
-
1102
-	return 0;
1103
-}
1104
-
1105
-static __maybe_unused int rk3568_dmcdbg_init(struct platform_device *pdev,
1106
-					     struct rockchip_dmcdbg *dmcdbg)
1107
-{
1108
-	u32 version = 0x101;
1109
-	int ret;
1110
-
1111
-	ret = rk_dmcdbg_sip_smc_match_ver(pdev, version);
1112
-	if (ret)
1113
-		return ret;
1114
-
1115
-	ret = proc_dmcdbg_init(pdev);
1116
-	if (ret)
1117
-		return ret;
1118
-
1119
-	proc_dmcinfo_init();
1120
-
1121
-	return 0;
1122
-}
1123
-
1124
1016
 static const struct of_device_id rockchip_dmcdbg_of_match[] = {
1125
-#ifdef CONFIG_CPU_PX30
1126
-	{ .compatible = "rockchip,px30-dmcdbg", .data = px30_dmcdbg_init },
1127
-#endif
1128
-#ifdef CONFIG_CPU_RV1126
1129
-	{ .compatible = "rockchip,rv1126-dmcdbg", .data = rv1126_dmcdbg_init },
1130
-#endif
1131
-#ifdef CONFIG_CPU_RK3568
1132
-	{ .compatible = "rockchip,rk3568-dmcdbg", .data = rk3568_dmcdbg_init },
1133
-#endif
1017
+	{ .compatible = "rockchip,rv1126-dmcdbg", .data = rv1126_dmcdbg_init},
1134
1018
 	{ },
1135
1019
 };
1136
1020
 MODULE_DEVICE_TABLE(of, rockchip_dmcdbg_of_match);