write in 30M

hc

2024-02-20 ea08eeccae9297f7aabd2ef7f0c2517ac4549acc

 kernel/drivers/devfreq/rockchip_dmc_common.c
..
..
@@ -85,9 +85,9 @@
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 	if (!common_info)
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 		return;
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-	dev_dbg(common_info->dev, "line bw=%u, frame bw=%u, pn=%u\n",
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+	dev_dbg(common_info->dev, "line bw=%u, frame bw=%u, pn=%u, pn_4k=%u\n",
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 		vop_info->line_bw_mbyte, vop_info->frame_bw_mbyte,
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-		vop_info->plane_num);
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+		vop_info->plane_num, vop_info->plane_num_4k);
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 	if (!common_info->vop_pn_rl_tbl || !common_info->set_msch_readlatency)
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 		goto vop_bw_tbl;
..
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@@ -129,6 +129,9 @@
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 	}
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 next:
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+	if (vop_info->plane_num_4k && target < common_info->vop_4k_rate)
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+		target = common_info->vop_4k_rate;
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+
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 	vop_last_rate = common_info->vop_req_rate;
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 	common_info->vop_req_rate = target;
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..
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@@ -163,6 +166,15 @@
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 }
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 EXPORT_SYMBOL(rockchip_dmcfreq_vop_bandwidth_request);
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+unsigned int rockchip_dmcfreq_get_stall_time_ns(void)
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+{
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+	if (!common_info)
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+		return 0;
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+
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+	return common_info->stall_time_ns;
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+}
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+EXPORT_SYMBOL(rockchip_dmcfreq_get_stall_time_ns);
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+
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 MODULE_AUTHOR("Finley Xiao <finley.xiao@rock-chips.com>");
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 MODULE_DESCRIPTION("rockchip dmcfreq driver with devfreq framework");
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 MODULE_LICENSE("GPL v2");