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2024-02-20 ea08eeccae9297f7aabd2ef7f0c2517ac4549acc 
 kernel/drivers/crypto/stm32/stm32-hash.c
....@@ -1,28 +1,15 @@
1
+// SPDX-License-Identifier: GPL-2.0-only
12 /*
23  * This file is part of STM32 Crypto driver for Linux.
34  *
45  * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
56  * Author(s): Lionel DEBIEVE <lionel.debieve@st.com> for STMicroelectronics.
6
- *
7
- * License terms: GPL V2.0.
8
- *
9
- * This program is free software; you can redistribute it and/or modify it
10
- * under the terms of the GNU General Public License version 2 as published by
11
- * the Free Software Foundation.
12
- *
13
- * This program is distributed in the hope that it will be useful, but
14
- * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
15
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more
16
- * details.
17
- *
18
- * You should have received a copy of the GNU General Public License along with
19
- * this program. If not, see <http://www.gnu.org/licenses/>.
20
- *
217  */
228 
239 #include <linux/clk.h>
2410 #include <linux/crypto.h>
2511 #include <linux/delay.h>
12
+#include <linux/dma-mapping.h>
2613 #include <linux/dmaengine.h>
2714 #include <linux/interrupt.h>
2815 #include <linux/io.h>
....@@ -180,8 +167,6 @@
180167 	phys_addr_t		phys_base;
181168 	u32			dma_mode;
182169 	u32			dma_maxburst;
183
-
184
-	spinlock_t		lock; /* lock to protect queue */
185170 
186171 	struct ahash_request	*req;
187172 	struct crypto_engine	*engine;
....@@ -354,7 +339,7 @@
354339 
355340 	len32 = DIV_ROUND_UP(length, sizeof(u32));
356341 
357
-	dev_dbg(hdev->dev, "%s: length: %d, final: %x len32 %i\n",
342
+	dev_dbg(hdev->dev, "%s: length: %zd, final: %x len32 %i\n",
358343 		__func__, length, final, len32);
359344 
360345 	hdev->flags |= HASH_FLAGS_CPU;
....@@ -463,8 +448,8 @@
463448 
464449 	dma_async_issue_pending(hdev->dma_lch);
465450 
466
-	if (!wait_for_completion_interruptible_timeout(&hdev->dma_completion,
467
-						       msecs_to_jiffies(100)))
451
+	if (!wait_for_completion_timeout(&hdev->dma_completion,
452
+					 msecs_to_jiffies(100)))
468453 		err = -ETIMEDOUT;
469454 
470455 	if (dma_async_is_tx_complete(hdev->dma_lch, cookie,
....@@ -523,6 +508,7 @@
523508 static int stm32_hash_dma_init(struct stm32_hash_dev *hdev)
524509 {
525510 	struct dma_slave_config dma_conf;
511
+	struct dma_chan *chan;
526512 	int err;
527513 
528514 	memset(&dma_conf, 0, sizeof(dma_conf));
....@@ -534,11 +520,11 @@
534520 	dma_conf.dst_maxburst = hdev->dma_maxburst;
535521 	dma_conf.device_fc = false;
536522 
537
-	hdev->dma_lch = dma_request_slave_channel(hdev->dev, "in");
538
-	if (!hdev->dma_lch) {
539
-		dev_err(hdev->dev, "Couldn't acquire a slave DMA channel.\n");
540
-		return -EBUSY;
541
-	}
523
+	chan = dma_request_chan(hdev->dev, "in");
524
+	if (IS_ERR(chan))
525
+		return PTR_ERR(chan);
526
+
527
+	hdev->dma_lch = chan;
542528 
543529 	err = dmaengine_slave_config(hdev->dma_lch, &dma_conf);
544530 	if (err) {
....@@ -578,9 +564,9 @@
578564 	}
579565 
580566 	for_each_sg(rctx->sg, tsg, rctx->nents, i) {
567
+		sg[0] = *tsg;
581568 		len = sg->length;
582569 
583
-		sg[0] = *tsg;
584570 		if (sg_is_last(sg)) {
585571 			if (hdev->dma_mode == 1) {
586572 				len = (ALIGN(sg->length, 16) - 16);
....@@ -763,7 +749,7 @@
763749 static void stm32_hash_copy_hash(struct ahash_request *req)
764750 {
765751 	struct stm32_hash_request_ctx *rctx = ahash_request_ctx(req);
766
-	u32 *hash = (u32 *)rctx->digest;
752
+	__be32 *hash = (void *)rctx->digest;
767753 	unsigned int i, hashsize;
768754 
769755 	switch (rctx->flags & HASH_FLAGS_ALGO_MASK) {
....@@ -784,7 +770,7 @@
784770 	}
785771 
786772 	for (i = 0; i < hashsize / sizeof(u32); i++)
787
-		hash[i] = be32_to_cpu(stm32_hash_read(rctx->hdev,
773
+		hash[i] = cpu_to_be32(stm32_hash_read(rctx->hdev,
788774 						      HASH_HREG(i)));
789775 }
790776 
....@@ -977,7 +963,7 @@
977963 
978964 	pm_runtime_get_sync(hdev->dev);
979965 
980
-	while (!(stm32_hash_read(hdev, HASH_SR) & HASH_SR_DATA_INPUT_READY))
966
+	while ((stm32_hash_read(hdev, HASH_SR) & HASH_SR_BUSY))
981967 		cpu_relax();
982968 
983969 	rctx->hw_context = kmalloc_array(3 + HASH_CSR_REGISTER_NUMBER,
....@@ -1466,10 +1452,8 @@
14661452 		return ret;
14671453 
14681454 	irq = platform_get_irq(pdev, 0);
1469
-	if (irq < 0) {
1470
-		dev_err(dev, "Cannot get IRQ resource\n");
1455
+	if (irq < 0)
14711456 		return irq;
1472
-	}
14731457 
14741458 	ret = devm_request_threaded_irq(dev, irq, stm32_hash_irq_handler,
14751459 					stm32_hash_irq_thread, IRQF_ONESHOT,
....@@ -1480,11 +1464,9 @@
14801464 	}
14811465 
14821466 	hdev->clk = devm_clk_get(&pdev->dev, NULL);
1483
-	if (IS_ERR(hdev->clk)) {
1484
-		dev_err(dev, "failed to get clock for hash (%lu)\n",
1485
-			PTR_ERR(hdev->clk));
1486
-		return PTR_ERR(hdev->clk);
1487
-	}
1467
+	if (IS_ERR(hdev->clk))
1468
+		return dev_err_probe(dev, PTR_ERR(hdev->clk),
1469
+				     "failed to get clock for hash\n");
14881470 
14891471 	ret = clk_prepare_enable(hdev->clk);
14901472 	if (ret) {
....@@ -1500,7 +1482,12 @@
15001482 	pm_runtime_enable(dev);
15011483 
15021484 	hdev->rst = devm_reset_control_get(&pdev->dev, NULL);
1503
-	if (!IS_ERR(hdev->rst)) {
1485
+	if (IS_ERR(hdev->rst)) {
1486
+		if (PTR_ERR(hdev->rst) == -EPROBE_DEFER) {
1487
+			ret = -EPROBE_DEFER;
1488
+			goto err_reset;
1489
+		}
1490
+	} else {
15041491 		reset_control_assert(hdev->rst);
15051492 		udelay(2);
15061493 		reset_control_deassert(hdev->rst);
....@@ -1511,8 +1498,15 @@
15111498 	platform_set_drvdata(pdev, hdev);
15121499 
15131500 	ret = stm32_hash_dma_init(hdev);
1514
-	if (ret)
1501
+	switch (ret) {
1502
+	case 0:
1503
+		break;
1504
+	case -ENOENT:
15151505 		dev_dbg(dev, "DMA mode not available\n");
1506
+		break;
1507
+	default:
1508
+		goto err_dma;
1509
+	}
15161510 
15171511 	spin_lock(&stm32_hash.lock);
15181512 	list_add_tail(&hdev->list, &stm32_hash.dev_list);
....@@ -1550,10 +1544,10 @@
15501544 	spin_lock(&stm32_hash.lock);
15511545 	list_del(&hdev->list);
15521546 	spin_unlock(&stm32_hash.lock);
1553
-
1547
+err_dma:
15541548 	if (hdev->dma_lch)
15551549 		dma_release_channel(hdev->dma_lch);
1556
-
1550
+err_reset:
15571551 	pm_runtime_disable(dev);
15581552 	pm_runtime_put_noidle(dev);
15591553 
....@@ -1564,7 +1558,7 @@
15641558 
15651559 static int stm32_hash_remove(struct platform_device *pdev)
15661560 {
1567
-	static struct stm32_hash_dev *hdev;
1561
+	struct stm32_hash_dev *hdev;
15681562 	int ret;
15691563 
15701564 	hdev = platform_get_drvdata(pdev);
....@@ -1572,8 +1566,6 @@
15721566 		return -ENODEV;
15731567 
15741568 	ret = pm_runtime_get_sync(hdev->dev);
1575
-	if (ret < 0)
1576
-		return ret;
15771569 
15781570 	stm32_hash_unregister_algs(hdev);
15791571 
....@@ -1589,7 +1581,8 @@
15891581 	pm_runtime_disable(hdev->dev);
15901582 	pm_runtime_put_noidle(hdev->dev);
15911583 
1592
-	clk_disable_unprepare(hdev->clk);
1584
+	if (ret >= 0)
1585
+		clk_disable_unprepare(hdev->clk);
15931586 
15941587 	return 0;
15951588 }