write in 30M

hc

2024-02-20 ea08eeccae9297f7aabd2ef7f0c2517ac4549acc

 kernel/drivers/crypto/ccp/ccp-dev-v5.c
..
..
@@ -1,20 +1,14 @@
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+// SPDX-License-Identifier: GPL-2.0-only
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 /*
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  * AMD Cryptographic Coprocessor (CCP) driver
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  *
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- * Copyright (C) 2016,2017 Advanced Micro Devices, Inc.
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+ * Copyright (C) 2016,2019 Advanced Micro Devices, Inc.
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  *
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  * Author: Gary R Hook <gary.hook@amd.com>
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- *
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- * This program is free software; you can redistribute it and/or modify
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- * it under the terms of the GNU General Public License version 2 as
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- * published by the Free Software Foundation.
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  */
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-#include <linux/module.h>
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 #include <linux/kernel.h>
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-#include <linux/pci.h>
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 #include <linux/kthread.h>
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-#include <linux/debugfs.h>
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 #include <linux/dma-mapping.h>
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 #include <linux/interrupt.h>
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 #include <linux/compiler.h>
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@@ -227,8 +221,8 @@
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 static int ccp5_do_cmd(struct ccp5_desc *desc,
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 		       struct ccp_cmd_queue *cmd_q)
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 {
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-	u32 *mP;
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-	__le32 *dP;
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+	__le32 *mP;
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+	u32 *dP;
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 	u32 tail;
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 	int	i;
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 	int ret = 0;
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@@ -241,8 +235,8 @@
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 	}
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 	mutex_lock(&cmd_q->q_mutex);
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-	mP = (u32 *) &cmd_q->qbase[cmd_q->qidx];
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-	dP = (__le32 *) desc;
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+	mP = (__le32 *)&cmd_q->qbase[cmd_q->qidx];
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+	dP = (u32 *)desc;
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 	for (i = 0; i < 8; i++)
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 		mP[i] = cpu_to_le32(dP[i]); /* handle endianness */
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@@ -795,8 +789,19 @@
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 	/* Find available queues */
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 	qmr = ioread32(ccp->io_regs + Q_MASK_REG);
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-	for (i = 0; i < MAX_HW_QUEUES; i++) {
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+	/*
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+	 * Check for a access to the registers.  If this read returns
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+	 * 0xffffffff, it's likely that the system is running a broken
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+	 * BIOS which disallows access to the device. Stop here and fail
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+	 * the initialization (but not the load, as the PSP could get
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+	 * properly initialized).
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+	 */
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+	if (qmr == 0xffffffff) {
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+		dev_notice(dev, "ccp: unable to access the device: you might be running a broken BIOS.\n");
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+		return 1;
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+	}
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+	for (i = 0; (i < MAX_HW_QUEUES) && (ccp->cmd_q_count < ccp->max_q_count); i++) {
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 		if (!(qmr & (1 << i)))
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 			continue;
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@@ -809,6 +814,7 @@
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 		if (!dma_pool) {
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 			dev_err(dev, "unable to allocate dma pool\n");
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 			ret = -ENOMEM;
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+			goto e_pool;
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 		}
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 		cmd_q = &ccp->cmd_q[ccp->cmd_q_count];
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@@ -822,7 +828,7 @@
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 		/* Page alignment satisfies our needs for N <= 128 */
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 		BUILD_BUG_ON(COMMANDS_PER_QUEUE > 128);
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 		cmd_q->qsize = Q_SIZE(Q_DESC_SIZE);
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-		cmd_q->qbase = dma_zalloc_coherent(dev, cmd_q->qsize,
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+		cmd_q->qbase = dmam_alloc_coherent(dev, cmd_q->qsize,
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 						   &cmd_q->qbase_dma,
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 						   GFP_KERNEL);
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 		if (!cmd_q->qbase) {
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@@ -860,7 +866,7 @@
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 	if (ccp->cmd_q_count == 0) {
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 		dev_notice(dev, "no command queues available\n");
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-		ret = -EIO;
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+		ret = 1;
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 		goto e_pool;
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 	}
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@@ -973,8 +979,10 @@
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 	if (ret)
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 		goto e_hwrng;
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+#ifdef CONFIG_CRYPTO_DEV_CCP_DEBUGFS
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 	/* Set up debugfs entries */
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 	ccp5_debugfs_setup(ccp);
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+#endif
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 	return 0;
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@@ -998,7 +1006,6 @@
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 static void ccp5_destroy(struct ccp_device *ccp)
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 {
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-	struct device *dev = ccp->dev;
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 	struct ccp_cmd_queue *cmd_q;
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 	struct ccp_cmd *cmd;
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 	unsigned int i;
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@@ -1012,11 +1019,13 @@
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 	/* Remove this device from the list of available units first */
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 	ccp_del_device(ccp);
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+#ifdef CONFIG_CRYPTO_DEV_CCP_DEBUGFS
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 	/* We're in the process of tearing down the entire driver;
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 	 * when all the devices are gone clean up debugfs
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 	 */
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 	if (ccp_present())
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 		ccp5_debugfs_destroy();
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+#endif
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 	/* Disable and clear interrupts */
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 	ccp5_disable_queue_interrupts(ccp);
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@@ -1038,12 +1047,6 @@
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 			kthread_stop(ccp->cmd_q[i].kthread);
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 	sp_free_ccp_irq(ccp->sp, ccp);
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-
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-	for (i = 0; i < ccp->cmd_q_count; i++) {
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-		cmd_q = &ccp->cmd_q[i];
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-		dma_free_coherent(dev, cmd_q->qsize, cmd_q->qbase,
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-				  cmd_q->qbase_dma);
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-	}
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 	/* Flush the cmd and backlog queue */
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 	while (!list_empty(&ccp->cmd)) {