| .. | .. |
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| 67 | 67 | struct clk *clk_ipg; |
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| 68 | 68 | const struct imx_gpt_data *gpt; |
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| 69 | 69 | struct clock_event_device ced; |
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| 70 | | - struct irqaction act; |
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| 71 | 70 | }; |
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| 72 | 71 | |
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| 73 | 72 | struct imx_gpt_data { |
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| .. | .. |
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| 141 | 140 | return sched_clock_reg ? readl_relaxed(sched_clock_reg) : 0; |
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| 142 | 141 | } |
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| 143 | 142 | |
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| 143 | +#if defined(CONFIG_ARM) |
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| 144 | 144 | static struct delay_timer imx_delay_timer; |
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| 145 | 145 | |
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| 146 | 146 | static unsigned long imx_read_current_timer(void) |
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| 147 | 147 | { |
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| 148 | 148 | return readl_relaxed(sched_clock_reg); |
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| 149 | 149 | } |
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| 150 | +#endif |
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| 150 | 151 | |
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| 151 | 152 | static int __init mxc_clocksource_init(struct imx_timer *imxtm) |
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| 152 | 153 | { |
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| 153 | 154 | unsigned int c = clk_get_rate(imxtm->clk_per); |
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| 154 | 155 | void __iomem *reg = imxtm->base + imxtm->gpt->reg_tcn; |
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| 155 | 156 | |
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| 157 | +#if defined(CONFIG_ARM) |
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| 156 | 158 | imx_delay_timer.read_current_timer = &imx_read_current_timer; |
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| 157 | 159 | imx_delay_timer.freq = c; |
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| 158 | 160 | register_current_timer_delay(&imx_delay_timer); |
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| 161 | +#endif |
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| 159 | 162 | |
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| 160 | 163 | sched_clock_reg = reg; |
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| 161 | 164 | |
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| .. | .. |
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| 198 | 201 | static int mxc_shutdown(struct clock_event_device *ced) |
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| 199 | 202 | { |
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| 200 | 203 | struct imx_timer *imxtm = to_imx_timer(ced); |
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| 201 | | - unsigned long flags; |
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| 202 | 204 | u32 tcn; |
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| 203 | | - |
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| 204 | | - /* |
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| 205 | | - * The timer interrupt generation is disabled at least |
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| 206 | | - * for enough time to call mxc_set_next_event() |
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| 207 | | - */ |
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| 208 | | - local_irq_save(flags); |
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| 209 | 205 | |
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| 210 | 206 | /* Disable interrupt in GPT module */ |
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| 211 | 207 | imxtm->gpt->gpt_irq_disable(imxtm); |
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| .. | .. |
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| 221 | 217 | printk(KERN_INFO "%s: changing mode\n", __func__); |
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| 222 | 218 | #endif /* DEBUG */ |
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| 223 | 219 | |
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| 224 | | - local_irq_restore(flags); |
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| 225 | | - |
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| 226 | 220 | return 0; |
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| 227 | 221 | } |
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| 228 | 222 | |
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| 229 | 223 | static int mxc_set_oneshot(struct clock_event_device *ced) |
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| 230 | 224 | { |
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| 231 | 225 | struct imx_timer *imxtm = to_imx_timer(ced); |
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| 232 | | - unsigned long flags; |
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| 233 | | - |
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| 234 | | - /* |
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| 235 | | - * The timer interrupt generation is disabled at least |
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| 236 | | - * for enough time to call mxc_set_next_event() |
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| 237 | | - */ |
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| 238 | | - local_irq_save(flags); |
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| 239 | 226 | |
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| 240 | 227 | /* Disable interrupt in GPT module */ |
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| 241 | 228 | imxtm->gpt->gpt_irq_disable(imxtm); |
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| .. | .. |
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| 260 | 247 | * mode switching |
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| 261 | 248 | */ |
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| 262 | 249 | imxtm->gpt->gpt_irq_enable(imxtm); |
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| 263 | | - local_irq_restore(flags); |
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| 264 | 250 | |
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| 265 | 251 | return 0; |
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| 266 | 252 | } |
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| .. | .. |
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| 286 | 272 | static int __init mxc_clockevent_init(struct imx_timer *imxtm) |
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| 287 | 273 | { |
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| 288 | 274 | struct clock_event_device *ced = &imxtm->ced; |
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| 289 | | - struct irqaction *act = &imxtm->act; |
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| 290 | 275 | |
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| 291 | 276 | ced->name = "mxc_timer1"; |
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| 292 | 277 | ced->features = CLOCK_EVT_FEAT_ONESHOT | CLOCK_EVT_FEAT_DYNIRQ; |
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| .. | .. |
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| 300 | 285 | clockevents_config_and_register(ced, clk_get_rate(imxtm->clk_per), |
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| 301 | 286 | 0xff, 0xfffffffe); |
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| 302 | 287 | |
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| 303 | | - act->name = "i.MX Timer Tick"; |
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| 304 | | - act->flags = IRQF_TIMER | IRQF_IRQPOLL; |
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| 305 | | - act->handler = mxc_timer_interrupt; |
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| 306 | | - act->dev_id = ced; |
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| 307 | | - |
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| 308 | | - return setup_irq(imxtm->irq, act); |
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| 288 | + return request_irq(imxtm->irq, mxc_timer_interrupt, |
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| 289 | + IRQF_TIMER | IRQF_IRQPOLL, "i.MX Timer Tick", ced); |
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| 309 | 290 | } |
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| 310 | 291 | |
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| 311 | 292 | static void imx1_gpt_setup_tctl(struct imx_timer *imxtm) |
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