write in 30M

hc

2024-02-20 ea08eeccae9297f7aabd2ef7f0c2517ac4549acc

 kernel/drivers/clk/sprd/pll.h
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@@ -1,4 +1,4 @@
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-// SPDX-License-Identifier: GPL-2.0
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+/* SPDX-License-Identifier: GPL-2.0 */
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 //
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 // Spreadtrum pll clock driver
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 //
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@@ -61,27 +61,33 @@
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 	struct sprd_clk_common	common;
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 };
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+#define SPRD_PLL_HW_INIT_FN(_struct, _name, _parent, _reg,	\
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+			    _regs_num, _itable, _factors,	\
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+			    _udelay, _k1, _k2, _fflag,		\
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+			    _fvco, _fn)				\
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+	struct sprd_pll _struct = {				\
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+		.regs_num	= _regs_num,			\
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+		.itable		= _itable,			\
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+		.factors	= _factors,			\
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+		.udelay		= _udelay,			\
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+		.k1		= _k1,				\
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+		.k2		= _k2,				\
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+		.fflag		= _fflag,			\
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+		.fvco		= _fvco,			\
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+		.common		= {				\
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+			.regmap		= NULL,			\
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+			.reg		= _reg,			\
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+			.hw.init	= _fn(_name, _parent,	\
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+					      &sprd_pll_ops, 0),\
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+		},						\
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+	}
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+
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 #define SPRD_PLL_WITH_ITABLE_K_FVCO(_struct, _name, _parent, _reg,	\
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 				    _regs_num, _itable, _factors,	\
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 				    _udelay, _k1, _k2, _fflag, _fvco)	\
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-	struct sprd_pll _struct = {					\
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-		.regs_num	= _regs_num,				\
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-		.itable		= _itable,				\
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-		.factors	= _factors,				\
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-		.udelay		= _udelay,				\
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-		.k1		= _k1,					\
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-		.k2		= _k2,					\
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-		.fflag		= _fflag,				\
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-		.fvco		= _fvco,				\
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-		.common		= {					\
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-			.regmap		= NULL,				\
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-			.reg		= _reg,				\
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-			.hw.init	= CLK_HW_INIT(_name,		\
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-						      _parent,		\
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-						      &sprd_pll_ops,	\
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-						      0),		\
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-		},							\
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-	}
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+	SPRD_PLL_HW_INIT_FN(_struct, _name, _parent, _reg, _regs_num,	\
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+			    _itable, _factors, _udelay, _k1, _k2,	\
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+			    _fflag, _fvco, CLK_HW_INIT)
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 #define SPRD_PLL_WITH_ITABLE_K(_struct, _name, _parent, _reg,		\
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 			       _regs_num, _itable, _factors,		\
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@@ -96,6 +102,19 @@
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 				    _regs_num, _itable, _factors,	\
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 				    _udelay, 1000, 1000, 0, 0)
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+#define SPRD_PLL_FW_NAME(_struct, _name, _parent, _reg, _regs_num,	\
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+			 _itable, _factors, _udelay, _k1, _k2,		\
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+			 _fflag, _fvco)					\
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+	SPRD_PLL_HW_INIT_FN(_struct, _name, _parent, _reg, _regs_num,	\
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+			    _itable, _factors, _udelay, _k1, _k2,	\
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+			    _fflag, _fvco, CLK_HW_INIT_FW_NAME)
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+
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+#define SPRD_PLL_HW(_struct, _name, _parent, _reg, _regs_num, _itable,	\
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+		    _factors, _udelay, _k1, _k2, _fflag, _fvco)		\
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+	SPRD_PLL_HW_INIT_FN(_struct, _name, _parent, _reg, _regs_num,	\
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+			    _itable, _factors, _udelay, _k1, _k2,	\
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+			    _fflag, _fvco, CLK_HW_INIT_HW)
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+
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 static inline struct sprd_pll *hw_to_sprd_pll(struct clk_hw *hw)
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 {
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 	struct sprd_clk_common *common = hw_to_sprd_clk_common(hw);