| .. | .. |
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| 1 | +// SPDX-License-Identifier: GPL-2.0 |
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| 1 | 2 | /* |
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| 2 | 3 | * Copyright (C) 2010-2011 Canonical Ltd <jeremy.kerr@canonical.com> |
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| 3 | 4 | * Copyright (C) 2011-2012 Mike Turquette, Linaro Ltd <mturquette@linaro.org> |
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| 4 | | - * |
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| 5 | | - * This program is free software; you can redistribute it and/or modify |
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| 6 | | - * it under the terms of the GNU General Public License version 2 as |
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| 7 | | - * published by the Free Software Foundation. |
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| 8 | 5 | * |
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| 9 | 6 | * Fixed rate clock implementation |
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| 10 | 7 | */ |
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| .. | .. |
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| 27 | 24 | * parent - fixed parent. No clk_set_parent support |
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| 28 | 25 | */ |
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| 29 | 26 | |
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| 27 | +#define to_clk_fixed_rate(_hw) container_of(_hw, struct clk_fixed_rate, hw) |
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| 28 | + |
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| 30 | 29 | static unsigned long clk_fixed_rate_recalc_rate(struct clk_hw *hw, |
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| 31 | 30 | unsigned long parent_rate) |
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| 32 | 31 | { |
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| .. | .. |
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| 36 | 35 | static unsigned long clk_fixed_rate_recalc_accuracy(struct clk_hw *hw, |
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| 37 | 36 | unsigned long parent_accuracy) |
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| 38 | 37 | { |
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| 39 | | - return to_clk_fixed_rate(hw)->fixed_accuracy; |
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| 38 | + struct clk_fixed_rate *fixed = to_clk_fixed_rate(hw); |
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| 39 | + |
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| 40 | + if (fixed->flags & CLK_FIXED_RATE_PARENT_ACCURACY) |
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| 41 | + return parent_accuracy; |
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| 42 | + |
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| 43 | + return fixed->fixed_accuracy; |
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| 40 | 44 | } |
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| 41 | 45 | |
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| 42 | 46 | const struct clk_ops clk_fixed_rate_ops = { |
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| .. | .. |
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| 45 | 49 | }; |
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| 46 | 50 | EXPORT_SYMBOL_GPL(clk_fixed_rate_ops); |
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| 47 | 51 | |
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| 48 | | -/** |
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| 49 | | - * clk_hw_register_fixed_rate_with_accuracy - register fixed-rate clock with |
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| 50 | | - * the clock framework |
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| 51 | | - * @dev: device that is registering this clock |
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| 52 | | - * @name: name of this clock |
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| 53 | | - * @parent_name: name of clock's parent |
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| 54 | | - * @flags: framework-specific flags |
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| 55 | | - * @fixed_rate: non-adjustable clock rate |
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| 56 | | - * @fixed_accuracy: non-adjustable clock rate |
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| 57 | | - */ |
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| 58 | | -struct clk_hw *clk_hw_register_fixed_rate_with_accuracy(struct device *dev, |
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| 59 | | - const char *name, const char *parent_name, unsigned long flags, |
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| 60 | | - unsigned long fixed_rate, unsigned long fixed_accuracy) |
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| 52 | +struct clk_hw *__clk_hw_register_fixed_rate(struct device *dev, |
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| 53 | + struct device_node *np, const char *name, |
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| 54 | + const char *parent_name, const struct clk_hw *parent_hw, |
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| 55 | + const struct clk_parent_data *parent_data, unsigned long flags, |
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| 56 | + unsigned long fixed_rate, unsigned long fixed_accuracy, |
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| 57 | + unsigned long clk_fixed_flags) |
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| 61 | 58 | { |
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| 62 | 59 | struct clk_fixed_rate *fixed; |
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| 63 | 60 | struct clk_hw *hw; |
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| 64 | 61 | struct clk_init_data init = {}; |
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| 65 | | - int ret; |
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| 62 | + int ret = -EINVAL; |
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| 66 | 63 | |
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| 67 | 64 | /* allocate fixed-rate clock */ |
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| 68 | 65 | fixed = kzalloc(sizeof(*fixed), GFP_KERNEL); |
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| .. | .. |
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| 71 | 68 | |
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| 72 | 69 | init.name = name; |
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| 73 | 70 | init.ops = &clk_fixed_rate_ops; |
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| 74 | | - init.flags = flags | CLK_IS_BASIC; |
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| 75 | | - init.parent_names = (parent_name ? &parent_name: NULL); |
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| 76 | | - init.num_parents = (parent_name ? 1 : 0); |
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| 71 | + init.flags = flags; |
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| 72 | + init.parent_names = parent_name ? &parent_name : NULL; |
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| 73 | + init.parent_hws = parent_hw ? &parent_hw : NULL; |
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| 74 | + init.parent_data = parent_data; |
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| 75 | + if (parent_name || parent_hw || parent_data) |
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| 76 | + init.num_parents = 1; |
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| 77 | + else |
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| 78 | + init.num_parents = 0; |
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| 77 | 79 | |
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| 78 | 80 | /* struct clk_fixed_rate assignments */ |
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| 81 | + fixed->flags = clk_fixed_flags; |
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| 79 | 82 | fixed->fixed_rate = fixed_rate; |
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| 80 | 83 | fixed->fixed_accuracy = fixed_accuracy; |
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| 81 | 84 | fixed->hw.init = &init; |
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| 82 | 85 | |
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| 83 | 86 | /* register the clock */ |
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| 84 | 87 | hw = &fixed->hw; |
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| 85 | | - ret = clk_hw_register(dev, hw); |
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| 88 | + if (dev || !np) |
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| 89 | + ret = clk_hw_register(dev, hw); |
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| 90 | + else if (np) |
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| 91 | + ret = of_clk_hw_register(np, hw); |
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| 86 | 92 | if (ret) { |
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| 87 | 93 | kfree(fixed); |
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| 88 | 94 | hw = ERR_PTR(ret); |
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| .. | .. |
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| 90 | 96 | |
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| 91 | 97 | return hw; |
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| 92 | 98 | } |
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| 93 | | -EXPORT_SYMBOL_GPL(clk_hw_register_fixed_rate_with_accuracy); |
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| 94 | | - |
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| 95 | | -struct clk *clk_register_fixed_rate_with_accuracy(struct device *dev, |
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| 96 | | - const char *name, const char *parent_name, unsigned long flags, |
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| 97 | | - unsigned long fixed_rate, unsigned long fixed_accuracy) |
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| 98 | | -{ |
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| 99 | | - struct clk_hw *hw; |
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| 100 | | - |
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| 101 | | - hw = clk_hw_register_fixed_rate_with_accuracy(dev, name, parent_name, |
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| 102 | | - flags, fixed_rate, fixed_accuracy); |
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| 103 | | - if (IS_ERR(hw)) |
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| 104 | | - return ERR_CAST(hw); |
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| 105 | | - return hw->clk; |
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| 106 | | -} |
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| 107 | | -EXPORT_SYMBOL_GPL(clk_register_fixed_rate_with_accuracy); |
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| 108 | | - |
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| 109 | | -/** |
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| 110 | | - * clk_hw_register_fixed_rate - register fixed-rate clock with the clock |
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| 111 | | - * framework |
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| 112 | | - * @dev: device that is registering this clock |
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| 113 | | - * @name: name of this clock |
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| 114 | | - * @parent_name: name of clock's parent |
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| 115 | | - * @flags: framework-specific flags |
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| 116 | | - * @fixed_rate: non-adjustable clock rate |
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| 117 | | - */ |
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| 118 | | -struct clk_hw *clk_hw_register_fixed_rate(struct device *dev, const char *name, |
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| 119 | | - const char *parent_name, unsigned long flags, |
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| 120 | | - unsigned long fixed_rate) |
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| 121 | | -{ |
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| 122 | | - return clk_hw_register_fixed_rate_with_accuracy(dev, name, parent_name, |
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| 123 | | - flags, fixed_rate, 0); |
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| 124 | | -} |
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| 125 | | -EXPORT_SYMBOL_GPL(clk_hw_register_fixed_rate); |
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| 99 | +EXPORT_SYMBOL_GPL(__clk_hw_register_fixed_rate); |
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| 126 | 100 | |
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| 127 | 101 | struct clk *clk_register_fixed_rate(struct device *dev, const char *name, |
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| 128 | 102 | const char *parent_name, unsigned long flags, |
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| 129 | 103 | unsigned long fixed_rate) |
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| 130 | 104 | { |
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| 131 | | - return clk_register_fixed_rate_with_accuracy(dev, name, parent_name, |
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| 132 | | - flags, fixed_rate, 0); |
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| 105 | + struct clk_hw *hw; |
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| 106 | + |
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| 107 | + hw = clk_hw_register_fixed_rate_with_accuracy(dev, name, parent_name, |
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| 108 | + flags, fixed_rate, 0); |
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| 109 | + if (IS_ERR(hw)) |
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| 110 | + return ERR_CAST(hw); |
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| 111 | + return hw->clk; |
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| 133 | 112 | } |
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| 134 | 113 | EXPORT_SYMBOL_GPL(clk_register_fixed_rate); |
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| 135 | 114 | |
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| .. | .. |
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| 158 | 137 | EXPORT_SYMBOL_GPL(clk_hw_unregister_fixed_rate); |
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| 159 | 138 | |
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| 160 | 139 | #ifdef CONFIG_OF |
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| 161 | | -static struct clk *_of_fixed_clk_setup(struct device_node *node) |
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| 140 | +static struct clk_hw *_of_fixed_clk_setup(struct device_node *node) |
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| 162 | 141 | { |
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| 163 | | - struct clk *clk; |
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| 142 | + struct clk_hw *hw; |
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| 164 | 143 | const char *clk_name = node->name; |
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| 165 | 144 | u32 rate; |
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| 166 | 145 | u32 accuracy = 0; |
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| .. | .. |
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| 173 | 152 | |
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| 174 | 153 | of_property_read_string(node, "clock-output-names", &clk_name); |
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| 175 | 154 | |
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| 176 | | - clk = clk_register_fixed_rate_with_accuracy(NULL, clk_name, NULL, |
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| 155 | + hw = clk_hw_register_fixed_rate_with_accuracy(NULL, clk_name, NULL, |
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| 177 | 156 | 0, rate, accuracy); |
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| 178 | | - if (IS_ERR(clk)) |
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| 179 | | - return clk; |
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| 157 | + if (IS_ERR(hw)) |
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| 158 | + return hw; |
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| 180 | 159 | |
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| 181 | | - ret = of_clk_add_provider(node, of_clk_src_simple_get, clk); |
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| 160 | + ret = of_clk_add_hw_provider(node, of_clk_hw_simple_get, hw); |
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| 182 | 161 | if (ret) { |
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| 183 | | - clk_unregister(clk); |
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| 162 | + clk_hw_unregister_fixed_rate(hw); |
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| 184 | 163 | return ERR_PTR(ret); |
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| 185 | 164 | } |
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| 186 | 165 | |
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| 187 | | - return clk; |
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| 166 | + return hw; |
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| 188 | 167 | } |
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| 189 | 168 | |
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| 190 | 169 | /** |
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| 191 | 170 | * of_fixed_clk_setup() - Setup function for simple fixed rate clock |
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| 171 | + * @node: device node for the clock |
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| 192 | 172 | */ |
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| 193 | 173 | void __init of_fixed_clk_setup(struct device_node *node) |
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| 194 | 174 | { |
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| .. | .. |
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| 198 | 178 | |
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| 199 | 179 | static int of_fixed_clk_remove(struct platform_device *pdev) |
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| 200 | 180 | { |
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| 201 | | - struct clk *clk = platform_get_drvdata(pdev); |
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| 181 | + struct clk_hw *hw = platform_get_drvdata(pdev); |
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| 202 | 182 | |
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| 203 | 183 | of_clk_del_provider(pdev->dev.of_node); |
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| 204 | | - clk_unregister_fixed_rate(clk); |
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| 184 | + clk_hw_unregister_fixed_rate(hw); |
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| 205 | 185 | |
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| 206 | 186 | return 0; |
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| 207 | 187 | } |
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| 208 | 188 | |
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| 209 | 189 | static int of_fixed_clk_probe(struct platform_device *pdev) |
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| 210 | 190 | { |
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| 211 | | - struct clk *clk; |
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| 191 | + struct clk_hw *hw; |
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| 212 | 192 | |
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| 213 | 193 | /* |
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| 214 | 194 | * This function is not executed when of_fixed_clk_setup |
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| 215 | 195 | * succeeded. |
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| 216 | 196 | */ |
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| 217 | | - clk = _of_fixed_clk_setup(pdev->dev.of_node); |
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| 218 | | - if (IS_ERR(clk)) |
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| 219 | | - return PTR_ERR(clk); |
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| 197 | + hw = _of_fixed_clk_setup(pdev->dev.of_node); |
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| 198 | + if (IS_ERR(hw)) |
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| 199 | + return PTR_ERR(hw); |
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| 220 | 200 | |
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| 221 | | - platform_set_drvdata(pdev, clk); |
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| 201 | + platform_set_drvdata(pdev, hw); |
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| 222 | 202 | |
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| 223 | 203 | return 0; |
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| 224 | 204 | } |
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| .. | .. |
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| 227 | 207 | { .compatible = "fixed-clock" }, |
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| 228 | 208 | { } |
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| 229 | 209 | }; |
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| 230 | | -MODULE_DEVICE_TABLE(of, of_fixed_clk_ids); |
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| 231 | 210 | |
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| 232 | 211 | static struct platform_driver of_fixed_clk_driver = { |
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| 233 | 212 | .driver = { |
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